CN114637538A - Baseboard management control system, electronic device and baseboard management control method - Google Patents
Baseboard management control system, electronic device and baseboard management control method Download PDFInfo
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- CN114637538A CN114637538A CN202011481623.7A CN202011481623A CN114637538A CN 114637538 A CN114637538 A CN 114637538A CN 202011481623 A CN202011481623 A CN 202011481623A CN 114637538 A CN114637538 A CN 114637538A
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- 238000007726 management method Methods 0.000 claims description 91
- 238000012545 processing Methods 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 3
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
A substrate management control system, an electronic device and a substrate management control method are suitable for the electronic device, are used for setting the hardware configuration of at least one hardware component connected with the electronic device, and comprise a erasable memory and a substrate management controller. The erasable memory stores a hardware description file; the hardware description file records hardware description language program codes of at least one paragraph, and the hardware description language program codes of at least one paragraph correspond to at least one hardware component. The substrate management controller is electrically connected with at least one hardware component and the erasable memory; the baseboard management controller is used for loading and executing a kernel program to carry out an initialization stage, and the baseboard management controller loads and executes an analysis program in the initialization stage and loads the hardware description file by the erasable memory. Based on executing the parsing program, the baseboard management controller parses the hardware description language program code of at least one section to generate necessary files for communication connection with the hardware component.
Description
Technical Field
The present invention relates to a baseboard management controller, and more particularly, to a baseboard management control system, an electronic device using the baseboard management control system, and a baseboard management control method.
Background
When the server host is shipped, necessary hardware components, such as thermocouples, fans and the like, are arranged according to the configuration of the hard disk, the central processing unit and the memory. At this time, the baseboard management controller writes necessary firmware according to the configuration of the hardware component, so that the baseboard management controller can control the hardware component and correctly receive and interpret the data returned by the hardware component. For example, the bmc needs to have a correct setting to control the fan speed with a correct pin and command, and can interpret the speed according to the electric signal responded by the fan and give a mark (the speed from the fan number a) that the speed is correct; similarly, the bmc needs to have the correct settings to correctly interpret the temperature according to the electrical signals responded by the thermocouples and give the correct temperature indication (temperature from thermocouple number a).
If the hardware component configuration is changed, such as location change or quantity increase or decrease, the settings in the baseboard management controller firmware will not conform to the new hardware component configuration. At this point, the firmware must be updated.
The existing firmware update of baseboard management controller is based on the hardware component configuration provided by user, after compiling new program code and packaging it into image file, the user or engineering personnel operating the equipment to overwrite the firmware of baseboard management controller with image file. The foregoing modification is cumbersome (requiring repackaging), user requirements are diversified, and the modification of hardware component configuration and the updating of kernel are mixed in the same image file, which makes version management of the bmc firmware difficult.
Disclosure of Invention
In view of the above technical problems, the present invention provides a baseboard management control system, an electronic device using the baseboard management control system, and a baseboard management control method, which can simplify firmware update procedures and simplify firmware version management.
The invention provides a baseboard management control system, which is suitable for an electronic device and used for setting the hardware configuration of at least one hardware component connected with the electronic device. The erasable memory stores a hardware description file; the hardware description file records hardware description language program codes of at least one paragraph, and the hardware description language program codes of at least one paragraph correspond to at least one hardware component. The substrate management controller is electrically connected with at least one hardware component and the erasable memory; the baseboard management controller is used for loading and executing a kernel program to carry out an initialization stage, and the baseboard management controller loads and executes an analysis program in the initialization stage, and loads the hardware description file by the erasable memory. Based on executing the parsing program, the baseboard management controller parses the hardware description language program code of at least one section to generate necessary files for communication connection with the hardware component.
In at least one embodiment, the bmc establishes a communication link with at least one hardware component according to the required document, and completes an initialization stage to control the at least one hardware component or receive a signal transmitted back from the at least one hardware component.
In at least one embodiment, the bmc system further includes a data source storing at least one updated hardware description file, and the bmc is connected to the data source and configured to obtain the updated hardware description file, write the updated hardware description file into the erasable memory, and overwrite the original hardware description file.
Preferably, the baseboard management controller is connected to the data source through a network interface.
Preferably, the baseboard management controller is connected to the data source through a bus connection interface.
The present invention further provides an electronic device, configured to be connected to at least one hardware component, including a system chipset, a central processing unit, at least one volatile memory connection interface, at least one bus connection interface, a network interface, and a power management circuit. The central processing unit is electrically connected with the system chip set and is used for connecting a central processing unit with the system chip set. The volatile memory connection interface is electrically connected with the system chip set and used for connecting a memory module to the system chip set. The bus connection interface is electrically connected to the system chipset for connecting a peripheral device to the system chipset. The network interface is electrically connected to the system chipset and used for connecting to a network. The power management circuit is used for outputting power to the central processing unit, the system chip set, the volatile memory connection interface, the bus connection interface and the network interface. The system chipset further comprises the baseboard management control system for setting a hardware configuration of at least one hardware component connected to the electronic device.
In at least one embodiment, the bmc is connected to a data source through a network interface, and is configured to obtain an updated hardware description file from the data source, write the updated hardware description file into the erasable memory, and overwrite an original hardware description file.
In at least one embodiment, the bmc is connected to a data source through the bus connection interface, and is configured to obtain an updated hardware description file from the data source, write the updated hardware description file into the erasable memory, and overwrite an original hardware description file.
The invention also provides a substrate management control method, which is suitable for an electronic device and used for setting the hardware configuration of at least one hardware component connected with the electronic device.
The substrate control management method comprises the following steps: storing at least one hardware description file by using a rewritable memory; wherein, the hardware description file records the hardware description language program code of at least one paragraph, corresponding to at least one hardware component; after the electronic device starts a starting-up stage, starting a substrate management controller to load and execute a kernel program, so that the substrate management controller carries out an initialization stage; loading and executing an analysis program by using a baseboard management controller, and loading at least one hardware description file from a rewritable memory; and analyzing the hardware description language program code of at least one section by the baseboard management controller based on the execution analysis program to generate a necessary file for communication connection with at least one hardware component.
In at least one embodiment, the bmc further includes establishing a communication link with the at least one hardware component according to the required document and completing the initialization stage to control the at least one hardware component or receive a signal returned by the at least one hardware component.
In at least one embodiment, the baseboard management control method further includes connecting the baseboard management controller to a data source, obtaining an updated hardware description file from the data source, writing the updated hardware description file into the erasable memory, and overwriting an original hardware description file.
In at least one embodiment, the baseboard management controller is connected to the data source through a network interface.
In at least one embodiment, the baseboard management controller is connected to the data source through a bus connection interface.
According to the invention, in most cases, the user only needs to update the hardware description file without changing the kernel program or the analysis program of the baseboard management controller, thereby simplifying the firmware update process and simplifying the version management. In addition, the updating process of the hardware description file does not involve the updating and burning of the basic firmware (namely the kernel program and the analysis program), and the problem that the baseboard management controller cannot be started completely due to the reading error of the firmware can be reduced. Therefore, the firmware updating operation is more suitable for being processed in the local machine of the electronic device, and the firmware of the substrate management controller is not required to be burned by an external burning device.
Drawings
FIG. 1 is a block diagram of an electronic device according to an embodiment of the invention.
Fig. 2 is a block diagram of a baseboard management control system according to an embodiment of the present invention.
FIG. 3 is a diagram of a hardware description file, hardware description language program code, and hardware components in an embodiment of the present invention.
FIG. 4 is a diagram illustrating a baseboard management controller loading and parsing a hardware description file according to an embodiment of the invention.
Fig. 5 is a flowchart of a baseboard management control method according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating a baseboard management controller connected to a data source according to an embodiment of the present invention.
Fig. 7 is a schematic diagram of updating a hardware description file in the embodiment of the present invention.
Wherein the reference numerals are as follows:
10: electronic device
11: plate body
12: central processor connecting interface
13: system chipset
13 a: path controller
13 b: logic chip
14: volatile memory connection interface
15: bus connection interface
16: network interface
17: power management circuit
100: baseboard management control system
110: erasable memory
112: hardware description file
112': updating hardware description file
120: baseboard management controller
122: kernel program
124: analysis program
200: hardware assembly
300: data source
Detailed Description
Referring to fig. 1 and fig. 2, a baseboard management control system 100 according to an embodiment of the present invention is suitable for an electronic device 10 to manage one or more hardware components 200 disposed in the electronic device 10. The electronic device 10 may be a motherboard, a server, a computer host, or a quasi-system host. The electronic device 10 of the present embodiment is described by taking a motherboard as an example. Hardware components 200 include, but are not limited to, temperature sensors (e.g., thermocouples), fans, switch ICs, etc.
As shown in fig. 1 and fig. 2, the main board at least includes a board body 11, a cpu connection interface 12, a system chipset 13, one or more volatile memory connection interfaces 14, one or more bus connection interfaces 15, a network interface 16, and a power management circuit 17. The system chipset 13 includes a path controller 13a, a logic chip 13b, and a baseboard management control system 100. The combination of the path controller 13a and the logic chip 13b is merely an example, and does not exclude the composition of other types of system chipsets 13.
As shown in fig. 1, the board body 11 may be a printed circuit board having a printed circuit for providing electrical connection. The board 11 does not exclude other types of boards, and electrical connection between the components is achieved by wires. The cpu connection interface 12, the system chipset 13, the volatile memory connection interface 14, the bus connection interface 15, the network interface 16 and the power management circuit 17 are disposed on the board 11 to provide the functions required by the motherboard. The power management circuit 17 is connected to the power supply for receiving the working power provided by the power supply, converting the working power into a proper voltage, and outputting the power to different electronic components. The arrows shown in fig. 1 represent power transmission lines. The cpu connection interface 12 is electrically connected to the system chipset 13, and is used for connecting the cpu to the system chipset 13. The volatile memory connection interface 14 is electrically connected to the system chipset 13, and is used for connecting the memory module to the system chipset 13. The bus interface 15 includes, but is not limited to, a hard disk interface, an expansion card interface, a graphics card (or graphics chip) interface, a universal serial bus (usb) interface, or a pin directly disposed on the system chipset 13. The bus connection interface 15 is electrically connected to the system chipset 13, and is used for connecting a peripheral device, such as a hard disk drive, to the system chipset 13. Hardware component 200 is electrically connected, directly or indirectly, to baseboard management control system 100. The network interface 16 is electrically connected to the system chipset 13 for connecting the motherboard to a network. The cpu connection interface 12 and the volatile memory connection interface 14 are not necessarily in the form of electrical connectors, but may be reserved solder circuit pins.
As shown in fig. 1 and fig. 2, the bmc 100 is disposed on a board 11 of a motherboard for setting a hardware configuration (hardware configuration) of the hardware component 200. The BMC system 100 includes a rewritable memory 110 and a BMC (baseboard management controller) 120.
As shown in fig. 2 and 3. Erasable memory 110 may be a non-volatile storage device such as an EEPROM, flash memory, or the like that can be erased by a connection interface. The erasable memory 110 stores a Hardware Description file 112(Hardware Description file). The Hardware Description file 112 records one or more paragraphs of Hardware Description Language Code (Hardware Description Language Code), where each paragraph of Hardware Description Language Code corresponds to one Hardware component 200. According to the Management Platform standard, the hardware description language program code may be applicable to an Intelligent Platform Management Interface (IPMI), a Redfish extensible Platform Management API, and a network booting related protocol, and may also include a website for the bmc 120 to connect to the remote data source 300.
As shown in fig. 2, 3, and 4, the bmc 120 is directly or indirectly electrically connected to the hardware components 200 and the erasable memory 110. The bmc 120 executes a kernel 122 and a parser 124. As shown in fig. 4, after the electronic device 10 is booted with necessary components, the bmc 120 may load and execute the kernel 122 during the boot phase of the electronic device 10 to perform the initialization phase of the bmc 120 itself. The bmc 120 executes the parser 124 during an initialization phase to load the hardware description file 112 from the erasable memory 110. Upon execution of the parser 124, the bmc 120 parses the hardware description language code of one or more segments of the hardware description file 112 to generate necessary files, such as drivers, for communication with each hardware component 200. Then, the bmc 120 establishes a communication link with the hardware components 200 and completes an initialization phase to control the hardware components 200 or receive a signal transmitted back from the hardware components 200.
As shown in fig. 3 and 4, the hardware description language program code is a language for describing functions and behaviors of the hardware component 200, and can describe the digital circuit system at the register transfer level, the behavior level, the logic gate level, and the like, so as to facilitate the board management controller 120 to identify the hardware component 200 and establish the communication link. The parser 124 of the bmc 120 may generate necessary files (compiled as drivers capable of executing binary code) corresponding to the hardware components 200 according to the description of the hardware description language program code, so that the kernel 122 executed by the bmc 120 can initialize the hardware components 200 and establish a communication link with each hardware component 200, so as to control the hardware components 200 with correct logic and receive and parse signals returned from the hardware components 200 correctly.
The following is an illustration of the hardware description file 112, which illustrates the possible content of the hardware description language program code. In this illustration, a substrate management controller 120 of AST2500 model number AST Technology Inc., a PCA9545 switch IC model number PCA9545 of Texas Instruments, and a thermocouple connected to PCA9545 are used, and the foregoing models and the following program notations in the hardware description language program code are merely exemplary and are not intended to limit the types of hardware components 200 that can be used in the practice of the present invention.
In the above illustration, the set of switch IC, motherboard thermocouple, and CPU thermocouple may be considered as a hardware component 200, and the program codes of the row numbers 1 to 17 may be considered as hardware description language program codes of a single paragraph. The switch IC, the motherboard thermocouple, and the CPU thermocouple may be regarded as a plurality of hardware components 200, and the program codes of the line numbers 1 to 17 may be regarded as hardware description language program codes of a plurality of paragraphs, each corresponding to one hardware component 200. When the switch IC model changes, the number/location of the motherboard thermocouples changes, the number/location of the CPU thermocouples changes, and even new hardware components 200 are added, i.e., one or more hardware components 200 are changed. At this point, the original hardware description language code is not applicable to the new hardware component or components 200. For example, when a hard disk drive thermocouple is newly added to detect the temperature of the hard disk drive, the contents of the line numbers 1 to 17 lack a hardware description language program code corresponding to the hard disk drive thermocouple; for another example, when the motherboard thermocouple is removed or the GPU temperature is detected instead, the program code segment corresponding to the motherboard thermocouple may not conform to the actual configuration. For example, if a CPU fan is added, the hardware description language program code needs to include a method for controlling the fan speed command and analyzing the fan feedback speed.
According to the present invention, in the foregoing case, the basic firmware (kernel program 122, analysis program 124) of the bmc 120 itself does not need to be updated, but only needs to read and write the erasable memory 110, and replace the hardware description file 112 with an updated file; even more, the user can rewrite the contents of the hardware description file 112 by executing the plain text editing program in a state where the electronic device 10 is turned on, and write the modified hardware description file 112 into the erasable memory 110 to rewrite the original hardware description file 112.
As shown in fig. 5, based on the electronic device 10, the present invention further provides a baseboard management control method, which is suitable for the electronic device 10, for setting a hardware configuration of at least one hardware component 200 connected to the electronic device 10. The steps of the baseboard management control method are as follows.
As shown in fig. 5, first, the hardware description file 112 is stored in the erasable memory 110, as shown in step S110. The hardware description file 112 records one or more paragraphs of hardware description language program code corresponding to one or more hardware components 200. The way of storing the hardware description file 112 in the erasable memory 110 may be to directly write into the erasable memory 110 by a dedicated read-write device; or, in the state that the electronic device 10 is turned on, the bmc 120 reads and writes the erasable memory 110 to modify or update the hardware description file 112 already stored in the erasable memory 110
As shown in fig. 5, after the electronic device 10 starts the boot phase, the bmc 120 is started to load and execute the kernel 122, so that the bmc 120 performs the initialization phase, as shown in steps S120 and S130. Next, the parsing program 124 is loaded and executed by the bmc 120, and the hardware description file 112 is loaded from the erasable memory 110, as shown in step S140.
As shown in fig. 5, the bmc 120 parses the hdl code of one or more paragraphs in the hdl description 112 based on the execution of the parser 124, so as to generate necessary files for communication with the hardware components 200, as shown in step S150. Finally, the bmc 120 may establish a communication link with the hardware components 200 according to necessary files, such as drivers, and complete an initialization phase to control the hardware components 200 or receive signals sent back by the hardware components 200.
As shown in fig. 6 and 7, in the power-on state of the electronic device 10, the bmc 120 may be directly or indirectly connected to the data source 300. For example, the bmc 120 may be connected to a remote server through the network interface 16 shown in fig. 1, and the server is used as the data source 300. For another example, the bmc 120 may be connected to a local hard disk drive through the bus connection interface 15 shown in fig. 1, and the hard disk drive is used as the data source 300.
As shown in fig. 6 and 7, the data source 300 is used to store the updated hardware description file 112'. Through the connection between the bmc 120 and the data source 300, the bmc 120 may obtain the updated hardware description file 112' from the data source 300. Next, the kernel 122 of the bmc 120 may read one or more segments of the hardware description language program code in the updated hardware description file 112' to convert the updated hardware description file 112' into a necessary file format, write the updated hardware description file 112' as a new hardware description file 112 into the erasable memory 110, and overwrite the original hardware description file 112 to conform to the configuration of the hardware component 200 currently or under predetermined modification.
A plurality of updated hardware description files 112 'may be stored in the data source 300, each updated hardware description file 112' matching a configuration of a hardware component 200. Therefore, for the user, when operating the electronic device 10, the bmc 120 may be operated by the program to obtain the updated hardware description file 112' from the data source 300 and write the updated hardware description file into the erasable memory 110 to update the hardware description file 112, as long as the configuration of the hardware component 200 is confirmed. The update process of the hardware description file 112 does not involve the firmware update of the baseboard management controller 120 itself. Therefore, the firmware of the baseboard management controller 120 can be distinguished into version management of the basic firmware and version management of the hardware description file 112.
In most cases, the user's requirement for firmware update only requires updating the hardware description file 112, so that the version management is simplified without interleaving the basic firmware version management and the hardware description file 112 version management; the version of the base firmware and the version of the hardware description file 112 may be managed individually. In addition, the update process of the hardware description file 112 does not involve updating and burning of the basic firmware, so that the problem that the baseboard management controller 120 cannot be started completely due to a read-in error of the firmware can be solved; even if the writing is erroneous, the writing of the hardware description file 112 can be resumed in a state where the baseboard management controller 120 can be started. Therefore, the update operation is more suitable for being processed in the local electronic device 10, and the firmware of the bmc 120 does not need to be burned by an external burning device.
Claims (13)
1. A baseboard management control system adapted for an electronic device to configure a hardware configuration of at least one hardware component connected to the electronic device, the baseboard management control system comprising:
the erasable memory stores a hardware description file; the hardware description file records hardware description language program codes of at least one paragraph, and the hardware description language program codes of at least one paragraph correspond to the at least one hardware component; and
a baseboard management controller electrically connected to the at least one hardware component and the erasable memory; the baseboard management controller is used for loading and executing a kernel program to carry out an initialization stage, and the baseboard management controller loads and executes an analysis program in the initialization stage, and the erasable memory loads the hardware description file; based on executing the analysis program, the baseboard management controller analyzes the hardware description language program code of the at least one paragraph and generates a necessary file for communication connection with the at least one hardware component.
2. The bmc system of claim 1, wherein the bmc establishes a communication link with the at least one hardware component according to the required document, and completes the initialization phase to control the at least one hardware component or receive a signal returned by the at least one hardware component.
3. The bmc system of claim 1, further comprising a data source storing at least one updated hardware description file, wherein the bmc is connected to the data source for obtaining the at least one updated hardware description file and writing the at least one updated hardware description file into the erasable memory to overwrite an original hardware description file.
4. The bmc system of claim 3, wherein the bmc is connected to the data source through a network interface.
5. The bmc system of claim 3, wherein the bmc is coupled to the data source via a bus interface.
6. An electronic device for connecting to at least one hardware component, the electronic device comprising:
a system chipset;
a central processor electrically connected to the system chip set for connecting a central processor to the system chip set;
at least one volatile memory connection interface electrically connected to the system chipset for connecting a memory module to the system chipset;
at least one bus connection interface electrically connected to the system chip set for connecting a peripheral device to the system chip set;
a network interface electrically connected to the system chip set for connecting to a network;
a power management circuit for outputting power to the central processing unit, the system chipset, the at least one volatile memory connection interface, the at least one bus connection interface, and the network interface;
the system chipset further comprises the bmc system of any one of claims 1 to 2, configured to configure a hardware configuration of the at least one hardware component connected to the electronic device.
7. The electronic device of claim 6, wherein the baseboard management controller is connected to a data source through the network interface, and configured to obtain an updated hardware description file from the data source, and write the updated hardware description file into the erasable memory to overwrite an original hardware description file.
8. The electronic device of claim 6, wherein the baseboard management controller is connected to a data source through the at least one bus connection interface, and is configured to obtain an updated hardware description file from the data source, and write the updated hardware description file into the erasable memory to overwrite an original hardware description file.
9. A baseboard management control method is suitable for an electronic device and used for setting a hardware configuration of at least one hardware component connected with the electronic device, and is characterized in that the baseboard management method comprises the following steps:
storing at least one hardware description file by using a rewritable memory; wherein, the at least one hardware description file records a hardware description language program code of at least one paragraph corresponding to the at least one hardware component;
after the electronic device starts a starting-up stage, starting a substrate management controller to load and execute a kernel program, so that the substrate management controller carries out an initialization stage;
loading and executing an analysis program by the baseboard management controller, and loading the at least one hardware description file from the erasable memory; and
based on executing the parsing program, the baseboard management controller parses the hardware description language program code of the at least one paragraph, and generates a necessary file for performing communication connection with the at least one hardware component.
10. The baseboard management control method of claim 9, wherein the baseboard management method further comprises: the baseboard management controller establishes communication connection with the at least one hardware component according to the necessary file, and completes the initialization stage to control the at least one hardware component or receive a signal returned by the at least one hardware component.
11. The baseboard management control method of claim 9, wherein the baseboard management method further comprises: the baseboard management controller is connected with a data source, an updated hardware description file is obtained from the data source, and the updated hardware description file is written into the erasable memory to overwrite the original at least one hardware description file.
12. The bmc method of claim 11, wherein the bmc is connected to the data source through a network interface.
13. The bmc method of claim 11, wherein the bmc is connected to the data source through a bus interface.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0934698A (en) * | 1995-07-20 | 1997-02-07 | Hitachi Ltd | Software generating method and software developing and supporting method |
| CN104050068A (en) * | 2014-05-23 | 2014-09-17 | 北京兆易创新科技股份有限公司 | Method and device for debugging FPGA (field programmable gate array) in MCU (microprogrammed control unit) chip |
| CN104679619A (en) * | 2013-11-28 | 2015-06-03 | 英业达科技有限公司 | Server and detection method of server |
| CN104683101A (en) * | 2013-11-28 | 2015-06-03 | 鸿富锦精密工业（深圳）有限公司 | SSL certificate generating and introducing device and method |
| JP2016173744A (en) * | 2015-03-17 | 2016-09-29 | 日本電気株式会社 | Blade server, blade system, bmc, chipset, and enclosure manager |
| TW202022610A (en) * | 2018-12-05 | 2020-06-16 | 英業達股份有限公司 | Method for detecting a server |
-
2020
- 2020-12-15 CN CN202011481623.7A patent/CN114637538B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0934698A (en) * | 1995-07-20 | 1997-02-07 | Hitachi Ltd | Software generating method and software developing and supporting method |
| CN104679619A (en) * | 2013-11-28 | 2015-06-03 | 英业达科技有限公司 | Server and detection method of server |
| CN104683101A (en) * | 2013-11-28 | 2015-06-03 | 鸿富锦精密工业（深圳）有限公司 | SSL certificate generating and introducing device and method |
| CN104050068A (en) * | 2014-05-23 | 2014-09-17 | 北京兆易创新科技股份有限公司 | Method and device for debugging FPGA (field programmable gate array) in MCU (microprogrammed control unit) chip |
| JP2016173744A (en) * | 2015-03-17 | 2016-09-29 | 日本電気株式会社 | Blade server, blade system, bmc, chipset, and enclosure manager |
| TW202022610A (en) * | 2018-12-05 | 2020-06-16 | 英業達股份有限公司 | Method for detecting a server |
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