CN114630427A - Method for limiting downlink control channel and related product - Google Patents

Method for limiting downlink control channel and related product Download PDF

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Publication number
CN114630427A
CN114630427A CN202011468483.XA CN202011468483A CN114630427A CN 114630427 A CN114630427 A CN 114630427A CN 202011468483 A CN202011468483 A CN 202011468483A CN 114630427 A CN114630427 A CN 114630427A
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pdcch
spcell
sscell
time slot
cell
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周欢
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Beijing Ziguang Zhanrui Communication Technology Co Ltd
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Beijing Ziguang Zhanrui Communication Technology Co Ltd
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Priority to CN202011468483.XA priority Critical patent/CN114630427A/en
Priority to PCT/CN2021/134518 priority patent/WO2022127585A1/en
Publication of CN114630427A publication Critical patent/CN114630427A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/20—Control channels or signalling for resource management
    • H04W72/23—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • H04W72/044—Wireless resource allocation based on the type of the allocated resource
    • H04W72/0453—Resources in frequency domain, e.g. a carrier in FDMA
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/12—Wireless traffic scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W24/00—Supervisory, monitoring or testing arrangements
    • H04W24/02—Arrangements for optimising operational condition

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  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The embodiment of the application provides a method for limiting a downlink control channel (PDCCH) and a related product, wherein the method comprises the following steps: if the SScell cross-cell schedules the PDCCH of the SPcell, configuration information is obtained, the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling the SPcell, and the subcarrier interval mu of the SScell is obtainedkSub-carrier spacing mu of SPcelliExcess configuration of SScell; according to muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell. The technical scheme provided by the application has the advantage of improving the network performance.

Description

Method for limiting downlink control channel and related product
Technical Field
The present application relates to the field of communication processing technologies, and in particular, to a method for limiting a downlink control channel and a related product.
Background
In the existing carrier aggregation scene, only cross-carrier scheduling of the secondary cell is supported. If a certain cell of a UE (User equipment) is configured for cross-carrier scheduling, it means that the UE needs to monitor a PDCCH (Physical Downlink Control Channel) of the cell in another cell, and the PDCCH is not transmitted in the cell.
In the existing carrier aggregation scenario, only cross-carrier scheduling of the secondary cell is supported, and the primary cell can only perform local carrier scheduling, which causes the problem of limited PDCCH capacity in the primary cell, for example, bottleneck problems such as insufficient PDCCH resources, excessive PDCCH blind detection number and the like occur, and network performance is affected.
Disclosure of Invention
The embodiment of the application discloses a limiting method of a downlink control channel and a related product, which can support carrier scheduling of a main cell, avoid the problem of excessive PDCCH blind detection number and improve network performance.
In a first aspect, a method for restricting a downlink control channel PDCCH is provided, where the method includes the following steps:
if the SScell of the secondary cell is scheduled to cross-cell and schedule the PDCCH of the SPcell of the special cell, acquiring configuration information, wherein the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling the SPcell, and the b is greater than 0 and less than or equal to 1;
obtaining the subcarrier spacing mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
according to muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
In a second aspect, an apparatus for limiting a downlink control channel PDCCH is provided, the apparatus including:
the device comprises an obtaining unit, a scheduling unit and a scheduling unit, wherein the obtaining unit is used for obtaining configuration information when the secondary cell SScell is scheduled to cross-cell the PDCCH of the special cell SPcell, the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling SPcell, and the b is greater than 0 and less than or equal to 1; obtaining sub-carrier spacing mu of SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
a limiting unit for limiting the value of muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
In a third aspect, there is provided an electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the method of the first aspect.
In a fourth aspect, a computer-readable storage medium is provided, storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform the method of the first aspect.
In a fifth aspect, there is provided a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps as described in the first aspect of an embodiment of the present application. The computer program product may be a software installation package.
In a sixth aspect, a chip system is provided, the chip system comprising at least one processor, a memory and an interface circuit, the memory, the transceiver and the at least one processor being interconnected by wires, the at least one memory having a computer program stored therein; the computer program, when executed by the processor, implements the method of the first aspect.
According to the technical scheme, when the PDCCH of the SPcell is dispatched by the SScell in a cross-cell mode, configuration information is obtained and used for configuring the PDCCH capacity proportion b of the SPcell monitored and dispatched by the UE and obtaining the subcarrier interval mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell; according to muk、μiAnd excess configuration and proportion b determine the limitation condition of the SScell cross-cell scheduling SPcell monitoring PDCCH of the SPcell, so that when the SScell cross-cell scheduling SPcell is performed, the limitation condition needs to be met, and then when the cross-cell scheduling SPcell is performed, the increase of PDCCH blind detection number is avoided, the complexity of UE is avoided, and the network performance is improved.
Drawings
The drawings used in the embodiments of the present application are described below.
FIG. 1 is a system architecture diagram of an exemplary communication system;
fig. 2 is a flowchart illustrating a PDCCH limiting method provided in the present application;
fig. 3 is a schematic structural diagram of a PDCCH limiting apparatus according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The embodiments of the present application will be described below with reference to the drawings.
The term "and/or" in this application is only one kind of association relationship describing the associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" in this document indicates that the former and latter related objects are in an "or" relationship.
The "plurality" appearing in the embodiments of the present application means two or more. The descriptions of the first, second, etc. appearing in the embodiments of the present application are only for illustrating and differentiating the objects, and do not represent the order or the particular limitation of the number of the devices in the embodiments of the present application, and do not constitute any limitation to the embodiments of the present application. The term "connect" in the embodiments of the present application refers to various connection manners, such as direct connection or indirect connection, to implement communication between devices, which is not limited in this embodiment of the present application.
The technical solution of the embodiment of the present application may be applied to the example communication system 100 shown in fig. 1, where the example communication system 100 includes a terminal 110 and a network device 120, and the terminal 110 is communicatively connected to the network device 120.
A terminal in the embodiments of the present application may refer to various forms of UE, access terminal, subscriber unit, subscriber station, mobile station, MS (mobile station), remote station, remote terminal, mobile device, user terminal, terminal device (terminal equipment), wireless communication device, user agent, or user equipment. The terminal device may also be a cellular phone, a cordless phone, an SIP (session initiation protocol) phone, a WLL (wireless local loop) station, a PDA (personal digital assistant) with a wireless communication function, a handheld device with a wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a future 5G network or a terminal device in a future evolved PLMN (public land mobile network, chinese), and the like, which are not limited in this embodiment.
Referring to fig. 2, fig. 2 provides a PDCCH limiting method, which may be applied to the communication system shown in fig. 1, and specifically, the method may be performed by a network device shown in fig. 1, or may be performed by a terminal shown in fig. 1, where the method shown in fig. 2 includes the following steps:
step S201, if a scheduling secondary cell (SScell, scheduling secondary cell) schedules a PDCCH of an scell (special cell) in a cross-cell manner, acquiring configuration information, where the configuration information is used to configure a PDCCH capacity ratio b of a UE monitoring and scheduling the scell, where b is greater than 0 and less than or equal to 1;
the above-mentioned SPcell may include a primary Cell and a Secondary primary Cell, the primary Cell refers to a primary Cell in an MCG (Master Cell group), and the Secondary Cell refers to a primary Cell in an SCG (Secondary Cell group).
The configuration information may be configuration information configured by a higher layer.
Step S202, obtaining the subcarrier spacing mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
step S203, according to muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
According to the technical scheme, when the PDCCH of the SPcell is dispatched by the SScell in a cross-cell mode, configuration information is obtained and used for configuring the PDCCH capacity proportion b of the SPcell monitored and dispatched by the UE and obtaining the subcarrier interval mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell; according to muk、μiOver-provisioning and scalingAnd b, determining a limiting condition of monitoring the PDCCH of the SPcell of the SScell cross-cell scheduling SPcell, so that the limiting condition needs to be met when the SPcell is scheduled in a cross-cell manner, and further, when the SPcell is scheduled in a cross-cell manner, the increase of the number of PDCCH blind tests is avoided, the complexity of UE is further avoided, and the network performance is improved.
In an optional scheme, the implementation method of step S203 may specifically include:
if the excess is configured as forbidden and muk＝μi(ii) a Determining the maximum number of PDCCH candidates monitored in one time slot of the SPcell as
Figure BDA0002834389010000041
Determining the maximum number of non-overlapping Control Channel Elements (CCEs) monitored in one time slot of the SPcell as
Figure BDA0002834389010000042
Wherein,
Figure BDA0002834389010000043
monitoring the maximum number of PDCCH candidates in a time slot in a service cell, wherein Msp is the number of the PDCCH candidates monitored in the time slot configured on an SScell;
Figure BDA0002834389010000044
the maximum number of non-overlapping CCEs monitored in a time slot in a serving cell, Csp is the number of non-overlapping CCEs monitored in the time slot configured on an SScell for PDCCH.
Maximum number of monitored PDCCH candidates in one time slot in the serving cell
Figure BDA0002834389010000045
In relation to the subcarrier spacing μ ∈ {0,1,2,3}, as shown in table 1:
table 1:
Figure BDA0002834389010000046
as described above
Figure BDA0002834389010000047
Related to the subcarrier spacing μ, as shown in table 2. Non-overlapping CCEs are defined to belong to different sets of control resources, or the starting OFDM symbols of PDCCH candidates are different.
Table 2:
Figure BDA0002834389010000051
in the above optional scheme, the maximum number of PDCCH candidates monitored in one timeslot of the SPcell is set as
Figure BDA0002834389010000052
The problem of excessive PDCCH blind detection numbers can be avoided, and the network performance is improved.
In an optional scheme, the implementation method of step S203 may further include:
if over-configured to allow and muk＝μi(ii) a Determining the maximum number of PDCCH candidates monitored in one time slot of the SPcell and the SScell as
Figure BDA0002834389010000053
Figure BDA0002834389010000054
The maximum number of monitored PDCCH candidates in a time slot in a serving cell.
As described above
Figure BDA0002834389010000055
See table 1 for values of (a).
In an optional aspect, the method may further include:
if the Search Space (SS) index of the SPcell is different from the SS index of the SScell cross carrier scheduling, after all the SS indexes on the SPcell and the SScell are arranged in an ascending order, the search space of the maximum index is reduced until the limit condition is met.
The specific implementation manner may be that, after all SS indexes on the SPcell and the SScell are arranged in an ascending order, the search space of the largest index is reduced to see whether the limiting condition is satisfied, if the search space of the largest index is reduced to satisfy the limiting condition, the reduction operation is ended, and if the search space of the second largest index is reduced to see whether the limiting condition is satisfied, until the limiting condition is satisfied.
In an optional scheme, the implementation method of step S203 may specifically include:
if SCS of SPcell is muk(ii) a If the serving cell belongs to
Figure BDA0002834389010000056
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000057
PDCCH candidates, or not more than
Figure BDA0002834389010000058
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA0002834389010000059
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000510
PDCCH candidates, or not more than
Figure BDA00028343890100000511
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000512
Figure BDA00028343890100000513
PDCCH candidates, or not more than
Figure BDA00028343890100000514
Non-overlapping CCEs.
Min (X, Y) above means taking the minimum value of X, Y, e.g.
Figure BDA00028343890100000515
Express get
Figure BDA0002834389010000061
Figure BDA0002834389010000062
Is measured.
The γ is the capability of monitoring the PDCCH in the cell, and may specifically take values of 1 and 2, and may be configured by a higher layer signaling.
Wherein,
Figure BDA0002834389010000063
Figure BDA0002834389010000064
in an optional scheme, the implementation method of step S203 may specifically include:
if SCS of SPcell is muk(ii) a If the serving cell belongs to
Figure BDA0002834389010000065
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000066
PDCCH candidates, or not more than
Figure BDA0002834389010000067
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA0002834389010000068
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000069
PDCCH candidates, or not more than
Figure BDA00028343890100000610
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000611
Figure BDA00028343890100000612
PDCCH candidates, or not more than
Figure BDA00028343890100000613
Non-overlapping CCEs;
SCS of SScell ═ mui(ii) a If the serving cell belongs to
Figure BDA00028343890100000614
Downlink cells, not more than each time slot per serving cell
Figure BDA00028343890100000615
PDCCH candidates, or not more than
Figure BDA00028343890100000616
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA00028343890100000617
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000618
PDCCH candidates, or not more than
Figure BDA00028343890100000619
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000620
PDCCH candidates, or not more than
Figure BDA00028343890100000621
Figure BDA00028343890100000622
Non-overlapping CCEs;
the a-1-b or the a is configured for the configuration information.
As described above
Figure BDA00028343890100000623
The method specifically comprises the following steps: the serving cell is not configured with scheduling using multi DCI, described above
Figure BDA00028343890100000624
The method specifically comprises the following steps: the serving cell configuration employs scheduling of multi DCI.
Example one
SCS of Pcell in this embodiment is μkIn group, UE configures
Figure BDA0002834389010000071
A downlink cell, and
Figure BDA0002834389010000072
the UE will not require more than BandWidth per timeslot on the serving cell active downlink BW (BandWidth)
Figure BDA0002834389010000073
Figure BDA0002834389010000074
PDCCH candidates, or more than
Figure BDA0002834389010000075
Non-overlapping CCEs.
If the serving cell belongs to
Figure BDA0002834389010000076
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000077
PDCCH candidates, or not more than
Figure BDA0002834389010000078
Figure BDA0002834389010000079
Non-overlapping CCEs.
If the serving cell belongs to
Figure BDA00028343890100000710
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000711
Figure BDA00028343890100000712
PDCCH candidates, or not more than
Figure BDA00028343890100000713
Figure BDA00028343890100000714
Non-overlapping CCEs. The PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000715
PDCCH candidates, or not more than
Figure BDA00028343890100000716
Non-overlapping CCEs.
According to the embodiment of the application, excess (over-amount) is not expected in the SScell, only the limitation condition of the PSell is checked, and the limitation condition of the PSell is adjusted according to the high-layer configuration ratio b, so that the problems that the number of PDCCHs monitored by the PCELL is configured randomly is too many, the complexity of the UE is too high, the number of the PDCCHs is limited, the complexity of the UE is reduced, the number of the PDCCH blind tests is too many, and the complexity of the PDCCHs can be improved.
Example two
In the second embodiment of the present application, SCS of scell ═ μiIn the group, if the UE is configured
Figure BDA00028343890100000717
A downlink cell, and
Figure BDA00028343890100000718
the UE will not require more than every slot on the serving cell active downlink BW
Figure BDA00028343890100000719
Figure BDA00028343890100000720
PDCCH candidates, or more than
Figure BDA0002834389010000081
Non-overlapping CCEs;
if SCS of SPcell is muk(ii) a If the serving cell belongs to
Figure BDA0002834389010000082
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000083
PDCCH candidates, or not more than
Figure BDA0002834389010000084
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA0002834389010000085
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000086
PDCCH candidates, or not more than
Figure BDA0002834389010000087
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA0002834389010000088
Figure BDA0002834389010000089
PDCCH candidates, or not more than
Figure BDA00028343890100000810
Non-overlapping CCEs;
if the serving cell belongs to
Figure BDA00028343890100000811
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000812
PDCCH candidates, or not more than
Figure BDA00028343890100000813
Figure BDA00028343890100000814
Non-overlapping CCEs;
if the serving cell belongs to
Figure BDA00028343890100000815
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000816
Figure BDA00028343890100000817
PDCCH candidates, or not more than
Figure BDA00028343890100000818
Figure BDA00028343890100000819
Non-overlapping CCEs. The PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000820
PDCCH candidates, or not more than
Figure BDA00028343890100000821
Non-overlapping CCEs.
Referring to fig. 3, fig. 3 provides a PDCCH limiting apparatus, where the apparatus is applied to an electronic device, and the electronic device may be a user equipment or a network device, and the apparatus includes:
an obtaining unit 301, configured to obtain configuration information when a secondary cell SScell is scheduled to cross-cell the PDCCH of a special cell scell, where the configuration information is used to configure a PDCCH capacity ratio b of a UE monitoring and scheduling the scell, where b is greater than 0 and less than or equal to 1; obtaining the subcarrier spacing mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
a limiting unit 302 for determining μk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
According to the technical scheme, when the PDCCH of the SPcell is dispatched by the SScell in a cross-cell mode, configuration information is obtained and used for configuring the PDCCH capacity proportion b of the SPcell monitored and dispatched by the UE and obtaining the subcarrier interval mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell; according to muk、μiAnd excess configuration and proportion b determine the limitation condition of the SScell cross-cell scheduling SPcell monitoring PDCCH of the SPcell, so that when the SScell cross-cell scheduling SPcell is performed, the limitation condition needs to be met, and then when the cross-cell scheduling SPcell is performed, the increase of PDCCH blind detection number is avoided, the complexity of UE is avoided, and the network performance is improved.
In an alternative arrangement, the first and second electrodes may be,
a limiting unit 302 for limiting the current μ if the current is over-configured to disablek＝μi(ii) a Specifically, the maximum number of monitored PDCCH candidates in one time slot for determining SPcell is
Figure BDA0002834389010000091
Determining the maximum number of non-overlapping Control Channel Elements (CCEs) monitored in one time slot of the SPcell as
Figure BDA0002834389010000092
Wherein,
Figure BDA0002834389010000093
monitoring the maximum number of PDCCH candidates in a time slot in a service cell, wherein Msp is the number of the PDCCH candidates monitored in the time slot configured on an SScell;
Figure BDA0002834389010000094
the maximum number of non-overlapping CCEs monitored in a time slot in a serving cell, Csp is the number of non-overlapping CCEs monitored in the time slot configured on an SScell for PDCCH.
In an alternative arrangement, the first and second electrodes may be,
a limiting unit 302, if over-configured to allow and μk＝μi(ii) a Specifically, the maximum number of monitored PDCCH candidates in one time slot for determining SPcell and SScell is
Figure BDA0002834389010000095
Figure BDA0002834389010000096
The maximum number of PDCCH candidates monitored in one slot in one serving cell.
In an optional scheme, the apparatus may further include:
the processing unit 303 is configured to, if the SPcell self-scheduling search space index and the SScell cross-carrier scheduling SS index are different, reduce the search space of the maximum index until the constraint condition is satisfied after all SS indexes on the SPcell and the SScell are arranged in an ascending order.
In an alternative arrangement, the first and second electrodes may be,
the limiting unit 302 is specifically used for determining the SCS of the scell as μk(ii) a If the serving cell belongs to
Figure BDA0002834389010000097
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000098
PDCCH candidates, or not more than
Figure BDA0002834389010000099
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA00028343890100000910
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100000911
PDCCH candidates, or not more than
Figure BDA00028343890100000912
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100000913
Figure BDA00028343890100000914
PDCCH candidates, or not more than
Figure BDA00028343890100000915
Non-overlapping CCEs.
In an alternative arrangement, the first and second electrodes may be,
the restriction unit 302 is specifically used for the SPcelSCS of l ═ muk(ii) a If the serving cell belongs to
Figure BDA0002834389010000101
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000102
PDCCH candidates, or not more than
Figure BDA0002834389010000103
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA0002834389010000104
Downlink cells, each serving cell not having more than one time slot
Figure BDA0002834389010000105
PDCCH candidates, or not more than
Figure BDA0002834389010000106
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA0002834389010000107
Figure BDA0002834389010000108
PDCCH candidates, or not more than
Figure BDA0002834389010000109
Non-overlapping CCEs;
SCS of SScell ═ mui(ii) a If the serving cell belongs to
Figure BDA00028343890100001010
Downlink cells, each serving cell not having more than one time slot
Figure BDA00028343890100001011
PDCCH candidates, or not more than
Figure BDA00028343890100001012
Non-overlapping CCEs; if the serving cell belongs to
Figure BDA00028343890100001013
Downlink cells, not more than each time slot per serving cell
Figure BDA00028343890100001014
PDCCH candidates, or not more than
Figure BDA00028343890100001015
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure BDA00028343890100001016
PDCCH candidates, or not more than
Figure BDA00028343890100001017
Figure BDA00028343890100001018
Non-overlapping CCEs;
the a is 1-b or the a is configured for the configuration information; gamma is a configuration value of the configuration information.
It will be appreciated that the electronic device, in order to implement the above-described functions, comprises corresponding hardware and/or software modules for performing the respective functions. The present application is capable of being implemented in hardware or a combination of hardware and computer software in conjunction with the exemplary algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, with the embodiment described in connection with the particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In this embodiment, the electronic device may be divided into functional modules according to the method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module may be implemented in the form of hardware. It should be noted that the division of the modules in this embodiment is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
In the case of dividing each functional module by corresponding functions, the above-mentioned obtaining unit 301, limiting unit 302, and processing unit 303 may be used to support the user equipment to perform the steps shown in fig. 2 and the refinement of the embodiment shown in fig. 2.
It should be noted that all relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.
In case an integrated unit is employed, the user equipment may comprise a processing module and a storage module. The processing module may be configured to control and manage an action of the user equipment, and for example, may be configured to support the electronic equipment to perform the steps performed by the obtaining unit 301, the limiting unit 302, and the processing unit 303. The memory module may be used to support the electronic device in executing stored program codes and data, etc.
The processing module may be a processor or a controller. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. A processor may also be a combination of computing functions, e.g., a combination of one or more microprocessors, a Digital Signal Processing (DSP) and a microprocessor, or the like. The storage module may be a memory. The communication module may specifically be a radio frequency circuit, a bluetooth chip, a Wi-Fi chip, or other devices that interact with other electronic devices.
It should be understood that the interface connection relationship between the modules illustrated in the embodiment of the present application is only an exemplary illustration, and does not form a limitation on the structure of the user equipment. In other embodiments of the present application, the user equipment may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.
Referring to fig. 4, fig. 4 is an electronic device 40 provided in an embodiment of the present application, where the electronic device 40 includes a processor 401, a memory 402, and a communication interface 403, and the processor 401, the memory 402, and the communication interface 403 are connected to each other through a bus.
The memory 402 includes, but is not limited to, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or a portable read-only memory (CD-ROM), and the memory 402 is used for related computer programs and data. The communication interface 403 is used for receiving and transmitting data.
The processor 401 may be one or more Central Processing Units (CPUs), and in the case that the processor 401 is one CPU, the CPU may be a single-core CPU or a multi-core CPU.
Processor 401 may include one or more processing units, such as: the processing unit may include an Application Processor (AP), a modem processor, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), etc. Wherein the different processing units may be separate components or may be integrated in one or more processors. In some embodiments, the user equipment may also include one or more processing units. The controller can generate an operation control signal according to the instruction operation code and the time sequence signal to complete the control of instruction fetching and instruction execution. In other embodiments, a memory may also be provided in the processing unit for storing instructions and data. Illustratively, the memory in the processing unit may be a cache memory. The memory may hold instructions or data that have just been used or recycled by the processing unit. If the processing unit needs to use the instruction or data again, it can be called directly from the memory. This avoids repeated accesses and reduces the latency of the processing unit, thereby improving the efficiency with which the user equipment processes data or executes instructions.
In some embodiments, processor 401 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, a SIM card interface, a USB interface, and/or the like. The USB interface is an interface conforming to a USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface can be used for connecting a charger to charge the user equipment, and can also be used for transmitting data between the user equipment and peripheral equipment. The USB interface can also be used for connecting an earphone and playing audio through the earphone.
If the electronic device 40 is a network side device, such as a base station, the processor 401 in the electronic device 40 is configured to read the computer program code stored in the memory 402, and perform the following operations:
if the SScell of the secondary cell is scheduled to cross-cell and schedule the PDCCH of the SPcell of the special cell, acquiring configuration information, wherein the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling the SPcell, and the b is greater than 0 and less than or equal to 1;
obtaining the subcarrier spacing mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
according to muk、μiExcess configuration and proportion b determine the limitation condition of monitoring PDCCH of SPcell of SScell cross-cell scheduling SPcell.
All relevant contents of each scene related to the method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.
The embodiment of the present application further provides a chip system, where the chip system includes at least one processor, a memory and an interface circuit, where the memory, the transceiver and the at least one processor are interconnected by a line, and the at least one memory stores a computer program; the method flow shown in fig. 2 is implemented when the computer program is executed by the processor.
An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, and when the computer program runs on a network device, the method flow shown in fig. 2 is implemented.
An embodiment of the present application further provides a computer program product, and when the computer program product runs on a terminal, the method flow shown in fig. 2 is implemented.
An embodiment of the present application also provides an electronic device, including a processor, a memory, a communication interface, and one or more programs, stored in the memory and configured to be executed by the processor, the programs including instructions for performing the steps in the method of the embodiment shown in fig. 2.
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It will be appreciated that the electronic device, in order to carry out the functions described above, may comprise corresponding hardware structures and/or software templates for performing the respective functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are presently preferred and that no acts or templates referred to are necessarily required by the application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit may be implemented in the form of hardware, or may also be implemented in the form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.

Claims (10)

1. A method for limiting a downlink control channel (PDCCH), the method comprising the steps of:
if the SScell of the secondary cell is scheduled to cross-cell and schedule the PDCCH of the SPcell of the special cell, acquiring configuration information, wherein the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling the SPcell, and the b is greater than 0 and less than or equal to 1;
obtaining the subcarrier spacing mu of the SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
according to muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
2. The method of claim 1, wherein said dependence on μk、μiWhen determining that the SScell schedules the scell across the cell by the excess configuration and the ratio b, the limiting conditions of monitoring the PDCCH of the scell specifically include:
if the excess is configured as forbidden and muk＝μi(ii) a Determining the maximum number of PDCCH candidates monitored in one time slot of the SPcell as
Figure FDA0002834386000000011
Determining the maximum number of non-overlapping Control Channel Elements (CCEs) monitored in one time slot of the SPcell as
Figure FDA0002834386000000012
Wherein,
Figure FDA0002834386000000013
monitoring the maximum number of PDCCH candidates in a time slot in a service cell, wherein Msp is the number of the PDCCH candidates monitored in the time slot configured on an SScell;
Figure FDA0002834386000000014
the maximum number of non-overlapping CCEs monitored in a time slot in a serving cell, Csp is the number of non-overlapping CCEs monitored in the time slot configured on an SScell for PDCCH.
3. The method of claim 1, wherein said dependence on μk、μiExcess configuration and proportion b to determine SScell cross-cell schedulingWhen the SPcell is measured, the limiting conditions for monitoring the PDCCH of the SPcell specifically include:
if over-configured to allow and muk＝μi(ii) a Determining the maximum number of PDCCH candidates monitored in one time slot of the SPcell and the SScell as
Figure FDA0002834386000000015
Figure FDA0002834386000000016
The maximum number of PDCCH candidates monitored in one slot in one serving cell.
4. The method of claim 3, further comprising:
and if the SS indexes of the SPcell self-scheduling search space are different from the SS indexes of the SScell cross-carrier scheduling, reducing the search space of the maximum index until the limitation condition is met after all the SS indexes on the SPcell and the SScell are arranged in an ascending order.
5. The method of claim 1, wherein said dependence on μk、μiWhen determining that the SScell schedules the scell across the cell by the excess configuration and the ratio b, the limiting conditions of monitoring the PDCCH of the scell specifically include:
if SCS of SPcell is muk(ii) a If the serving cell belongs to
Figure FDA0002834386000000021
Downlink cells, each serving cell not having more than one time slot
Figure FDA0002834386000000022
PDCCH candidates, or not more than
Figure FDA0002834386000000023
Non-overlapping CCEs; if the serving cell belongs to
Figure FDA0002834386000000024
Downlink cells, each serving cell not having more than one time slot
Figure FDA0002834386000000025
PDCCH candidates, or not more than
Figure FDA0002834386000000026
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure FDA0002834386000000027
Figure FDA0002834386000000028
PDCCH candidates, or not more than
Figure FDA0002834386000000029
Non-overlapping CCEs.
6. The method of claim 1, wherein said dependence on μk、μiWhen determining that the SScell schedules the scell across the cell by the excess configuration and the ratio b, the limiting conditions of monitoring the PDCCH of the scell specifically include:
if SCS of SPcell is muk(ii) a If the serving cell belongs to
Figure FDA00028343860000000210
Downlink cells, each serving cell not having more than one time slot
Figure FDA00028343860000000211
PDCCH candidates, or not more than
Figure FDA00028343860000000212
Non-overlapping CCEs; if the serving cell belongs to
Figure FDA00028343860000000213
Downlink cells, not more than each time slot per serving cell
Figure FDA00028343860000000214
PDCCH candidates, or not more than
Figure FDA00028343860000000215
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure FDA00028343860000000216
Figure FDA00028343860000000217
PDCCH candidates, or not more than
Figure FDA00028343860000000218
Non-overlapping CCEs;
SCS of SScell ═ mui(ii) a If the serving cell belongs to
Figure FDA00028343860000000219
Downlink cells, each serving cell not having more than one time slot
Figure FDA00028343860000000220
PDCCH candidates, or not more than
Figure FDA00028343860000000221
Non-overlapping CCEs; if the serving cell belongs to
Figure FDA00028343860000000222
Downlink cells, each serving cell not having more than one time slot
Figure FDA00028343860000000223
PDCCH candidates, or not more than
Figure FDA0002834386000000031
Non-overlapping CCEs; the PDCCH in the CORESET belonging to the same CORESET pool index in each time slot is not more than
Figure FDA0002834386000000032
PDCCH candidates, or not more than
Figure FDA0002834386000000033
Figure FDA0002834386000000034
Non-overlapping CCEs;
the a is 1-b or the a is configured for the configuration information; gamma is a configuration value of the configuration information.
7. An apparatus for limiting a downlink control channel (PDCCH), the apparatus comprising:
the device comprises an obtaining unit, a scheduling unit and a scheduling unit, wherein the obtaining unit is used for obtaining configuration information when the secondary cell SScell is scheduled to cross-cell the PDCCH of the special cell SPcell, the configuration information is used for configuring the PDCCH capacity proportion b of the UE monitoring and scheduling SPcell, and the b is greater than 0 and less than or equal to 1; obtaining sub-carrier spacing mu of SScellkSub-carrier spacing mu of SPcelliExcess configuration of SScell;
a limiting unit for limiting the value of muk、μiAnd excess configuration and proportion b determine the limit condition of monitoring the PDCCH of the SPcell when the SScell cross-cell schedules the SPcell.
8. An electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs including instructions for performing the steps of the method of any of claims 1-6.
9. A chip system, the chip system comprising at least one processor, a memory and an interface circuit, the memory, the transceiver and the at least one processor being interconnected by a line, the at least one memory having a computer program stored therein; the computer program, when executed by the processor, implements the method of any of claims 1-6.
10. A computer-readable storage medium, in which a computer program is stored which, when run on a user equipment, performs the method of any one of claims 1-6.
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