CN114627795A - LED display screen subframe driving control method, device and system - Google Patents
LED display screen subframe driving control method, device and system Download PDFInfo
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- CN114627795A CN114627795A CN202011343851.8A CN202011343851A CN114627795A CN 114627795 A CN114627795 A CN 114627795A CN 202011343851 A CN202011343851 A CN 202011343851A CN 114627795 A CN114627795 A CN 114627795A
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Abstract
The invention relates to a sub-frame driving control method, a device and a system of an LED display screen, wherein the sub-frame driving control method comprises the following steps: acquiring the division number of the sub-frames and an initial control time sequence signal, and calculating the length of a vacant time period; distributing the spare time periods to the gray scale clock signals of all the subframes evenly to obtain corrected gray scale clock signals and form corrected control time sequence signals; and driving the output display of the gray scale data of the display sub-frame by using the corrected control time sequence signal. By scattering the vacant time periods and distributing the vacant time periods to the gray scale clock signals of all the subframes, the problem of the vacant time periods is avoided, and the display effect is guaranteed while the refresh rate is improved.
Description
Technical Field
The invention relates to the field of LED display screens, in particular to a method, a device and a system for driving and controlling sub-frames of an LED display screen.
Background
The LED display screen has the advantages of bright color, high brightness, long service life, energy conservation and the like, thereby being widely used. Meanwhile, the requirements for the performance, especially the display effect, are also increasing. The LED display screen is generally driven in a dynamic scanning manner. Among them, the refresh rate is a very important performance index. Generally, the higher the refresh rate, the smoother the picture. The refresh rate is improved, the comfort of a user for watching the display picture can be improved, and bright and dark lines when the display picture is shot by the camera can be avoided.
At present, in order to increase the refresh rate of the LED display screen, one display frame is divided into a plurality of sub-frames. In each sub-frame, the LED lamp beads in all the rows are displayed for a period of time respectively according to the row scanning sequence. For one LED lamp bead, the display time of all sub-frames is accumulated to form a complete gray scale display frame.
However, the time of one display frame is not entirely equal to an integral multiple of the time length of the sub-frame, and therefore, as shown in fig. 1, a vacant time period exists in the synchronization signal timing of one display frame in addition to the sum of the times of all the sub-frames. For this spare time period, there are currently 3 following treatment schemes.
In the first scheme, as shown in fig. 1, for the mth frame, a free time period is left after all k subframes are displayed. And in the spare time period, the image data is not output, and the LED display screen does not display. In this case, if the image is taken by a high-speed camera, a phenomenon such as a black screen or a dark line is caused, and a screen flickers easily when viewed by naked eyes.
In a second scheme, as shown in fig. 2, for the vacant time period in the mth frame, the (k + 1) th subframe (which may be the content of the 1 st subframe or the content of the kth subframe) is continuously displayed, that is, the 1 st line and the 2 nd line in the k +1 th subframe are gradually displayed; when the synchronous signal enters the synchronous signal time sequence of the (m + 1) th frame of the next frame, the sub-frame of the (m + 1) th frame is immediately switched to display. In this way, the number of times each line is scanned is different, and for the data with the same gray scale (such as a pure color picture), the brightness of each line is not uniform, which affects the display effect.
In the third scheme, as shown in fig. 3, after all the subframes of the mth frame are displayed, a vacant time period is entered, then the display of the (k + 1) th subframe is continued, and after the content of the (k + 1) th subframe is completely displayed, the display of the (1) th subframe of the (m + 1) th frame is switched. Under the scheme, each frame of picture cannot be switched according to the frame synchronization signal strictly, and when a plurality of display modules exist, the problem of video asynchronization among different display modules can be caused.
Therefore, in the conventional scheme of increasing the refresh rate by subdividing the subframes, a vacant time period exists outside all the subframes, and the display effect is easily affected.
Disclosure of Invention
Therefore, it is necessary to provide a method, an apparatus and a system for driving and controlling sub-frames of an LED display screen, aiming at the problem that the display effect is affected by the vacant time periods except all sub-frames in the conventional scheme for improving the refresh rate by subdividing sub-frames of the LED display screen.
An embodiment of the application provides a subframe driving control method for an LED display screen, which includes:
acquiring the division number of the sub-frames and an initial control time sequence signal, and calculating the length of a vacant time period;
the spare time periods are evenly distributed to the line blanking time of all the subframes to obtain corrected line blanking time and form corrected control time sequence signals;
and driving the output display of the gray scale data of the display sub-frame by using the corrected control time sequence signal.
In some embodiments, before the step of obtaining the number of the divided subframes and the initial control timing signal and calculating the length of the idle time period, the method further includes:
and acquiring refresh rate data, and determining the division number of the sub-frames by combining with an initial control signal time sequence.
In some embodiments, the step of equally distributing the spare time periods to the gray scale clock signals of all the subframes to obtain corrected gray scale clock signals and form corrected control timing signals includes:
dividing the vacant time period by the total number of the line synchronous signal periods of all the subframes to obtain the scattering time corresponding to each line;
acquiring the number of cycles of the gray scale clock signal in each line synchronization signal period, determining the time length of each gray scale clock signal to be increased, obtaining the length of the corrected gray scale clock signal period, further determining the corrected gray scale clock signal, and forming a corrected control timing signal.
In some embodiments, only the initial subframe and/or the last subframe of the subframes have a frame blanking time.
In some embodiments, the method further comprises:
and judging whether the length of the vacant time period exceeds the preset time length, and if so, averagely distributing the vacant time period to the gray scale clock signals of all the subframes to obtain corrected gray scale clock signals and form corrected control timing signals.
In some embodiments, the method further comprises: the display frame is divided into a plurality of sub-frames.
Another embodiment of the present application provides a sub-frame driving control apparatus for an LED display, including:
the spare calculation unit is used for acquiring the division number of the subframes and an initial control time sequence signal and calculating the length of a spare time period;
the scattering time sequence unit is used for distributing the spare time periods to the gray scale clock signals of all the subframes to obtain corrected gray scale clock signals and form corrected control time sequence signals;
and a driving display unit for driving the output display of the gray scale data of the display sub-frame by using the corrected control timing signal.
Another embodiment of the present application further provides an LED display system, which includes a sub-frame driving control device and an LED display screen, where the sub-frame driving control device receives display frame data input from outside and drives the LED display screen to perform display operation, and the sub-frame driving control device is the LED display screen sub-frame driving control device in the foregoing embodiment.
An embodiment of the present application further provides a storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the sub-frame driving control method of the LED display screen according to any one of the foregoing embodiments.
In the embodiment of the application, the vacant time periods are scattered and distributed to the gray scale clock signals of all the sub-frames, so that the frame synchronization signal period of each display frame can be integral multiples of the display time of the sub-frames, the problem of the vacant time periods is avoided, and the display effect is guaranteed while the refresh rate is improved.
Drawings
FIG. 1 is a timing diagram illustrating a first sub-frame driving control scheme in the prior art;
FIG. 2 is a timing diagram illustrating a second sub-frame driving control scheme according to the prior art;
FIG. 3 is a timing diagram illustrating a third subframe driving control scheme according to the prior art;
FIG. 4 is a timing diagram of a control timing signal for the LED display screen;
FIG. 5 is a schematic diagram of the combination of control timing signals and control regions of an LED display screen;
FIG. 6 is a timing diagram of another control timing signal for the LED display screen;
fig. 7 is a schematic flowchart of a subframe driving control method for an LED display screen according to a first embodiment of the present application;
FIG. 8 is a timing diagram of control timing signals according to an embodiment of the present disclosure;
FIG. 9 is a schematic diagram illustrating a variation of line blanking time in an embodiment of the present application;
FIG. 10 is a schematic diagram illustrating another variation of line blanking time in an embodiment of the present application;
fig. 11 is a schematic flowchart of a sub-frame driving control method for an LED display screen according to a second embodiment of the present application;
FIG. 12 is a timing diagram of control timing signals according to a second embodiment of the present application;
fig. 13 is a schematic flowchart of a subframe driving control method for an LED display screen according to a third embodiment of the present application;
fig. 14 is a schematic block diagram of a subframe driving control device of an LED display panel according to a fourth embodiment of the present application.
Detailed Description
So that the manner in which the above recited objects, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Fig. 4 shows a timing relationship between a control timing signal and gradation data of the LED display panel in the scan driving mode. The control timing signals of the LED display panel may include a frame synchronization signal, a line synchronization signal, a data clock signal DCLK, and a gray clock signal GCLK. Generally, a frame synchronization signal period corresponds to the display of a frame, and a frame includes a plurality of lines of data; one line synchronizing signal period corresponds to display of one line of data. The data clock signal DCLK is mainly used to provide a clock signal for transmitting gray data, and the gray clock signal GCLK is used to provide a clock signal for displaying single gray data, and may be specifically a clock signal for generating a PWM driving signal according to gray data.
In order to ensure the display effect, as shown in fig. 4, for one frame synchronization signal period (which can be understood as a time corresponding to one frame of picture in a simplified manner), in addition to an effective display time (i.e., a line effective time), a frame blanking time is included. In one line synchronizing signal period (corresponding to gradation data for one line), a line blanking time is included in addition to between display of gradation data for one line. If the line blanking time, the frame blanking time and the gray data display time are converted into space, as shown in fig. 5, the gray data display time of each line corresponds to a picture area, i.e. an area that a picture can be displayed and human eyes can view; meanwhile, the frame blanking time, corresponding to the frame blanking area, is generally located above and below the picture area, and the corresponding frame blanking time can be divided into a leading frame blanking time VBP and a trailing frame blanking time VFP; the line blanking time, which corresponds to the line blanking area, is located on the left and right of the picture area, and accordingly, the line blanking time may be divided into a front line blanking time HBP and a rear line blanking time HVP.
As shown in fig. 5, for displaying a frame, the leading frame blanking period VBP of the frame synchronization signal period, i.e. the frame blanking region above the corresponding frame region, may last for a plurality of line synchronization signal periods, and no gray data is transmitted during the leading frame blanking period VBP; then, the line active time of the frame synchronization signal period is entered, and the gradation data can be transmitted. The line effective time may be subdivided into a plurality of line synchronizing signal periods, and each line synchronizing signal period may correspond to one line of gray scale data. In a line synchronizing signal period, the line blanking time HBP is first advanced (i.e., the left line blanking region), and no gray data is displayed at this time; then, the gray scale display time of a line is entered, and the display of the gray scale data of the line is driven according to the data clock signal DCLK and the gray scale clock signal GCLK; after the display of one line of gradation data is completed, the post-line blanking time HVP (i.e., the line blanking region on the right) is entered. And in the line effective time, completing the display of the gray data line by line. Then the post-frame blanking time VFP, i.e. the lower frame blanking region, is entered. Thus, the display of one frame of picture is completed.
In order to increase the refresh rate, each display frame on the LED display screen may be divided into a plurality of sub-frames. In order to solve the display quality problem caused by the spare time period left after all the subframes are displayed in one frame synchronization signal period, the application provides a subframe driving control scheme which can scatter the spare time period into each subframe, such as the line blanking time or the gray scale clock signal period; therefore, the frame synchronization signal period of each display frame can be integral multiple of the display time of the sub-frame, the problem of vacant time period is avoided, the refresh rate is improved, and the display effect is guaranteed.
It should be noted that, for a subframe, a frame synchronization signal of the subframe may be correspondingly set to facilitate the control of the timing.
The following describes the present invention in detail.
Example one
As shown in fig. 7, a first embodiment of the present application discloses a method for controlling subframe driving of an LED display screen, including:
s1100, acquiring the division number of the subframes and an initial control time sequence signal, and calculating the length of a vacant time period;
as shown in fig. 8, for the mth frame, the mth frame may be divided into k subframes. Each subframe may specifically include n rows. The following describes the present application with respect to 1 line of gray scale data per scan as an example. It should be noted that, in the scheme of dynamically scanning and driving the LED display screen, multiple rows of gray scale data may be scanned simultaneously.
In some embodiments, a controller of the LED display screen may be utilized to directly set the number of sub-frames, which are required to be divided into a plurality of sub-frames, for one display frame. Therefore, the divided number of the sub-frames can be directly read from the controller.
The initial display time of each sub-frame can be determined by combining the initial control time sequence signal and the dividing number of the sub-frames, and then the display time of all the sub-frames is compared with the frame synchronization signal period of the display frame, so that the length of the vacant time period can be obtained.
In some embodiments, when dividing the sub-frame, the number of divided sub-frames and the display time may be set at the same time. At this time, in step S1100, the number of divided sub-frames and the display time may be acquired, and the length of the free time period may be determined in combination with the frame synchronization signal period of the display frame in the initial control timing signal.
In some embodiments, before step S1100, the method may further include:
and acquiring refresh rate data, and determining the division number of the sub-frames by combining with an initial control signal time sequence.
In this embodiment, the user does not need to set the specific number of divided sub-frames, but can set the refresh rate data as required, and then the number of divided sub-frames and the display time can be automatically determined by combining the initial control signal timing.
S1200, distributing the vacant time periods to the line blanking time of all the subframes evenly to obtain corrected line blanking time and form corrected control time sequence signals;
as shown in fig. 8 and 9, each subframe includes n rows of gradation data. In one line synchronizing signal period corresponding to each line of gradation data, a line blanking time is left in addition to a gradation display time for actually driving and displaying the gradation data. In this embodiment, the blank time periods are equally distributed to the line blanking time of all the subframes, as shown in fig. 9. On the basis of the length of the existing line blanking time, a certain length of scattering time is also added, and the line blanking time and the scattering time form the corrected blanking time together.
The increased blanking time per line blanking time may be obtained by dividing the free time period by the total number of line synchronization signal periods for all sub-frames. The total number of the line synchronization signal periods of all the subframes may include the number of the line synchronization signal periods corresponding to the frame blank time and the number of the line synchronization signal periods of the line active time.
In some embodiments, the frame blanking time of the intermediate subframes may also be eliminated, and the intermediate subframes may all be row active time. At this time, the frame blanking time may exist only for the initial subframe and/or the last subframe.
After the corrected blanking time is obtained, it can be used to form a corrected control timing signal. For example, when the line blanking time is controlled using the high level of the line sync signal, a new line sync signal may be formed using the corrected blanking time — specifically, the high level time of the line sync signal may be extended. Then, the new line synchronization signal is combined with other control timing signals such as the initial frame synchronization signal, the data clock signal DCLK, the gray scale clock signal GCLK, and the like to form a corrected control timing signal.
In some embodiments, as shown in fig. 4, in the control timing signal, a separate line feed signal may also be provided for controlling the line blanking time. In step S1200, after the corrected line blank time is obtained, the line feed signal may be adjusted according to the corrected line blank time. Specifically, the line feed signal may be adjusted accordingly to the level of the corresponding line blanking time — for example, the length of the high level time.
The gradation data is stored in the memory cell. As shown in fig. 6, during the line blanking time, an operation of reading the gray scale data may be performed — specifically, reading a line of gray scale data that needs to be displayed currently; during the line active time, an operation of storing the input gradation data may be performed. Therefore, for the storage unit of the gray data, the ping-pong operation control can be realized, the data transmission efficiency is improved, and the capacity space of the storage unit is saved.
In some embodiments, as shown in fig. 4, in order to realize the control of the line blanking time, a data valid signal may be set instead of the line feed signal, and the data valid signal correspondingly controls the gray scale display time of each line; the control of the line blanking time may be achieved by means of a data valid signal and a line synchronisation signal. For example, when the data active signal is at a high level, the gray scale data for each line may be driven and displayed for a gray scale display time for each line. The high-level starting time of the line synchronization signal to the high-level starting time of the data valid signal is the line blanking time.
It is understood that, as shown in fig. 5 and 10, 2 line blanking times — a leading line blanking time HBP and a trailing line blanking time HVP may be set within one line synchronization signal period. In step S200, the vacant time periods may be equally allocated to the leading line blanking time HBP and the trailing line blanking time HVP of all the sub-frames to the corrected line blanking time, forming a corrected control timing signal.
It is to be understood that, when the pre-line blanking time HBP and the post-line blanking time HVP are provided in one line synchronization signal period, the allocation of the free time periods may not be equally allocated over the pre-line blanking time HBP and the post-line blanking time HVP, for example, may be allocated only to one of them.
And S1300, driving the output display of the gray scale data of the display sub-frame by using the corrected control time sequence signal.
In the embodiment of the application, the vacant time periods are scattered and distributed to the line blanking time of all the subframes, so that the frame synchronization signal period of each display frame can be integral multiple of the subframe display time, the problem of the vacant time periods is avoided, and the display effect is ensured while the refresh rate is improved.
In some embodiments, before step S1200, the method may further include:
judging whether the length of the vacant time period exceeds the preset time period, and if so, entering S1200 to scatter and distribute the vacant time period; otherwise, the process is finished.
The preset time period may be determined by the performance of the system, so as to prevent the system from being unable to generate the corrected control timing signal during the break-up operation of S1200 in the idle time period. For example, the preset time length may be set to several line sync signal periods, such as 2 line sync signal periods. If the length of the vacant period is less than 2 line sync signal periods, S1200 is not performed and the vacant period is reserved. Because the spare time period only has 1 or 2 line synchronization signal cycles, only the display of the top 1 or 2 lines can be influenced, and the shooting of a high-speed camera and the watching of human eyes cannot be obviously influenced.
In some embodiments, the LED display screen sub-frame driving control method may further include: the display frame is divided into a plurality of sub-frames.
Different data bits of gray data in a display frame can be uniformly distributed among subframes to realize the uniformity of subframe driving, reduce screen flicker and improve display quality.
Illustratively, the high data bits of the gray data are evenly distributed among all the sub-frames. As shown in the example of the distribution of gray scale data on sub-frames, when the gray scale data is 12 bits (D [0-11]), the display time of the high data bits (i.e., high bits) can be uniformly distributed to all sub-frames, such as D [10], D [11], etc. The low data bits may not be allocated between subframes.
Example table I for distributing gray data in sub-frame
It will be appreciated that the lower bits of the gray scale data may also be evenly distributed among several subframes. As shown in the second example table for allocating gradation data to subframes, the display time of the upper data bits (for example, D10 and D11) may be allocated uniformly to all subframes, and the lower data bits may be allocated uniformly to a plurality of subframes. The number of the allocated subframes can be different for the low data bits at different positions.
Example table two for distributing gray data on sub-frame
In the previous embodiment, the display time of each subframe is the same. It is understood that the display time of each sub-frame may also be different.
Example two
As shown in fig. 11 and 12, a second embodiment of the present application provides a method for controlling subframe driving of an LED display screen, including:
s2100, acquiring the number of divided subframes and an initial control time sequence signal, and calculating the length of a vacant time period;
s2200, distributing the spare time period to the gray scale clock signals of all sub-frames to obtain corrected gray scale clock signals and form corrected control time sequence signals;
s2300, driving the output display of the gray scale data of the display sub-frame by the corrected control timing signal.
The difference between the first embodiment and the second embodiment is that the blank period is scattered on the gray scale clock signal in step S220, instead of the line blank period. Specifically, as shown in the embodiment, the blank time period is divided by the total number of the line synchronization signal periods of all the sub-frames to obtain the break-up time corresponding to each line, then the period number of the gray scale clock signal in each line synchronization signal period is obtained, the time length that each gray scale clock signal should be increased is determined, the length of the corrected gray scale clock signal period is obtained, and then the corrected gray scale clock signal is determined to form the corrected control timing signal.
Steps S2100 and S2300 are substantially the same as steps S1100 and S1300 in the first embodiment. The contents and working manners of steps S2100 and S2300 may refer to the descriptions of steps S1100 and S1300 in the first embodiment, and are not described herein again.
In step S1200 of the first embodiment, in addition to the description of the allocation of the blank time period to the line blanking time, the description of other contents may also be applied to step S2200 unless the description of this aspect contradicts the core scheme of step S2200.
In the embodiment of the application, the vacant time periods are scattered and distributed to the gray scale clock signals, so that the frame synchronization signal period of each display frame can be integral multiples of the display time of the sub-frame, the problem of the vacant time periods is avoided, and the display effect is guaranteed while the refresh rate is improved.
As the frame blanking time typically comprises a plurality of line synchronization signal periods. In some embodiments, the frame blanking time of the intermediate subframes may also be eliminated, and the intermediate subframes may all be row active time. At this time, the frame blanking time may exist only for the initial subframe and/or the last subframe.
In some embodiments, before step S2100, the method may further include:
and acquiring refresh rate data, and determining the division number of the sub-frames by combining with an initial control signal time sequence.
In this embodiment, the user does not need to set the specific number of divided sub-frames, but can set the refresh rate data as required, and then the number of divided sub-frames and the display time can be automatically determined by combining the initial control signal timing.
In some embodiments, before step S2200, the method may further include:
judging whether the length of the vacant time period exceeds the preset time period, if so, entering S2200 to scatter and distribute the vacant time period; otherwise, the process is finished.
The preset time period may be determined by the performance of the system, so as to avoid that the system cannot generate the corrected control timing signal during the break-up operation of S2200 during the idle time period. For example, the preset time length may be set to several line sync signal periods, such as 2 line sync signal periods. If the length of the vacant period is less than 2 periods of the row sync signal, S2200 is not performed and the vacant period is reserved. Because the spare time period only has 1 or 2 line synchronization signal cycles, only the display of the top 1 or 2 lines can be influenced, and the shooting of a high-speed camera and the watching of human eyes cannot be obviously influenced.
In some embodiments, the LED display screen sub-frame driving control method may further include: the display frame is divided into a plurality of sub-frames. The data bits of the gray data can be uniformly distributed among the sub-frames to realize the uniformity of sub-frame driving, reduce screen flicker and improve display quality.
Illustratively, the high data bits of the gray data are evenly distributed among all the sub-frames. The low data bits may not be allocated between subframes.
It will be appreciated that the lower bits of the gray scale data may also be evenly distributed among several sub-frames. The number of allocated subframes can be different for the low data bits at different positions.
EXAMPLE III
As shown in fig. 13, a third embodiment of the present application provides a method for controlling subframe driving of an LED display screen, including:
s3100, acquiring the number of divided subframes and an initial control time sequence signal, and calculating the length of a vacant time period;
s3200, distributing the vacant time periods to the frame blanking time of all the subframes evenly to obtain corrected subframe synchronous signals and form corrected control timing sequence signals;
and S3300, driving the output display of the gray scale data of the display sub-frame by the corrected control time sequence signal.
Steps S3100 and S3300 are substantially the same as steps S1100 and S1300 in the first embodiment.
The present embodiment is different from the first embodiment in that the blank period is scattered over the frame blanking time of the subframe, not the line blanking time.
For example, referring to fig. 4, for a sub-frame, the frame synchronization signal period includes a frame blanking time and a line active time. Therefore, the free period may be divided by the number of divided sub-frames to obtain the dispersion time allocated to the frame blanking time of each sub-frame.
In some embodiments, the frame blanking time of the intermediate subframes may also be eliminated, and the intermediate subframes may all be row active time. At this time, the frame blanking time may exist only for the initial subframe and/or the last subframe. When calculating the dispersion time allocated to the frame blanking time, the number of the frame blanking times on all the sub-frames may be determined first, and then the number of the frame blanking times is divided by the spare time period, so as to obtain the dispersion time allocated to the frame blanking time of the sub-frames. For example, the frame blanking time may be set only at the beginning of the initial subframe, and at this time, the number of the frame blanking times is one. For example, the frame blanking time may be set only at the end of the last subframe, and in this case, the number of the frame blanking times is also one. For example, the frame blanking time may be set at the beginning of the initial subframe and the end of the last subframe, and the number of the frame blanking times is two.
Steps S3100 and S3300 are substantially the same as steps S1100 and S1300 in the first embodiment. The contents and operation manners of steps S3100 and S3300 may refer to the descriptions of steps S1100 and S1300 in the first embodiment, and are not described herein again.
In step S1200 of the first embodiment, in addition to the description of the allocation of the blank period to the line blanking time, the description of other contents may also be applied to step S3200 unless the description of this aspect contradicts the core scheme of step S3200.
In the embodiment of the application, the vacant time periods are scattered and distributed to the frame blanking time, so that the problem of the vacant time periods is avoided, the refresh rate is improved, and the display effect is guaranteed.
In some embodiments, before step S3100, the method may further include:
and acquiring refresh rate data, and determining the division number of the sub-frames by combining with an initial control signal time sequence.
In this embodiment, the user does not need to set the specific number of divided sub-frames, but can set the refresh rate data as required, and then the number of divided sub-frames and the display time can be automatically determined by combining the initial control signal timing.
In some embodiments, before step S3200, the method may further include:
judging whether the length of the vacant time period exceeds the preset time period, if so, entering S3200 to scatter the vacant time period; otherwise, the process is finished.
The preset time duration can be determined by the performance of the system, so as to avoid that the system cannot generate the corrected control timing signal during the idle time period when the scattering operation of S3200 is performed. For example, the preset time length may be set to several line sync signal periods, such as 2 line sync signal periods. If the length of the vacant period is less than 2 periods of the row sync signal, S2200 is not performed and the vacant period is reserved. Because the spare time period only has 1 or 2 line synchronization signal cycles, only the display of the top 1 or 2 lines can be influenced, and the shooting of a high-speed camera and the watching of human eyes cannot be obviously influenced.
In some embodiments, the LED display screen sub-frame driving control method may further include: the display frame is divided into a plurality of sub-frames. The data bits of the gray data of the display frame can be uniformly distributed among the sub-frames to realize the uniformity of sub-frame driving, reduce screen flicker and improve display quality.
Illustratively, the high data bits of the gray data are evenly distributed among all the sub-frames. The low data bits may not be allocated between subframes.
It will be appreciated that the lower bits of the gray scale data may also be evenly distributed among several sub-frames. The number of allocated subframes can be different for the low data bits at different positions.
Example four
As shown in fig. 14, a fourth embodiment of the present application provides an LED display screen sub-frame driving control apparatus, including:
a spare calculation unit 100, configured to obtain the number of divided subframes and an initial control timing signal, and calculate a length of a spare time period;
a break-up timing unit 200, configured to equally allocate the free time periods to the line blanking times of all subframes to obtain corrected line blanking times, and form a corrected control timing signal;
the display driving unit 300 drives the output display of the gradation data of the display sub-frame by the corrected control timing signal.
In some embodiments, the LED display sub-frame driving control apparatus may further include a break-up determining unit, configured to determine whether the length of the idle time period exceeds a preset time length, and if the determination result is yes, trigger the break-up timing unit 200; otherwise, the process is ended.
In some embodiments, the LED display sub-frame driving control apparatus may further include a sub-frame determining unit, configured to obtain the refresh rate data, and determine the number of sub-frames to be divided according to the initial control signal timing. The user does not need to set the specific dividing number of the sub-frames, but can set the refresh rate data according to the requirement, and then the dividing number and the display time of the sub-frames can be automatically determined by combining the initial control signal time sequence.
In some embodiments, the LED display screen sub-frame driving control apparatus may further include a sub-frame dividing unit configured to divide the display frame into a plurality of sub-frames. The data bits of the gray data can be uniformly distributed among the sub-frames to realize the uniformity of sub-frame driving, reduce screen flicker and improve display quality.
As an example, the upper data bits of the gradation data are uniformly distributed among all the subframes.
It will be appreciated that the lower bits of the gray scale data may also be evenly distributed among several subframes. The number of allocated subframes can be different for the low data bits at different positions.
For specific working manners of the spare calculating unit 100, the scattering timing unit 200, the driving display unit 300, the scattering determining unit, the subframe determining unit, and the subframe dividing unit, reference may be made to the corresponding description in the first embodiment, and details are not repeated herein.
In the embodiment of the application, the vacant time periods are scattered and distributed to the line blanking time of all the subframes, so that the frame synchronization signal period of each display frame can be integral multiple of the subframe display time, the problem of the vacant time periods is avoided, and the display effect is ensured while the refresh rate is improved.
In some other embodiments, the break-up timing unit 200 may also be configured to equally distribute the blank time periods to the gray scale clock signals of all the subframes to obtain the corrected gray scale clock signals, and form the corrected control timing signals. At this time, in the break timing unit 200, the vacant time period is broken up on the gradation clock signal, not the line blank time. Specifically, the blank time period may be divided by the total number of the line synchronization signal periods of all the subframes to obtain the break-up time corresponding to each line, then the number of the periods of the gray scale clock signal in each line synchronization signal period is obtained, the time length to which each gray scale clock signal should be added is determined, the length of the corrected gray scale clock signal period is obtained, and then the corrected gray scale clock signal is determined, so as to form the corrected control timing signal.
In some other embodiments, the break-up timing unit 200 may also be configured to equally distribute the free time periods to the frame blanking times of all the subframes to obtain the corrected subframe synchronization signals, and form the corrected control timing signals. At this time, in the break timing unit 200, the vacant time period is broken up to the frame blanking time of the sub-frame, not the line blanking time.
For example, referring to fig. 4, for a sub-frame, the frame synchronization signal period includes a frame blanking time and a line active time. Therefore, the free period may be divided by the number of divided sub-frames to obtain the dispersion time allocated to the frame blanking time of each sub-frame.
Furthermore, the frame blanking time of the intermediate sub-frame can be removed, and the intermediate sub-frame can be all the line effective time. At this time, the frame blanking time may exist only for the initial subframe and/or the last subframe. When calculating the dispersion time allocated to the frame blanking time, the number of the frame blanking times on all the subframes may be determined first, and then the number of the frame blanking times is divided by the spare time period, so as to obtain the dispersion time allocated to the frame blanking time of the subframe.
EXAMPLE five
The fifth embodiment of the application provides an LED display system, which includes the subframe driving control device and the LED display screen in any of the previous embodiments, where the subframe driving control device receives display frame data input from outside, and drives the LED display screen to perform display operation.
In the embodiment of the application, the vacant time periods are scattered, so that the frame synchronization signal period of each display frame can be integral multiple of the display time of the sub-frame, the problem of the vacant time periods is avoided, and the display effect is guaranteed while the refresh rate is improved.
Another embodiment of the present application further provides a storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the sub-frame driving control method of the LED display screen according to any one of the above embodiments.
The system/computer device integrated components/modules/units, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. The computer-readable storage medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
In the several embodiments provided in the present invention, it should be understood that the disclosed system and method may be implemented in other ways. For example, the above-described system embodiments are merely illustrative, and for example, the division of the components is only one logical division, and other divisions may be realized in practice.
In addition, each functional module/component in each embodiment of the present invention may be integrated into the same processing module/component, or each module/component may exist alone physically, or two or more modules/components may be integrated into the same module/component. The integrated modules/components can be implemented in the form of hardware, or can be implemented in the form of hardware plus software functional modules/components.
It will be evident to those skilled in the art that the embodiments of the present invention are not limited to the details of the foregoing illustrative embodiments, and that the embodiments of the present invention are capable of being embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the embodiments being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. Several units, modules or means recited in the system, apparatus or terminal claims may also be implemented by one and the same unit, module or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A sub-frame driving control method for an LED display screen is characterized by comprising the following steps:
acquiring the division number of the sub-frames and an initial control time sequence signal, and calculating the length of a vacant time period;
distributing the spare time periods to the gray scale clock signals of all the subframes evenly to obtain corrected gray scale clock signals and form corrected control time sequence signals;
and driving the output display of the gray scale data of the display sub-frame by using the corrected control time sequence signal.
2. The method for controlling the sub-frame driving of the LED display screen according to claim 1, wherein before the step of obtaining the number of sub-frame divisions and the initial control timing signal, and calculating the length of the free time period, the method further comprises:
and acquiring refresh rate data, and determining the division number of the sub-frames by combining with an initial control signal time sequence.
3. The method for controlling the driving of the sub-frames of the LED display screen according to claim 1, wherein the step of equally distributing the free time periods to the gray scale clock signals of all the sub-frames to obtain the corrected gray scale clock signals and form the corrected control timing signals comprises:
dividing the vacant time period by the total number of the line synchronization signal periods of all the subframes to obtain the scattering time corresponding to each line;
acquiring the number of cycles of the gray scale clock signal in each line synchronization signal period, determining the time length of each gray scale clock signal to be increased, obtaining the length of the corrected gray scale clock signal period, further determining the corrected gray scale clock signal, and forming a corrected control timing signal.
4. The LED display screen sub-frame driving control method according to claim 3, wherein the frame blanking time exists only in an initial sub-frame and/or a last sub-frame in the sub-frames.
5. The LED display screen sub-frame driving control method according to claim 1, characterized by further comprising:
and judging whether the length of the vacant time period exceeds the preset time length, and if so, averagely distributing the vacant time period to the gray scale clock signals of all the subframes to obtain corrected gray scale clock signals and form corrected control timing signals.
6. The LED display screen sub-frame driving control method according to claim 1, characterized by further comprising: the display frame is divided into a plurality of sub-frames.
7. A sub-frame driving control device for an LED display screen is characterized by comprising:
the spare calculation unit is used for acquiring the division number of the subframes and an initial control time sequence signal and calculating the length of a spare time period;
the scattering time sequence unit is used for distributing the spare time periods to the gray scale clock signals of all the subframes to obtain corrected gray scale clock signals and form corrected control time sequence signals;
and a driving display unit for driving the output display of the gray scale data of the display sub-frame by using the corrected control timing signal.
8. An LED display system, comprising a sub-frame driving control device and an LED display screen, wherein the sub-frame driving control device receives display frame data inputted from outside and drives the LED display screen to display, characterized in that the sub-frame driving control device is the LED display screen sub-frame driving control device of claim 7.
9. A storage medium having stored thereon a computer program, characterized in that the computer program, when executed by a processor, implements the LED display screen sub-frame drive control method of claims 1-6.
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