CN114610266A - Compensation data processing method, device, equipment and medium - Google Patents

Abstract

The application discloses a compensation data processing method, device, equipment and medium, and belongs to the technical field of display. The method comprises the following steps: acquiring compensation data, and separating each compensation data into an integer part and a fractional part; converting the integer part into a first binary number, and performing Huffman coding on the first binary number to obtain a first code; converting the decimal part into an integer, converting the converted integer into a second binary number, and performing Huffman coding on the second binary number to obtain a second code; and combining the first code and the second code to obtain processed compensation data, wherein the processed compensation data is used for being read by a display device for display compensation. According to the embodiment of the application, the display device can store more data for display compensation.

Description

Compensation data processing method, device, equipment and medium

Technical Field

The present application belongs to the field of display technologies, and in particular, to a compensation data processing method, apparatus, device, and medium.

Background

The Mura phenomenon is a phenomenon in which the brightness of the display device is not uniform, resulting in various marks. The Mura phenomenon may reduce the display effect of the display device. In order to improve the display effect of the display device, the drive signals for driving the pixels to emit light can be compensated by utilizing the compensation data stored in the display device in advance aiming at the Mura phenomenon of the display device so as to reduce or even eliminate the uneven brightness.

As the requirement for the compensation accuracy increases, the amount of compensation data increases, but the storage capacity of the display device is small, and it is difficult to store all compensation data with increased compensation accuracy in the display device.

Disclosure of Invention

Embodiments of the present application provide a compensation data processing method, apparatus, device, and medium, which enable a display device to store more data for display compensation.

In a first aspect, an embodiment of the present application provides a compensation data processing method, including: acquiring compensation data, and separating each compensation data into an integer part and a fractional part; converting the integer part into a first binary number, and performing Huffman coding on the first binary number to obtain a first code; converting the decimal part into an integer, converting the converted integer into a second binary number, and performing Huffman coding on the second binary number to obtain a second code; and combining the first code and the second code to obtain processed compensation data, wherein the processed compensation data is used for being read by a display device for display compensation.

In some possible embodiments, converting the integer portion to a first binary number comprises: determining a first storage bit depth of the integer part according to the value range of the integer part, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part; the integer portion is converted to a first binary number according to a first memory bit depth.

In some possible embodiments, the first stored bit is 4 bits deep.

In some possible embodiments, converting the fractional part into an integer, converting the converted integer into a second binary number, includes: according to the compensation precision of the display device, carrying out n-bit decimal fraction reserving processing on the decimal part to obtain a first decimal fraction, wherein n is a positive integer; acquiring a target numerical value section matched with the first decimal from m numerical value sections obtained by pre-dividing, and obtaining the representative number of the target numerical value section, wherein the m numerical value sections are not overlapped and are positioned in the range of 0 to 0.9, the representative number of each numerical value section is an n-bit decimal positioned in the numerical value section or 1 close to the numerical value section, and m is an integer greater than 1; and converting the representative number of the target numerical value segment into an integer, and converting the converted integer into a second binary number.

In some possible embodiments, converting the converted integer into the second binary number includes: determining a second storage bit depth according to the compensation precision and the first storage bit depth, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part; and converting the converted integer into a second binary number according to the second storage bit depth.

In some possible embodiments, the second stored bit is 4 bits deep.

In some possible embodiments, n-1 and m-5.

In some possible embodiments, after combining the first encoding and the second encoding to obtain the processed compensation data, the method further includes: merging the processed compensation data corresponding to each compensation data to obtain a data set; verifying the data set to obtain a verification value; generating a compensation data file based on the data set and the check value; and burning the compensation data file into a storage device of the display device.

In some possible embodiments, after obtaining the first code, the method further includes: merging the first codes corresponding to the compensation data to obtain a first code set; counting to obtain a first data length of the first coding set, and generating a first coding subfile based on the first data length and the first coding set;

after obtaining the second code, the method further comprises: merging the second codes corresponding to the compensation data to obtain a second code set; counting to obtain a second data length of the second coding set, and generating a second coding subfile based on the second data length and the second coding set;

combining the first code and the second code to obtain the processed compensation data, comprising: sequentially acquiring a first code and a second code from the first code subfile and the second code subfile; and merging the first code and the second code with the same order to obtain the processed compensation data.

In a second aspect, an embodiment of the present application provides a compensation data processing apparatus, including: the separation module is used for acquiring compensation data and separating each compensation data into an integer part and a decimal part; the first calculation module is used for converting the integer part into a first binary number and carrying out Huffman coding on the first binary number to obtain a first code; the second calculation module is used for converting the decimal part into an integer, converting the converted integer into a second binary number, and performing Huffman coding on the second binary number to obtain a second code; and the merging module is used for merging the first code and the second code to obtain processed compensation data, and the processed compensation data is used for being read by the display device to perform display compensation.

In a third aspect, an embodiment of the present application provides a compensation data processing apparatus, including: a processor and a memory storing computer program instructions; the compensation data processing method of the first aspect is implemented when the processor executes the computer program instructions.

In a fourth aspect, the present application provides a computer-readable storage medium, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, the compensation data processing method of the first aspect is implemented.

The embodiment of the application provides a compensation data processing method, a device, equipment and a medium, which can separate compensation data into an integer part and a decimal part, convert the integer part into a binary number, convert the decimal part into an integer firstly, then convert the integer part into the binary number, and respectively carry out Huffman coding and combination on the binary number obtained by converting the integer part and the binary number obtained by converting the decimal part to obtain the processed compensation data. The storage of the decimal is larger than that of the integer, the decimal part of the compensation data is converted into the integer firstly and then is converted into the binary number, and the storage space occupied by the decimal part storage can be saved. The Huffman coding can code characters with high occurrence probability by using 0 and 1 which are as few as possible, the compression rate of a first code corresponding to an integer part of compensation data and a second code corresponding to a decimal part of the compensation data which are obtained by the Huffman coding is higher, and the occupied space is smaller, so that a display device can store more processed compensation data, and the compensation data with improved compensation precision is stored in the display device in the form of the processed compensation data.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a flow chart of an embodiment of a compensation data processing method provided herein;

FIG. 2 is a flow chart of another embodiment of a compensation data processing method provided herein;

FIG. 3 is a schematic diagram of an example of a process from compensating data to forming a first binary number and a second binary number provided by an embodiment of the present application;

FIG. 4 is a flow chart of a method of processing compensation data provided herein;

FIG. 5 is a flowchart of a compensation data processing method according to another embodiment of the present disclosure;

FIG. 6 is a schematic structural diagram of an embodiment of a compensation data processing apparatus provided in the present application;

FIG. 7 is a schematic structural diagram of another embodiment of a compensation data processing apparatus provided in the present application;

FIG. 8 is a schematic structural diagram of another embodiment of a compensation data processing apparatus provided in the present application;

fig. 9 is a schematic structural diagram of an embodiment of a compensation data processing device provided in the present application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended to be illustrative only and are not intended to be limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.

The Mura phenomenon is a phenomenon in which the brightness of the display device is not uniform, resulting in various marks. The Mura phenomenon may reduce the display effect of the display device. In order to improve the display effect of the display device, it is necessary to compensate for the brightness deviation of the display device so that the display is more uniform. The compensation data corresponding to the Mura phenomenon can be obtained by calculation aiming at the Mura phenomenon of the display device, the compensation data is stored in the display device in advance, and the display device utilizes the stored compensation data to compensate the driving signal for driving the pixel to emit light so as to reduce or even eliminate the uneven brightness. As the demand for compensation accuracy increases, the amount of compensation data increases, but the storage capacity of the display device is small, and it is difficult to store all the compensation data with increased compensation accuracy in the display device.

The application provides a compensation data processing method, a device, equipment and a medium, which can separate compensation data into an integer part and a decimal part, and obtain the processed compensation data through binary conversion, Huffman coding and combination of the integer part and the decimal part. Compared with the unprocessed compensation data, the processed compensation data occupy smaller storage space, so that the amount of the processed compensation data which can be stored by the display device is far greater than the amount of the unprocessed compensation data which can be stored by the display device, and the compensation data with improved compensation precision can be stored in the display device.

The following describes a compensation data processing method, apparatus, device, and medium in order.

The application provides a compensation data processing method. Fig. 1 is a flowchart of an embodiment of a compensation data processing method provided in the present application. As shown in fig. 1, the compensation data processing method may include steps S101 to S104.

In step S101, compensation data is acquired, and each compensation data is separated into an integer part and a fractional part.

The compensation data is used for compensating the Mura phenomenon of the display device and can represent gray scales needing compensation. The compensation data can be calculated by a Demura compensation algorithm, and the purpose of the Demura compensation algorithm is to remove the display deviation of the display device by the compensation data.

Each compensation data may be separated into an integer portion and a fractional portion. For example, the compensation data includes 1.7665, 1.7665 may be split into an integer portion 1 and a fractional portion 0.7665.

In step S102, the integer part is converted into a first binary number, and the first binary number is huffman encoded to obtain a first code.

The Huffman coding can code the characters with high occurrence probability by using 0 and 1 as few as possible, thereby maximally saving the storage space occupied by the codes obtained after the Huffman coding.

The integer portion of the compensation data may be converted to a binary number prior to huffman coding. The first binary number is a binary number obtained by converting the integer part of the compensation data. The storage bit depth of the first binary number may be determined from the range of values of the integer portion. After the first binary number is obtained, the first binary number is subjected to Huffman coding. The first code obtained by Huffman coding can reduce the storage space occupied by the compensation data.

In step S103, the fractional part is converted into an integer, the converted integer is converted into a second binary number, and the second binary number is huffman encoded to obtain a second code.

The decimal part occupies a larger storage space, and in order to reduce the occupied space of the decimal part, the decimal part can be converted into an integer firstly. The decimal part can be converted into an integer with the least possible number of bits according to a certain calculation rule. For example, the fractional part is converted into a one-bit integer by calculation. The binary numbers obtained by integer conversion with the least possible number of bits occupy less storage space than the binary numbers obtained by decimal conversion. The second binary number is a binary number obtained by converting the integer obtained by the fractional part conversion. After the second binary number is obtained, the second binary number is subjected to Huffman coding. The second code obtained by huffman coding may reduce the storage space that needs to be occupied for further compensation of the data.

In some examples, the fractional portion can be calculated using basic algorithms such as addition, subtraction, multiplication, division, and other algorithms to convert the fractional portion to an integer. For example, the decimal part is multiplied by a preset multiplication parameter to obtain a first product, the first product is rounded, and the obtained integer is used as the integer converted by the decimal part.

In some examples, the decimal part may be rounded by a preset number, the preset number of the decimal part is reserved, a decimal with the reserved preset number is obtained, and then the decimal with the reserved preset number is subjected to basic algorithms such as addition, subtraction, multiplication, division and other algorithms to obtain an integer, and the integer is used as the integer obtained by converting the decimal part.

In step S104, the first code and the second code are combined to obtain the processed compensation data.

And combining the first code and the second code corresponding to the compensation data to obtain the processed compensation data corresponding to the compensation data. Each compensation data corresponds to one processed compensation data. Each processed compensation data occupies a smaller storage space than each compensation data, and accordingly, compared with a large amount of compensation data, a large amount of processed compensation data can save more storage space to store more processed compensation data. The display device can store more processed compensation data, improve the compensation precision and further improve the display effect of the display device.

The processed compensation data is used for being read by a display device for display compensation. The display device is provided with a processing circuit which can convert the read processed compensation data into compensation data in the process of display compensation and compensate by using the compensation data.

In the embodiment of the application, the compensation data can be separated into an integer part and a decimal part, the integer part is converted into a binary number, the decimal part is converted into an integer and then into a binary number, and the binary number obtained by converting the integer part and the binary number obtained by converting the decimal part are respectively subjected to huffman coding and merging to obtain the processed compensation data. The storage of the decimal is larger than that of the integer, the decimal part of the compensation data is converted into the integer firstly and then is converted into the binary number, and the storage space occupied by the decimal part storage can be saved. The Huffman coding can code characters with high occurrence probability by using 0 and 1 which are as few as possible, the compression rate of a first code corresponding to an integer part of compensation data and a second code corresponding to a decimal part of the compensation data which are obtained by the Huffman coding is higher, and the occupied space is smaller, so that a display device can store more processed compensation data, and the compensation data with improved compensation precision is stored in the display device in the form of the processed compensation data.

In some embodiments, the integer part may be binary-converted according to a value range of the integer part, so as to improve a compression rate of data. The decimal part can be subjected to binary conversion according to the compensation precision of the display device and the pre-divided numerical value segments, and the compression rate of data is further improved. Fig. 2 is a flowchart of another embodiment of a compensation data processing method provided in the present application. Fig. 2 differs from fig. 1 in that step S102 in fig. 1 may be specifically detailed as step S1021 and step S1022 in fig. 2, and step S103 in fig. 1 may be specifically detailed as step S1031 to step S1033 in fig. 2.

In step S1021, a first storage bit depth of the integer part is determined according to the value range of the integer part.

The first storage bit depth is the minimum bit depth meeting the value range of the integer part, so that the integer part in any one compensation data can be converted into a first binary number with the first storage bit depth, and the waste of the storage bit depth can not be generated. For example, if the integer portion has a value range of 0 to 15, the value range of the integer portion can be satisfied by using a four-bit binary number, and correspondingly, the first storage bit depth can be 4 bits (i.e., bit). For another example, if the integer part has a value range of 0 to 28, the value range of the integer part can be satisfied by using a five-bit binary number, and correspondingly, the first storage bit depth can be 5 bits. For another example, if the value range of the integer part is 0 to 7, the value range of the integer part can be satisfied by using a three-bit binary number, and correspondingly, the first storage bit depth can be 3 bits.

Because the negative number is converted into the binary number, the inverse number of the negative number is converted into the binary number, and then the binary number obtained by converting the inverse number is subjected to complement. Therefore, when the integer part is a negative number, the range of the value of the integer part can be considered from the inverse of the negative number, that is, the absolute value of the negative number.

In some examples, a maximum value and a minimum value of absolute values of the integer part in all compensation data may be obtained, and a value range of the integer part may be determined according to the maximum value and the minimum value. For example, the compensation data includes-1.50344, 0.77907, 2.307765, -0.32992, and 10.819157, the value range of the integer portion is 0 to 10, at least four binary digits are required to satisfy the value range of the integer portion, and the first storage bit depth can be determined to be 4 bits.

In other examples, a large amount of compensation data may be obtained, analyzed, and a range of values common to the integer portion of the compensation data may be determined. For example, through analytical investigation of a large batch of compensation data, it may be determined that the size of the integer part of the compensation data does not exceed 15, and that the integer part of most of the compensation data is 0, 1 or 2, and correspondingly, that the first storage bit depth is 4 bits.

In step S1022, the integer portion is converted into a first binary number according to the first storage bit depth.

The bit depth of the first binary number is the first bit depth. In some examples, the first stored bit is 4 bits deep, then a byte may store two first binary digits. For example, the compensation data includes 1.7665, 0.6654, 1.526, 1.231, 5.135 and 6.213, the integer parts of the six compensation data are 1, 0, 1, 5 and 6 respectively, the first binary numbers obtained by converting the integer parts of the six compensation data are 0001, 0000, 0001, 0101 and 0110 respectively, and correspondingly, the first binary numbers obtained by converting the integer parts of the six compensation data can constitute three bytes, the first byte is 00010000, the second byte is 00010001, and the third byte is 01010101010.

The bit depth can be effectively reduced by performing binary conversion on the integer part of the compensation data by using the minimum bit depth which meets the value range of the integer part, so that the storage space occupied by the original data of the integer part is reduced, and under some conditions, the storage space occupied by the original data of the integer part can be reduced by half even by reducing the bit depth. The effective reduction of the bit depth can reduce the complexity of the distribution of the binary number converted by the integer part and can improve the compression ratio of the subsequent Huffman coding. Furthermore, by setting the first storage bit depth, an increase in the amount of data due to separation of the integer part and the fractional part of the compensation data can be reduced.

In step S1031, the fractional part is subjected to n-bit fractional preservation processing according to the compensation accuracy of the display device, and a first fractional is obtained.

The first decimal is a decimal part processed by reserving n decimal parts. n is a positive integer and can be set according to the compensation precision of the display device. Specifically, n may be the same as the number of decimal places of the compensation accuracy, or n is smaller than the number of decimal places of the compensation accuracy, which is not limited herein.

In some examples, n may be the number of decimal places to compensate for the precision minus one. For example, if the compensation accuracy of the display device is about 0.25 and the decimal number of the compensation accuracy is 2, n may be 1, the decimal part of the compensation data may be subjected to one-digit decimal processing, the part of the decimal part after one digit decimal may be directly omitted, or the decimal part after one digit decimal may be rounded to obtain the decimal part after one digit decimal. As an example, if the compensation accuracy of the display device is about 0.25, the compensation data includes 1.7665, the decimal part of the compensation data 1.7665 is 0.7665, and in the case where n is 1, the decimal part 0.7665 may be rounded, and the first decimal obtained after retaining one decimal digit is 0.8.

In step S1032, a target value segment matching the first decimal is obtained from the m value segments obtained by pre-division, and a representative number of the target value segment is obtained.

The m number segments are not overlapped and are in the range of 0 to 0.9, and m is an integer larger than 1. The m number of segments may be discontinuous. The lengths of the different value segments in the m value segments may be equal or different, and are not limited herein. Each value segment may include a plurality of numbers or only one number, and is not limited herein. For example, where m is 5, five value segments may include [0,0.1], [0.2,0.3], [0.4,0.6], [0.7,0.8] and 0.9, where the five value segments are not consecutive, the length of the value segments [0,0.1], [0.2,0.3] and [0.7,0.8] is 0.1, the length of the value segments [0.4,0.6] is 0.2, and the value segment 0.9 is meant to include the value 0.9.

Each value section has a representative number, and the representative number of each value section is an n-digit decimal number in the value section or 1 close to the value section. For example, the five numerical segments include [0,0.1], [0.2,0.3], [0.4,0.6], [0.7,0.8] and 0.9, the representative number of the numerical segment [0,0.1] is 0, the representative number of the numerical segment [0.2,0.3] is 0.2, the representative number of the numerical segment [0.4,0.6] is 0.5, the representative number of the numerical segment [0.7,0.8] is 0.7, and the representative number of the numerical segment 0.9 is 1.

The target numerical value section is a numerical value section matched with the first decimal in the m numerical value sections, and the numerical value section matched with the first decimal is a numerical value section in which the first decimal falls. For example, the five numerical segments include [0,0.1], [0.2,0.3], [0.4,0.6], [0.7,0.8] and 0.9, the representative number of the numerical segment [0,0.1] is 0, the representative number of the numerical segment [0.2,0.3] is 0.2, the representative number of the numerical segment [0.4,0.6] is 0.5, the representative number of the numerical segment [0.7,0.8] is 0.7, the representative number of the numerical segment 0.9 is 1, and if the first decimal is 0.8, the target numerical segment is [0.7,0.8], and the representative number of the target numerical segment is 0.7.

In some examples, the representative number may be determined according to the compensation accuracy of the display device, and then the value segment corresponding to the representative number may be determined according to each representative number. The number m of the number segments is the same as the number of the representative numbers, and the value of m is not limited herein. The selection of the representative number is related to the compensation accuracy of the display device, and the number of the representative numbers, i.e., m, is related to the compensation accuracy of the display device. The representative number may be the same as one-bit fractional or 1 of x superimposed fractional portions of compensation accuracy, x being 0, 1, 2, … …. The representative number may be calculated and selected by using compensation accuracy and other algorithms, and is not limited herein. For example, if the compensation accuracy of the display device is 0.25, the selected representative numbers include 0, 0.2, 0.5, 0.7, and 1, and a value segment is provided corresponding to each representative number, and m is 5.

In step S1033, the representative number of the target value segment is converted into an integer, and the converted integer is converted into a second binary number.

The representative number of the target value section is a decimal number or 1. If the representative number of the target value segment is 1, 1 can be directly used as the integer converted from the representative number. If the representative number of the target value segment is a decimal number, the decimal number can be converted into an integer through an algorithm, and the specific type of the algorithm is not limited herein. For example, if the representative number of the target value segment is a one-digit decimal number, the representative number of the target value segment may be multiplied by 10, and the resultant product may be used as an integer converted from the representative number of the target value segment.

In some examples, the second memory bit depth may be determined based on the compensation accuracy and the first memory bit depth; and converting the integer obtained by conversion into a second binary number according to the second storage bit depth. For details of the first storage bit depth, reference may be made to the related description in the above embodiments, and details are not repeated herein.

The second storage bit depth can meet the value range of the integer obtained through conversion, the value range of the integer obtained through conversion can be obtained according to the representative number of the numerical value section, the representative number of the numerical value section is related to the compensation precision of the display device, and the second storage bit depth can be set with reference to the compensation precision. For example, if the value of the converted integer is in the range of 1 to 9, the second storage bit depth may be 4 bits or more than 4 bits.

In the subsequent process, a first code corresponding to the first binary number needs to be merged with a second code corresponding to the second binary number, the storage bit depth of the first binary number is the first storage bit depth, and the storage bit depth of the second binary number is the second storage bit depth. For example, to correspond to the length of the byte being read, if the first memory bit depth is 4 bits and the second memory bit depth can collectively form a byte with the first memory bit depth, the second memory bit depth can be 4 bits.

The decimal part can tighten the compensation data again on the basis of the second storage bit depth, and according to the compensation precision, a corresponding second binary number can be obtained by utilizing the individual representative number, so that a plurality of middle and small decimal parts in the compensation data can be converted into a small number of second binary numbers, and the compression rate of the subsequent Huffman coding can be improved again. Moreover, the number of the representative numbers is related to the compensation precision of the display device, and the requirement of the compensation precision can be met, so that the compression rate of the Huffman coding does not influence the compensation precision. That is to say, the compensation data processing method provided by the embodiment of the present application can improve the compression rate of the compensation data on the basis of ensuring the data accuracy, that is, on the basis of ensuring that the storage space of the display device is enough to support a large amount of processed compensation data, the display compensation accuracy of the display device can be ensured.

For ease of understanding, the following description will be made with an example from the compensation data to the binary number corresponding to the formation integer part and the binary number corresponding to the fractional part.

For example, fig. 3 is a schematic diagram of an example of a process from compensating data to forming a first binary number and a second binary number provided by an embodiment of the present application. As shown in fig. 3, the compensation data includes 1.7665, 0.6654, 1.526, 1.231, 5.135, and 6.213. According to research analysis on a large amount of compensation data (including historical compensation data), if the absolute value of the compensation data is determined to be substantially less than 16, namely the absolute value of the integer part of the compensation data is less than or equal to 15, the first storage bit depth of the first binary number corresponding to the integer part is set to be 4 bits. Integer parts of the compensation data 1.7665, 0.6654, 1.526, 1.231, 5.135 and 6.213 are 1, 0, 1, 5 and 6, respectively, and first binary numbers converted from the integer parts of the six compensation data are 0001, 0000, 0001, 0101 and 0110, respectively. The first binary number converted from the integer part of the six compensation data may constitute three bytes, the first byte being 00010000, the second byte being 00010001, and the third byte being 01010110. Through research analysis, the compensation accuracy of the display device was determined to be about 0.25. Five value sections of [0,0.1], [0.2,0.3], [0.4,0.6], [0.7,0.8] and 0.9 can be set in advance according to the compensation precision, and the respective representative numbers of the five value sections are 0, 0.2, 0.4, 0.7 and 1. The decimal part of the actual compensation value corresponding to the representative number 0 is 0, the decimal part of the actual compensation value corresponding to the representative number 0.2 is 0.25, the decimal part of the actual compensation value corresponding to the representative number 0.4 is 0.5, the decimal part of the actual compensation value corresponding to the representative number 0.7 is 0.75, and the decimal part of the actual compensation value corresponding to the representative number 1 is 1. The fractional portions of the compensation data 1.7665, 0.6654, 1.526, 1.231, 5.135, and 6.213 are 0.7665, 0.6654, 0.526, 0.231, 0.135, and 0.213, respectively. The fractional part of the compensation data is rounded off, a single fraction is retained, and the six first fractions obtained are 0.8, 0.7, 0.5, 0.2, 0.1 and 0.2, respectively. The target value sections matched with the six first decimal numbers are [0.7,0.8], [0.4,0.6], [0.2,0.3], [0,0.1] and [0.2,0.3] respectively. Correspondingly, the representative numbers of the target value segments matched by the six first decimal numbers are 0.7, 0.4, 0.2,0 and 0.2 respectively. The representative numbers are multiplied by 10 to obtain integers of 7, 4, 2,0 and 2 for the conversion of the representative numbers, respectively. According to the value range of the integer obtained by the representative number conversion, the lowest depth of the second storage bit can be determined to be 3 bits, and then the first storage bit depth is combined with the second storage bit depth to form a byte conveniently for reading, and the second storage bit depth can be set to be 4 bits. And performing binary conversion according to the second storage bit depth, wherein the second binary numbers obtained by conversion are 0111, 0100, 0010, 0000 and 0010 respectively. The second binary number converted from the fractional part of the six compensation data may constitute three bytes, the first byte being 01110111, the second byte being 01000010, and the third byte being 00000010. And then, performing Huffman coding on the first binary number and the second binary number respectively to obtain a first code and a second code.

By adopting the compensation data processing method provided by the embodiment of the application, the compression rate of the compensation data can be greatly improved on the basis of ensuring the data precision, and the storage space is saved. For example, the original compensation data includes 1.8, 0.7, 1.5, 1.2, 5.1 and 6.2, and if the original compensation data is directly huffman-coded, the resulting coded string including six codes of compensation data is "1001011101110001", and has 16 bits in total; if the compensation data processing method provided by the embodiment of the present application is used to process the six compensation data, the obtained encoded string including the six compensation data is "1011010110", and has 10 bits in total. It can be seen that when the compensation data processing method provided by the embodiment of the application is used for processing the compensation data, the compression rate can be further improved by (16-10)/16 ≈ 37.5% compared with a mode of directly processing the compensation data by using huffman coding.

In some embodiments, after the processed compensation data is obtained, a compensation data file may be generated and burned into a storage device of the display device, so that the display device reads the processed compensation data from the storage device when performing display compensation. Fig. 4 is a flowchart of a compensation data processing method according to another embodiment of the present application. Fig. 4 is different from fig. 1 in that the compensation data processing method shown in fig. 4 may further include steps S105 to S108.

In step S105, the processed compensation data corresponding to each compensation data is combined to obtain a data set.

The compensation data is large in quantity, and the processed compensation data corresponding to each compensation data can be combined to obtain a data set so as to process the whole data set. The data set includes processed compensation data corresponding to each compensation data.

In step S106, the data set is checked to obtain a check value.

In order to process the accuracy check and the integrity check of the compensation data transmission and burning, a check algorithm can be used for checking the data set to obtain a check value. The check value may be transmitted with the data set.

In some examples, a Cyclic Redundancy Check (CRC) may be performed on the data set, with the resulting Check value being a CRC Check value. Other verification algorithms may be used to verify the data set, and are not limited herein.

In step S107, a compensation data file is generated based on the data set and the check value.

The compensation data file includes a data set and a check value. The check value may be set at a check bit preset in the compensation data file, and the check bit may be set at a preset position. For example, the check bits may be set at the end of the compensation data file, i.e. the check bits may be set after the data set in the compensation data file.

In step S108, the compensation data file is burned into the storage device of the display device.

The memory device of the Display device may include a Display Driver Integrated Circuit (DDIC) or other memory devices, and the like, but is not limited thereto. After the compensation data file is burnt into a storage device of the display device, the display device can verify the data set in the compensation data file to obtain a comparison verification value, and the accuracy and the integrity of the compensation data file are judged by comparing whether the comparison verification value is consistent with the verification value in the compensation data file. If the comparison check value is consistent with the check value in the compensation data file, the accuracy and the integrity of the compensation data file can be determined; if the comparison check value is inconsistent with the check value in the compensation data file, the inaccuracy or the incompleteness of the compensation data file can be determined, and the recording needs to be carried out again.

The display device is provided with a decoding processing circuit, and in the process of display compensation, the processed compensation data read from the compensation data file can be processed by the decoding processing circuit, so that the compensation data can be obtained, and the display compensation can be performed by using the compensation data.

In some embodiments, because the large-batch compensation data is processed, the large-batch integer part can be processed after the compensation data is separated into the integer part and the decimal part, and the large-batch decimal part is processed, the sequence of the processing of the integer part and the processing of the decimal part is not limited herein, the processing of the integer part can be performed before the processing of the decimal part, the processing of the integer part can be performed after the processing of the decimal part, and the processing of the integer part can be performed synchronously with the processing of the decimal part. Fig. 5 is a flowchart of a compensation data processing method according to another embodiment of the present disclosure. Fig. 5 is different from fig. 1 in that the compensation data processing method shown in fig. 5 may further include steps S109 to S112, and step S104 in fig. 1 may be specifically subdivided into step S1041 and step S1042 in fig. 5.

In step S109, the first codes corresponding to the compensation data are combined to obtain a first code set.

After the first codes corresponding to the integer portions of the compensation data are obtained, the first codes corresponding to the compensation data may be merged to obtain a first code set. The first encoding set includes a first encoding corresponding to an integer portion of each compensation data.

In step S110, a first data length of the first encoding set is obtained through statistics, and a first encoding subfile is generated based on the first data length and the first encoding set.

The first data length is the total length of the first code corresponding to the integer part of each compensation data in the first code set. The first encoded subfile includes a first encoding set and a first data length. The first data length may be stored in a preset position of the first encoding subfile, for example, the first data length may be stored in a header of the first encoding subfile.

In step S111, the second codes corresponding to the compensation data are combined to obtain a second code set.

After the second codes corresponding to the fractional parts of the compensation data are obtained, the second codes corresponding to the compensation data can be merged to obtain a second code set. The second encoding set includes second encodings corresponding to fractional portions of the respective compensation data.

In step S112, a second data length of the second encoding set is obtained through statistics, and a second encoding subfile is generated based on the second data length and the second encoding set.

The second data length is the total length of the second codes corresponding to the fractional parts of the compensation data in the second coding set. The second encoded subfile includes a second encoding set and a second data length. The second data length can be stored in a preset location of the second encoded subfile, e.g., the second data length can be stored in a header of the second encoded subfile.

In step S1041, a first code and a second code are sequentially acquired from the first coding subfile and the second coding subfile.

The first codes in the first code subfile are arranged in the order of arrangement of the compensation data. The second codes in the second code subfile are arranged in the order of arrangement of the compensation data. The same order of the first and second codes sequentially obtained from the first and second code subfiles belong to the same compensation data.

In step S1042, the first codes and the second codes in the same order are merged to obtain the processed compensation data.

The first code and the second code in the same order belong to the same compensation data, and the processed compensation data obtained after the first code and the second code in the same order are combined is the processed compensation data corresponding to the compensation data.

The application also provides a compensation data processing device. Fig. 6 is a schematic structural diagram of an embodiment of a compensation data processing apparatus provided in the present application. As shown in fig. 6, the compensation data processing apparatus 200 may include a separation module 201, a first calculation module 202, a second calculation module 203, and a merging module 204.

The separation module 201 may be configured to obtain compensation data and separate each compensation data into an integer portion and a fractional portion.

The first calculating module 202 is configured to convert the integer portion into a first binary number, and perform huffman coding on the first binary number to obtain a first code.

The second calculating module 203 may be configured to convert the fractional part into an integer, convert the converted integer into a second binary number, and perform huffman coding on the second binary number to obtain a second code.

The merging module 204 may be configured to merge the first code and the second code to obtain the processed compensation data.

The processed compensation data is used for being read by a display device to perform display compensation.

In the embodiment of the application, the compensation data can be separated into an integer part and a decimal part, the integer part is converted into a binary number, the decimal part is converted into an integer and then into a binary number, and the binary number obtained by converting the integer part and the binary number obtained by converting the decimal part are respectively subjected to huffman coding and merging to obtain the processed compensation data. The storage of the decimal is larger than that of the integer, the decimal part of the compensation data is converted into the integer firstly and then is converted into the binary number, and the storage space occupied by the decimal part storage can be saved. The Huffman coding can code characters with high occurrence probability by using 0 and 1 which are as few as possible, the compression rate of a first code corresponding to an integer part of compensation data and a second code corresponding to a decimal part of the compensation data which are obtained by the Huffman coding is higher, and the occupied space is smaller, so that a display device can store more processed compensation data, and the compensation data with improved compensation precision is stored in the display device in the form of the processed compensation data.

In some embodiments, the first computing module 202 may be configured to: determining a first storage bit depth of the integer part according to the value range of the integer part, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part; the integer portion is converted to a first binary number according to a first memory bit depth.

In some examples, the first stored bit is 4 bits deep.

In some embodiments, the second calculation module 203 may be configured to: according to the compensation precision of the display device, carrying out n-bit decimal part reserving processing on the decimal part to obtain a first decimal part, wherein n is a positive integer; acquiring a target numerical value section matched with the first decimal from m numerical value sections obtained by pre-dividing, and obtaining the representative number of the target numerical value section, wherein the m numerical value sections are not overlapped and are positioned in the range of 0 to 0.9, the representative number of each numerical value section is an n-bit decimal positioned in the numerical value section or 1 close to the numerical value section, and m is an integer greater than 1; and converting the representative number of the target numerical value segment into an integer, and converting the converted integer into a second binary number.

In some embodiments, the second calculation module 203 may be operable to: determining a second storage bit depth according to the compensation precision and the first storage bit depth, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part; and converting the integer obtained by conversion into a second binary number according to the second storage bit depth.

In some examples, the second stored bit is 4 bits deep.

In some examples, n-1 and m-5.

Fig. 7 is a schematic structural diagram of another embodiment of a compensation data processing apparatus provided in the present application. Fig. 7 is different from fig. 6 in that the compensation data processing apparatus shown in fig. 7 may further include a file generating module 205.

The generation module 205 may be operable to: merging the processed compensation data corresponding to each compensation data to obtain a data set; verifying the data set to obtain a verification value; generating a compensation data file based on the data set and the check value; and burning the compensation data file into a storage device of the display device.

Fig. 8 is a schematic structural diagram of a compensation data processing apparatus according to another embodiment of the present application. Fig. 8 is different from fig. 6 in that the compensation data processing apparatus shown in fig. 8 may further include a first subfile generating module 206 and a second subfile generating module 207.

The first subfile generation module 206 may be operable to: merging the first codes corresponding to the compensation data to obtain a first code set; and counting to obtain a first data length of the first coding set, and generating a first coding subfile based on the first data length and the first coding set.

The second subfile generation module 207 may be operable to: merging the second codes corresponding to the compensation data to obtain a second code set; and counting to obtain a second data length of the second encoding set, and generating a second encoding subfile based on the second data length and the second encoding set.

The merge module 204 may be configured to: sequentially acquiring a first code and a second code from the first code subfile and the second code subfile; and merging the first code and the second code with the same order to obtain the processed compensation data.

The application also provides compensation data processing equipment. Fig. 9 is a schematic structural diagram of an embodiment of a compensation data processing device provided in the present application. As shown in fig. 9, the compensation data processing device 300 comprises a memory 301, a processor 302 and a computer program stored on the memory 301 and executable on the processor 302.

In one example, the processor 302 may include a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC), or may be configured to implement one or more Integrated circuits of the embodiments of the present Application.

The Memory 301 may include Read-Only Memory (ROM), Random Access Memory (RAM), magnetic disk storage media devices, optical storage media devices, flash Memory devices, electrical, optical, or other physical/tangible Memory storage devices. Thus, in general, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software comprising computer-executable instructions and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the compensation data processing method in accordance with embodiments of the present application.

The processor 302 runs a computer program corresponding to the executable program code by reading the executable program code stored in the memory 301 for implementing the compensation data processing method in the above-described embodiment.

In one example, compensation data processing apparatus 300 may also include a communication interface 303 and a bus 304. As shown in fig. 9, the memory 301, the processor 302, and the communication interface 303 are connected via a bus 304 to complete communication therebetween.

The communication interface 303 is mainly used for implementing communication between modules, apparatuses, units and/or devices in the embodiment of the present application. Input devices and/or output devices may also be accessed through communication interface 303.

Bus 304 includes hardware, software, or both to couple the components of compensation data processing device 300 to each other. By way of example, and not limitation, Bus 304 may include an Accelerated Graphics Port (AGP) or other Graphics Bus, an Enhanced Industry Standard Architecture (EISA) Bus, a Front-Side Bus (FSB), a HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) Bus, an InfiniBand interconnect, a Low Pin Count (LPC) Bus, a memory Bus, a Micro Channel Architecture (MCA) Bus, a Peripheral Component Interconnect (PCI) Bus, a PCI-Express (PCI-E) Bus, a Serial Advanced Technology Attachment (SATA) Bus, a Video Electronics Standards Association Local Bus (VLB) Bus, or other suitable Bus, or a combination of two or more of these. Bus 304 may include one or more buses, where appropriate. Although specific buses are described and shown in the embodiments of the application, any suitable buses or interconnects are contemplated by the application.

The present application further provides a computer-readable storage medium, where computer program instructions are stored on the computer-readable storage medium, and when the computer program instructions are executed by a processor, the compensation data processing method in the foregoing embodiments can be implemented, and the same technical effects can be achieved. The computer-readable storage medium may include a non-transitory computer-readable storage medium, such as a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, which is not limited herein.

The present application also provides a computer program product, wherein instructions of the computer program product, when executed by a processor of an electronic device, cause the electronic device to execute the compensation data processing method in the above-mentioned embodiment. The electronic device may be implemented as the compensation data processing apparatus, the compensation data processing device, and the like in the above-described embodiments, and is not limited herein.

It should be clear that the embodiments in this specification are described in a progressive manner, and the same or similar parts in the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. For apparatus embodiments, device embodiments, computer-readable storage medium embodiments, and computer program product embodiments, reference may be made in relation to the description of the method embodiments. The present application is not limited to the particular steps and structures described above and shown in the drawings. Those skilled in the art may make various changes, modifications and additions or change the order between the steps after appreciating the spirit of the present application. Also, a detailed description of known process techniques is omitted herein for the sake of brevity.

Aspects of the present application are described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a processor may be, but is not limited to, a general purpose processor, a special purpose processor, an application specific processor, or a field programmable logic circuit. It will also be understood that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based computer instructions which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

It will be appreciated by persons skilled in the art that the above embodiments are illustrative and not restrictive. Different features which are present in different embodiments may be combined to advantage. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art upon studying the drawings, the specification, and the claims. In the claims, the term "comprising" does not exclude other means or steps; the word "a" or "an" does not exclude a plurality; the terms "first", "second" are used to denote a name and not to denote any particular order. Any reference signs in the claims shall not be construed as limiting the scope. The functions of the various parts appearing in the claims may be implemented by a single hardware or software module. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims (10)

1. A method of processing compensation data, comprising:

acquiring compensation data, and separating each compensation data into an integer part and a fractional part;

converting the integer part into a first binary number, and performing Huffman coding on the first binary number to obtain a first code;

converting the decimal part into an integer, converting the converted integer into a second binary number, and performing Huffman coding on the second binary number to obtain a second code;

and combining the first code and the second code to obtain processed compensation data, wherein the processed compensation data is used for being read by a display device for display compensation.

2. The method of claim 1, wherein converting the integer portion to a first binary number comprises:

determining a first storage bit depth of the integer part according to the value range of the integer part, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part;

converting said integer portion to said first binary number according to said first stored bit depth;

preferably, the first stored bit is 4 bits deep.

3. The method of claim 1, wherein converting the fractional part into an integer and converting the converted integer into a second binary number comprises:

according to the compensation precision of the display device, reserving n-bit decimal parts to obtain a first decimal part, wherein n is a positive integer;

acquiring a target numerical value section matched with the first decimal from m numerical value sections obtained by pre-dividing, and acquiring a representative number of the target numerical value section, wherein the m numerical value sections are not overlapped and are positioned in a range from 0 to 0.9, the representative number of each numerical value section is an n-bit decimal positioned in the numerical value section or 1 close to the numerical value section, and m is an integer greater than 1;

and converting the representative number of the target numerical value segment into an integer, and converting the converted integer into the second binary number.

4. The method of claim 3, wherein converting the converted integer number into the second binary number comprises:

determining a second storage bit depth according to the compensation precision and a first storage bit depth, wherein the first storage bit depth is the minimum bit depth meeting the value range of the integer part;

converting the converted integer into the second binary number according to the second storage bit depth;

preferably, the second stored bit depth is 4 bits.

5. The method of claim 3, wherein n is 1 and m is 5.

6. The method of claim 1, wherein after said combining said first encoding and said second encoding to obtain processed compensation data, further comprising:

merging the processed compensation data corresponding to each compensation data to obtain a data set;

verifying the data set to obtain a verification value;

generating a compensation data file based on the data set and the check value;

and burning the compensation data file into a storage device of the display device.

7. The method of claim 1,

after the obtaining of the first code, further comprising:

merging the first codes corresponding to the compensation data to obtain a first code set;

counting to obtain a first data length of the first coding set, and generating a first coding subfile based on the first data length and the first coding set;

after the obtaining of the second code, the method further includes:

merging the second codes corresponding to the compensation data to obtain a second code set;

counting to obtain a second data length of the second coding set, and generating a second coding subfile based on the second data length and the second coding set;

the merging the first code and the second code to obtain the processed compensation data includes:

obtaining the first code and the second code in sequence from the first code subfile and the second code subfile;

and merging the first code and the second code with the same order to obtain the processed compensation data.

8. A compensation data processing apparatus, comprising:

the separation module is used for acquiring compensation data and separating each compensation data into an integer part and a decimal part;

the first calculation module is used for converting the integer part into a first binary number and carrying out Huffman coding on the first binary number to obtain a first code;

the second calculation module is used for converting the decimal part into an integer, converting the converted integer into a second binary number, and performing Huffman coding on the second binary number to obtain a second code;

and the merging module is used for merging the first code and the second code to obtain processed compensation data, and the processed compensation data is used for being read by a display device to carry out display compensation.

9. A compensation data processing apparatus, characterized by comprising: a processor and a memory storing computer program instructions;

the processor, when executing the computer program instructions, implements a compensation data processing method according to any one of claims 1 to 7.

10. A computer-readable storage medium, having stored thereon computer program instructions, which when executed by a processor, implement the compensation data processing method of any one of claims 1 to 7.

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