CN114598566A - Communication system and method based on SPI bus - Google Patents
Communication system and method based on SPI bus Download PDFInfo
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- CN114598566A CN114598566A CN202011407791.1A CN202011407791A CN114598566A CN 114598566 A CN114598566 A CN 114598566A CN 202011407791 A CN202011407791 A CN 202011407791A CN 114598566 A CN114598566 A CN 114598566A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
- G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The invention relates to the technical field of communication of a backboard bus, in particular to a communication system and a method based on an SPI bus. The system and the method are characterized in that the system comprises a master station and at least one slave station connected with the master station in a daisy chain manner; the master station is used for sending a starting frame to the slave station; the slave station is used for generating and outputting a response frame corresponding to the starting frame after receiving the starting frame; the master station is also used for confirming the number of the slave stations based on all the response frames when the master station receives the starting frames and all the response frames.
Description
Technical Field
The invention relates to the technical field of communication of a backboard bus, in particular to a communication system and a method based on an SPI bus.
Background
Most of daisy chain buses of the existing SPI interface adopt the length of an SPI shift register as a sent information frame, the transmission direction is from an SPI master station to an SPI slave station, a strategy of an effective feedback mechanism is lacked in the transmission direction, and before the daisy chain connection is used, the master station needs to know that the master station is specifically connected with a plurality of slave stations, so that the number of the connected slave stations cannot be identified in real time, and the daisy chain connection does not support the scanning topology of the slave stations, so that the requirements in some occasions are difficult to meet.
Disclosure of Invention
The embodiment of the invention provides a communication system and a communication method based on an SPI bus, which at least solve the technical problems that the identification efficiency of the conventional SPI bus to the number of connected slave stations is low and the feedback of the slave stations is lacked.
According to an embodiment of the present invention, there is provided an SPI bus based communication system including:
the system comprises a main station and at least one slave station connected with the main station in a daisy chain manner;
the master station is used for sending a starting frame to the slave station;
the slave station is used for generating and outputting a response frame corresponding to the starting frame after receiving the starting frame;
the master station is also used for confirming the number of the slave stations based on all the response frames when the master station receives the starting frame and all the response frames.
Furthermore, the master station is also used for outputting the target frame characters to the slave stations one by controlling the chip selection signals based on the number of the slave stations, the preset clock frequency and the preset length of the shift register after the master station confirms the number of the slave stations;
the master station is also used for entering a listening state after the master station outputs all the target frame characters;
the master station is also used for entering an error state and sending an error prompt signal to a user when the master station does not hear the return frame of the slave station;
and the master station is also used for finishing frame message transmission when the master station hears the return frames of all the slave stations.
Further, the master station is further configured to enter an error state and send an error prompt signal to the user when the master station does not receive the start frame or the response frame.
Furthermore, the slave station is also used for controlling based on the chip selection signal, and the slave station receives the target frame characters output by the master station one by one;
the slave station is also used for processing the data carried by the target frame character by raising the chip selection signal when the target frame character is received;
and the slave station is also used for outputting a return frame by pulling down the chip selection signal after finishing all data processing.
And further, the slave station is also used for entering an error state and sending an error prompt signal to a user when the slave station fails to complete data processing or fails to pull down the chip selection signal when the preset running time length is exceeded.
Further, the system also comprises a data link layer for frame transmission, wherein the data link layer comprises a short response frame and/or a standard frame containing a plurality of target frame characters.
According to another embodiment of the present invention, a communication method based on an SPI bus is provided, which specifically includes the following steps:
the master station sends a starting frame to the slave station;
after receiving the starting frame, the slave station generates and outputs a response frame corresponding to the starting frame;
when the master station receives the start frame and all the response frames, the master station confirms the number of the slave stations based on all the response frames.
Further, the method further comprises:
the master station outputs target frame characters to the slave stations one by controlling chip selection signals based on the number of the slave stations, a preset clock frequency and a preset length of a shift register;
after the master station outputs all the target frame characters, the master station enters a listening state;
when the master station does not hear the return frame of the slave station, the master station enters an error state and sends an error prompt signal to a user;
and when the master station receives the return frames of all the slave stations, the master station completes the transmission of the frame message.
Further, the method also includes:
and when the master station does not receive the starting frame or the response frame, the master station enters an error state and sends an error prompt signal to a user.
Further, the method further comprises:
the slave station receives the target frame characters output by the master station one by one based on the control of the chip selection signal;
when receiving the target frame character, the slave station processes the data carried by the target frame character by raising the chip selection signal;
and after the slave station completes all data processing, the slave station outputs a return frame by pulling down the chip selection signal.
The communication system and the method based on the SPI bus in the embodiment of the invention send the starting frame to at least one slave station which is connected with the master station in a daisy chain mode through the master station, so that the sent starting frame can be sequentially transmitted in the slave station in a daisy chain connection transmission mode, and when the starting frame is transmitted, the slave station can receive the starting frame, generate and output a response frame corresponding to the starting frame, and continuously transmit the response frame to the master station to receive the starting frame and all the response frames, thereby realizing the topology function of the slave station; then, the master station can accurately and quickly confirm the number of the slave stations based on all the response frames, transmission of data in the whole daisy chain bus is realized, and the number of the slave stations connected with the master station can be accurately and quickly judged according to the short response frames of the slave stations.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of an SPI bus based communication system according to the present invention;
FIG. 2 is a diagram of the physical layer architecture of the SPI bus based communication system according to the present invention;
FIG. 3 is a diagram of a data link layer frame format of the SPI bus based communication system according to the present invention;
FIG. 4 is a flow chart of the SPI bus based communication method of the present invention;
FIG. 5 is a flowchart illustrating the data output status of the master station according to the SPI bus-based communication method of the present invention;
fig. 6 is a flowchart of slave station data frame processing in the SPI bus based communication method of the present invention;
fig. 7 is a flowchart of a slave station architecture of the SPI bus based communication method of the present invention;
fig. 8 is a flowchart of a master station architecture of the SPI bus based communication method of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
According to another embodiment of the present invention, there is provided an SPI bus based communication system, see fig. 1 to 3, including:
the system comprises a main station and at least one slave station connected with the main station in a daisy chain mode;
the master station is used for sending a starting frame to the slave station;
the slave station is used for generating and outputting a response frame corresponding to the starting frame after receiving the starting frame;
the master station is also used for confirming the number of the slave stations based on all the response frames when the master station receives the starting frame and all the response frames.
In this embodiment, the daisy chain represents a wiring scheme, for example, device a and device B are connected by cable, device B is connected by cable to device C, and device C is connected by cable to device D, in this connection method, a mesh topology is not formed, and only the adjacent devices can directly communicate with each other, for example, in the above example, device a cannot directly communicate with device C, and they must be relayed through device B.
The start frame is a transmission unit containing start data.
Each of the short response frames in this embodiment is 8-bit data, and is a transmission unit generated by the slave station after receiving the start frame sent by the master station and used for responding to the start frame, where the response frame includes slave station data such as slave station location data and response data.
Specifically, in this embodiment, the master station is connected to at least one slave station in a daisy chain manner, and in order to ensure that data can be transmitted on the whole daisy chain bus, the master station is in an initial state, and then sends a start frame to the slave station through the master station, so that the slave station can respond to the start frame and perform cyclic transmission, thereby implementing data transmission on the whole daisy chain bus, and implementing the feedback function of the slave station to a certain extent.
In the present embodiment, a master station is connected to at least one slave station in a daisy chain manner, that is, the master station is connected to a physical layer, referring to fig. 2, the present embodiment uses a bus of an SPI interface, and has six lines, namely, a master station output/slave station input (miso), a master station input/slave station output (mosi), a clock (clk), a chip select (cs), a ground line (gnd), and a power supply (pow); the clk, cs, gnd and pow of the master station are connected to corresponding pins of all the slave stations; the miso and mosi pins are each connected only to the next device, while the data out (Dout) pin of the last device is connected back to the miso of the master station.
Further, in this embodiment, the slave station is in a start state (initial state), and then, after receiving the start frame sent by the master station, the slave station generates a response frame corresponding to the start frame based on data transmission of the data link layer; then, the slave station enters a transparent state (transparent state) to wait for other commands of the master station, and at the same time, the slave station continues to output the start frame and the response frame thereof to the next slave station for processing, so that data transmission on the whole daisy chain bus is realized, and the feedback function of the slave station can be realized to a certain extent.
Further, after the master station receives the short response frames of all the slave stations and the start frame of the master station, the master station can accurately and quickly determine the number of the slave stations, namely the number of the slave stations according to the number of the received short response frames, so that data can be transmitted on the whole daisy chain bus, the length of the information frame can be increased, the feedback function of the slave stations can be realized to a certain extent, the number of the slave stations connected with the master station can be accurately and quickly judged, and then, a command state (command state) capable of controlling other data transmission can be entered, so that the feedback function of the slave stations can be further realized.
In the communication system based on the SPI bus in the embodiment of the invention, the master station sends the starting frame to at least one slave station which is connected with the master station in a daisy chain manner, so that the sent starting frame can be sequentially transmitted in the slave station in a daisy chain connection transmission manner, and when the starting frame is transmitted, the slave station can receive the starting frame, generate and output a response frame corresponding to the starting frame, and continuously transmit the response frame to the master station to receive the starting frame and all the response frames, thereby realizing the topology function of the slave station; then, the master station can accurately and quickly confirm the number of the slave stations based on all the response frames, transmission of data in the whole daisy chain bus is realized, and the number of the slave stations connected with the master station can be accurately and quickly judged according to the short response frames of the slave stations.
In a preferred technical solution, the master station is further configured to output the target frame characters to the slave stations one by controlling the chip select signal based on the number of the slave stations, a preset clock frequency, and a preset shift register length after the master station confirms the number of the slave stations;
the master station is also used for entering a listening state after the master station outputs all the target frame characters;
the master station is also used for entering an error state and sending an error prompt signal to a user when the master station does not hear the return frame of the slave station;
and the master station is also used for finishing frame message transmission when the master station hears the return frames of all the slave stations.
In the present embodiment, the preset time frequency is a time period during which the clock pulse supplied from CLK allows the input and output of data to be completed simultaneously.
A shift register (shift register) is a flip-flop-based device that operates on several identical time pulses, to which data is input in parallel or in series, and then each time pulse is shifted one bit to the left or right in turn and output at an output terminal.
The length of the shift register can be the shift length of data register.
The target frame character is a transmission unit containing SPI data.
The return frame is a transmission unit containing data fed back by the slave station after processing the target frame character.
Specifically, in this embodiment, after the master station enters the command state, the master station controls the chip select signal according to the number of the slave stations, the frequency of the clock, and the length of the shift register, so that the slave stations just receive data; meanwhile, a chip selection signal is raised, so that the slave station can record SPI data in the received target frame character into a microcomputer/single chip microcomputer (mcu), based on a daisy chain connection mode between the master station and the slave station, the target frame character can transmit one frame character to the slave station every time according to the definition of a data link layer, and after a plurality of cycles, the transmission of the END character in the target frame character of the master station is completed, the transmission of data in the whole daisy chain bus can be realized, the length of an information frame is increased, and then the master station enters a listening state (listen state) capable of listening to feedback information of the slave station.
Further, when the master station is in a listen state, the preset time duration is exceeded and the return frame of the slave station is not received, that is, an error or fault occurs in data transmission, the master station enters an error state and sends an error prompt signal to a user, wherein the error prompt signal needs to be restarted or error detected, so that the stability and reliability of subsequent data transmission are ensured.
Further, when the master station is in a list state, after receiving the return frames of all the slave stations, the master station can acquire the frame messages generated after the data in the return frames are transmitted in the whole daisy chain, so that not only is the transmission of the data in the whole daisy chain realized, but also a feedback mechanism from the slave stations to the master station is realized, and then the master station can continue to return to a command state.
It should be noted that the master station can enter the error state in any state, and after entering the error, the master station can return to the initial state only by restarting the master station.
In a preferred technical solution, the master station is further configured to enter an error state and send an error prompt signal to a user when the master station does not receive the start frame or the response frame.
Specifically, the master station can enter the error state in any state, and the master station can return the initial state only by restarting the master station after entering the error state, so that after the master station sends the start frame, the preset time is exceeded and the master station does not receive the start frame or the response frame, that is, an error or a fault occurs in data transmission can be understood, the master station enters the error state and sends an error prompt signal which needs to be restarted or error detected to a user, so as to ensure the stability and reliability of subsequent data transmission.
In a preferred technical scheme, the slave station is further used for controlling based on the chip select signal, and the slave station receives the target frame characters output by the master station one by one;
the slave station is also used for processing the data carried by the target frame character by raising the chip selection signal when the target frame character is received;
and the slave station is also used for outputting a return frame by pulling down the chip selection signal after finishing all data processing.
Specifically, the slave station enters a transparent state after outputting the response frame, enters an operation state (operational state) after receiving the chip selection signal sent by the master station to process the data in the received target frame character, and specifically, the SPI data in the received target frame character can be recorded in a microcomputer/single chip microcomputer (mcu) by raising the chip selection signal; then, after the data is processed, the operation state is exited by pulling down the chip selection signal, the processed return frame is output, and the target frame character and the return frame are output to the next slave station for processing, so that the transmission of the data on the whole daisy chain is realized, the length of the information frame is increased, and a feedback mechanism from the slave station to the master station is realized; the slave station can then re-enter the transparent state.
In a preferred technical solution, the slave station is further configured to enter an error state and send an error prompt signal to a user when the slave station fails to complete data processing or fails to pull down a chip select signal after exceeding a preset operation duration.
Specifically, when an error occurs in the slave station, that is, when the data processing is not completed or the chip select signal is not pulled down over a preset operation time period, it can be understood that an error or a fault occurs in the data processing of the slave station, the slave station enters an error state and sends an error prompt signal to a user, which needs to be restarted or error-detected, and only after the slave station is restarted, the slave station can return to the inter state to ensure the stability and reliability of subsequent data transmission
In a preferred technical solution, the system further includes a data link layer for frame transmission, and the data link layer includes a short response frame and/or a standard frame containing a plurality of target frame characters.
In this embodiment, the data link layer defines how to transmit data on a single link, and the data link layer includes a function of how to combine data into data blocks, where such data blocks are referred to as frames, and the frames are transmission units of the data link layer; and how to control the transmission of frames on the physical channel; and to provide management of the establishment, maintenance and release of data link paths between two network entities.
Further, the data link layer is above a physical line, and controls the transmission of the data through some procedures or protocols to ensure the correctness of the transmitted data; hardware and software implementing these procedures or protocols are then added to the physical lines, thus forming a data link, the transmission path that passes from the data transmission point to the data reception point.
Specifically, the data link layer employed in this embodiment is divided into a start bit, 8 data bits, and a stop bit added to the even parity bit in the frame character design. In this embodiment, each polling only sends one frame character, and finally, the frame characters are concatenated into a frame message in the device.
Further, referring to fig. 3, the frame format adopted in the present embodiment is designed with a short response frame and a standard frame with fixed data field; wherein the short response frame is only one frame character, and the standard frame has 15 frame characters, i.e. target frame characters, which are respectively a start character, a destination address character, a source address character, a frame control character, 9 data characters, a check character and a stop character.
Example 2
According to another embodiment of the present invention, there is provided an SPI bus based communication method, see fig. 4, 7 and 8, including the steps of:
s1: the master station sends a start frame to the slave station.
In this embodiment, the daisy chain represents a wiring scheme, for example, device a and device B are connected by cable, device B is connected by cable to device C, and device C is connected by cable to device D, in this connection method, no mesh topology is formed, and only the adjacent devices can directly communicate with each other, for example, in the above example, device a cannot directly communicate with device C, and they must be relayed through device B.
Further, the start frame is a transmission unit containing start data.
Specifically, in this embodiment, the master station is connected to at least one slave station in a daisy chain manner, and in order to ensure that data can be transmitted on the whole daisy chain bus, the master station is in an initial state, and then sends a start frame to the slave station through the master station, so that the slave station can respond to the start frame and perform cyclic transmission, thereby implementing data transmission on the whole daisy chain bus, and implementing the feedback function of the slave station to a certain extent.
In the embodiment, a master station is connected with at least one slave station in a daisy chain manner, that is, the master station is connected in a physical layer, and the embodiment adopts a bus of an SPI interface, and has six lines of master station output/slave station input (miso), master station input/slave station output (mosi), a clock (clk), a chip select (cs), a ground line (gnd) and a power supply (pow); the clk, cs, gnd and pow of the master station are connected to corresponding pins of all the slave stations; the miso and mosi pins are each connected only to the next device, while the data out (Dout) pin of the last device is connected back to the miso of the master station.
S2: and after receiving the starting frame, the slave station generates and outputs a response frame corresponding to the starting frame.
In this embodiment, the response frame may specifically be a short response frame, and each short response frame in this embodiment is 8-bit data, and is a transmission unit generated by the slave station after receiving the start frame sent by the master station and used for responding to the start frame, where the response frame contains slave station data such as slave station location data and response data.
Specifically, in this embodiment, the slave station is in a start state (initial state), and then, after receiving the start frame sent by the master station, the slave station generates a response frame corresponding to the start frame based on data transmission of a data link layer; then, the slave station enters a transparent state (transparent state) to wait for other commands of the master station, and at the same time, the slave station continues to output the start frame and the response frame thereof to the next slave station for processing, so that data transmission on the whole daisy chain bus is realized, and the feedback function of the slave station can be realized to a certain extent.
S3: when the master station receives the start frame and all the response frames, the master station confirms the number of the slave stations based on all the response frames.
Specifically, after the master station receives the short response frames of all the slave stations and the start frame of the master station, the master station can accurately and quickly determine the number of the slave stations, namely the number of the slave stations according to the number of the received short response frames, so that not only can data be transmitted on the whole daisy chain bus be realized, but also the length of the information frame is increased, the feedback function of the slave stations can be realized to a certain extent, the number of the slave stations connected with the master station can be accurately and quickly judged, and then, a command state (command state) capable of carrying out other data transmission control can be entered, so that the feedback function of the slave stations can be further realized.
According to the communication method based on the SPI bus, the master station sends the starting frame to at least one slave station which is connected with the master station in a daisy chain mode, so that the sent starting frame can be sequentially transmitted in the slave station in a daisy chain connection transmission mode, the slave station can receive the starting frame while transmitting the starting frame, a response frame corresponding to the starting frame is generated and output, the response frame is continuously transmitted to the master station to receive the starting frame and all the response frames, and the topology function of the slave station is realized; then, the master station can accurately and quickly confirm the number of the slave stations based on all the response frames, so that the transmission of data in the whole daisy chain bus is realized, and the number of the slave stations connected with the master station can be accurately and quickly judged according to the short response frames of the slave stations; the method has the advantages of low calculation complexity, simplicity, convenience, practicability and low cost.
In a preferred embodiment, referring to fig. 5 and 8, after step S3, the method further includes:
s501: the master station outputs target frame characters to the slave stations one by controlling chip selection signals based on the number of the slave stations, a preset clock frequency and a preset length of a shift register;
s502: after the master station outputs all the target frame characters, the master station enters a listening state;
s5021: when the master station does not hear the return frame of the slave station, the master station enters an error state and sends an error prompt signal to a user;
s5022: and when the master station receives the return frames of all the slave stations, the master station completes the transmission of the frame message.
In the present embodiment, the preset time frequency is a time period during which the clock pulse supplied from CLK allows the input and output of data to be completed simultaneously.
A shift register (shift register) is a flip-flop based device that operates on several identical time pulses, to which data is input in parallel or in series, and then each time pulse is shifted one bit to the left or right in sequence and output at an output terminal.
The length of the shift register can be the shift length of data register.
The target frame character is a transmission unit containing SPI data.
The return frame is a transmission unit containing data fed back by the slave station after finishing processing the target frame character.
Specifically, in this embodiment, after the master station enters the command state, the master station controls the chip select signal according to the number of the slave stations, the frequency of the clock, and the length of the shift register, so that the slave stations just receive data; meanwhile, a chip selection signal is raised, so that the slave station can record SPI data in the received target frame character into a microcomputer/single chip microcomputer (mcu), based on a daisy chain connection mode between the master station and the slave station, the target frame character can transmit one frame character to the slave station every time according to the definition of a data link layer, and after a plurality of cycles, the transmission of the END character in the target frame character of the master station is completed, the transmission of data in the whole daisy chain bus can be realized, the length of an information frame is increased, and then the master station enters a listening state (listen state) capable of listening to feedback information of the slave station.
Further, when the master station is in a listen state, the preset time duration is exceeded and the return frame of the slave station is not received, that is, an error or fault occurs in data transmission, the master station enters an error state and sends an error prompt signal to a user, wherein the error prompt signal needs to be restarted or error detected, so that the stability and reliability of subsequent data transmission are ensured.
Further, when the master station receives the return frames of all the slave stations in the list state, that is, the master station can acquire the frame message generated after the data in the return frame is transmitted in the whole daisy chain, so that not only is the transmission of the data in the whole daisy chain realized and the length of the information frame increased, but also a feedback mechanism from the slave station to the master station is realized, and then the master station can continue to return to the command state.
It should be noted that the master station can enter the error state in any state, and after entering the error, the master station can return to the initial state only by restarting the master station.
In a preferred embodiment, referring to fig. 8, after step S3, the method further includes:
and when the master station does not receive the starting frame or the response frame, the master station enters an error state and sends an error prompt signal to a user.
Specifically, the master station can enter the error state in any state, and the master station can return the initial state only by restarting the master station after entering the error state, so that after the master station sends the start frame, the preset time is exceeded and the master station does not receive the start frame or the response frame, that is, an error or a fault occurs in data transmission can be understood, the master station enters the error state and sends an error prompt signal which needs to be restarted or error detected to a user, so as to ensure the stability and reliability of subsequent data transmission.
As a preferred technical solution, referring to fig. 6 and 7, after step S501, the method further includes:
s601: the slave station receives the target frame characters output by the master station one by one based on the control of the chip selection signal;
s602: when receiving the target frame character, the slave station processes the data carried by the target frame character by raising the chip selection signal;
s603: and after the slave station completes all data processing, the slave station outputs a return frame by pulling down the chip selection signal.
Specifically, the slave station enters a transparent state after outputting the response frame, enters an operation state (operational state) after receiving the chip selection signal sent by the master station to process the data in the received target frame character, and specifically, the SPI data in the received target frame character can be recorded in a microcomputer/single chip microcomputer (mcu) by raising the chip selection signal; then, after the data is processed, the operation state is exited by pulling down the chip selection signal, the processed return frame is output, and the target frame character and the return frame are output to the next slave station for processing, so that the transmission of the data on the whole daisy chain is realized, the length of the information frame is increased, and a feedback mechanism from the slave station to the master station is realized; the slave station can then re-enter the transparent state.
It should be noted that when an error occurs in the slave station, that is, when the data processing cannot be completed or the chip select signal cannot be pulled down over a preset operation time period, it can be understood that an error or a fault occurs in the data processing in the slave station, the slave station enters an error state and sends an error prompt signal to the user, which needs to be restarted or error detected, and only after the slave station is restarted, the slave station can return to the inter state, so as to ensure the stability and reliability of subsequent data transmission.
Compared with the existing SPI interface communication method, the communication method and the system based on the SPI bus have the advantages that:
1. a slave station topology function; in the embodiment, the topology function of the slave station is realized through the transmission of the short response frame of the slave station and the start frame of the master station, namely, the master station sends a start frame when starting, the slave station sends the started short response frame, the master station realizes the transmission of data on the whole daisy chain bus after receiving the start frame of the master station, and the master station can also judge the number of the slave stations connected with the master station quickly and accurately by distinguishing the short response frames of several slave stations;
2. transmitting a data frame; in the embodiment, after the master station judges the number of the slave stations, one frame character is transmitted circularly each time, after the frame character reaches the corresponding slave station, the slave station records the received information by raising chip selection, and then one frame message is transmitted circularly after 15 target frame characters are completed, so that the length of the information frame is increased;
3. the slave station state feedback; in this embodiment, the master station receives the frame message transmitted by the slave station in the listening state, and thus the feedback function of the slave station state can be completed.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described system embodiments are merely illustrative, and for example, a division of a unit may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or may not be executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is substantially or partly contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that it is obvious to those skilled in the art that various modifications and improvements can be made without departing from the principle of the present invention, and these modifications and improvements should also be considered as the protection scope of the present invention.
Claims (10)
1. A SPI bus based communication system, comprising:
the system comprises a main station and at least one slave station connected with the main station in a daisy chain manner;
the master station is used for sending a starting frame to the slave station;
the slave station is used for generating and outputting a response frame corresponding to the starting frame after receiving the starting frame;
the master station is further configured to, when the master station receives the start frame and all the response frames, confirm the number of the slave stations based on all the response frames.
2. The SPI bus based communication system of claim 1, wherein the master station is further configured to output target frame characters to the slave stations one by controlling a chip select signal based on the number of the slave stations, a preset clock frequency and a preset shift register length after the master station confirms the number of the slave stations;
the master station is also used for entering a listening state after the master station outputs all the target frame characters;
the master station is further used for entering an error state and sending an error prompt signal to a user when the master station does not hear the return frame of the slave station;
and the master station is further used for finishing frame message transmission when the master station hears the return frames of all the slave stations.
3. The SPI bus based communication system of claim 1, wherein said master station is further configured to enter an error state and send an error notification signal to a user when said master station does not receive said initiation frame or said response frame.
4. The SPI bus based communication system according to claim 2, wherein said slave station is further configured for receiving target frame characters output by said master station one by one based on the control of said chip select signal;
the slave station is further used for processing the data carried by the target frame character by raising the chip selection signal when the target frame character is received;
and the slave station is also used for outputting the return frame by pulling down the chip selection signal after the slave station completes all data processing.
5. An SPI bus based communication system as claimed in claim 4, wherein said slave station is further configured to enter an error state and issue an error notification signal to a user when said slave station fails to complete data processing or fails to pull down said chip select signal beyond a preset run time.
6. An SPI bus based communication system according to claim 2, further comprising a data link layer for frame transmission, said data link layer comprising short acknowledgement frames and/or standard frames containing a plurality of said target frame characters.
7. A communication method based on an SPI bus is characterized by comprising the following steps:
the master station sends a starting frame to the slave station;
after receiving the starting frame, the slave station generates and outputs a response frame corresponding to the starting frame;
and when the master station receives the starting frame and all the response frames, the master station confirms the number of the slave stations based on all the response frames.
8. The SPI bus based communication method according to claim 7, wherein after said step of said master station acknowledging the number of said slave stations based on all said response frames when said master station receives said initiation frame and all said response frames, said method further comprises:
the master station outputs target frame characters to the slave stations one by controlling chip selection signals based on the number of the slave stations, a preset clock frequency and a preset length of a shift register;
after the master station outputs all the target frame characters, the master station enters a listening state;
when the master station does not hear the return frame of the slave station, the master station enters an error state and sends an error prompt signal to a user;
and when the master station receives all the returned frames of the slave station, the master station completes frame message transmission.
9. The SPI bus based communication method according to claim 7, wherein after said step of said master station acknowledging the number of said slave stations based on all said response frames when said master station receives said initiation frame and all said response frames, said method further comprises:
and when the master station does not receive the starting frame or the response frame, the master station enters an error state and sends an error prompt signal to a user.
10. The SPI bus based communication method of claim 8, wherein after the step of the master station outputting target frame characters to the slave stations one by controlling a chip select signal based on the number of the slave stations, a preset clock frequency and a preset shift register length, the method further comprises:
the slave station receives the target frame characters output by the master station one by one based on the control of the chip selection signal;
when the target frame character is received, the slave station processes the data carried by the target frame character by raising the chip selection signal;
and after the slave station finishes all data processing, the slave station outputs the return frame by pulling down the chip selection signal.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116610622A (en) * | 2023-05-26 | 2023-08-18 | 成都电科星拓科技有限公司 | SPI daisy chain self-adaptive communication method and system |
| CN116610622B (en) * | 2023-05-26 | 2024-06-11 | 成都电科星拓科技有限公司 | SPI daisy chain self-adaptive communication method and system |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103281229A (en) * | 2013-05-03 | 2013-09-04 | 杭州正嘉数控设备有限公司 | Motion control bus communication method based on Ethernet physical layer |
| CN104820645A (en) * | 2015-04-18 | 2015-08-05 | 佛山豪欧智能科技有限公司 | One-key scanning method and scanning system applied to scanning equipment |
| CN105116807A (en) * | 2015-09-06 | 2015-12-02 | 长江三峡能事达电气股份有限公司 | System and method for automatically configuring module information of modular controller |
| CN107819659A (en) * | 2017-10-24 | 2018-03-20 | 七玄驹智能科技（上海）有限公司 | A kind of intelligent level UNICOM communication network based on SPI |
| CN111817940A (en) * | 2020-09-11 | 2020-10-23 | 之江实验室 | Industrial control ring network system, ring network control protocol and implementation method thereof |
| CN111966621A (en) * | 2019-05-20 | 2020-11-20 | 恩智浦美国有限公司 | SPI protocol for burst read/write mode |
-
2020
- 2020-12-04 CN CN202011407791.1A patent/CN114598566A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103281229A (en) * | 2013-05-03 | 2013-09-04 | 杭州正嘉数控设备有限公司 | Motion control bus communication method based on Ethernet physical layer |
| CN104820645A (en) * | 2015-04-18 | 2015-08-05 | 佛山豪欧智能科技有限公司 | One-key scanning method and scanning system applied to scanning equipment |
| CN105116807A (en) * | 2015-09-06 | 2015-12-02 | 长江三峡能事达电气股份有限公司 | System and method for automatically configuring module information of modular controller |
| CN107819659A (en) * | 2017-10-24 | 2018-03-20 | 七玄驹智能科技（上海）有限公司 | A kind of intelligent level UNICOM communication network based on SPI |
| CN111966621A (en) * | 2019-05-20 | 2020-11-20 | 恩智浦美国有限公司 | SPI protocol for burst read/write mode |
| CN111817940A (en) * | 2020-09-11 | 2020-10-23 | 之江实验室 | Industrial control ring network system, ring network control protocol and implementation method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116610622A (en) * | 2023-05-26 | 2023-08-18 | 成都电科星拓科技有限公司 | SPI daisy chain self-adaptive communication method and system |
| CN116610622B (en) * | 2023-05-26 | 2024-06-11 | 成都电科星拓科技有限公司 | SPI daisy chain self-adaptive communication method and system |
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