CN114582895A - Display substrate, display panel and display device - Google Patents
Display substrate, display panel and display device Download PDFInfo
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- CN114582895A CN114582895A CN202210248817.5A CN202210248817A CN114582895A CN 114582895 A CN114582895 A CN 114582895A CN 202210248817 A CN202210248817 A CN 202210248817A CN 114582895 A CN114582895 A CN 114582895A
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- 239000000758 substrate Substances 0.000 title claims abstract description 90
- 239000010409 thin film Substances 0.000 claims abstract description 31
- 230000000694 effects Effects 0.000 abstract description 15
- 238000000034 method Methods 0.000 abstract description 10
- 230000008569 process Effects 0.000 abstract description 7
- 206010047571 Visual impairment Diseases 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 7
- 230000009471 action Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000012780 transparent material Substances 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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Abstract
The invention relates to a display substrate, a display panel and a display device. The display substrate comprises a grid line, a data line and an oxide thin film transistor; the oxide thin film transistor has an oxide channel layer including a main body portion and a connection portion, a projection of the main body portion of the oxide channel layer on the data line being located within the data line, the connection portion of the oxide channel layer extending from the main body portion to an opening region on the display substrate. The data lines in the display substrate can completely shield and wrap the main body part of the oxide channel layer in the longitudinal direction and in all longitudinal areas of the oxide channel layer, so that a good light shielding effect can be achieved. Based on the better light shielding effect of the data line on the main body portion of the oxide channel layer, the oxide thin film transistor in the display substrate has better NBTIS performance, so that the negative drift of the threshold voltage can be improved, and the afterimage problem in the display process can be improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display substrate, a display panel and a display device.
Background
For the existing display panel, the oxide thin film transistor is an important component on which the display is realized. An oxide thin film transistor generally includes a gate electrode, an oxide channel layer, a source electrode, and a drain electrode. An oxide channel layer in the oxide thin film transistor is sensitive to light, which may cause poor Negative Bias Temperature Illumination Stability (NBTIS) of the oxide thin film transistor, and a threshold voltage of the oxide thin film transistor may generate a large Negative drift under the action of NBTIS Stress, thereby causing an image sticking problem in a display process.
For this reason, a light shielding layer (LS layer) is generally provided at the oxide thin film transistor, with which light irradiated on the oxide channel layer from the lower side is blocked to improve NBTIS performance of the oxide thin film transistor.
However, the light shielding layer provided at the conventional oxide thin film transistor has a limited effect on wrapping and shielding the oxide channel layer, and the protruding width of one side of the light shielding layer in the longitudinal direction relative to the gate line is less than 1.5 micrometers, so that the oxide channel layer cannot be completely wrapped and shielded in the whole longitudinal region of the oxide channel layer. Therefore, the performance improvement of NBTIS of the oxide thin film transistor due to the provision of the light-shielding layer is limited. On the other hand, the light shielding layer protrudes from the gate line in the longitudinal direction, and presses the opening area of the display panel, thereby reducing the area of the opening area and reducing the aperture ratio.
Disclosure of Invention
The invention provides a display substrate, a display panel and a display device, and aims to solve the technical problem that the NBTIS performance of an oxide thin film transistor in the prior art is poor.
The invention provides a display substrate, which comprises a grid line, a data line and an oxide thin film transistor; the oxide thin film transistor has an oxide channel layer including a main body portion and a connection portion, a projection of the main body portion of the oxide channel layer on the data line being located within the data line, the connection portion of the oxide channel layer extending from the main body portion to an opening region on a display substrate.
Wherein the oxide channel layer is positioned above the data line, and an insulating layer is formed between the oxide channel layer and the data line; the insulating layer is provided with a first through hole, and the main body part of the oxide channel layer is connected with the data line through the first through hole.
Wherein a projection of a partial region of the main body portion of the oxide channel layer on the gate line is located within the gate line.
The width of the grid line ranges from 1 micron to 5 microns.
Wherein the width of the data line is in the range of 0.5 to 3 micrometers, and the width of the main body part of the oxide channel layer is in the range of 0.5 to 3 micrometers.
Wherein the distance between the edge of the oxide channel layer and the edge of the data line is in the range of 0-2 microns.
Wherein a region of the data line overlapping the gate line has a protrusion, and the protrusion protrudes along a direction in which the gate line extends.
The display substrate further comprises a pixel electrode, and the pixel electrode is arranged in the opening area; the pixel electrode and the oxide channel layer are provided with a layer structure, a second through hole is formed in the layer structure between the pixel electrode and the oxide channel layer, and the connecting portion of the pixel electrode and the oxide channel layer is connected through the second through hole.
The display substrate further comprises a pixel electrode and a switching layer, wherein the pixel electrode and the switching layer are arranged in the opening area; a layer structure is arranged between the switching layer and the oxide channel layer, a second through hole is formed in the layer structure between the switching layer and the oxide channel layer, and the connecting part of the switching layer and the oxide channel layer is connected through the second through hole; a layer structure is formed between the pixel electrode and the switching layer, a third through hole is formed in the layer structure between the pixel electrode and the switching layer, and the pixel electrode is connected with the switching layer through the third through hole.
Wherein, the switching layer is made of transparent material.
Wherein, the switching layer is ITO.
The display substrate further comprises a light shielding layer, the light shielding layer is arranged along the direction of the grid line, and the light shielding layer is located below the oxide channel layer.
The width of the light shielding layer is not smaller than that of the grid lines, so that the projection of the grid lines on the light shielding layer does not exceed the light shielding layer.
And the distance between the edge of the grid line and the edge of the light shielding layer ranges from 0 to 3 micrometers.
The light shielding layer is connected with the gate drive circuit in the non-display area of the display substrate.
The display panel provided by the invention comprises the display substrate.
The display device provided by the invention comprises the display panel.
Compared with the prior art, the display substrate, the display panel and the display device provided by the embodiment of the invention have the following advantages:
in the display substrate provided by the embodiment of the invention, the oxide channel layer in the oxide thin film transistor is provided with the main body part and the connecting part, and the projection of the main body part of the oxide channel layer on the data line is positioned in the data line, namely the main body part of the oxide channel layer and the data line are correspondingly overlapped in the direction vertical to the substrate; in addition, the data line generally extends along the longitudinal direction, and can completely shield and wrap the main body part of the oxide channel layer in the longitudinal direction and in the whole longitudinal area of the oxide channel layer, so that a better light shielding effect can be realized. Based on the better light shielding effect of the data line on the main body portion of the oxide channel layer, the oxide thin film transistor in the display substrate has better NBTIS performance, so that the negative drift of the threshold voltage can be improved, and the afterimage problem in the display process can be improved.
The display panel provided by the invention comprises the display substrate, has the beneficial effect consistent with that of the display substrate, and is not repeated.
The display device provided by the invention comprises the display panel, has the same beneficial effects with the display panel, and is not repeated.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a display substrate in embodiment 1 of the present invention;
FIG. 2 is a cross-sectional view of a layer structure of the display substrate shown in FIG. 1;
FIG. 3 is a schematic diagram of an alternative embodiment of the display substrate shown in FIG. 1;
FIG. 4 is a schematic diagram of another alternative embodiment of the display substrate shown in FIG. 1;
FIG. 5 is a cross-sectional view of the layer structure of the display substrate shown in FIG. 4;
FIG. 6 is a schematic structural diagram of a display substrate in embodiment 2 of the present invention;
FIG. 7 is a schematic cross-sectional view of the layer structure of the display substrate shown in FIG. 6.
In the figure:
10-a substrate; 11-a substrate;
20-a gate line; 21-a data line; a 22-oxide channel layer; 23-a tie-in layer; 24-pixel electrodes; 25-a first via; 26-a second via; 27-a third via; 28-a light-shielding layer;
220-a main body portion; 221-connecting part.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
Embodiments of a display substrate, a display panel, and a display device according to the present invention will be described below with reference to the accompanying drawings.
(1) Example 1 of display substrate
Fig. 1 is a schematic structural diagram of a display substrate in embodiment 1 of the present invention; fig. 2 is a schematic cross-sectional view of the layer structure of the display substrate (not including the pixel electrode 24 and the third via hole 27) cut along a section line of the dotted line shown in fig. 1. Referring to fig. 1 and 2, the display substrate provided in this embodiment includes a substrate 10, and a substrate 11, a gate line 20, a data line 21, and an oxide thin film transistor formed on the substrate 10.
The oxide thin film transistor has an oxide channel layer 22, the oxide channel layer 22 including a main body portion 220 and a connection portion 221, a projection of the main body portion 220 of the oxide channel layer 22 on the data line 21 being located within the data line 21, the connection portion 221 of the oxide channel layer 22 extending from the main body portion 220 to an opening region on the display substrate.
The projection of the body portion 220 of the oxide channel layer 22 on the data line 21 is located within the data line 21, in other words, the body portion 220 of the oxide channel layer 22 and the data line 21 are correspondingly overlapped in a direction perpendicular to the substrate 10, in which case the data line 21 may function as a light shielding function for the body portion 220 of the oxide channel layer 22; in addition, since the data line 21 generally extends in the longitudinal direction, it can completely shield and wrap the main body portion 220 of the oxide channel layer 22 in the longitudinal direction and in the entire longitudinal region of the oxide channel layer 22, thereby achieving a better light shielding effect. Therefore, in the present embodiment, based on the better light shielding effect of the data line 21 on the main body portion 220 of the oxide channel layer 22, the oxide thin film transistor in the display substrate may have better NBTIS performance.
Meanwhile, due to the light shielding effect of the data line 21 on the main body portion 220 of the oxide channel layer 22, a separate light shielding layer may not be provided in the display substrate, so that the loss of the aperture ratio of the display substrate due to the provision of the separate light shielding layer can be avoided, thereby improving the aperture ratio of the display substrate.
The connection portion 221 of the oxide channel layer 22 extends from the body portion 220 to an opening region of the display substrate where a connection is made with the relevant layer structure, for example, with the via layer 23 or with the pixel electrode 24.
In the present embodiment, the oxide channel layer 22 is located above the data line 21, and an insulating layer is formed between the oxide channel layer 22 and the data line 21. The insulating layer has a first via 25 formed therein, and the main body portion 220 of the oxide channel layer 22 is connected to the data line 21 through the first via 25.
In the present embodiment, a projection of a partial region of the main body portion 220 of the oxide channel layer 22 on the gate line 20 is located within the gate line 20. In other words, the main body portion 220 of the oxide channel layer 22 correspondingly overlaps the gate line 20 in a direction perpendicular to the substrate 10, that is, at least a partial region of the main body portion 220 of the oxide channel layer 22 is located at a region where the gate line 20 and the data line 21 overlap. For the part of the main body part 220 of the oxide channel layer 22, which is located in the overlapping region of the gate line 20 and the data line 21, both the gate line 20 and the data line 21 can play a role in shielding light, and the light irradiated to the main body part 220 of the oxide channel layer 22 is shielded in different directions, so that a better light shielding effect can be achieved, and the oxide thin film transistor in the display substrate can have better NBTIS performance.
Further, as shown in fig. 3, a region of the data line 21 overlapping the gate line 20 has a protrusion, which protrudes in a direction in which the gate line 20 extends. In other words, the region of the data line 21 overlapping the gate line 20 has a wider width, which may provide a better light-shielding effect for the oxide channel layer 22, further improving the performance of NBTIS of the oxide thin film transistor in the display substrate.
The display substrate further includes a pixel electrode 24, and the pixel electrode 24 is disposed at the opening area. In the present embodiment, the pixel electrode 24 and the oxide channel layer 22 (specifically, the connection portion 221 of the oxide channel layer 22) may be directly connected. Specifically, as shown in fig. 4 and 5, fig. 4 is a schematic structural diagram of another alternative embodiment of the display substrate shown in fig. 1; FIG. 5 is a cross-sectional view of the layer structure of the display substrate taken along the section line of the dotted line shown in FIG. 4; the pixel electrode 24 and the oxide channel layer 22 have a layer structure therebetween, and the second via hole 26 is disposed on the layer structure between the pixel electrode 24 and the oxide channel layer 22. When the pixel electrode 24 is patterned, the material of the pixel electrode 24 is formed in the second via hole 26, so that connection is achieved between the formed pixel electrode 24 and the connection portion 221 of the oxide channel layer 22 through the second via hole 26.
In addition, the pixel electrode 24 and the oxide channel layer 22 may be indirectly connected through another structure. Specifically, as shown in fig. 1, 2, and 3, an interposer layer 23 may be formed between the pixel electrode 24 and the oxide channel layer 22, the interposer layer 23 being disposed at the open region, the interposer layer 23 being capable of conducting an electrical signal. A layer structure such as an insulating layer is formed between the via layer 23 and the oxide channel layer 22, and a layer structure such as an insulating layer is also formed between the via layer 23 and the pixel electrode 24. A second via hole 26 is formed on the layer structure between the transit layer 23 and the oxide channel layer 22; the material of the transit layer 23 is formed within the second via 26 when patterning the transit layer 23 such that a connection is made between the formed transit layer 23 and the connection portion 221 of the oxide channel layer 22 through the second via 26. A third via hole 27 is formed on the layer structure between the transit layer 23 and the pixel electrode 24; when the pixel electrode 24 is patterned, the material of the pixel electrode 24 is formed in the via hole, so that the connection between the formed pixel electrode 24 and the transfer layer 23 is realized through the third via hole 27. Thus, the connection between the oxide channel layer 22 and the pixel electrode 24 is also achieved through the transit layer 23.
Furthermore, the adapting layer 23 may be made of a transparent material, so that the area of the region of the display substrate that can transmit light is increased compared to the adapting layer 23 made of a non-transparent material, thereby improving the aperture ratio of the display substrate. Specifically, the interposer layer 23 may be an ITO (indium tin oxide) interposer layer, i.e., the material of the interposer layer 23 may be ITO.
In the embodiment, the distance between the edge of the oxide channel layer 22 and the edge of the data line 21 is in the range of 0 to 2 micrometers, that is, the width of the data line 21 is equal to the width of the oxide channel layer 22 when the data line 21 is narrowest, and all regions on the oxide channel layer 22 do not protrude from the edge of the data line 21, so that the oxide channel layer 22 can be completely wrapped by the data line 21. Generally, the width of the data line 21 may be set to be greater than the width of the oxide channel layer 22 to obtain better encapsulation and light shielding effects.
In the present embodiment, specifically, the width of the gate line 20 ranges from 1 to 5 μm. The width of the main body 220 of the oxide channel layer 22 is in the range of 0.5 to 3 micrometers, and the width of the data line 21 is in the range of 0.5 to 3 micrometers. The value of the width of the data line 21 and the value of the width of the main body portion 220 of the oxide channel layer 22 are selected within the above-mentioned value range; and, the selected values meet the following requirements: the width of the data line 21 is not less than the width of the body portion 220 of the oxide channel layer 22, and the width of the data line 21 protruding from the body portion 220 of the oxide channel layer 22 at one side edge is not more than 2 μm. For example, the width of the main portion 220 of the oxide channel layer 22 is selected to be 1 micron, and the width of the data line 21 is selected to be 3 microns, at this time, the width of the data line 21 may satisfy the requirement of completely shielding and wrapping the main portion 220 of the oxide channel layer 22, and the width of the data line 21 may protrude from the main portion 220 of the oxide channel layer 22 at one side edge by a value of 1 micron (calculated according to the protruding values of the two side edges being equal, if the protruding values of the two side edges are not equal, the protruding value of the one side edge may approach to 2 microns).
(2) Example 2 of display substrate
In this embodiment, the display substrate also includes the gate line 20, the data line 21, and the oxide thin film transistor, and for brevity, details of the consistency between the gate line 20, the data line 21, and the oxide thin film transistor in this embodiment and the structures of the gate line 20, the data line 21, and the oxide thin film transistor in embodiment 1 are not repeated.
Only the differences of the present embodiment from embodiment 1 described above will be described in detail.
In this embodiment, as shown in fig. 6 and 7, fig. 6 is a schematic structural diagram of a display substrate in embodiment 2 of the present invention; fig. 7 is a schematic cross-sectional view of the layer structure of the display substrate obtained by cutting along a section line of the dotted line shown in fig. 6 (not including the pixel electrode 24 and the third via 27). The display substrate further includes a light-shielding layer 28, the light-shielding layer 28 being disposed along the gate line 20, the light-shielding layer 28 being located below the oxide channel layer 22.
Providing the separate light-shielding layer 28 can further enhance the light-shielding effect on the oxide channel layer 22 on the basis of embodiment 1 described above, thereby further improving the performance of NBTIS of the oxide thin film transistor in the display substrate.
The width of the light-shielding layer 28 is not less than the width of the grid lines 20, so that the projection of the grid lines 20 on the light-shielding layer 28 does not exceed the light-shielding layer 28. In other words, the width of the light-shielding layer 28 is greater than the width of the gate line 20, and this arrangement may reduce the aperture ratio of the display panel due to the existence of the portion of the light-shielding layer 28 protruding from the gate line 20, but the light-shielding effect of the light-shielding layer 28 on the oxide channel layer 22 may be better in the case where the width of the light-shielding layer 28 is larger. Specifically, the distance between the edge of the grid line 20 and the edge of the light shielding layer 28 ranges from 0 to 3 micrometers.
In this embodiment, the light-shielding layer 28 is further connected to a gate driver circuit (GOA cell) in the non-display region of the display substrate. The light-shielding layer 28 is usually made of a conductive metal material, and the light-shielding layer 28 is connected to the gate driving circuit, and the light-shielding layer 28 can actually serve as a gate line 20, thereby forming a dual gate structure in combination with the gate line 20 in the display substrate. Thus, the on-current I of the oxide thin film transistor in the display substrate can be increasedonThereby promoting the pixelThe rate of charge.
In summary, the present invention provides a display substrate, in which an oxide channel layer 22 in an oxide thin film transistor has a main body portion 220 and a connection portion 221, wherein a projection of the main body portion 220 of the oxide channel layer 22 on a data line 21 is located within the data line 21, in other words, the main body portion 220 of the oxide channel layer 22 and the data line 21 correspondingly overlap in a direction perpendicular to the substrate, in which case the data line 21 may play a role of shielding the main body portion 220 of the oxide channel layer 22 from light; in addition, the data line 21 generally extends in the longitudinal direction, and can completely shield and wrap the main body portion 220 of the oxide channel layer 22 in the longitudinal direction and in the entire longitudinal region of the oxide channel layer 22, so as to achieve a better light shielding effect. Based on the better light-shielding effect of the data line 21 on the main portion 220 of the oxide channel layer 22, the oxide thin film transistor in the display substrate has better NBTIS performance, so that the negative drift of the threshold voltage can be improved, and therefore, the image sticking problem in the display process can be improved.
(3) Embodiments of display Panel
In this embodiment, the display panel includes the display substrate described in the embodiment of the display substrate described above.
The display panel provided in this embodiment includes the display substrate described in the above embodiments, and has the same beneficial effects as the display substrate described above, and details are not repeated.
(4) Embodiments of the display device
In this embodiment, the display device includes the display panel described in the embodiment of the display panel described above.
The display device in this embodiment may be various devices with a display function, such as a mobile phone, a tablet computer, an intelligent terminal, a television, a notebook computer, and a vehicle-mounted display screen.
The display device provided in this embodiment includes the display panel described in the above embodiments, and has the same beneficial effects as the display panel described above, and details are not repeated.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (17)
1. A display substrate is characterized by comprising a grid line, a data line and an oxide thin film transistor;
the oxide thin film transistor has an oxide channel layer including a main body portion and a connection portion, a projection of the main body portion of the oxide channel layer on the data line being located within the data line, the connection portion of the oxide channel layer extending from the main body portion to an opening region on a display substrate.
2. The display substrate according to claim 1, wherein the oxide channel layer is located above the data line with an insulating layer formed therebetween;
the insulating layer is provided with a first through hole, and the main body part of the oxide channel layer is connected with the data line through the first through hole.
3. The display substrate according to claim 1 or 2, wherein a projection of a partial region of the main body portion of the oxide channel layer on the gate line is located within the gate line.
4. The display substrate of claim 1 or 2, wherein the width of the gate line is in a range of 1 to 5 μm.
5. The display substrate according to claim 1 or 2, wherein the width of the data line is in a range of 0.5 to 3 micrometers, and the width of the body portion of the oxide channel layer is in a range of 0.5 to 3 micrometers.
6. The display substrate according to claim 1 or 2, wherein a distance between an edge of the oxide channel layer and an edge of the data line is in a range of 0 to 2 μm.
7. The display substrate according to claim 3, wherein a region of the data line overlapping the gate line has a protrusion, and the protrusion protrudes in a direction in which the gate line extends.
8. The display substrate according to claim 1 or 2, wherein the display substrate further comprises a pixel electrode disposed at the opening region;
the pixel electrode and the oxide channel layer are provided with a layer structure, a second through hole is formed in the layer structure between the pixel electrode and the oxide channel layer, and the connecting portion of the pixel electrode and the oxide channel layer is connected through the second through hole.
9. The display substrate according to claim 1 or 2, wherein the display substrate further comprises a pixel electrode and an interposer layer, the pixel electrode and the interposer layer being disposed in the opening region;
a layer structure is arranged between the switching layer and the oxide channel layer, a second through hole is formed in the layer structure between the switching layer and the oxide channel layer, and the connecting part of the switching layer and the oxide channel layer is connected through the second through hole;
a layer structure is formed between the pixel electrode and the switching layer, a third through hole is formed in the layer structure between the pixel electrode and the switching layer, and the pixel electrode is connected with the switching layer through the third through hole.
10. The display substrate of claim 9, wherein the interposer layer is transparent.
11. The display substrate of claim 10, wherein the interposer layer is ITO.
12. The display substrate according to claim 1, further comprising a light-shielding layer disposed along the gate line direction, the light-shielding layer being located below the oxide channel layer.
13. The display substrate according to claim 12, wherein the width of the light-shielding layer is not less than the width of the grid lines, so that the projection of the grid lines on the light-shielding layer does not exceed the light-shielding layer.
14. The display substrate according to claim 13, wherein a distance between an edge of the gate line and an edge of the light-shielding layer is in a range of 0 to 3 μm.
15. The display substrate according to claim 12, wherein the light-shielding layer is connected to a gate driver circuit in a non-display region of the display substrate.
16. A display panel comprising the display substrate according to any one of claims 1 to 15.
17. A display device characterized by comprising the display panel according to claim 16.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210248817.5A CN114582895A (en) | 2022-03-14 | 2022-03-14 | Display substrate, display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210248817.5A CN114582895A (en) | 2022-03-14 | 2022-03-14 | Display substrate, display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023245538A1 (en) * | 2022-06-23 | 2023-12-28 | 京东方科技集团股份有限公司 | Display substrate, display panel, and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023245538A1 (en) * | 2022-06-23 | 2023-12-28 | 京东方科技集团股份有限公司 | Display substrate, display panel, and display device |
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