CN114582707A - Epitaxial wafer preparation method - Google Patents

Epitaxial wafer preparation method Download PDF

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Publication number
CN114582707A
CN114582707A CN202011380263.1A CN202011380263A CN114582707A CN 114582707 A CN114582707 A CN 114582707A CN 202011380263 A CN202011380263 A CN 202011380263A CN 114582707 A CN114582707 A CN 114582707A
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China
Prior art keywords
cleaning
polishing
substrate
epitaxial
epitaxial growth
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CN202011380263.1A
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Chinese (zh)
Inventor
林志鑫
季文明
刘丽英
刘源
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Zing Semiconductor Corp
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Zing Semiconductor Corp
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Priority to CN202011380263.1A priority Critical patent/CN114582707A/en
Priority to TW110102980A priority patent/TW202223178A/en
Publication of CN114582707A publication Critical patent/CN114582707A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02021—Edge treatment, chamfering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02634—Homoepitaxy

Abstract

The invention provides a preparation method of an epitaxial wafer, which comprises the following steps: s1: providing a substrate, and cleaning the substrate after double-sided polishing; s2: polishing the edge of the substrate and then cleaning; s3: cleaning the substrate after final polishing; s4: carrying out epitaxial growth on the surface of the substrate obtained after final polishing and cleaning; s5: and polishing and cleaning the substrate after epitaxial growth in sequence. The invention carries out optimization design on the existing epitaxial wafer preparation flow again, not only carries out polishing for many times before epitaxial growth to ensure that the epitaxial growth has good growth conditions, but also carries out polishing and cleaning again after the epitaxial growth to ensure that the grown epitaxial layer has a flat surface, can effectively improve the problem of poor SFQR on the surface of the epitaxial layer, and is beneficial to improving the production yield of subsequent devices. By adopting the invention, the silicon carbide base or the airflow design of the epitaxial machine does not need to be redesigned, and the angle of notch is not needed before the silicon carbide base or the epitaxial machine enters the reaction cavity of the epitaxial furnace, thereby being beneficial to improving the production efficiency and reducing the production cost.

Description

Epitaxial wafer preparation method
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of an epitaxial wafer.
Background
The epitaxial wafer is a single crystal silicon wafer obtained by growing a thin film on the surface of a substrate by an epitaxial process. By depositing a homogeneous or heterogeneous thin film as an epitaxial layer on a substrate (e.g., a silicon wafer), improved control of the crystalline quality and conductivity of the substrate surface can be achieved for high performance semiconductor device fabrication. With the increasing integration level and the shrinking feature size of semiconductor devices, the influence of the surface flatness of the epitaxial layer on the process yield and the performance of the finally prepared device is greater and greater. The better the surface flatness, the higher the device yield and performance, and thus the continuous improvement of the surface flatness of the epitaxial wafer is a continuous pursuit goal in the industry.
The existing epitaxial wafer process flow is generally as follows: substrate polishing → cleaning → epitaxial growth → final cleaning. That is, in the prior art, polishing is performed only before epitaxial growth, and only cleaning is performed after epitaxial growth to remove impurity particles on the surface of the epitaxial layer, so that the final edge morphology of the surface of the epitaxial layer is determined by epitaxial growth. Epitaxial growth is affected by the crystal orientation of the lattice, resulting in poor SFQR (Site deflection Front surface transferred least Squares/Range, Front surface minimum ニ times/Range) at 4 90 degree angles. This is because the difference in the atomic bond density and the bonding ability between different crystal planes causes the difference in the growth rate of the epitaxial layer. Generally, the higher the atomic bond density on the crystal plane, the stronger the bonding capability, and the faster the epitaxial layer growth rate, for example, the lowest the covalent bond density between the double atomic planes of the (311) crystal plane of silicon, the poor bonding capability, so the epitaxial layer growth rate is slow, while the higher the atomic bond density between the (110) crystal plane, the stronger the bonding capability, the faster the epitaxial layer growth rate, resulting in the epitaxial layer being thicker at 4 90 degree angles.
An epitaxial wafer with poor SFQR can cause problems for subsequent device fabrication. Therefore, in order to improve the SFQR, the prior art usually changes the airflow in different directions during the epitaxial growth process by redesigning the sic substrate or changing the airflow design of the epitaxial stage so as to make the epitaxial growth rate at different positions to be consistent. However, this method requires repeated adjustment, and the susceptor and/or gas flow conditions required for different epitaxial growth are not consistent, and frequent adjustment leads to an increase in production cost and a decrease in production efficiency.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for preparing an epitaxial wafer, which is used to solve the problem that the conventional epitaxial growth process cannot solve the problem that SFQR is poor at 4 places with 90 degrees due to the influence of crystal orientation on epitaxial production, and the problems of high adjustment workload, increased production cost, decreased production efficiency, etc. due to redesign of a silicon carbide substrate or change of the gas flow design of an epitaxial stage.
In order to achieve the above and other related objects, the present invention provides a method for preparing an epitaxial wafer, comprising the steps of:
s1: providing a substrate, and cleaning the substrate after double-sided polishing;
s2: polishing the edge of the substrate and then cleaning;
s3: cleaning the substrate after final polishing;
s4: carrying out epitaxial growth on the surface of the substrate obtained after final polishing and cleaning;
s5: and polishing and cleaning the substrate after epitaxial growth in sequence.
Alternatively, in step S1, the cleaning after double-side polishing includes cleaning with an SC-2 cleaning liquid under an inert gas atmosphere.
Optionally, in step S1, before the cleaning with the SC-2 cleaning solution, a step of generating an oxide layer on the surface of the substrate after the double-side polishing with ozone is further included.
Optionally, in step S1, the polishing solution for double-side polishing the substrate includes ceria particles, deionized water, a surfactant, and hydrogen peroxide.
Optionally, the cleaning after the edge polishing includes cleaning with an SC-1 cleaning solution under an inert gas atmosphere in step S2.
Optionally, in step S3, the final post-polishing cleaning includes cleaning with deionized water under an inert gas atmosphere.
Optionally, the substrate comprises a silicon substrate, the epitaxial growth comprises silicon single crystal epitaxial growth, in the epitaxial growth process, the introduced gas comprises trichlorosilane and carrier gas, the flow rate of the trichlorosilane is 1500sccm-2000sccm, and the flow rate range of the carrier gas is 1000sccm-1500 sccm.
Optionally, in step S5, during the polishing of the epitaxially grown substrate, the polishing solution includes silica particles, deionized water, a surfactant, and hydrogen peroxide.
Optionally, in step S5, the post-polishing cleaning of the epitaxially grown substrate sequentially includes a pre-cleaning step, a main cleaning step and a final cleaning step, wherein the pre-cleaning step includes a step of oxidizing the surface of the epitaxially grown substrate to form an oxide film, and then removing the oxide film; the main cleaning comprises cleaning by adopting an SC-1 cleaning solution in an inert gas atmosphere, and the final cleaning comprises cleaning by adopting deionized water in an inert gas atmosphere.
Optionally, in the SC-1 cleaning solution, the volume percentage of ammonia water, hydrogen peroxide and deionized water is 1:1:5 to 1:2: 7.
As described above, the method for manufacturing an epitaxial wafer according to the present invention has the following advantageous effects: the invention carries out optimization design on the existing epitaxial wafer preparation flow again, not only carries out polishing for many times before epitaxial growth to ensure that the epitaxial growth has good growth conditions, but also carries out polishing and cleaning again after the epitaxial growth to ensure that the grown epitaxial layer has a flat surface, can effectively improve the problem of poor SFQR on the surface of the epitaxial layer, and is beneficial to improving the production yield of subsequent devices. By adopting the invention, the silicon carbide base does not need to be redesigned or the airflow design of an epitaxial machine does not need to be changed, and the invention is suitable for the growth of epitaxial wafers of all processes and has greater commercial utilization value.
Drawings
Fig. 1 shows a flow chart of a method for preparing an epitaxial wafer according to the present invention.
Fig. 2 is a schematic diagram showing thickness distribution curves before polishing and after polishing after completion of epitaxial growth of a plurality of epitaxial wafers prepared by the epitaxial wafer preparation method of the present invention, wherein the curve (i) is a thickness distribution curve of a first epitaxial wafer after epitaxy but before polishing, and the curve (ii) is a thickness distribution curve of a first epitaxial wafer after epitaxy and after polishing; the curve (c) is a thickness distribution curve of the second epitaxial wafer after epitaxy and before polishing, and the curve (d) is a thickness distribution curve of the second epitaxial wafer after epitaxy and polishing; curve fifthly is a thickness distribution curve of the third epitaxial wafer after epitaxy and before polishing, and curve sixthly is a thickness distribution curve of the third epitaxial wafer after epitaxy and polishing.
Fig. 3 is a graph showing a comparison of the thickness difference between a plurality of wafers prepared by the method of preparing an epitaxial wafer according to the present invention before and after polishing after completion of epitaxial growth.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 3. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 1, the present invention provides a method for preparing an epitaxial wafer, comprising the steps of:
s1: providing a substrate, and cleaning the substrate after double-sided polishing;
s2: polishing the edge of the substrate and then cleaning;
s3: cleaning the substrate after final polishing;
s4: carrying out epitaxial growth on the surface of the substrate obtained after final polishing and cleaning;
s5: and polishing and cleaning the substrate after epitaxial growth in sequence.
The invention carries out optimization design on the existing epitaxial wafer preparation flow again, not only carries out polishing for many times before epitaxial growth to ensure that the epitaxial growth has good growth conditions, but also carries out polishing and cleaning again after the epitaxial growth to ensure that the grown epitaxial layer has a flat surface, can effectively improve the problem of poor SFQR on the surface of the epitaxial layer, and is beneficial to improving the production yield of subsequent devices. By adopting the invention, the silicon carbide base does not need to be redesigned or the airflow design of an epitaxial machine does not need to be changed, and the invention is suitable for the growth of epitaxial wafers of all processes and has greater commercial utilization value.
As an example, the substrate in step S1 includes, but is not limited to, a silicon substrate, a germanium substrate, a silicon carbide substrate, or other types of semiconductor substrates, and the grown epitaxial layer may be different or different according to the type of substrate and/or process, including, but not limited to, silicon single crystal epitaxial growth, and this embodiment is not particularly limited, as the epitaxial wafer preparation method of the present invention is suitable for preparing all types of epitaxial wafers. In a preferred example, however, the substrate is a silicon substrate and the epitaxial layer grown is a silicon single crystal epitaxy. The silicon single crystal epitaxial layer grown on the surface of the silicon substrate is greatly influenced by the crystal orientation of the substrate, so that the problem that the thickness of the grown epitaxial layer is larger at 4-degree 90-degree angles is difficult to solve by adopting the traditional method and polishing only before epitaxial growth, and the problem can be effectively solved by adopting the epitaxial wafer with the silicon substrate prepared by the invention. In a further example, silicon single crystal is epitaxially grown, a gas phase epitaxy method is adopted in the epitaxial growth process, introduced gas comprises trichlorosilane and carrier gas, the flow rate of the trichlorosilane is 1500sccm-2000sccm, and the flow rate of the carrier gas is 1000sccm-1500 sccm. And HCL gas can be simultaneously introduced in the process, wherein the flow rate of the HCL gas is 0-300 sccm. This is advantageous for the preparation of high quality silicon single crystal epitaxy, and the epitaxial layer grown by vapor phase epitaxy has good adhesion to the substrate.
As an example, in step S1, the polishing solution for double-side polishing the substrate includes ceria particles, deionized water, a surfactant, and hydrogen peroxide. The polishing liquid containing cerium dioxide particles is used for polishing, and the polishing efficiency is improved. In a further example, in the polishing solution, the mass percentage concentration of the cerium dioxide particles is 0.5-10 wt%, and the mass percentage concentration of the hydrogen peroxide is 2-4 wt%.
As an example, in step S1, the cleaning after double-side polishing includes cleaning with an SC-2 cleaning solution under an inert gas atmosphere, and the formulation of the SC-2 cleaning solution may be HCl: h2O2：H2The cleaning time can be determined according to the process requirements, and is 1-30 min for example. By adopting the cleaning solution with strong corrosiveness to clean, the impurity particles on the surface of the substrate can be effectively removed. The inert gas atmosphere includes, but is not limited to, nitrogen and argon, or a combination thereof, and the surface of the substrate is protected from further oxidation by introducing an inert gas.
In a further example, step S1 includes generating an oxide layer on the surface of the substrate after double-side polishing by ozone before cleaning with the SC-2 cleaning solution. Because the particles of the polishing solution with metal elements used in the previous polishing process may remain on the surface of the substrate, which may cause metal defects (e.g., short circuit of subsequently prepared devices) inside the substrate, the surface of the substrate after double-side polishing is oxidized to form a metal oxide film to firmly lock metal ions, and then the oxide film is removed by the acidic cleaning solution, so that the residue of the metal ions on the surface of the substrate can be effectively avoided.
By way of example, in step S2, the cleaning after edge polishing includes cleaning with an SC-1 cleaning solution under an inert gas atmosphere, and the volume percentage of ammonia water, hydrogen peroxide and water in the SC-1 cleaning solution may be 1:1:5 to 1:2: 7. The step is cleaned by alkalescent cleaning solution, so that the damage to the surface of the substrate can be effectively reduced. Likewise, inert gases include, but are not limited to, one or more of nitrogen and argon.
The polishing solutions used in the polishing processes of steps S1, S2, and S3 may be the same or different, for example, polishing solutions containing ceria particles, deionized water, a surfactant, and hydrogen peroxide may be used, but the components thereof may be adjusted as needed, so that these three steps may be continuously performed on the same machine, thereby avoiding substrate damage and reduction in production efficiency caused by the machine. For example, the content of the ceria particles and the hydrogen peroxide in the double-side polishing in step S1 is higher than that in the subsequent two steps, especially the content of the ceria particles and the hydrogen peroxide in the polishing solution is the lowest when the substrate is finally polished, so as to more effectively control the polishing efficiency.
As an example, the final post-polishing cleaning in step S3 includes cleaning with deionized water under an inert gas atmosphere to minimize the effect of the residual cleaning solution on the subsequent processes. This step may be followed by baking to remove moisture from the surface of the substrate.
As an example, in step S5, during the polishing of the substrate after epitaxial growth, the polishing solution includes silica particles, deionized water, a surfactant, and hydrogen peroxide. The polishing solution containing the silicon dioxide particles is adopted for polishing after epitaxial growth, so that the polishing rate can be effectively controlled, and the phenomenon that metal ions are remained in an epitaxial layer due to the use of the polishing solution containing the metal ions is avoided. In the polishing process after epitaxial growth, the part with larger thickness is firstly contacted with the polishing head due to higher upper surface, so that the polishing speed is higher due to higher pressure, and the effect of automatically correcting SFQR can be realized.
As an example, in step S5, the post-polishing cleaning of the epitaxially grown substrate sequentially includes a pre-cleaning, a main cleaning, and a final cleaning, where the pre-cleaning includes a step of oxidizing the surface of the epitaxially grown substrate to generate an oxide film, and then removing the oxide film; the main cleaning comprises cleaning with SC-1 cleaning solution under inert gas atmosphere, and the final cleaning comprises cleaning with deionized water under inert gas atmosphere. In a further example, the volume percentage of ammonia water, hydrogen peroxide and deionized water in the SC-1 cleaning solution is 1:1: 5-1: 2: 7. Through multi-step cleaning, the surface of the epitaxial layer is ensured to have no foreign matter residue, and the cleanliness is improved.
The inventors conducted experiments to verify the effects of the present invention. The test procedure includes respectively growing epitaxial layers on 3 substrate surfaces according to an epitaxial process, measuring the thickness (front value) of a 148mm position along the circumference, performing a final polishing step to obtain a polishing pad of T6 (non-woven fabric material, polyurethane material) which is a hard polishing pad, measuring the thickness (rear value) of the 148mm position along the circumference, and comparing the difference between the front value and the rear value to obtain the results shown in fig. 2 and 3. As can be seen from fig. 2 and 3, for the position of the comparative protrusion, polishing after epitaxial growth can achieve edge correction to reduce the protrusion and significantly improve the difference of edge thickness, and particularly, the thicker the epitaxial layer is, the longer the polishing time is, the more the improvement effect is.
In summary, the present invention provides a method for preparing an epitaxial wafer, including the steps of: s1: providing a substrate, and cleaning the substrate after double-sided polishing; s2: polishing the edge of the substrate and then cleaning; s3: cleaning the substrate after final polishing; s4: carrying out epitaxial growth on the surface of the substrate obtained after final polishing and cleaning; s5: and polishing and cleaning the substrate after epitaxial growth in sequence. The invention carries out optimization design on the existing epitaxial wafer preparation flow again, not only carries out polishing for many times before epitaxial growth to ensure that the epitaxial growth has good growth conditions, but also carries out polishing and cleaning again after the epitaxial growth to ensure that the grown epitaxial layer has a flat surface, can effectively improve the problem of poor SFQR on the surface of the epitaxial layer, and is beneficial to improving the production yield of subsequent devices. By adopting the invention, the epitaxial wafer with higher flatness can be obtained by finally polishing and debugging the edge morphology without subdividing the epitaxial wafer and the polished wafer, which is beneficial to simplifying the material management in a wafer factory; the silicon carbide base or the airflow design of an epitaxial machine does not need to be redesigned, the angle of notch is not needed before the silicon carbide base or the airflow design of the epitaxial machine enters a reaction cavity of an epitaxial furnace, the production efficiency is improved, the production cost is reduced, and the method is suitable for preparing epitaxial wafers of all processes. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (10)

1. A method for preparing an epitaxial wafer is characterized by comprising the following steps:
s1: providing a substrate, and cleaning the substrate after double-sided polishing;
s2: polishing the edge of the substrate and then cleaning;
s3: cleaning the substrate after final polishing;
s4: carrying out epitaxial growth on the surface of the substrate obtained after final polishing and cleaning;
s5: and polishing and cleaning the substrate after epitaxial growth in sequence.
2. The method of producing an epitaxial wafer according to claim 1, wherein the cleaning after double-side polishing in step S1 includes cleaning with an SC-2 cleaning solution in an inert gas atmosphere.
3. The method for preparing an epitaxial wafer according to claim 2, further comprising a step of generating an oxide layer on the surface of the substrate after double-side polishing by using ozone before the cleaning with the SC-2 cleaning solution in step S1.
4. The method of claim 1, wherein in step S1, the polishing solution for double-side polishing the substrate comprises ceria particles, deionized water, a surfactant, and hydrogen peroxide.
5. The method of producing an epitaxial wafer according to claim 1, wherein the cleaning after the edge polishing in step S2 includes cleaning with an SC-1 cleaning solution under an inert gas atmosphere.
6. The method of producing an epitaxial wafer according to claim 1, wherein in step S3, the cleaning after the final polishing includes cleaning with deionized water under an inert gas atmosphere.
7. The method for preparing an epitaxial wafer according to claim 1, wherein the substrate comprises a silicon substrate, the epitaxial growth comprises silicon single crystal epitaxial growth, and during the epitaxial growth, the introduced gas comprises trichlorosilane and carrier gas, wherein the flow rate of trichlorosilane is 1500sccm-2000sccm, and the flow rate of carrier gas is 1000sccm-1500 sccm.
8. The method of claim 1, wherein in step S5, the polishing solution comprises silica particles, deionized water, a surfactant, and hydrogen peroxide during polishing the substrate after epitaxial growth.
9. The method for producing an epitaxial wafer according to any one of claims 1 to 8, wherein the post-polishing cleaning of the epitaxially grown substrate in step S5 sequentially comprises a pre-cleaning, a main cleaning, and a final cleaning, wherein the pre-cleaning comprises a step of oxidizing the surface of the epitaxially grown substrate to form an oxide film, followed by removal of the oxide film; the main cleaning comprises cleaning with SC-1 cleaning solution under inert gas atmosphere, and the final cleaning comprises cleaning with deionized water under inert gas atmosphere.
10. The method for preparing an epitaxial wafer according to claim 9, wherein the volume percentage of ammonia water, hydrogen peroxide and deionized water in the SC-1 cleaning solution is 1:1:5 to 1:2: 7.
CN202011380263.1A 2020-11-30 2020-11-30 Epitaxial wafer preparation method Pending CN114582707A (en)

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CN202011380263.1A CN114582707A (en) 2020-11-30 2020-11-30 Epitaxial wafer preparation method
TW110102980A TW202223178A (en) 2020-11-30 2021-01-27 Method of epitaxial wafer manufacture

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