CN114579048A - Method and device for controlling hard disk and solid state disk - Google Patents
Method and device for controlling hard disk and solid state disk Download PDFInfo
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Abstract
The embodiment of the present specification provides a method and an apparatus for controlling a hard disk, and a solid state disk, wherein the method for controlling a hard disk is applied to a controller of a solid state disk, and the solid state disk further includes: the method comprises the following steps that persistent storage equipment and a hard disk interface are connected to the persistent storage equipment in a hanging mode through a plurality of channels of a bus, the persistent storage equipment comprises a computing area used as a memory, and the method comprises the following steps: receiving a memory access request of a host through the hard disk interface; and performing memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
Description
Technical Field
The embodiment of the specification relates to the technical field of computers, in particular to a method and a device for controlling a hard disk and a solid state disk.
Background
A Solid State Disk (SSD), also called a Solid State drive, is a hard Disk made of an array of Solid State memory chips. At present, a traditional standard nvme solid state disk has to have a RAM/DDR memory chip with a large enough size on the architecture to be used for the overhead of code segments, data segment storage, table item management and arithmetic operation space.
However, the RAM/DDR is needed, so that not only the complexity of the solid state disk is high, but also the performance of the computer system is greatly affected based on the volatility of the RAM/DDR.
Disclosure of Invention
In view of this, the present specification provides a method for controlling a hard disk. One or more embodiments of the present disclosure also relate to an apparatus for controlling a hard disk, a solid state disk, a computing device, a computer-readable storage medium, and a computer program, so as to solve technical shortcomings in the prior art.
According to a first aspect of the embodiments of the present specification, there is provided a method for controlling a hard disk, which is applied to a controller of a solid state disk, where the solid state disk further includes: the method comprises the following steps that persistent storage equipment and a hard disk interface are hung on the persistent storage equipment through a plurality of channels of a bus, the persistent storage equipment comprises a computing area used as a memory, and the method comprises the following steps: receiving a memory access request of a host through the hard disk interface; and performing memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
Optionally, the method further comprises: and under the condition that the host system is powered on again after power failure, continuing to operate the host system based on the initialized mirror image data and the system increment data in the calculation area.
Optionally, the persistent storage device further comprises an access area for data storage, and the method further comprises: receiving a storage access request of a host through the hard disk interface; and performing access processing corresponding to the storage access request on the access area.
Optionally, the method further comprises: when the controller is in a free time slice, if the space of the computing area is insufficient, a partial area is selected from the access area to be converted into the computing area; and/or, when the controller is in a free time slice, if the storage area space is insufficient, a partial area is selected from the calculation area to be converted into an access area.
Optionally, the performing, on the access area, access processing corresponding to the storage access request includes: under the condition that the storage access request is a write request, caching and writing data carried by the write request into the computing area based on the multi-concurrent synchronous time sequence mechanism; recording the mapping relation between the logic address and the physical address of the written data under the condition of finishing the cache writing; and when the controller is in an idle time slice, the written data is moved from the calculation area to the access area, and the mapping relation between the logical address and the physical address is updated.
Optionally, the performing, on the access area, access processing corresponding to the storage access request includes: under the condition that the storage access request is a read request, searching a physical address of data to be read by the read request through a mapping relation table; and reading data from the access area according to the found physical address and returning the data to the host through the hard disk interface.
According to a second aspect of the embodiments of the present specification, there is provided an apparatus for controlling a hard disk, configured to a controller of a solid state disk, the solid state disk further including: the device comprises persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, and the persistent storage equipment comprises a computing area used as an internal memory; the apparatus for controlling a hard disk includes: and the memory access receiving module is configured to receive a memory access request of a host through the hard disk interface. And the memory access processing module is configured to perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
According to a third aspect of embodiments herein, there is provided a solid state disk, including: the device comprises a controller, persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, the controller is connected with the persistent storage equipment and the hard disk interface through the bus, and the persistent storage equipment comprises a computing area used as a memory. The controller is configured to receive a memory access request of a host through the hard disk interface, and perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
Optionally, the persistent storage device further includes an access area for data storage. The controller is also configured to receive a storage access request of a host through the hard disk interface, and perform access processing corresponding to the storage access request on the access area.
Optionally, the controller comprises at least two processors, wherein at least one processor is configured to handle access to the computation region and at least another processor is configured to handle access to the access region.
According to a fourth aspect of embodiments herein, there is provided a computing device comprising: a memory and a processor; the memory is used for storing computer executable instructions, and the processor is used for executing the computer executable instructions, and the computer executable instructions realize the steps of the method for controlling the hard disk according to any embodiment of the specification when being executed by the processor.
According to a fifth aspect of embodiments herein, there is provided a computer-readable storage medium storing computer-executable instructions that, when executed by a processor, implement the steps of a method of controlling a hard disk according to any of the embodiments herein.
According to a sixth aspect of embodiments herein, there is provided a computer program, wherein the computer program, when executed in a computer, causes the computer to perform the steps of the method of controlling a hard disk according to any of the embodiments herein.
An embodiment of the present specification implements a method for controlling a hard disk, where the method is applied to a controller of a solid state disk, and the solid state disk further includes: the device comprises persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, and the persistent storage equipment comprises a computing area used as a memory. The solid state disk is structurally not limited by the fact that RAM/DDR (random access memory/double data rate) is not needed to be matched, the structure is simple, the method receives a memory access request of a host through the hard disk interface, and performs memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous time sequence mechanism, so that memory characteristics without real-time refreshing are simulated and used for computing and caching based on the storage persistence of persistent storage equipment, the processing speed of the host is improved based on the ultra-low delay characteristic of the persistent storage equipment, and the system performance is improved.
Drawings
FIG. 1 is a flow chart of a method for controlling a hard disk according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a Pcm-based system reboot process according to an embodiment of the present description;
fig. 3 is a schematic structural diagram of a solid state disk provided in an embodiment of the present specification;
FIG. 4 is a schematic diagram of a read/write flow provided by an embodiment of the present description;
fig. 5 is a schematic structural diagram of an apparatus for controlling a hard disk according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an apparatus for controlling a hard disk according to another embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a solid state disk according to an embodiment of the present specification;
fig. 8 is a block diagram of a computing device according to an embodiment of the present disclosure.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present description. This description may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, as those skilled in the art will be able to make and use the present disclosure without departing from the spirit and scope of the present disclosure.
The terminology used in the description of the one or more embodiments is for the purpose of describing the particular embodiments only and is not intended to be limiting of the description of the one or more embodiments. As used in one or more embodiments of the present specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used in one or more embodiments of the present specification refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It will be understood that, although the terms first, second, etc. may be used herein in one or more embodiments to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, a first can also be referred to as a second and, similarly, a second can also be referred to as a first without departing from the scope of one or more embodiments of the present description. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
First, the noun terms to which one or more embodiments of the present specification relate are explained.
Pcm (phase Change memory): a phase change memory medium is based on memory particles of a phase change chalcogenide material.
ssd (solid state disk) is a solid state disk.
The multiple concurrent synchronization timing mechanism is a mechanism for performing multiple concurrent calculations based on the synchronization timing, and then summarizing and merging the calculations according to the execution results of the calculations to obtain a total result.
In the present specification, a method of controlling a hard disk is provided, and the present specification also relates to an apparatus for controlling a hard disk, a solid state disk, a computing device, and a computer-readable storage medium, which are described in detail one by one in the following embodiments.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for controlling a hard disk according to an embodiment of the present disclosure. The method is applied to a controller of the solid state disk, and the solid state disk further comprises the following steps: the device comprises persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, and the persistent storage equipment comprises a computing area used as a memory. The method for controlling the hard disk specifically comprises the following steps.
Step 102: and receiving a memory access request of a host through the hard disk interface.
Step 104: and performing memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
The persistent storage device may include, for example, a phase change storage medium, and any new type of persistent storage medium having a medium rate close to dram (medium rate, bit transmission time less than or equal to 100ns), such as ReRAM, MRAM, NRAM, FRAM, etc.
In particular, a bus for connecting the hard disk interface may use a plurality of channels. The channels may be attached to the die of the persistent storage device in a one-to-one correspondence with the die of the persistent storage device. The number of the channels can be determined according to the concurrent requirements of the memory performance in the actual application scene. Therefore, multiple concurrent accesses are carried out on Pcm through multiple channels based on a multiple concurrent synchronous time sequence mechanism, and the access speed meets the memory performance requirement. The controller can realize access control on the persistent storage device by adopting a byte addressing mode, realize access operations such as reading/writing/erasing and the like, and achieve the purpose that a computing area of the persistent storage device is used as a memory.
The method is applied to a controller of the solid state disk, the solid state disk also comprises a persistent storage device and a hard disk interface, wherein the hard disk interface is hung on the persistent storage device through a plurality of channels of a bus, and the persistent storage device comprises a computing area used as a memory, so that the method can receive a memory access request of a host through the hard disk interface, and perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous time sequence mechanism, thereby simulating to achieve the purpose that the memory characteristics without real-time refreshing are used for computing and caching based on the storage persistence of the persistent storage device, reducing the failure rate, and improving the processing speed of the host based on the ultra-low delay characteristic of the persistent storage device.
In addition, because the persistent storage device itself is not lost due to power failure, by using this characteristic, the method for controlling a hard disk provided in the embodiment of the present specification, in order to improve the system boot speed, further includes: and under the condition that the host system is powered on again after power failure, continuing to operate the host system based on the initialized mirror image data and the system increment data in the calculation area. Specifically, for example, when the host uses the computing area as a memory to operate the host system, the system pointer may point to the data area where the system incremental data is located, and when the host system is powered down, based on the characteristic that the persistent storage device does not lose data when the host system is powered down, the system pointer may not be lost, and when the host system is powered up again, the system incremental data may be directly located according to the system pointer, and the initially deployed mirror image data and the system incremental data may be directly continuously operated, and it is not necessary to read data from other external storage and perform re-operation, and the system operation position before the power down is directly recovered, and the recovery time is ms level, thereby greatly improving the system startup and reset speed.
It is understood that the system incremental data refers to incremental data further generated relative to the initialized mirrored data during the operation of the system, and corresponds to the current operation state of the system.
For example, a Pcm-based system restart process flow diagram is shown in fig. 2. As shown in FIG. 2, the system first deploys the initialization mirror data denoted as "a" with the system data being written as the system runs. Assuming that the system increment data in the current operation state of the host system is "Δ 1" at a certain time after a period of time, the system data currently available for system operation includes "a + Δ 1", and at a certain time after a period of time, the system increment data in the current operation state of the host system is "Δ 2", the system data currently available for system operation includes "a + Δ 2", and at this time, the system is powered down. Based on the nonvolatile property of Pcm, power-down/power-down is not required to be saved, power-up is not required to be additionally recovered, and a system pointer points to 'a + delta 2' to continue running.
In one or more embodiments of the present description, the persistent storage device may further include an access area for data storage. Correspondingly, the method for controlling the hard disk may further include: receiving a storage access request of a host through the hard disk interface; and performing access processing corresponding to the storage access request on the access area. In the embodiment, as the memory and the data storage use one storage medium, the complexity of the system is reduced, the normalization of the storage end is achieved, and the performance of the persistent storage device can be fully exerted.
The following is an exemplary description of the processing procedure of the read/write of the storage access request:
for example, the performing access processing corresponding to the storage access request on the access area may include:
under the condition that the storage access request is a write request, caching and writing data carried by the write request into the computing area based on the multi-concurrent synchronous time sequence mechanism; recording the mapping relation between the logic address and the physical address of the written data under the condition of finishing the cache writing; and when the controller is in an idle time slice, the written data is moved from the calculation area to the access area, and the mapping relation between the logical address and the physical address is updated. According to the embodiment, based on the storage persistence of the persistent storage device, the persistent storage device does not need to be powered by a battery, and the memory data can be flushed to the access area without the battery guarantee when the controller is idle.
The logical address is a read-write address issued by the host, and the physical address is an address actually stored by the persistent storage device. The strategy adopted by the data moving can be set according to the actual scene needs, for example, the data can be refreshed in idle time, and when the read-write conflict occurs, the read operation and the write operation wait are preferentially ensured, and the like.
For another example, the performing access processing corresponding to the storage access request on the access area includes: under the condition that the storage access request is a read request, searching a physical address of data to be read by the read request through a mapping relation table; and reading data from the access area according to the found physical address and returning the data to the host through the hard disk interface.
In addition, in order to improve the space utilization of the persistent storage device, the method may further include: when the controller is in a free time slice, if the space of the computing area is insufficient, a partial area is selected from the access area to be converted into the computing area; and/or, when the controller is in a free time slice, if the storage area space is insufficient, a partial area is selected from the calculation area to be converted into an access area. By the embodiment, based on the characteristic that the persistent storage device is not lost when power is down, the storage space is fully utilized through the interconversion between the calculation area and the access area, and the utilization rate of the storage space is improved.
Fig. 3 illustrates a schematic structural diagram of a solid state disk implemented according to one or more embodiments of the present specification. As shown in fig. 3, the solid state disk includes: a hard disk interface based on the high speed serial computer expansion bus standard, a controller based on any processor type, a persistent storage device comprising a computation area and an access area.
Based on the solid state disk shown in fig. 3, a high performance solid state disk is realized using Pcm type media particles. The multiple channels of the bus of the hard disk interface and the multiple concurrent synchronous time sequence mechanism of the controller realize the capacity of simulating the coexistence of the memory form and the large-capacity storage form. By fully utilizing the inherent characteristics of Pcm, data buffering in a disk can be realized on an SSD solid-state disk without additionally adding dram; meanwhile, the capacity space in the disk can be directly opened to the host CPU through the bus for direct call, which means the simplification of the storage process. Based on the method for controlling a hard disk provided in the embodiments of the present specification, host-side data can run in a computing area, i.e., a high-speed portion, in a disk, and when data in the computing area needs to be flushed, the host-side data does not need to be copied from a memory of the host side to the disk side, only a successful flush needs to be directly returned, and when a controller is idle, the high-speed portion of data in the disk is moved to a low-speed portion in a background manner.
It should be noted that in the embodiments of the present specification, the bus may be any high-speed serial computer expansion bus as long as the bandwidth is sufficient and the host side is supported to directly address and access the computing area in the disk. For example, the bus may be any type of bus, and in some lower rate buses, the concurrency requirement may be achieved by occupying more channels, for example, a lower rate bus may achieve a theoretical memory performance by using twice or even more channels compared to a higher rate bus.
In the Pcm-based storage granule application scenario, the interface between the compute and access areas may be Pcm-phy, as shown in fig. 3. Pcm-phy refers to a logic interface of Pcm media, belongs to a part of the logic of a controller chip, and can be used for converting a control signal sent by a controller into a sequential logic digital signal which can be identified by Pcm particles. The logical interface can be specifically set according to a sequential logical rule for Pcm access provided by Pcm. The Pcm-phy of the calculation area and the Pcm-phy of the access area use different time sequence logics for data transmission, and may be specifically set according to respective requirements of memory and storage on performance in an application scene, where a part of data areas in the calculation area is converted into data areas of the access area, or, when a part of data areas of the access area is converted into data areas of the calculation area, the time sequence logics of the Pcm-phy may be switched correspondingly through a specific switching time sequence segment, which is not described herein again.
In addition, the controller shown in FIG. 3 may include two or more processors. The processor communicates with each interface through the control logic module of the hard disk to realize the relevant control function. By two or more processors, it is convenient to manage the calculation area Pcm and the access area Pcm separately from each other so as not to cause cpu time slice collision with each other and thereby deteriorate the performance.
According to the solid state disk shown in fig. 3, the processing procedure of the write request and the read request is shown in the read-write flow diagram shown in fig. 4, and includes:
host write request processing: the host sends a write request to the controller through the hard disk interface, such as the pci-phy shown in fig. 4, and the controller writes the data cache into the Pcm ddr-like portion, i.e., die of the calculation area. And after the writing is finished, the controller records the mapping relation, continuously moves the die data of the calculation area to a part similar to nand, namely the die of the access area, and synchronously updates the mapping relation in the controller in the background processing process.
Host read request processing: the host machine issues a read request to the controller through the hard disk interface, the controller addresses through the mapping table, the data is directly uploaded according to the mapping relation without being copied to the memory, namely the calculation area, and the reading is returned to be completed.
Corresponding to the method embodiment, the specification also provides an apparatus embodiment for controlling the hard disk. The device is configured in the controller of solid state hard drives, the solid state hard drives further comprise: the device comprises persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, and the persistent storage equipment comprises a computing area used as a memory. Fig. 5 is a schematic structural diagram illustrating an apparatus for controlling a hard disk according to an embodiment of the present disclosure. As shown in fig. 5, the apparatus includes:
the memory access receiving module 502 may be configured to receive a memory access request of a host through the hard disk interface.
The memory access processing module 504 may be configured to perform, on the basis of a multiple concurrent synchronous timing mechanism, memory access processing corresponding to the memory access request on the computing area through the multiple channels.
The device is configured on a controller of the solid state disk, the solid state disk also comprises a persistent storage device and a hard disk interface, wherein the hard disk interface is hung on the persistent storage device through a plurality of channels of a bus, the persistent storage device comprises a computing area used as a memory, so that the device can receive a memory access request of a host through the hard disk interface, and perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous time sequence mechanism, so that the memory characteristics without real-time refreshing are simulated for calculation and cache based on the storage persistence of the persistent storage device, the failure rate is reduced, and the processing speed of the host is improved based on the ultra-low delay characteristic of the persistent storage device.
Fig. 6 is a schematic structural diagram illustrating an apparatus for controlling a hard disk according to another embodiment of the present disclosure. As shown in fig. 6, the apparatus may further include:
the reboot module 506 may be configured to continue to run the host system based on the initialization mirror data and the system delta data in the computing area in a case where the host system is powered on again after being powered off.
Based on the embodiment, when the host system is powered off and powered on again, the system can be directly recovered to the system operation position before the power failure without extra reading and calculation only by continuing to operate the system based on the initialized mirror image data in the calculation area and the system incremental data before the power failure last time, the recovery time is ms level, and the system starting and resetting speed is greatly improved.
In addition, the persistent storage device may further include an access area used as data storage. As shown in fig. 6, the apparatus may further include:
a storage access receiving module 508 may be configured to receive a storage access request of a host through the hard disk interface.
The storage access processing module 510 may be configured to perform access processing corresponding to the storage access request on the access area.
In order to improve the storage space utilization, as shown in fig. 6, the apparatus may further include: a conversion module 512, which may be configured to select a partial area from the access area to convert to a calculation area if the calculation area is not sufficiently spatial when the controller is in a free time slice; and/or may be configured to switch from the calculation area to the access area if the memory area space is insufficient while the controller is within a free time slice.
By the embodiment, based on the characteristic that the persistent storage device is not lost when power is down, the storage space is fully utilized through the interconversion between the calculation area and the access area, and the utilization rate of the storage space is improved.
Specifically, for example, the storage access processing module 510 may include: the write cache submodule 5102 may be configured to, if the storage access request is a write request, cache and write data carried by the write request into the computing area based on the multiple concurrent synchronous timing mechanism. The address mapping submodule 5104 may be configured to record a mapping relationship between a logical address and a physical address of the written data in a case where the cache writing is completed. The data unloading brush module 5106 may be configured to move the written data from the computing area to the access area and update a mapping relationship between a logical address and a physical address when the controller is in an idle time slice.
For another example, the storage access processing module 510 may include: the address lookup sub-module 5108 may be configured to, in the case that the storage access request is a read request, find out a physical address of data to be read by the read request through a mapping relation table. The data reading sub-module 5109 may be configured to read data from the access area and return the data to the host through the hard disk interface according to the found physical address.
The above is a schematic scheme of an apparatus for controlling a hard disk according to the present embodiment. It should be noted that the technical solution of the apparatus for controlling a hard disk belongs to the same concept as the technical solution of the method for controlling a hard disk described above, and details of the technical solution of the apparatus for controlling a hard disk, which are not described in detail, can be referred to the description of the technical solution of the method for controlling a hard disk described above.
Corresponding to the method embodiment, the specification further provides a solid state disk embodiment. Fig. 7 shows a schematic structural diagram of a solid state disk provided in an embodiment of the present specification. As shown in fig. 7, the solid state disk includes: the device comprises a controller 702, a persistent storage device 704 and a hard disk interface 706, wherein the hard disk interface 706 is hung on the persistent storage device 704 through a plurality of channels of a bus, the controller 702 is connected with the persistent storage device and the hard disk interface through the bus, and the persistent storage device comprises a computing area 7042 used as a memory.
The controller 702 may be configured to receive a memory access request of a host through the hard disk interface 706, and perform memory access processing corresponding to the memory access request on the computing area 7042 through the multiple channels based on a multiple concurrent synchronous timing mechanism.
In addition, as shown in fig. 7, an access area 7044 for data storage may be further included in the persistent storage device 704. The controller 702 may be further configured to receive a storage access request from a host through the hard disk interface 706, and perform access processing corresponding to the storage access request on the access area 7044.
Wherein the controller 702 may comprise at least two processors, wherein at least one processor is configured to handle access to the computing area and at least another processor is configured to handle access to the access area.
For example, in one or more embodiments of this specification, as shown in the structural schematic diagram of a solid state disk shown in fig. 3, the persistent storage device may be implemented based on a Pcm medium, the controller 702 may be implemented based on any type of processor, the bus may use a communication protocol of any high-speed serial computer expansion bus standard, and specific implementation details may be described with reference to the embodiment shown in fig. 3, which is not described herein again.
The foregoing is an exemplary scheme of a solid state disk according to this embodiment. It should be noted that the technical solution of the solid state disk and the technical solution of the method for controlling a hard disk belong to the same concept, and details that are not described in detail in the technical solution of the solid state disk can be referred to the description of the technical solution of the method for controlling a hard disk.
FIG. 8 illustrates a block diagram of a computing device 800, according to one embodiment of the present description. The components of the computing device 800 include, but are not limited to, memory 810 and a processor 820. The processor 820 is coupled to the memory 810 via a bus 830, and the database 850 is used to store data.
Computing device 800 also includes access device 840, access device 840 enabling computing device 800 to communicate via one or more networks 860. Examples of such networks include the Public Switched Telephone Network (PSTN), a Local Area Network (LAN), a Wide Area Network (WAN), a Personal Area Network (PAN), or a combination of communication networks such as the internet. Access device 840 may include one or more of any type of network interface (e.g., a Network Interface Card (NIC)) whether wired or wireless, such as an IEEE802.11 Wireless Local Area Network (WLAN) wireless interface, a worldwide interoperability for microwave access (Wi-MAX) interface, an ethernet interface, a Universal Serial Bus (USB) interface, a cellular network interface, a bluetooth interface, a Near Field Communication (NFC) interface, and so forth.
In one embodiment of the present description, the above-described components of computing device 800, as well as other components not shown in FIG. 8, may also be connected to each other, such as by a bus. It should be understood that the block diagram of the computing device structure shown in FIG. 8 is for purposes of example only and is not limiting as to the scope of the description. Those skilled in the art may add or replace other components as desired.
Computing device 800 may be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., tablet, personal digital assistant, laptop, notebook, netbook, etc.), a mobile phone (e.g., smartphone), a wearable computing device (e.g., smartwatch, smartglasses, etc.), or other type of mobile device, or a stationary computing device such as a desktop computer or PC. Computing device 800 may also be a mobile or stationary server.
Wherein the processor 820 is configured to execute computer-executable instructions which, when executed by the processor, implement the steps of the above-described method of controlling a hard disk.
The above is an illustrative scheme of a computing device of the present embodiment. It should be noted that the technical solution of the computing device and the technical solution of the above method for controlling a hard disk belong to the same concept, and details that are not described in detail in the technical solution of the computing device can be referred to the description of the technical solution of the above method for controlling a hard disk.
An embodiment of the present specification also provides a computer-readable storage medium storing computer-executable instructions, which when executed by a processor, implement the steps of the above-described method of controlling a hard disk.
The above is an illustrative scheme of a computer-readable storage medium of the present embodiment. It should be noted that the technical solution of the storage medium and the technical solution of the above method for controlling a hard disk belong to the same concept, and details that are not described in detail in the technical solution of the storage medium can be referred to the description of the technical solution of the above method for controlling a hard disk.
An embodiment of the present specification further provides a computer program, wherein when the computer program is executed in a computer, the computer program is used to make the computer execute the steps of the method for controlling a hard disk.
The above is an illustrative scheme of a computer program of the present embodiment. It should be noted that the technical solution of the computer program and the technical solution of the above method for controlling a hard disk belong to the same concept, and details that are not described in detail in the technical solution of the computer program can be referred to the description of the technical solution of the above method for controlling a hard disk.
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
The computer instructions comprise computer program code which may be in the form of source code, object code, an executable file or some intermediate form, or the like. The computer-readable medium may include: any entity or device capable of carrying said computer program code, a recording medium, a usb-disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a Random Access Memory (RAM), an electrical carrier signal, a telecommunications signal, and software distribution medium, a phase change Memory medium, a ReRAM, an MRAM, an NRAM, a FRAM, etc. It should be noted that the computer-readable medium may contain suitable additions or subtractions depending on the requirements of legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer-readable media may not include electrical carrier signals or telecommunication signals in accordance with legislation and patent practice.
It should be noted that, for the sake of simplicity, the foregoing method embodiments are described as a series of acts, but those skilled in the art should understand that the present embodiment is not limited by the described acts, because some steps may be performed in other sequences or simultaneously according to the present embodiment. Further, those skilled in the art should also appreciate that the embodiments described in this specification are preferred embodiments and that acts and modules referred to are not necessarily required for an embodiment of the specification.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The preferred embodiments of the present specification disclosed above are intended only to aid in the description of the specification. Alternative embodiments are not exhaustive and do not limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the teaching of the embodiments of the present disclosure. The embodiments were chosen and described in order to best explain the principles of the embodiments and the practical application, to thereby enable others skilled in the art to best understand and utilize the embodiments. The specification is limited only by the claims and their full scope and equivalents.
Claims (12)
1. A method for controlling a hard disk is applied to a controller of a solid state disk, and the solid state disk further comprises: the method comprises the following steps that persistent storage equipment and a hard disk interface are hung on the persistent storage equipment through a plurality of channels of a bus, the persistent storage equipment comprises a computing area used as a memory, and the method comprises the following steps:
receiving a memory access request of a host through the hard disk interface;
and performing memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
2. The method of controlling a hard disk of claim 1, further comprising:
and under the condition that the host system is powered on again after power failure, continuing to operate the host system based on the initialized mirror image data and the system increment data in the calculation area.
3. The method of controlling a hard disk of claim 1, the persistent storage device further comprising an access area for data storage, the method further comprising:
receiving a storage access request of a host through the hard disk interface;
and performing access processing corresponding to the storage access request on the access area.
4. The method of controlling a hard disk of claim 3, further comprising:
when the controller is in a free time slice, if the space of the computing area is insufficient, a partial area is selected from the access area to be converted into the computing area;
and/or the like, and/or,
when the controller is in a free time slice, if the storage area space is insufficient, a partial area is selected from the calculation area to be converted into an access area.
5. The method of claim 3, wherein the performing access processing corresponding to the storage access request on the access area comprises:
under the condition that the storage access request is a write request, caching and writing data carried by the write request into the computing area based on the multi-concurrent synchronous time sequence mechanism;
recording the mapping relation between the logic address and the physical address of the written data under the condition of finishing the cache writing;
and when the controller is in an idle time slice, the written data is moved from the calculation area to the access area, and the mapping relation between the logical address and the physical address is updated.
6. The method of claim 3, wherein the performing access processing corresponding to the storage access request on the access area comprises:
under the condition that the storage access request is a read request, searching a physical address of data to be read by the read request through a mapping relation table;
and reading data from the access area according to the found physical address and returning the data to the host through the hard disk interface.
7. An apparatus for controlling a hard disk, configured to a controller of a solid state disk, the solid state disk further comprising: the device comprises persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, and the persistent storage equipment comprises a computing area used as an internal memory; the apparatus for controlling a hard disk includes:
the memory access receiving module is configured to receive a memory access request of a host through the hard disk interface;
and the memory access processing module is configured to perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
8. A solid state disk, comprising: the device comprises a controller, persistent storage equipment and a hard disk interface, wherein the hard disk interface is hung on the persistent storage equipment through a plurality of channels of a bus, the controller is connected with the persistent storage equipment and the hard disk interface through the bus, and the persistent storage equipment comprises a computing area used as a memory;
the controller is configured to receive a memory access request of a host through the hard disk interface, and perform memory access processing corresponding to the memory access request on the computing area through the plurality of channels based on a multi-concurrent synchronous timing mechanism.
9. The solid state disk of claim 8, the persistent storage device further comprising an access area for data storage;
the controller is also configured to receive a storage access request of a host through the hard disk interface, and perform access processing corresponding to the storage access request on the access area.
10. The solid state disk of claim 9, the controller comprising at least two processors, wherein at least one processor is to handle access to the compute region and at least another processor is to handle access to the access region.
11. A computing device, comprising:
a memory and a processor;
the memory is configured to store computer-executable instructions, and the processor is configured to execute the computer-executable instructions, which when executed by the processor implement the steps of the method of controlling a hard disk according to any one of claims 1 to 6.
12. A computer-readable storage medium storing computer-executable instructions which, when executed by a processor, implement the steps of the method of controlling a hard disk according to any one of claims 1 to 6.
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