CN114578962A

CN114578962A - Data storage, data display method, device, equipment, medium and program product

Info

Publication number: CN114578962A
Application number: CN202210102402.7A
Authority: CN
Inventors: 赵宇鹏
Original assignee: Singularity Proximity Technology Shanghai Co ltd
Current assignee: Singularity Proximity Technology Shanghai Co ltd
Priority date: 2022-01-27
Filing date: 2022-01-27
Publication date: 2022-06-03

Abstract

The application discloses a data storage method, a data display method, a device, equipment, a medium and a program product, according to the data storage method, the change frequency of the current image frame data is obtained according to the image frame sequence; when the change frequency is smaller than a first threshold value, judging whether the current image frame data and the previous image frame data have difference or not; if yes, storing the current image frame data into an SDRAM (synchronous dynamic random access memory); reading a plurality of pieces of data corresponding to the image frame data from the SDRAM according to the preset display direction of the image frame data, and performing compression coding on the plurality of pieces of data to obtain piece compressed data; storing the slice compressed data into the first cache; and when the change frequency is greater than or equal to a first threshold value, storing the image frame data into an SDRAM memory. The display power consumption of the intelligent glasses can be reduced through the embodiment of the application.

Description

Data storage, data display method, device, equipment, medium and program product

Technical Field

The present application relates to the field of image display technologies, and in particular, to a data storage method, a data display method, an apparatus, a device, a medium, and a program product.

Background

The display data displayed on the smart glasses display screen is typically generated by a System On Chip (SOC) Chip. In order to ensure the display effect, the SOC chip needs to output image frame data to the smart glasses display screen through a display interface between the SOC chip and the smart glasses display screen according to the resolution and the display frame rate preset by the SOC software.

Due to the limited space of the smart glasses for accommodating the SOC chip and other chips, there are severe restrictions on the SOC chip area size, for example, the chip size cannot exceed 20 mm square after packaging. Meanwhile, the battery capacity of the smart glasses is limited, and the power consumption of the SOC chip and the total power consumption of other chips are strictly limited, for example, the power consumption cannot exceed 200 mW. Therefore, in order to reduce the size of the SOC chip, the image frame data is usually stored in a Synchronous Dynamic Random-Access Memory (SDRAM) Memory with a higher data storage density, which is outside the SOC chip. However, this method for storing image frame data using DDR requires the SOC chip to frequently write and/or read image frame data into and/or from the SDRAM memory at the display frame rate, and output the image frame data to the smart glasses display screen after reading so that the smart glasses display images.

Therefore, how to reduce the display power consumption of the smart glasses becomes a technical problem which needs to be solved urgently at present.

Disclosure of Invention

The data storage method, the data display method, the data storage device, the data display equipment, the data display medium and the program product can reduce display power consumption of the intelligent glasses.

In a first aspect, an embodiment of the present application provides a data storage method, which is applied to a system on chip SOC chip of smart glasses, where the SOC chip includes a first cache, the smart glasses include a double-speed-rate SDRAM memory, and the method may include:

acquiring the change frequency of the current image frame data according to the image frame sequence;

when the change frequency is smaller than a first threshold value, judging whether the current image frame data and the previous image frame data have difference or not;

if yes, storing the current image frame data into an SDRAM (synchronous dynamic random access memory);

reading a plurality of pieces of data corresponding to the image frame data from the SDRAM according to a preset display direction of the image frame data, and performing compression coding on the plurality of pieces of data to obtain piece compressed data, wherein the plurality of pieces of data are a plurality of pixel data sets obtained by splitting the current image frame data;

storing the slice compressed data into the first cache;

and when the change frequency is greater than or equal to a first threshold value, storing the image frame data into an SDRAM memory.

In some embodiments, a sum of capacities of a plurality of the slice compressed data is not more than one tenth of a capacity of the current image frame data.

In some embodiments, the performing compression encoding on the plurality of slice data to obtain slice compressed data may include:

and coding and compressing each piece of data based on a single-frame intra-frame coding mode to obtain piece compressed data.

In a second aspect, an embodiment of the present application provides a data display method, which is applied to an SOC chip of smart glasses, where the SOC chip includes a first cache, a second cache, and a display interface, the smart glasses include a smart glasses display screen, and the method may include:

determining a first moment when the current image frame data is output to the display interface according to the display frame rate setting;

when the change frequency of the current image frame data is determined to be smaller than a first threshold value, at a second moment, sequentially acquiring a plurality of pieces of compressed data corresponding to the current image frame data from the first cache according to the preset display direction of the image frame data;

decoding and decompressing each piece of compressed data to obtain piece decompressed data;

storing the slice decompressed data in the second cache;

when the first moment is reached, acquiring the slice decompression data from the second cache according to the preset display direction, wherein the second moment is earlier than the first moment by a preset time length;

and sending the piece decompression data to an intelligent glasses display screen so that the intelligent glasses display screen displays an image corresponding to the piece decompression data.

In some embodiments, after determining the first time when the current image frame data is output to the display interface according to the display frame rate setting, the smart glasses further include:

when the change frequency of the current image frame data is determined to be greater than or equal to a first threshold value, reading the current image frame data from an SDRAM memory when the first moment is reached;

and sending the current image frame data to an intelligent glasses display screen so that the intelligent glasses display screen displays an image corresponding to the current image frame data.

In a third aspect, an embodiment of the present application provides a data storage device applied to a system on chip SOC chip of smart glasses, where the SOC chip includes a first cache, and the smart glasses include a synchronous dynamic random access SDRAM memory, and the device may include:

the first acquisition module is used for acquiring the change frequency of the current image frame data according to the image frame sequence;

the judging module is used for judging whether the current image frame data and the previous image frame data have difference or not when the change frequency is smaller than a first threshold value;

the first storage module is used for storing the current image frame data into an SDRAM (synchronous dynamic random access memory) if the current image frame data are stored in the SDRAM;

the compression module is used for reading a plurality of pieces of data corresponding to the image frame data from the SDRAM according to the preset display direction of the image frame data, and performing compression coding on the plurality of pieces of data to obtain piece compressed data, wherein the plurality of pieces of data are a plurality of pixel data sets obtained by splitting the current image frame data;

the second storage module is used for storing the slice compression data into the first cache;

and the third storage module is used for storing the image frame data into an SDRAM (synchronous dynamic random access memory) when the change frequency is greater than or equal to a first threshold value.

In a fourth aspect, an embodiment of the present application provides a data display device, which is characterized in that, an SOC chip applied to smart glasses, the SOC chip includes a first cache, a second cache, and a display interface, the smart glasses include a smart glasses display screen, and the device may include:

the determining module is used for determining a first moment when the current image frame data is output to the display interface according to the setting of the display frame rate;

the second obtaining module is used for sequentially obtaining a plurality of pieces of compressed data corresponding to the current image frame data from the first cache according to the preset display direction of the image frame data at a second moment when the change frequency of the current image frame data is determined to be smaller than a first threshold value;

the decompression module is used for decoding and decompressing the compressed data of each slice to obtain decompressed data of the slice;

a fourth storage module, configured to store the slice decompressed data in the second cache;

a third obtaining module, configured to obtain the slice decompression data from the second cache according to the preset display direction when the first time is reached, where the second time is earlier than the first time by a preset duration;

and the first sending module is used for sending the piece decompression data to the intelligent glasses display screen so that the intelligent glasses display screen displays the image corresponding to the piece decompression data.

In a fifth aspect, an embodiment of the present application provides an SOC chip, including: a first cache, a second cache, an encoder, a processor, and a synchronous dynamic random access SDRAM controller, wherein the first cache, the second cache, the processor, the encoder, and the SDRAM controller are connected and communicate via an on-chip interconnect network,

the processor is used for acquiring the change frequency of the current image frame data according to the image frame sequence; when the change frequency is smaller than a first threshold value, judging whether the current image frame data and the previous image frame data have difference or not;

the encoder is used for reading a plurality of pieces of data corresponding to the current image frame data from the SDRAM according to the preset display direction of the current image frame data, and performing compression coding on the plurality of pieces of data to obtain piece compressed data, wherein the plurality of pieces of data are a plurality of pixel data sets obtained by splitting the current image frame data;

the first cache is used for storing the slice compression data;

the SDRAM controller is used for storing the current image frame data into an SDRAM memory when the current image frame data and the previous image frame data have difference or the change frequency is larger than or equal to a first threshold value.

In some embodiments, the SOC chip further includes a decoder, a second cache, and a display controller, the decoder, the second cache, and the display controller connected and communicating through an on-chip interconnect network,

the processor is further configured to determine a first moment at which current image frame data is output to the display interface according to a display frame rate setting;

the decoder is used for sequentially acquiring a plurality of pieces of compressed data corresponding to the current image frame data from the first cache according to the preset display direction of the image frame data at a second moment when the processor determines that the change frequency of the current image frame data is smaller than a first threshold value;

the second cache is used for storing the slice decompression data;

the processor is further configured to obtain the slice decompression data from the second cache in the preset display direction when the first time is reached, where the second time is earlier than the first time by a preset duration;

the display controller is used for sending the piece decompression data to the intelligent glasses display screen, so that the intelligent glasses display screen displays the image corresponding to the piece decompression data.

In some embodiments, the smart glasses include SDRAM memory, and the processor is further configured to, after determining a first time at which current image frame data is output to the display interface according to a display frame rate setting, upon determining that a change frequency of the current image frame data is greater than or equal to a first threshold, read the current image frame data from the SDRAM memory when the first time is reached;

the display controller is further used for sending the current image frame data to an intelligent glasses display screen so that the intelligent glasses display screen can display the image corresponding to the current image frame data.

In a sixth aspect, an embodiment of the present application provides an electronic device, where the device includes: the apparatus comprises: a processor and a memory storing computer program instructions;

the processor, when executing the computer program instructions, implements a data storage and data display method as described in any embodiment of the present application.

In a seventh aspect, an embodiment of the present application provides a computer storage medium, where computer program instructions are stored on the computer storage medium, and when the computer program instructions are executed by a processor, the method for storing and displaying data as described in any embodiment of the present application is implemented.

In an eighth aspect, the present application provides a computer program product, and when executed by a processor of an electronic device, the instructions of the computer program product cause the electronic device to execute the data storage and data display method as described in any embodiment of the present application.

According to the data storage and data display method, device, equipment, medium and program product, when the change frequency of the current image frame data is smaller than the first threshold value, whether the current image frame data has difference or not is judged, and the SDRAM is written in and read only when the current image frame data has difference, namely changes. When the current image frame data has no difference, namely, does not change, the compression, storage, decompression and sending of the piece decompression data to the intelligent glasses display screen are completed through the SOC chip which is far lower than the processing power consumption of the SDRAM memory and the first cache and the second cache on the SOC chip so that the intelligent glasses display screen displays images without reading or writing the SDRAM memory, the display power consumption of the intelligent glasses is greatly reduced, the storage space is greatly saved by storing the compressed piece compression data in the first cache, the area of the first cache is further saved, and the area of the SOC chip is further limited. When the change frequency of the current image frame data is greater than or equal to the first threshold value, the current image data frame is stored in the SDRAM, different storage and display methods are adopted according to different change frequencies, the writing and/or reading times of the SDRAM are/is reduced, the processing power consumption of the SDRAM is further reduced, and the display power consumption of the intelligent glasses is further reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic diagram of slice data provided by an embodiment of the present application;

FIG. 2 is a schematic flow chart of a data storage method according to an embodiment of the present application;

fig. 3 is a schematic flow chart of a data display method according to an embodiment of the present application;

FIG. 4 is a timing diagram of data display in an application scenario according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a data storage device according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a data display device according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of an SOC chip according to an embodiment of the present application;

fig. 8 is a schematic diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are intended to be illustrative only and are not intended to be limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

Before explaining technical solutions provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, specific terms are first introduced in the present application.

Piece data: the slice data is a plurality of pixel data sets obtained by splitting image frame data, that is, a pixel data set composed of spatially continuous macroblocks, for example, the slice data defined in the h.264 video coding and decoding standard.

As an example, as shown in fig. 1, one frame of image in the sequence of image frames may be divided into 4 slice data respectively corresponding to 110, 120, 130 and 140 from top to bottom. Each slice data comprises a plurality of macro blocks, each macro block comprises a plurality of blocks, and each block is a set formed by a plurality of pixel data pixels.

As described in the background art, in the prior art, an SDRAM Memory independent from an SOC chip is generally used on smart glasses to store image data, and the SDRAM Memory has a higher storage capacity density than a Static Random-Access Memory (SRAM) inside the SOC chip. However, when the image data is stored in the SDRAM memory, the SOC chip needs to write and/or read the image data to and from the SDRAM memory at a display frame rate, and although the storage density of the SDRAM memory is higher than the SRAM inside the SOC chip, the power consumption for writing and reading is much higher than the SRAM.

The inventor researches and discovers that the power consumption of the SDRAM memory in the prior art is caused by three factors, namely an SDRAM controller in an SOC chip, a DDR interface and the SDRAM memory. When a Processor (CPU), a display controller and other devices in the SOC chip need to access the SDRAM memory, a working clock needs to be provided for the SDRAM controller, the DDR interface and the SDRAM memory, so as to generate clock tree power consumption; the circuit of the SDRAM controller and the circuit of the DDR interface are also turned over, and dynamic power consumption is generated; and also causes SDRAM memories to generate corresponding device power consumption. Because the SDRAM controller and the DDR interface are all relatively complex parts in the SOC chip, the circuit scale is large, and the clock tree power consumption and the dynamic power consumption are both relatively high. This results in a higher total power consumption of the SDRAM memory including clock tree power consumption, dynamic power consumption, and device power consumption, which in turn results in a higher display power consumption of the smart glasses.

Therefore, the inventor considers the constraint of the intelligent glasses on the SOC chip area, and in general, the data change frequency of the image frame data of the intelligent glasses is low, for example, when the application software operated by the intelligent glasses is a clock or an information reminding interface, the clock information changes once per second, the schedule reminding information changes less frequently, but the display frame rate still needs to be kept high, otherwise, when the display content changes, the problem of screen cracking and the like is easily generated, which results in the problem that the display effect observed by human eyes is poor. When the change frequency of the current image frame data is low, the storage and display of the current image frame data are finished through the SOC chip which is far lower than the processing power consumption of the SDRAM and the first cache and the second cache on the SOC chip, so that the number of times of reading/writing the SDRAM into the SDRAM is reduced, and the display power consumption of the intelligent glasses is reduced.

In order to solve the problems of the prior art, embodiments of the present application provide a data storage method, a data display method, a data storage device, a data display device, a data storage medium, and a program product, which are applied to an SOC chip of smart glasses.

For convenience of description, specific processes of the data storage method and the data display method are explained below with the SOC chip as an execution subject.

First, a data storage method provided in an embodiment of the present application is described below.

Fig. 2 shows a schematic flowchart of a data storage method applied to an SOC chip of smart glasses according to an embodiment of the present application, where the method includes:

s110, obtaining the change frequency of the current image frame data according to the image frame sequence.

And S120, when the change frequency is smaller than a first threshold value, judging whether the current image frame data and the previous image frame data have difference.

And S130, if yes, storing the current image frame data into a synchronous dynamic random access SDRAM (synchronous dynamic random access memory).

And S140, reading a plurality of pieces of data corresponding to the image frame data from the SDRAM according to the preset display direction of the image frame data, and performing compression coding on the plurality of pieces of data to obtain piece compressed data, wherein the plurality of pieces of data are a plurality of pixel data sets obtained by splitting the current image frame data.

S150, storing the slice compression data into the first cache.

And S160, when the change frequency is greater than or equal to a first threshold value, storing the image frame data into an SDRAM memory.

In the embodiment of the application, when the change frequency of the current image frame data is smaller than a first threshold value, whether the current image frame data has difference or not is judged, and the SDRAM is written in and read only when the current image frame data has difference, namely changes. When the current image frame data has no difference, namely no change, the current image frame data does not need to be stored in an SDRAM (synchronous dynamic random access memory), but the current image frame data is stored in a first buffer. When the change frequency of the current image frame data is greater than or equal to the first threshold value, the current image data frame is stored in the SDRAM, different storage methods are adopted according to different change frequencies, the writing and/or reading times of the SDRAM are reduced, the processing power consumption of the SDRAM is further reduced, and the display power consumption of the intelligent glasses is further reduced.

Specifically, in S110, the SOC chip includes a first cache and a processor, the first cache is a first SRAM inside the SOC chip, and the smart glasses may further include an SDRAM memory. The SOC chip can calculate the change frequency of the current image frame data according to the image frame sequence after drawing the image frame sequence according to an internal program. For example, the clock information changes once per second, and the SOC chip obtains the change frequency of the clock information image frame data with the accuracy of seconds as once per second after drawing the image frame sequence of the clock information with the accuracy of seconds.

As one example, the SOC chip renders a sequence of image frames by at least one of an internal processor and a Graphics Processing Unit (GPU).

Specifically, in S120, when the SOC chip determines that the change frequency of the current image frame data is smaller than the first threshold, it determines whether there is a difference between the current image frame data and the previous image frame data, and if there is a difference, it is determined that the current image frame data has changed and needs to be processed by a subsequent operation under the condition that the change frequency of the image frame data is low; when the difference does not exist, it is considered that under the condition that the change frequency of the image frame data is low, the image frame data of the image displayed by the current intelligent glasses or the image to be displayed is already subjected to partial processing, and other subsequent operations are required to process the current image frame data. It should be noted that the setting of the first threshold is not specifically limited according to the embodiment of the present application, and for example, the first threshold may be 30 times per second.

Specifically, in S130, the SOC chip includes a DDR interface, and after determining that the current image frame data is different from the previous image frame data, the SOC chip determines that the current image frame data to be displayed by the smart glasses is changed from the previous image frame data to be a brand new frame of data. At this time, the SOC chip writes the current image frame data into the SDRAM memory through the DDR interface. It is understood that the SDRAM memory may store therein image frame data of at least one frame.

Specifically, in S140, the SOC chip includes the encoder, and the smart glasses include the smart glasses display screen, and the predetermined display direction of image frame data is the direction that has the order of selecting for the basis of the direction of image when the smart glasses display screen shows, and this application embodiment uses the direction from the top down when the image shows at the smart glasses display screen as the example. After the image frame data which is different from the previous image frame data and is changed is stored in the SDRAM memory every time, the SOC chip configures an encoder through the processor, the encoder reads the current image frame data from the SDRAM memory through the DDR interface according to the direction from top to bottom when the image is displayed on the display screen of the intelligent glasses, the current image frame data is divided into a plurality of slice data, the slice data is encoded and compressed, and slice compressed data, namely slice compressed data, is obtained.

It is understood that the specific number of the current image frame data split into the plurality of slice data is determined according to actual situations, and the embodiment of the present application is not particularly limited, for example, one frame of image frame data may be split into 10 slice data.

It can be understood that the processor may configure the encoder only once, and then the encoder reads the current image frame data from the SDRAM memory by itself, splits the current image frame data into a plurality of slice data, and performs encoding compression on the plurality of slice data through the encoder. Alternatively, the processor may be configured with the encoder once each time the current image frame data is read from the SDRAM memory, and the specific implementation manner is not limited in the embodiment of the present application.

In order to limit the area of the SOC chip, in some embodiments, the compression encoding the plurality of slice data to obtain slice compressed data may include:

Specifically, the SOC chip reads current image frame data from the SDRAM memory, splits the current image frame data into a plurality of slice data, and then performs single-frame intra-frame encoding compression on each slice data through an encoder, so that the total volume of the compressed slice data is reduced.

As an example, taking a 1920 × 1080 resolution (1080 p for short) and a 30fps (frame/second) display frame rate 24-bit pixel format as an example, after reading current image frame data from an SDRAM memory through a DDR interface according to a direction from top to bottom when an image is displayed on a smart glasses display screen, splitting the current image frame data into 10 slice data, and performing encoding compression on each slice data, thereby finally obtaining 10 slice compressed data.

In order to limit the area of the SOC chip, in some embodiments, the sum of the capacities of the plurality of pieces of compressed data is not more than one tenth of the capacity of the current image frame data, so that the area of the buffer memory on the SOC chip is greatly saved, and the area of the SOC chip is further limited.

As an example, taking a 1920 × 1080 resolution (1080 p for short) and a 30fps (frame/second) display frame rate 24-bit pixel format as an example, each frame of image frame data needs to occupy 5.9326 mbytes, and after single-frame intra-coding compression is performed on each slice data of the image frame data through the SOC chip, the bytes needed to be occupied by each frame of image frame data is reduced from 5.9326 mbytes to 0.59326 mbytes.

In the embodiment of the application, the slice data is encoded and compressed in a single-frame intra-frame encoding mode so as to reduce the total capacity of the slice data, and further save the buffer space and limit the area of an SOC chip.

Specifically, in S150, the encoder of the SOC chip writes the slice compressed data into the first SRAM through the on-chip interconnection network.

As an example, with continued reference to the above example, the encoder of the SOC chip writes 10 slice compressed data corresponding to the current frame data into the first SRAM through the on-chip internet in a direction from top to bottom when the image is displayed on the smart glasses display screen.

In order to reduce the display power consumption of the smart glasses, in some embodiments, as shown in fig. 3, a schematic flow chart of a data display method applied to an SOC chip of the smart glasses according to an embodiment of the present application is provided, where the method includes S210-S260:

s210, according to the display frame rate setting, determining the first moment when the current image frame data is output to the display interface.

And S220, when the change frequency of the current image frame data is determined to be smaller than a first threshold value, at a second moment, sequentially acquiring a plurality of pieces of compressed data corresponding to the current image frame data from the first cache according to the preset display direction of the image frame data.

S230, decoding and decompressing each piece of compressed data to obtain piece decompressed data.

S240, storing the slice decompressed data into the second cache.

And S250, when the first moment is reached, acquiring the slice decompression data from the second cache according to the preset display direction.

S260, the picture decompression data are sent to the intelligent glasses display screen, so that the intelligent glasses display screen displays the image corresponding to the picture decompression data.

In the embodiment of the application, when it is determined that the change frequency of the current image frame data is smaller than a first threshold, if the current image frame data needs to be displayed, the slice compressed data is read from the first cache at a second moment, the compressed data is decompressed and stored in the second cache, and when the first moment arrives, the slice decompressed data is read from the second cache and sent to the display screen of the intelligent glasses, so that the display screen of the intelligent glasses decompresses the image corresponding to the slice decompressed data. The processing of displaying images can be completed through the first cache and the second cache inside the SOC chip, the high-frequency reading and writing of the SDRAM memory are avoided, and the display power consumption of the intelligent glasses is greatly reduced.

Specifically, in S210, the SOC chip may include a first cache, a second cache, and a display interface, and the smart glasses may further include a smart glasses display screen. And in the process of displaying the image on the intelligent glasses display screen, the SOC calculates the first moment when the current image frame data is output to the display interface through the processor according to the set display frame rate.

Specifically, in S220, the SOC chip may include a decoder, and when the SOC chip determines that the change frequency of the current image frame data is smaller than the first threshold through the processor, that is, when the change frequency of the image frame data is lower, the SOC chip configures the decoder to start at the second time through the processor, and the decoder of the SOC chip sequentially reads the slice compressed data corresponding to the current image frame data from the first SRAM through the on-chip interconnection network according to the direction from top to bottom when the image is displayed on the smart glasses display screen, which may be understood as that the slice compressed data of at least one frame of image frame data may be stored in the first SRAM.

Specifically, in S230-240, the second Buffer is a second SRAM inside the SOC chip, and after the decoder of the SOC chip is started at the second time, the decoder decodes and decompresses each slice compressed data read from the First SRAM, and writes the slice decompressed data obtained after decompression into the second SRAM in a ring Buffer or First Input First Output (FIFO) manner.

It is understood that the processor may configure the decoder only once, and then the decoder itself reads the slice compressed data from the first SRAM and decodes and decompresses the slice compressed data. Or, the processor may configure the encoder once each time slice compressed data is read from the first SRAM, and the embodiment of the present application does not limit the specific implementation manner.

In some embodiments, in order to limit the area of the SOC chip, the buffer space of the second buffer is the sum of the capacities of the preset values of the slice data. For example, the buffer space of the second buffer may be the sum of the capacities of 2-3 slice data. It can be understood that, when the capacities of the slice data obtained by dividing the image frame data are not uniform, the buffer space of the second buffer is an integral multiple of the slice data with the largest capacity.

Specifically, in S250, the SOC chip may include a display controller, and when the first time arrives, after the processor of the SOC chip configures the display controller, the display controller sequentially reads slice decompressed data from the second SRAM through the on-chip internet according to a direction from top to bottom when the image is displayed on the smart glasses display screen.

In some embodiments, in order to avoid data collision of the smart glasses during displaying, the second time is earlier than the first time by a preset time length, so that a situation that the decoder does not write new slice decompressed data into the second SRAM after the display controller reads the slice decompressed data in the second SRAM can be avoided.

Specifically, the preset duration is a duration calculated by the SOC chip according to the processing delay of the decoder itself plus a certain margin, and it may be understood that the margin may be artificially preset, or may be calculated by the SOC chip according to the current operating state of the decoder, for example, two slice decoding data may be stored in the current decoder, and then the SOC chip may use the time for the decoder to decode the two slice data as the margin.

Specifically, in S260, the SOC chip may include a display interface, and the display controller of the SOC chip outputs the slice decompressed data to the smart glasses display screen through the display interface, so that the smart glasses display screen displays an image corresponding to the slice decompressed data

As an example, taking the buffer space of the second buffer as the sum of the capacities of N slice data, 1920 × 1080 resolution (1080 p for short), 30fps (frame/second) display frame rate, and 24-bit pixel format as an example, as shown in fig. 4, the processor of the SOC chip configures a decoder to start at time T- Δ T, the decoder decompresses the first N slice compressed data read from the first SRAM, writes the first N slice decompressed data into the second SRAM, and notifies the display controller through the on-chip internet, the display controller starts at time T according to the notification, and the display controller of the SOC chip sequentially reads the slice data from the second SRAM through the on-chip internet from the top-down direction when the image is displayed on the smart glasses display screen.

At this time, the decoder still decompresses the slice compressed data and writes the newly decompressed N +1 th slice compressed data into the second SRAM to cover the first slice decompressed data, and then the decoder writes the newly decompressed N +2 th slice compressed data into the second SRAM to cover the second slice decompressed data, and so on until the nth slice decompressed data is covered, if the slice compressed data is still not decompressed, the decoder repeats the above steps until the last slice decompressed data is written into the second SRAM.

And the display controller of the SOC chip outputs the read slice data to the display interface after passing through the internal processing circuit of the display controller, and the slice data is sent to the display screen of the intelligent glasses through the display interface, so that the image corresponding to the slice decompressed data of the display screen of the intelligent glasses is displayed.

As an example, taking 12nm semiconductor technology, 1080p, 30fps, 24-bit pixel format, 16-bit wide LPDDR4 memory and 1493Mbps bandwidth of read LPDDR4 memory as examples, when the change frequency of the current image frame data is less than the first threshold, according to the method for reading and writing an SDRAM memory in the prior art, when the smart glasses are displaying, the power consumption for reading only the LPDDR4 memory is about 200mW, and the total power consumption of the smart glasses is less than 50mW when displaying according to the data storage and data display method of the embodiments of the present application.

Specifically, in S160, when the change frequency is greater than or equal to the first threshold, that is, the change frequency of the image frame data is high, at this time, the compression of the image frame data by the encoder, the decompression of the slice data by the decoder, and the power consumption caused by the high-frequency read/write operations of the first SRAM and the second SRAM are equivalent to the power consumption caused by reading/writing the SDRAM memory, so that the SOC chip stores all the image frame data in the SDRAM memory to reduce the operation steps.

In some embodiments, in order to reduce the display power of the smart glasses, after determining the first time at which the current image frame data is output to the display interface according to the display frame rate setting, the method further includes:

when the change frequency of the current image frame data is determined to be larger than or equal to a first threshold value, reading the current image frame data from an SDRAM memory when the first time is reached.

Specifically, when it is determined that the change frequency of the current image frame data is greater than or equal to a first threshold value, the current image frame data is stored in an SDRAM memory, and when the first time arrives, a processor of the SOC chip configures an SDRAM controller, and the SDRAM controller reads the current image frame data from the SDRAM memory through a DDR interface and transmits the read current image frame data to a display controller through an on-chip internet.

Specifically, the display controller of the SOC chip sends the current image frame data to the smart glasses display screen through the display interface after passing through the internal processing circuit, so that the smart glasses display screen displays an image corresponding to the current image frame data.

In the embodiment of the application, different display methods are adopted for image frame data with different change frequencies, so that the writing and/or reading times of an SDRAM (synchronous dynamic random access memory) are reduced, the processing power consumption of the SDRAM is further reduced, and the display power consumption of intelligent glasses is further reduced.

Based on the data storage method provided by any of the above embodiments, the present application further provides an embodiment of a data storage device, which is applied to a system on chip SOC chip of smart glasses, where the SOC chip includes a first cache, and the smart glasses include a synchronous dynamic random access SDRAM memory, as shown in fig. 5.

Fig. 5 shows a schematic diagram of a data storage device according to an embodiment of the present application. As shown in fig. 5, the data storage device 500 may include:

a first obtaining module 510, configured to obtain a change frequency of current image frame data according to an image frame sequence;

the determining module 520 is configured to determine whether there is a difference between the current image frame data and the previous image frame data when the change frequency is smaller than a first threshold.

A first storage module 530, configured to store the current image frame data into an SDRAM memory if yes.

The compression module 540 is configured to read a plurality of pieces of data corresponding to the image frame data from the SDRAM memory according to a preset display direction of the image frame data, and perform compression coding on the plurality of pieces of data to obtain piece compressed data, where the plurality of pieces of data are a plurality of pixel data sets obtained by splitting current image frame data.

A second storing module 550, configured to store the slice compression data into the first cache.

And a third storing module 560, configured to store the image frame data into an SDRAM memory when the change frequency is greater than or equal to the first threshold.

The device in the embodiment of the application judges whether the data of the current image frame has difference or not when the change frequency of the data of the current image frame is smaller than a first threshold value, and writes and reads the SDRAM only when the data of the current image frame has difference, namely changes. When the current image frame data has no difference, namely is not changed, the current image frame data does not need to be stored in an SDRAM (synchronous dynamic random access memory), and when the image frame data needs to be displayed, the current image frame data is directly read from the first cache. When the change frequency of the current image frame data is greater than or equal to the first threshold value, the current image data frame is stored in the SDRAM, different storage methods are adopted according to different change frequencies, the writing and/or reading times of the SDRAM are reduced, the processing power consumption of the SDRAM is further reduced, and the display power consumption of the intelligent glasses is further reduced.

In some embodiments, to limit the area of the SOC chip, the compression module 540 may include:

and the coding compression unit is used for coding and compressing each piece of data based on a single-frame intra-frame coding mode to obtain piece compressed data.

The device in the embodiment of the application performs coding compression on the slice data in a single-frame intra-frame coding mode to reduce the total capacity of the slice data, so that the buffer space is saved and the area of an SOC chip is limited.

Based on the data display method provided by any one of the embodiments, the application further provides an embodiment of the data display device, which is applied to an SOC chip of the smart glasses, wherein the SOC chip includes a first cache, a second cache and a display interface, and the smart glasses further include a smart glasses display screen, specifically referring to fig. 6.

Fig. 6 shows a schematic diagram of a data display device according to an embodiment of the present application. As shown in fig. 6, the data display apparatus 600 may include:

a determining module 610, configured to determine, according to a display frame rate setting, a first time at which current image frame data is output to the display interface;

a second obtaining module 620, configured to, when it is determined that the change frequency of the current image frame data is smaller than a first threshold, sequentially obtain, at a second time, a plurality of pieces of compressed data corresponding to the current image frame data from the first cache in a preset display direction of the image frame data;

a decompression module 630, configured to decode and decompress each piece of compressed data to obtain piece decompressed data;

a fourth storage module 640, configured to store the slice decompressed data into the second cache;

a third obtaining module 650, configured to obtain the slice decompression data from the second cache according to the preset display direction when the first time is reached, where the second time is earlier than the first time by a preset duration;

the first sending module 660 is configured to send the slice decompression data to the smart glasses display screen, so that the smart glasses display screen displays an image corresponding to the slice decompression data.

The device in the embodiment of the application reads the slice compressed data from the first cache at the second moment when the change frequency of the current image frame data is determined to be smaller than the first threshold, and then decompresses and stores the compressed data in the second cache, reads the slice decompressed data from the second cache when the first moment arrives, and sends the slice decompressed data to the smart glasses display screen so that the smart glasses display screen displays an image corresponding to the slice decompressed data. The processing of displaying images can be completed through the first cache and the second cache inside the SOC chip, the high-frequency reading and writing of the SDRAM memory are avoided, and the display power consumption of the intelligent glasses is greatly reduced.

In some embodiments, to reduce the display power of the smart glasses, the data display device 600 may further include:

the fourth acquisition module is used for reading the current image frame data from the SDRAM when the change frequency of the current image frame data is determined to be greater than or equal to a first threshold and the first moment is reached;

and the second sending module is used for sending the current image frame data to the intelligent glasses display screen so as to enable the intelligent glasses display screen to display the image corresponding to the current image frame data.

According to the device in the embodiment of the application, different display methods are adopted according to image frame data with different change frequencies, the writing and/or reading times of the SDRAM are reduced, the processing power consumption of the SDRAM is further reduced, and the display power consumption of the intelligent glasses is further reduced.

Based on the data storage and data display method provided by any of the above embodiments, the present application further provides an embodiment of an SOC chip, as shown in fig. 7, the SOC chip includes: a first cache, a second cache, an encoder, a processor, and a synchronous dynamic random access SDRAM controller, wherein the first cache, the second cache, the processor, the encoder, and the SDRAM controller are connected and communicate via an on-chip interconnect network,

the processor is used for acquiring the change frequency of the current image frame data according to the image frame sequence; and when the change frequency is smaller than a first threshold value, judging whether the current image frame data and the previous image frame data have difference or not.

The encoder is used for reading a plurality of pieces of data corresponding to the current image frame data from the SDRAM according to the preset display direction of the current image frame data, and performing compression encoding on the plurality of pieces of data to obtain piece compressed data, wherein the plurality of pieces of data are a plurality of pixel data sets obtained by splitting the current image frame data.

The first cache is used for storing the slice compression data.

In some embodiments, the SOC chip further comprises a decoder, a second cache, and a display controller, the decoder, the second cache, and the display controller connected and communicating through an on-chip interconnect network,

the processor is further configured to determine a first time at which current image frame data is output to the display interface according to a display frame rate setting.

The decoder is used for sequentially acquiring a plurality of pieces of compressed data corresponding to the current image frame data from the first cache according to the preset display direction of the image frame data at a second moment when the processor determines that the change frequency of the current image frame data is smaller than a first threshold value.

And decoding and decompressing each piece of compressed data to obtain piece decompressed data.

The second buffer is used for storing the slice decompression data.

And the processor is further configured to acquire the slice decompression data from the second cache in the preset display direction when the first time is reached, wherein the second time is earlier than the first time by a preset duration.

The SOC chip has functions of implementing each step in the method embodiments, and can achieve corresponding technical effects, and for brevity, no further description is given here.

In addition, in combination with the data storage and data display method of the above embodiment, as shown in fig. 8, the embodiment of the present application may provide an electronic device, which may include a processor 810 and a memory 820 storing computer program instructions.

Specifically, the processor 810 may include a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC), or may be configured to implement one or more Integrated circuits of the embodiments of the present Application.

Memory 820 may include mass storage for data or instructions. By way of example, and not limitation, memory 820 may include a Hard Disk Drive (HDD), a floppy Disk Drive, flash memory, an optical Disk, a magneto-optical Disk, tape, or a Universal Serial Bus (USB) Drive or a combination of two or more of these. Memory 820 may include removable or non-removable (or fixed) media, where appropriate. Memory 820 may be internal or external to the integrated gateway disaster recovery device, where appropriate. In a particular embodiment, the memory 820 is a non-volatile solid-state memory. In certain embodiments, memory 820 comprises Read Only Memory (ROM). Where appropriate, the ROM may be mask-programmed ROM, Programmable ROM (PROM), Erasable PROM (EPROM), Electrically Erasable PROM (EEPROM), electrically rewritable ROM (EAROM), or flash memory or a combination of two or more of these.

The processor 810 implements any one of the target object following methods in the above embodiments by reading and executing computer program instructions stored in the memory 820.

In one example, the electronic device can also include a communication interface 830 and a bus 840. As shown in fig. 8, the processor 810, the memory 820 and the communication interface 830 are connected via a bus 840 to complete communication therebetween.

The communication interface 830 is mainly used for implementing communication among modules, devices, units and/or devices in this embodiment.

The bus 840 includes hardware, software, or both to couple the components of the electronic device to each other. By way of example, and not limitation, a bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hypertransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an infiniband interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a video electronics standards association local (VLB) bus, or other suitable bus or a combination of two or more of these. Bus 840 may include one or more buses, where appropriate. Although specific buses are described and shown in the embodiments of the application, any suitable buses or interconnects are contemplated by the application.

The target object following device, when executing the computer program instructions, implements the target object following method described in any of the above embodiments.

In addition, in combination with the target object following method described above, an embodiment of the present application may provide a computer storage medium having computer program instructions stored thereon, where the computer program instructions, when executed by a processor, implement the target object following method described in any of the above embodiments.

It is to be understood that the present application is not limited to the particular arrangements and instrumentality described above and shown in the attached drawings. A detailed description of known methods is omitted herein for the sake of brevity. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present application are not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications, and additions or change the order between the steps after comprehending the spirit of the present application.

The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of the present application are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, Erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, Radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranet, etc.

It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed simultaneously.

Aspects of the present disclosure are described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, implement the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a processor may be, but is not limited to, a general purpose processor, a special purpose processor, an application specific processor, or a field programmable logic circuit. It will also be understood that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware for performing the specified functions or acts, or combinations of special purpose hardware and computer instructions.

As described above, only the specific embodiments of the present application are provided, and it can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the system, the module and the unit described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present application, and these modifications or substitutions should be covered within the scope of the present application.

Claims

1. A data storage method is characterized in that the data storage method is applied to a System On Chip (SOC) chip of intelligent glasses, the SOC chip comprises a first cache, the intelligent glasses comprise a Synchronous Dynamic Random Access (SDRAM) memory, and the method comprises the following steps:

storing the slice compressed data into the first cache;

2. The method according to claim 1, wherein a sum of capacities of a plurality of the slice compressed data is not more than one tenth of a capacity of the current image frame data.

3. The method according to claim 1, wherein the performing compression encoding on the plurality of slice data to obtain slice compressed data specifically comprises:

4. A data display method is applied to an SOC chip of intelligent glasses, the SOC chip comprises a first cache, a second cache and a display interface, the intelligent glasses comprise an intelligent glasses display screen, and the method comprises the following steps:

storing the slice decompressed data in the second cache;

5. The method of claim 4, wherein the smart glasses further comprise a synchronous dynamic random access SDRAM memory, and after determining a first time instant at which current image frame data is output to the display interface according to a display frame rate setting, the method further comprises:

when the change frequency of the current image frame data is determined to be greater than or equal to a first threshold value, reading the current image frame data from the SDRAM memory when the first time is reached;

6. A data storage device, wherein the SOC chip is applied to a System On Chip (SOC) chip of smart glasses, wherein the SOC chip comprises a first cache, and wherein the smart glasses comprise Synchronous Dynamic Random Access (SDRAM) memories, and wherein the device comprises:

7. The utility model provides a data display device, its characterized in that is applied to the SOC chip of intelligent glasses, the SOC chip includes first buffer memory, second buffer memory and display interface, intelligent glasses include intelligent glasses display screen, the device includes:

8. An SOC chip, comprising: a first cache, a second cache, an encoder, a processor, and a synchronous dynamic random access SDRAM controller, wherein the first cache, the second cache, the processor, the encoder, and the SDRAM controller are connected and communicate via an on-chip interconnect network,

the first cache is used for storing the slice compression data;

the SDRAM controller is used for storing the current image frame data into an SDRAM memory when whether the current image frame data and the previous image frame data have difference or the change frequency is larger than or equal to a first threshold value.

9. The chip of claim 8, in which the SOC chip further comprises a decoder, a second cache, and a display controller, the decoder, the second cache, and the display controller connected and communicating through an on-chip interconnect network,

the processor is further configured to determine a first time when current image frame data is output to the display interface according to a display frame rate setting;

the second cache is used for storing the slice decompression data;

the display controller is used for sending the piece decompression data to the intelligent glasses display screen so that the intelligent glasses display screen can display the image corresponding to the piece decompression data.

10. The chip of claim 9, wherein the smart glasses comprise an SDRAM memory, and the processor is further configured to, after determining a first time when current image frame data is output to the display interface according to a display frame rate setting, upon determining that a change frequency of the current image frame data is greater than or equal to a first threshold, read the current image frame data from the SDRAM memory upon reaching the first time;

11. An electronic device, characterized in that the device comprises: a processor and a memory storing computer program instructions;

the processor, when executing the computer program instructions, implements the method of any of claims 1-5.

12. A computer storage medium having computer program instructions stored thereon which, when executed by a processor, implement the method of any one of claims 1-5.

13. A computer program product, wherein instructions in the computer program product, when executed by a processor of an electronic device, cause the electronic device to perform the method of any of claims 1-5.