CN114563972A - Intelligent terminal control system - Google Patents
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S40/00—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
- Y04S40/12—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them characterised by data transport means between the monitoring, controlling or managing units and monitored, controlled or operated electrical equipment
- Y04S40/124—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them characterised by data transport means between the monitoring, controlling or managing units and monitored, controlled or operated electrical equipment using wired telecommunication networks or data transmission busses
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Abstract
The invention discloses an intelligent terminal control system, comprising: the intelligent electronic equipment comprises a main control module, a power supply circuit, a display circuit, a positioning circuit, a wireless radio frequency circuit, a peripheral circuit, a storage circuit, an Ethernet circuit and a communication circuit, wherein the power supply circuit provides stable power supply voltage for the whole system, the display circuit can display feedback information of various terminals, the positioning circuit can perform information positioning of electronic equipment, the peripheral circuit comprises an alarm circuit, a key circuit and a filter circuit, the storage circuit can store various information of system work, the Ethernet circuit can perform optical network communication, and the communication circuit can perform data transmission with peripheral electronic equipment in various communication modes.
Description
Technical Field
The invention relates to the field of digital equipment terminals, in particular to an intelligent terminal control system.
Background
The intelligent terminal can realize human-computer interaction, provide great convenience for daily production and life of people, bring greater use value for our life, can connect lighting, audio, air, security protection, electronic equipment and the like related to home life together through the internet of things technology, enable the intelligent terminal to provide scientific, healthy, safe, comfortable, convenient and pleasant home environment for users, can help families and the outside keep information communication smooth, help people to effectively schedule time, optimize life style of people, and even save funds for various energy costs.
Disclosure of Invention
Aiming at the defects of the existing intelligent terminal control system, the invention provides the intelligent terminal control system which can intelligently manage living equipment and optimize the life law of people.
The technical scheme adopted by the invention for solving the technical problems is as follows:
provided is an intelligent terminal control system, including: master control module, power supply circuit, display circuit, positioning circuit, wireless radio frequency circuit, peripheral hardware circuit, memory circuit, ethernet circuit, communication circuit, power supply circuit provides stable mains voltage for entire system, display circuit can show each item terminal feedback information, the GPS circuit can carry out information positioning to electronic equipment, the peripheral hardware circuit includes alarm circuit, button circuit, filter circuit, memory circuit can the each item information of memory system work, the ethernet circuit can carry out the optical network communication, communication circuit can take multiple communication mode and peripheral electronic equipment to carry out data transmission.
Further, the master control module comprises a chip U1A-U1H, a pin 5 of the chip U1D is connected with a pin of a MOS transistor Q1, pins 6, 7, 9 and 10 are respectively connected with a power supply through resistors R1-R4, a pin 1 of the chip U1E is connected with a pin 3 of a crystal oscillator Y1 through a resistor R7, pins 1 and 4 of the crystal oscillator Y1 are connected with the power supply, a capacitor C2 is arranged between the power supply and the ground, pins 10, 11, 20 and 51 of the chip U1E are respectively connected with the power supply through resistors R8, R8 and R8, a pin 74 and 75 of the chip U18 are respectively connected with the power supply through resistors R8 and R8, capacitors C8-C8, resistors R8 and R8 are arranged between the power supply and the ground, a pin 18 of the chip U18 is connected with the power supply, capacitors C8 and C8 are arranged between the power supply and the ground, and the CLU 8 is of a model number of CLU 020-6857-CLU 8, and the CLU 8 is a model number of CLU 6857-CLU 8.
Further, power supply circuit includes chip U4-U10, chip U4 is VCC input constant voltage power supply, chip U5 is 1.8V voltage stabilizing circuit, chip U6 is VCC output voltage stabilizing circuit, chip U7, U8, U10 are 3.3V voltage stabilizing circuit, chip U9 is 4.2V voltage stabilizing circuit, chip U4, U5, U6's model is SY8003ADFC, chip U7, U8's model is ME6119C33M5G, chip U9, U10's model is SY 8089A.
Further, the display circuit comprises chips U11 and U12, pins 2-5 of a chip U11 are respectively connected with pins 1-4 of the chip U12, pins 11-16 are respectively connected with pins 8, 5, 4, 3, 2 and 1 of the chip U1C, the model of the chip U11 is XPT2046_ JX, pins 9-15 of the chip U12 are respectively connected with pins 12-18 of the chip U1C, pins 17-32 are respectively connected with pins 17-32 of the chip U1F, pins 34-36 are respectively connected with a collector of a triode Q1 through a resistor R153, the base of the triode Q1 is connected with a power supply through resistors R154 and R155, an electric key SW1-3 is arranged between the power supply and the ground, and the model of the chip U12 is LCD.
Furthermore, the positioning circuit includes chips U13, U14, and interfaces P1-P4, pins 2 and 3 of the chip U13 are respectively connected to 2.8V and 4.2V power supplies, pin 1 is grounded, the model of the chip U13 is XC6206P282MR, pins 37 and 38 of the chip U14 are respectively connected to pins 3 and 2 of the interface P1, pins 42, 41 and 39 are respectively connected to pins 3, 5 and 6 of the interface P2, pins 45 and 28 are respectively connected to pin 1 of the interfaces P3 and P4, pin 30 is respectively grounded through resistors R104 and R105, LED7 and LED8, pins 54, 53, 50 and 49 are respectively connected to pins 16, 15, 14 and 17 of the chip U A, pins 9, 18 are connected to pins M2 and M3, pin 32 is connected to the source of MOS transistor M4, pins M2 and M3 are respectively connected to pins 16, 20, and 3873 of the model of the MOS diode U3842 is connected to the gate of the chip P463, the type of the interface P2 is MICRO SIM, the types of the interfaces P3 and P4 are IPEX, and the type of the chip U14 is A9G.
Further, the wireless radio frequency circuit comprises chips U15, U16 and an interface P5, pins M1, M2, M7 and M8 of the chip U15 are respectively connected with a wireless transceiver RF1 and an RF2 through capacitors C147, C148, C149 and C150, pin M12 is connected with pin 3 of a crystal oscillator Y6 through a capacitor C142, the input end of the chip U15 is connected with the corresponding pin of the chip U1B, the model of the chip U15 is AD9363, pins 1 and 3 of the interface P5 are respectively connected with pins 10 and 11 of the chip U1A, pins 4, 6, 8 and 10 are respectively connected with a power supply through resistors R152, R151, R150 and R149, the chip U16 is 1.8V, limit switches SW1 and 3 are arranged between the power supply and the ground, and the model of the chip U16 is 39PUR 100 LD.
Further, the filter circuit comprises capacitors C10-C51, the capacitors C10-C24 are arranged between a 1.8V power supply and ground, the capacitors C25-C36 are arranged between an output power supply and ground, the capacitors C37-C51 are arranged between an input power supply and ground, the alarm circuit comprises an alarm LS1, a pin 1 of the alarm LS1 is connected with the power supply, a pin 2 is connected with a pin 3 of the triode Q3, a pin 1 of the triode Q3 is connected with a pin 19 of the chip U1C through a resistor R160, the key circuit comprises keys S1-S16, the inputs of the keys S1-S16 are connected with pins 25, 26, 30 and 31 of the chip U1C, and the outputs of the keys S1, 33, 34 and 36 of the chip U1C.
Further, the memory circuit comprises chips U17 and U18, pins 25-39 of the chip U17 are respectively connected with pins 55-69 of the chip U1F through resistors R23-R37, pins 1-8 and 12-19 are respectively connected with pins 1-16 of the chip U1F, pin 23 is connected with pin 24 of the chip U17 through resistor R48, pins 50 and 51 are connected with a power supply, pins 48 and 52 are respectively connected with the ground through resistors R47 and R20, capacitors C52-C55 and resistors R21 and R22 are arranged between the power supply and the ground, filter capacitors C56-C67 are arranged between the power supply and the ground, the model of the chip U17 is MT41K256M16TW-107-P-V00H, the model of pins 1, 2, 3, 5, 6 and 7 of the chip U18 is respectively connected with pins 4, 6, 7, 5, 9 and EIR 256 of the chip U1E, and the model of the chip U18 is the model of the JVT W256Q 25.
Furthermore, the ethernet circuit includes chips U19, U20, and an interface P6, where pins 1, 2, 4, 5, 7, 8, 10, 11 of the chip U19 are respectively connected to pins 3-10 of the interface P6, pins 3, 6, 9, 28, 36, 37, 38, 40, 41, 44, 45 are respectively connected to pin 6 of the chip U20, pins 32-34 are respectively connected to pin 6 of the chip U20 through resistors R91, R90, R88, pins 13, 14, 16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 30, 31 are respectively connected to pins 32, 28, 29, 30, 31, 27, 21, 22, 23, 24, 25, 26 of the chip U1E, the model number of the chip U19 is RTL82 8211E, and the model number of the chip U20 is 8003 ADFC.
Further, the communication circuit comprises chips U21-U25 and an interface P7, pins 25 and 26 of the chip U21 are respectively connected with pins 15 and 16 of the chip U1E through resistors R121 and R120, pins 20, 22, 19, 23, 22 and 18 are respectively connected with pins 1, 2, 3, 5, 6 and 7 of the chip U22, the model of the chip U21 is ESP82 EX, the model of the chip U22 is 25Q32, pins 1, 2 and 4 of the chip U23 are respectively connected with pins 11, 12 and 10 of the chip U1A, pins 6 and 7 output 485 signals through the interface P7, the model of the chip U23 is RS485, pins 17, 22, 23, 2, 31, 29, 1, 27, 13, 10, 97, 65 and 43 of the chip U E are respectively connected with corresponding pins of the chip U1E, pins 18 and 19 are respectively connected with the corresponding pins 18, 19, C136, C135, C5823, pins of the chip U24, pins 14 and pins 132, 24 and 24, 3, R46593, 3 and R46595 of the chip U EZK are respectively connected with the chip U5, pins 4 and 10 of the chip U25 are connected with a pin 18 of the chip U24, pins 5 and 11 are connected with a pin 19 of the chip U24, and the model of the chip U25 is USB 1.
Compared with the prior art, the invention has the beneficial effects that:
1. the power supply circuit has various power supply circuits, and the power supply of the circuit is more stable by adopting a mode of mutually isolating all parts of power supplies;
2. the wireless transceiver circuit is provided, and can control the signal of the equipment connected with the wireless network through the access condition of the wireless network;
3. the intelligent terminal has independent display and storage circuits, can display various information processed by the intelligent terminal on a display screen, and simultaneously locally stores various feedback information, thereby providing convenience for later data calling;
4. the system has various communication circuits, so that the signals sent by various electronic devices are prevented from interfering with each other when the system is connected with various electronic devices, and the data processing capability of the system is reduced.
Drawings
FIG. 1 is a schematic structural diagram of the overall structure of the present invention;
FIG. 2 is a schematic diagram of a principle structure of a main control module according to the present invention;
FIG. 3 is a schematic diagram of the schematic structure of the power circuit of the present invention;
FIG. 4 is a schematic diagram of a schematic structure of a display circuit according to the present invention;
FIG. 5 is a schematic diagram of the positioning circuit of the present invention;
FIG. 6 is a schematic diagram of a schematic structure of a radio frequency circuit according to the present invention;
FIG. 7 is a schematic diagram of the peripheral circuit of the present invention;
FIG. 8 is a schematic diagram of the memory circuit of the present invention;
FIG. 9 is a schematic diagram of the Ethernet circuit of the present invention;
fig. 10 is a schematic structural diagram of a communication circuit of the present invention.
Detailed Description
For the purposes of promoting an understanding of the invention, reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, and the terms used in the specification of the present invention are for the purpose of describing particular embodiments only and are not intended to limit the present invention.
The present invention will be described in detail below with reference to the accompanying drawings.
In this embodiment, the main control module may implement a regulation function on the peripheral device when the system is in operation, and may reset and re-edit all or a part of the operation instructions of the system according to the user requirements.
In this embodiment, the power circuit adopts three voltage output modes of 1.8V, 3.3V and 4.2V to provide stable power voltage for the main control module and various modules respectively, and the three power output modes are isolated from each other to ensure the stability of system operation.
In this embodiment, chip U12 is 3.5 cun liquid crystal display, can be through connecting display interface chip U11 output audio information, can touch-control through the display screen simultaneously, can adjust the break-make condition of terminal jointing equipment.
In embodiment 5, as shown in fig. 5, the positioning circuit includes chips U13, U14 and interfaces P1-P4, pins 2 and 3 of the chip U13 are respectively connected to 2.8V and 4.2V power supplies, pin 1 is grounded, the model of the chip U13 is XC6206P282MR, pins 37 and 38 of the chip U14 are respectively connected to pins 3 and 2 of the interface P1, pins 42, 41 and 39 are respectively connected to pins 3, 5 and 6 of the interface P2, pins 45 and 28 are respectively connected to pin 1 of the interfaces P3 and P4, pin 30 is respectively connected to ground through resistors R104, R105, LED7 and LED8, pins 54, 53, 50 and 49 are respectively connected to pins 16, 15, 14, 17, pins 9 and 18 of the chips U1A, pin 32 is connected to the source of the MOS transistor M4, pin 54, pin 2, M3, and pin 3619 of the chips U3814 and the gate of the chips U3858 and 3646, the model of interface P1 is Header 3, the model of interface P2 is MICRO SIM, the model of interface P3, P4 is IPEX, the model of chip U14 is A9G.
In this embodiment, the positioning circuit mainly realizes GPS positioning and GSM communication, in the aspect of GPS positioning, can fix a position each connected electronic equipment, when forgetting the storage location of certain electronic equipment, can carry out quick inquiry through terminal control system's locate function, in the aspect of GSM communication, the system disposes oneself SIM card draw-in groove simultaneously, can realize SIM card communication under specific environment, perhaps warning circuit, will accurate GPS coordinate discernment simultaneously sends.
In this embodiment, the wireless rf circuit mainly transmits and receives wireless rf signals, and can implement wireless transmission of high definition video, and this circuit is an important guarantee for connecting a system to peripheral electronic devices through a wireless network.
In this embodiment, the filter circuit is divided into three filter capacitors, is respectively adapted to the main control module with different voltages, and the alarm circuit is connected with the main control module, and when the system detects that the information is abnormal, the alarm can be given an alarm through the alarm, and the key circuit is equipped below the display screen, and can realize the regulation and control of the screen information of the display screen through the keys.
In embodiment 8, as shown in fig. 8, the memory circuit includes chips U17 and U18, pins 25 to 39 of the chip U17 are respectively connected to pins 55 to 69 of the chip U1F through resistors R23 to R37, pins 1 to 8 and 12 to 19 are respectively connected to pins 1 to 16 of the chip U1F, pin 23 is connected to pin 24 of the chip U17 through resistor R48, pins 50 and 51 are connected to a power supply, pins 48 and 52 are respectively connected to ground through resistors R47 and R20, capacitors C52 to C55, resistors R21 and R22 are disposed between the power supply and the ground, filter capacitors C56 to C67 are disposed between the power supply and the ground, the model of the chip U17 is MT41K256M16TW to 107-P-V H, pins 1, 2, 3, 5, 6 and 7 of the chip U18 are respectively connected to pins 4, 6, 5, 6 and 7 of the chip U E, and the model of jvt 46 is model Q388.
In this embodiment, the storage circuit is FLASH and 256M high-speed fixed storage, which can realize circuit storage and data reading.
In this embodiment, the ethernet communication circuit is used as a control center of the intelligent terminal control system, the circuit carries the gigabit and the optical fiber communication circuit, the control system can be ensured to be constantly in a high-speed transmission network environment, and the circuit adopts an adjustable high-performance low-voltage-difference voltage stabilization chip to independently supply power to maintain the stability of the module.
In this embodiment, the communication circuit mainly adopts WIFI network communication, USB wired high-speed conversion communication, CAN and 485 conventional serial port communication, the USB communication circuit mainly realizes wired information access and output communication modes, and the WIFI communication circuit mainly controls access of other wireless sensors or access of electronic devices such as mobile phones, so that network full-house coverage CAN be realized.
The working principle of the invention is as follows: this scheme mainly is the control problem who solves intelligent terminal, this mainboard collocation network and high-speed radio frequency control module, can realize gigabit ethernet communication and high-speed wireless video communication, dispose wiFi communication simultaneously, can realize many wireless device access and network control, the mainboard is equipped with positioning circuit and SIM card control center, meet special circumstances, can realize the location and independently discern the warning, overall control mainboard accessible button sets up, also can access APP or PC end carry out data report and wireless control.
It should be noted that the above technical features are combined with each other to form various embodiments which are not listed above, and all the embodiments are regarded as the scope of the present invention described in the specification; further, modifications and variations may be suggested to those skilled in the art in light of the above teachings, and it is intended to cover all such modifications and variations as fall within the scope of the appended claims.
Claims (10)
1. An intelligent terminal control system, comprising: master control module, power supply circuit, display circuit, positioning circuit, wireless radio frequency circuit, peripheral hardware circuit, memory circuit, ethernet circuit, communication circuit, power supply circuit provides stable mains voltage for entire system, display circuit can show each item terminal feedback information, the GPS circuit can carry out information positioning to electronic equipment, the peripheral hardware circuit includes alarm circuit, keying circuit, filter circuit, memory circuit can the each item information of memory system work, the ethernet circuit can carry out fiber network communication, communication circuit can adopt multiple communication mode and peripheral electronic equipment to carry out data transmission.
2. The intelligent terminal control system according to claim 1, wherein the master control module comprises a chip U1A-U1H, pin 5 of the chip U1D is connected with pin Q1 of a MOS tube, pins 6, 7, 9 and 10 are respectively connected with a power supply through resistors R1-R4, pin 1 of the chip U1E is connected with pin 3 of a crystal oscillator Y1 through a resistor R7, pins 1 and 4 of the crystal oscillator Y1 are connected with a power supply, a capacitor C2 is arranged between the power supply and the ground, pins 10, 11, 20 and 51 of the chip U1E are respectively connected with a power supply through resistors R8, R9, R12 and R13, pins 74 and 75 of the chip U1F are respectively connected with a power supply through resistors R18 and R16, capacitors C6-C9 and resistors R17 and R19 are arranged between the power supply and the ground, the pin 18 of the chip U1G is connected with a power supply, capacitors C3, C4 and C5 are arranged between the power supply and the ground, the model of the chip U1A-U1H is XC7Z020-CLG 400.
3. The intelligent terminal control system of claim 1, wherein the power supply circuit comprises a chip U4-U10, the chip U4 is a VCC input voltage-stabilized power supply, the chip U5 is a 1.8V voltage-stabilized power supply, the chip U6 is a VCC output voltage-stabilized power supply, the chips U7, U8 and U10 are 3.3V voltage-stabilized power supplies, the chip U9 is a 4.2V voltage-stabilized power supply, the models of the chips U4, U5 and U6 are SY8003ADFC, the models of the chips U7 and U8 are ME6119C33M5G, and the models of the chips U9 and U10 are SY 8089A.
4. The intelligent terminal control system according to claim 1, wherein the display circuit comprises chips U11 and U12, pins 2-5 of the chip U11 are respectively connected with pins 1-4 of the chip U12, pins 11-16 are respectively connected with pins 8, 5, 4, 3, 2 and 1 of the chip U1C, the model of the chip U11 is XPT2046_ JX, pins 9-15 of the chip U12 are respectively connected with pins 12-18 of the chip U1C, pins 17-32 are respectively connected with pins 17-32 of the chip U1F, pins 34-36 are respectively connected with a collector of a transistor Q1 through a resistor R153, a base of the transistor Q1 is connected with a power supply through resistors R154 and R155, an electric key SW1-3 is arranged between the power supply and the ground, and the model of the chip U12 is an LCD.
5. The intelligent terminal control system according to claim 1, wherein the positioning circuit comprises a chip U13, U14 and an interface P1-P4, pins 2 and 3 of the chip U13 are respectively connected with a 2.8V power supply and a 4.2V power supply, pin 1 is grounded, the model of the chip U13 is XC6206P282MR, pins 37 and 38 of the chip U14 are respectively connected with pins 3, 2, pins 42, 41 and 39 of the interface P1 and pins 3, 5 and 6 of the interface P2, pins 45 and 28 are respectively connected with pin 1 of the interfaces P3 and P4, pin 30 is respectively grounded through resistors R104 and R105, LED7 and LED8, pins 54, 53, 50 and 49 are respectively connected with pins 16, 15, 14 and 17 of the chip U1A, pins 9 and 18 are respectively connected with drains of MOS tubes M2 and M3, pin 32 is connected with a source of the MOS tube M4, pin 54, pin 9, 18 is respectively connected with a source pin of the MOS tube M3852 and a gate of the MOS tube M3819 and 3619 and the MOS tube 3619 and the chip U3814, the model of interface P1 is Header 3, the model of interface P2 is MICRO SIM, the model of interface P3, P4 is IPEX, the model of chip U14 is A9G.
6. The intelligent terminal control system according to claim 1, wherein the wireless radio frequency circuit comprises chips U15, U16 and an interface P5, pins M1, M2, M7 and M8 of the chip U15 are respectively connected with wireless transceivers RF1 and RF2 through capacitors C147, C148, C149 and C150, pin M12 is connected with pin 3 of a crystal oscillator Y6 through a capacitor C142, the input end of the chip U15 is connected with the corresponding pin of the chip U1B, the model of the chip U15 is AD9363, pins 1 and 3 of the interface P5 are respectively connected with pins 10 and 11 of the chip U1A, pins 4, 6, 8 and 10 are respectively connected with a power supply through resistors R152, R151, R150 and R149, the regulated power supply of the chip U16 is 1.8V, limit switches 1 and SW3 are arranged between the power supply and the ground, and the model of the chip U16 is LD 39100R.
7. The intelligent terminal control system according to claim 1, wherein the filter circuit comprises capacitors C10-C51, the capacitors C10-C24 are arranged between a 1.8V power supply and ground, the capacitors C25-C36 are arranged between an output power supply and ground, the capacitors C37-C51 are arranged between an input power supply and ground, the alarm circuit comprises an alarm LS1, pin 1 of the alarm LS1 is connected with the power supply, pin 2 is connected with pin 3 of the triode Q3, pin 1 of the triode Q3 is connected with pin 19 of the chip U1C through a resistor R160, the key circuit comprises keys S1-S16, the inputs of the keys S1-S16 are connected with pins 25, 26, 30, 31 of the chip U1C, and the outputs of the pins 32, 33, 34, 36 of the chip U1C.
8. The intelligent terminal control system according to claim 1, wherein the memory circuit comprises chips U17, U18, pins 25-39 of the chip U17 are respectively connected with pins 55-69 of the chip U1F through resistors R23-R37, pins 1-8, 12-19 are respectively connected with pins 1-16 of the chip U1F, pin 23 is connected with pin 24 of the chip U17 through resistor R48, pins 50, 51 are connected with a power supply, pins 48, 52 are respectively connected with ground through resistors R47, R20, capacitors C52-C55, resistors R21, R22 are arranged between the power supply and ground, filter capacitors C56-C67 are arranged between the power supply and ground, the model of the chip U17 is MT41K256M16TW-107-P-V00H, pins 1, 2, 3, 5, 6, 7 of the chip U18 are respectively connected with pins 4, 6, 1E, 9, the model of the chip U18 is W25Q256 JVEQTR.
9. The intelligent terminal control system according to claim 1, wherein the ethernet circuit comprises chips U19, U20 and an interface P6, pins 1, 2, 4, 5, 7, 8, 10, 11 of the chip U19 are respectively connected to pins 3-10 of the interface P6, pins 3, 6, 9, 28, 36, 37, 38, 40, 41, 44, 45 are respectively connected to pin 6 of the chip U20, pins 32-34 are respectively connected to pin 6 of the chip U20 through resistors R91, R90 and R88, pins 13, 14, 16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 30 and 31 are respectively connected to pins 32, 28, 29, 30, 31, 27, 21, 22, 23, 24, 25 and 26 of the chip U1E, the model number of rtsy 19 is l82 8211E, and the model number of the chip U20 is model number ADFC 8003.
10. The intelligent terminal control system according to claim 1, wherein the communication circuit comprises a chip U21-U25 and an interface P7, pins 25 and 26 of the chip U21 are respectively connected to pins 15 and 16 of the chip U1E through resistors R121 and R120, pins 20, 22, 19, 23, 22 and 18 are respectively connected to pins 1, 2, 3, 5, 6 and 7 of the chip U22, the model of the chip U21 is ESP8266EX, the model of the chip U22 is 25Q32, pins 1, 2 and 4 of the chip U23 are connected to pins 11, 12 and 10 of the chip U1A, pins 6 and 7 output 485 signals through the interface P7, the model of the chip U23 is RS485, the pins 17, 22, 23, 2, 31, 29, 1, 27, 13, 10, 97, 65 and 6343 of the chip U24 are respectively connected to pins 17, 22, 23, 2, 31, 29, 1, 27, 13, 10, 97, 65 and 6343 of the corresponding to the chip U1, the pin 18, the pin C E, the pin 132 of the chip U24 are respectively connected to ground through resistors R136 and the pin 132, the model of the chip U24 is USB3320C-EZK, pins 4 and 10 of the chip U25 are connected with a pin 18 of the chip U24, pins 5 and 11 are connected with a pin 19 of the chip U24, and the model of the chip U25 is USB 1.
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