CN114556828B - Communication method and related device - Google Patents

Communication method and related device Download PDF

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Publication number
CN114556828B
CN114556828B CN201980101295.2A CN201980101295A CN114556828B CN 114556828 B CN114556828 B CN 114556828B CN 201980101295 A CN201980101295 A CN 201980101295A CN 114556828 B CN114556828 B CN 114556828B
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code division
sequences
division multiplexing
sequence
allocated
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CN114556828A (en
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郭文婷
向铮铮
苏宏家
卢磊
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals

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  • Computer Networks & Wireless Communication (AREA)
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  • Mobile Radio Communication Systems (AREA)

Abstract

The embodiment of the application discloses a communication method and a related device, wherein the communication method comprises the following steps: the first terminal device receives first data from the second terminal device on a first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1; the first terminal device sends a first response sequence to the second terminal device on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N. By adopting the embodiment of the application, the network overhead can be saved.

Description

Communication method and related device
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a communications method and a related device.
Background
With the development of wireless communication technology, there is an increasing demand for high data rates and user experiences, while there is an increasing demand for proximity services for learning about and communicating with surrounding people or things, so device-to-device (D2D) technology has grown. The application of the D2D technology can reduce the burden of a cellular network, reduce the battery power consumption of user equipment, improve the data rate and well meet the requirement of the proximity service.
Under the network of long term evolution (long term evolution, LTE) technology proposed by the third generation partnership project (the 3rd generation partnership project,3GPP), vehicle-to-everything communication (V2X) is proposed, V2X communication refers to vehicle-to-outside everything communication, including vehicle-to-vehicle communication (vehicle to vehicle, V2V), vehicle-to-pedestrian communication (vehicle to pedestrian, V2P), vehicle-to-infrastructure communication (vehicle to infrastructure, V2I), vehicle-to-network communication (vehicle to network, V2N). The V2X communication is a basic technology and a key technology applied to the scenes with very high requirements on communication delay in the future aiming at the communication technology of high-speed equipment represented by vehicles, such as intelligent automobiles, automatic driving, intelligent transportation systems and the like. LTE V2X addresses some of the partially basic requirements in V2X scenarios, but for future fully intelligent driving, autopilot, etc. application scenarios, LTE V2X at the present stage is not yet supported effectively.
With the development of the 5G New Radio (NR) technology in the 3GPP standard organization, the 5G NR v2x will be further developed, for example, a lower transmission delay can be supported, more reliable communication transmission, higher throughput, and better user experience can be achieved, so as to meet the requirements of a wider application scenario.
LTE V2X defines broadcast transmissions on the side links, NR V2X introduces unicast and multicast transmissions on the side links. In unicast/multicast transmission, to improve transmission reliability and reduce transmission delay, a physical layer hybrid automatic repeat request (hybrid automatic repeat request, HARQ) technique may be used. The 3GPP standard defines a physical layer sidelink feedback channel (physical sidelink feedback channel, PSFCH) on the sidelink for transmitting sidelink feedback control information (sidelink feedback control information, SFCI), at least for a receiving User Equipment (UE) to feedback to a transmitting UE whether to receive a successful acknowledgement message, and channel state information (channel status information, CSI) and the like. The time domain resources of the PSFCH may be configured or pre-configured by the network for the resource pool, while also the frequency domain resources and/or code domain resources of the PSFCH are configured, but the prior art has no standard how to configure these resources.
The prior art supports feedback of the UE on downlink data transmission, and the base station completely controls allocation of time-frequency resources, so that one UE decodes one or more downlink data sent on the time-frequency resources configured by the base station. However, in multicast communication, for an application scenario without a central controller, such as a base station, controlling scheduling, when multiple users of multiple time slots need to feed back HARQ information on the same time-frequency resource, how to allocate time-frequency resources to the users is a problem that needs to be studied and solved by those skilled in the art.
Disclosure of Invention
The invention provides a communication method and a related device, which can allocate corresponding response sequences and time-frequency resources for each time slot in advance for responding received data without extra signaling overhead when unicast, multicast and broadcast coexist in a resource pool, thereby reducing network overhead.
In a first aspect, an embodiment of the present invention provides a communication method, including: the first terminal device receives first data from the second terminal device on a first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
the first terminal device sends a first response sequence to the second terminal device on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N.
The scheme enables each time slot to be allocated to a corresponding response sequence by using a code division multiplexing sequence. When unicast, multicast and broadcast coexist in a resource pool, no additional signaling overhead is needed, and corresponding response sequences and time-frequency resources are allocated in advance for each time slot for responding to received data, so that network overhead can be reduced.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In this embodiment, the signal bandwidth of the code division multiplexing sequence is designed to be the same as the bandwidth for transmitting the sequence, so that the time-frequency resource can be fully utilized.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
The present embodiment is designed to allocate two sequences for each device by equally allocating M code division multiplexing sequences that can be multiplexed in one time-frequency resource to N slots of the system configuration, for decoding correctly and incorrectly in response to the received data, respectively.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e-j*(2*π/M)*n,n=0,1,2,3,…,M-1
Wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
The present embodiment gives a formula for representing the above-mentioned M code division multiplexing sequences, and designs index marks of a plurality of code division multiplexing sequences allocated to each of N time slots to be continuous, thereby ensuring the regularity of sequence allocation and reducing the trouble of combing.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
the present embodiment provides a representation formula indicating the sequence allocated to each of the above-described N slots, from which analysis also shows that index numbers of a plurality of code division multiplexed sequences of each slot are consecutive.
In one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In the embodiment of the application, index labels of the P ACK sequences and the P NACK sequences in each time slot are designed to be continuous, so that mutual interference between the ACK sequences and the NACK sequences in the same time slot is reduced.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In the embodiment of the application, a representation formula of the sequence of ACK and NACK in each time slot is provided, and a group pairing mode of ACK and NACK sequence pairs is designed.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs When =ρThe resulting code division multiplexed sequence and the m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
According to the embodiment of the application, the relative ordering of the ACK sequence and the NACK sequence in the same time slot is changed, so that the interference in the process of feeding back the sequence between the multicast time slot and the unicast time slot is reduced.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
Wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
Based on the above embodiment, the embodiment of the present application further reduces the interference between the ACK sequence and the NACK sequence in the same time slot while reducing the interference when feeding back the sequence between the multicast time slot and the unicast time slot by changing the relative ordering of the ACK sequence and the NACK sequence in the same time slot.
In one embodiment, the first data is received by the first terminal device on a plurality of sub-channels, and the first terminal device sends a first response sequence to the second terminal device on a first time-frequency resource according to the first data, including:
in the case where the communication between the second terminal device and the first terminal device is unicast communication, the first terminal device selects one subchannel from the plurality of subchannels according to the first data, and transmits the first response sequence to the second terminal device on the first time-frequency resource;
or, in the case where the communication between the second terminal device and the first terminal device is unicast communication, the first terminal device transmits the first response sequence to the second terminal device on the first time-frequency resource according to the first data occupying the plurality of sub-channels.
In one embodiment, the first data is received by the first terminal device on a plurality of sub-channels, and when the first data is multicast data, each device in the receiving devices of the multicast responds to the sequence of the first data and occupies the plurality of sub-channels to transmit;
Or, in the case that the first data is multicast data, each device of all receiving devices of the multicast occupies one channel of the plurality of sub-channels to transmit in response to the sequence of the first data.
The above two embodiments respectively design mapping modes of response sequences for unicast and multicast aiming at data channels using a plurality of sub-channels, and in a multicast time slot, multicast expansion can be realized by only occupying one sub-channel to send the response sequence.
In a second aspect, an embodiment of the present invention provides a communication method, including: the second terminal device transmits first data to the first terminal device on the first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
the second terminal device receives a first response sequence sent by the first terminal device on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is a NACK sequence with consecutive P index marksAt m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gammaThe m is 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the second terminal device sends the first data to the first terminal device on the first time slot, including: the second terminal device occupies a plurality of sub-channels on a first time slot to transmit the first data to the first terminal device.
The advantages of the method according to any of the second aspects may correspond to those described in the first aspect, and are not described here again.
In a third aspect, an embodiment of the present invention provides a terminal device, which may also be a communication device, including: a receiving unit configured to receive first data from a second terminal apparatus on a first slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
a transmitting unit, configured to transmit a first response sequence to the second terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used to respond to data transmitted on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
Wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, atIn the ith time slot, in m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the first data is received by the terminal device on a plurality of sub-channels, and the sending unit is specifically configured to:
when the communication between the second terminal device and the terminal device is unicast communication, selecting one sub-channel from the plurality of sub-channels according to the first data, and transmitting the first response sequence to the second terminal device on the first time-frequency resource;
or, in the case where the communication between the second terminal device and the terminal device is unicast communication, the first response sequence is transmitted to the second terminal device on the first time-frequency resource according to the first data occupying the plurality of sub-channels.
In one embodiment, the first data is received by the terminal device on a plurality of sub-channels, and when the first data is multicast data, each device in the multicast receiving device responds to the sequence of the first data and occupies the plurality of sub-channels to send;
Or, in the case that the first data is multicast data, each device of all receiving devices of the multicast occupies one channel of the plurality of sub-channels to transmit in response to the sequence of the first data.
The advantages of the method of any of the third aspects may correspond to those described in the first aspect, and are not described here again.
In a fourth aspect, embodiments of the present application provide a terminal device, which may also be a communication device, including: a transmission unit configured to transmit first data to a first terminal device on a first slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
a receiving unit, configured to receive a first response sequence sent by the first terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used to respond to data sent on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
Or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is PIndexing the consecutive NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
Wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the sending unit is specifically configured to: the first data is transmitted to the first terminal device by occupying a plurality of sub-channels on a first time slot.
Advantageous effects of the method according to any of the fourth aspects may correspond to those described in the first aspect, and are not described here again.
In a fifth aspect, an embodiment of the present invention provides a terminal device, which may also be a communication device, where the terminal device includes a processor, a transmitter, a receiver, and a memory, where the memory is configured to store a computer program and/or data, and the processor is configured to execute the computer program stored in the memory, so that the terminal device performs the following operations:
receiving, by the receiver, first data from a second terminal device over a first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
and transmitting a first response sequence to the second terminal device through the transmitter on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used for responding to the data transmitted on the N time slots on the first time-frequency resource, and M is an integer multiple of N.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
Or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
Wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the transmitting, by the transmitter, a first response sequence to the second terminal device on a first time-frequency resource according to the first data includes
Selecting one sub-channel from the plurality of sub-channels according to the first data to transmit the first response sequence to the second terminal device through the transmitter on the first time-frequency resource, in case the communication between the second terminal device and the terminal device is unicast communication;
Or, in the case where the communication between the second terminal device and the terminal device is unicast communication, the first response sequence is transmitted to the second terminal device by the transmitter on the first time-frequency resource according to the first data occupying the plurality of sub-channels.
In one embodiment, the first data is received by the terminal device on a plurality of sub-channels, and when the first data is multicast data, each device in the multicast receiving device responds to the sequence of the first data and occupies the plurality of sub-channels to send;
or, in the case that the first data is multicast data, each device of all receiving devices of the multicast occupies one channel of the plurality of sub-channels to transmit in response to the sequence of the first data.
Advantageous effects of the method according to any of the fifth aspects may correspond to those described in the first aspect, and are not described here again.
In a sixth aspect, an embodiment of the present invention provides a terminal device, which may also be a communication device, where the terminal device includes a processor, a transmitter, a receiver, and a memory, where the memory is configured to store a computer program and/or data, and the processor is configured to execute the computer program stored in the memory, so that the terminal device performs the following operations:
Transmitting, by the transmitter, first data to a first terminal device over a first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
and receiving, by the receiver, a first response sequence sent by the first terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used to respond to the data sent on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
In one embodiment, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located.
In one embodiment, the M code division multiplexing sequences are used for being averagely allocated to the N time slots, and each time slot in the N time slots is allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
In one embodiment, the M code division multiplexing sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexing sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e-j*(2*π/M)*n,n=0,1,2,3,…,M-1
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in one embodiment, the P ACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks, and the P NACK sequences allocated in the ith time slot of the N time slots are sequences with P consecutive index marks.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
Wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith time slot,at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
In one embodiment, the transmitting, by the transmitter, the first data to the first terminal device on the first time slot includes: the first data is transmitted to the first terminal device by the transmitter occupying a plurality of sub-channels on a first time slot.
Advantageous effects of the method according to any of the sixth aspects may correspond to those described in the first aspect, and are not described here again.
In a seventh aspect, an embodiment of the present invention provides a communication system, which includes a first terminal device and a second terminal device, where the first terminal device is a terminal device according to any one of the third aspect, and the second terminal device is a terminal device according to any one of the fourth aspect.
In an eighth aspect, an embodiment of the present invention provides a communication system, which includes a first terminal device and a second terminal device, where the first terminal device is a terminal device in any one of the fifth aspects, and the second terminal device is a terminal device in any one of the sixth aspects.
In a ninth aspect, an embodiment of the present invention provides a computer readable storage medium or a nonvolatile storage medium, in which a computer program is stored, the computer program being executed by a processor to implement the communication method according to any one of the first aspects.
In a tenth aspect, embodiments of the present invention provide a computer readable storage medium or a nonvolatile storage medium storing a computer program that is executed by a processor to implement the communication method according to any one of the second aspects.
In an eleventh aspect, embodiments of the present invention provide a computer program product, which when read and executed by a computer, performs any one of the above first aspect or any one of the above second aspect of the communication method.
In a twelfth aspect, embodiments of the present invention provide a computer program which, when executed on a computer, causes the computer to implement the communication method of any one of the first aspect or any one of the second aspect.
In a thirteenth aspect, an embodiment of the present invention provides a communication chip, including a processor and a communication interface, configured to perform the method of any one of the first aspect or any one of the second aspect.
In summary, by the method of the above embodiment, a method is designed in which N time slots share one time-frequency resource to transmit a response sequence of received data. The scheme achieves the aim of code division multiplexing by using a mode of phase rotation in a frequency domain or cyclic shift in a time domain. So that each time slot can be assigned to a corresponding response sequence. When unicast, multicast and broadcast coexist in one resource pool, no extra signaling overhead is needed, and corresponding time-frequency resources are allocated to each time slot in advance. In addition, considering that the response sequences sent by the devices in multicast or broadcast have certain consistency, NACK and ACK sequences in the response sequences corresponding to one feedback time slot are respectively continuous, so that the interference between the NACK and the ACK sequences is reduced.
Drawings
Fig. 1 is a schematic diagram of a system architecture used in a communication method according to an embodiment of the present disclosure;
fig. 2 is an interaction flow diagram of a communication method according to an embodiment of the present disclosure;
Fig. 3 is a schematic diagram of a system frame structure in the communication method according to the embodiment of the present disclosure;
fig. 4 is a schematic diagram of phase rotation in the communication method according to the embodiment of the present disclosure;
fig. 5 is a schematic diagram of a phase distribution of a sequence in the communication method according to the embodiment of the present invention;
fig. 6 is a schematic phase distribution diagram of another sequence in the communication method according to the embodiment of the present invention;
fig. 7 is a schematic phase distribution diagram of another sequence in the communication method according to the embodiment of the present invention;
fig. 8 is a schematic logic structure diagram of a terminal device according to an embodiment of the present application;
fig. 9 is a schematic hardware structure of a terminal device according to an embodiment of the present application;
fig. 10 is a schematic logic structure diagram of another terminal device according to an embodiment of the present application;
fig. 11 is a schematic hardware structure of another terminal device according to an embodiment of the present application;
fig. 12 is a schematic structural diagram of a communication chip according to an embodiment of the present application.
Detailed Description
In order to enable those skilled in the art to better understand the present invention, the following description is made with reference to the accompanying drawings in the embodiments of the present application.
An exemplary system architecture to which a communication method provided in the embodiment of the present invention is applicable is described below. Referring to fig. 1, the system architecture shown in fig. 1 includes a plurality of vehicle devices that may communicate therebetween by unicast, multicast, or broadcast means. For example, in fig. 1, the device 1 sends data to the device 2, the device 3, and the device 4, and after receiving the data, the device 2, the device 3, and the device 4 decode the data, and if the decoding is correct, send response information that is acknowledgement character (acknowledge character, ACK) that is decoded correctly to the device 1, and if the decoding is incorrect, send response information that is negative acknowledgement character (negative acknowledge, NACK) that is decoded incorrectly to the device 1.
The embodiment of the invention can be applied to the scene of the Internet of vehicles such as the communication V2P of vehicles and pedestrians, the communication V2I of vehicles and infrastructures and the like besides the scene of the communication V2V of vehicles and vehicles. In addition, the embodiment of the invention can be applied to the scenes of Internet of things such as communication V2N between the vehicle and the network and interconnection of household appliances.
The communication device of the embodiment of the invention can comprise a vehicle-mounted communication module or other embedded communication modules, can also be handheld communication devices including mobile phones, tablet computers and the like, and can also comprise devices in the internet of things such as roadside units (RSUs), household appliances and the like.
Based on the above description, a communication method provided by the embodiment of the present application is described below with reference to the accompanying drawings.
Referring to fig. 2, an interaction flow diagram of a communication method provided in an embodiment of the present application is shown. The method of fig. 2 may include the steps of:
step 201, the second terminal device transmits first data to the first terminal device.
Specifically, the second terminal device may transmit the first data to the first terminal device in a first time slot, where the first time slot is one of N time slots, where the N time slots are transmission time slots, and where N is an integer greater than or equal to 1.
In a specific embodiment, the first terminal device and the second terminal device in the above steps may be the vehicle device shown in fig. 1, or may be a device in the internet of vehicles or the internet of things described above.
Step 202, the first terminal device receives the first data transmitted by the second terminal device.
Step 203, the first terminal device transmits a first response sequence to the second terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of M code division multiplexing sequences allocated to the first time slot, and the M code division multiplexing sequences are used for responding to the data transmitted on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
Specifically, the first terminal device decodes the first data to obtain a decoding result, and then sends a first response sequence to the second terminal device on a first time-frequency resource according to the decoding result.
Step 204, the second terminal device receives the first response sequence.
In a specific embodiment, the N time slots may be N transmission units that are consecutive in the time domain, or N transmission units that are consecutive in the logic. The transmitting unit may be 1 subframe, or a slot, or other time-frequency resource configured by the system for one transmission. The specific value of N may be configured by a system, for example, a Sidelink (SL), according to the actual situation, which is not limited in this scheme.
In a specific embodiment, the M code division multiplexing sequences may be allocated to N time slots by the base station according to an allocation rule when the network is deployed. Or may be configured to the N time slots according to a specific protocol at the time of deployment of the network. Or may be distributed later by the base station after network deployment is complete. Or may be configured according to a specific protocol later in the network deployment. The specific allocation time and by whom the allocation is made may be determined according to the specific circumstances, and the present solution is not limited thereto.
When a device transmits data over the N slots, the device receiving the data may reply with the pre-assigned sequence to correctly decode the data. According to the embodiment of the application, the appointed response sequence is sent in the appointed time-frequency resource through pre-allocation, and the network equipment is not required to issue the resource scheduling control signaling, so that the network overhead is saved.
In the following description, the device that receives data in the N time slots may be the first terminal device described in fig. 2, and the device that transmits data in the N time slots may be the second terminal device described in fig. 2.
The following describes how to allocate the response sequence over the above-mentioned N time slots.
See the system frame structure diagram shown in fig. 3. A schematic diagram of the n=1, 2,4 time frame structure is exemplarily given in fig. 3. Wherein the time slot denoted by a is the above-mentioned N time slots, and side-link shared information may be transmitted through a side-link physical layer shared channel (physical sidelink share channel, PSCCH) and side-link control information may be transmitted through a side-link physical layer control channel (physical sidelink coNtrol channel, PSCCH) in these time slots. The time slot numbered c is the resultant response allocated to the system for transmitting whether the received data is properly decoded over the time slot via the physical layer feedback channel (physical sidelink feedback channel, PSFCH) of the uplink. The reference symbol b is the gap between time slot a and time slot c.
In fig. 3, it can be found that the system allocates a PSFCH to the N time slots, and is configured to respond to data transmitted in the N time slots (hereinafter, for convenience of description, the data transmitted in the N time slots is referred to as target data), that is, response information transmitted by one or more devices to receive the target data is transmitted in the same time-frequency resource (the time-frequency resource may be the first time-frequency resource described in fig. 2). Considering that different communication systems can coexist, N time slots are defined as logically consecutive time slots, and the mapping relationship between the N time slots and their corresponding feedback resources is configured or preconfigured by the system. The corresponding feedback resource includes a time-frequency resource for transmitting the response information of the target data. Then, in order to fully utilize the time-frequency resource to send the response information, the embodiment of the application adopts a code division multiplexing mode to send the response information on the time-frequency resource.
Further, since the data transmission manner in the above-described N slots may be one or more of unicast, multicast and broadcast. For example, each of the N time slots may transmit data in a unicast, multicast or broadcast manner, or may be in a unicast manner in which some time slots transmit data in a multicast manner, or in other manners in which the three data transmission manners are used in combination. Since the system cannot predict whether the information transmitted in one time slot in the future is unicast, multicast or broadcast, if the feedback time-frequency resource is allocated to each time slot in a frequency division manner, when the data in one time slot is transmitted in a broadcast manner, that is, no response is required to the received data, the time-frequency resource is wasted. If the corresponding time-frequency resource is allocated to each time slot in the code division multiplexing mode, when one or more time slots in the N time slots are broadcast or no signal is transmitted, other time slots carrying unicast or multicast service in the N time slots can use all time-frequency resource bandwidths, especially if only one time slot in the N time slots needs to feed back a response sequence, the receiving device equivalent to the time slot can independently share the first time-frequency resource, thereby maximally using the time-frequency resource.
In the embodiment of the application, the code division multiplexing sequence is adopted as the response sequence, and different information is responded by adopting different sequences. Similar to the format 0 format sequence in five formats of the NR physical uplink control channel (physical uplink control channel, PUCCH), this embodiment also uses a zadoff-chu sequence with a low peak-to-average ratio as a base sequence. And different sequences are obtained as response sequences by performing cyclic shift in the time domain based on one base sequence, or the sequences with different phases are obtained as response sequences by performing phase rotation in the frequency domain based on one base sequence. This is because, from the time-frequency domain nature of the signals, the phase rotation of a signal in the frequency domain is equivalent to the cyclic shift of the signal in the time domain.
The phase rotation needs to be performed by considering whether a plurality of sequences interfere with each other or are aliased when transmitted on the same time-frequency resource. Theoretically, 360 ° of the phase domain can be divided into infinity as long as it can be distinguished in phase. However, due to the multipath effect of the channel, a transmitted signal has a time domain prolongation at the receiving end, that is, a signal offset in phase is caused, so when the multiple signals are not distinguished in phase sufficiently, the phase rotation can cause aliasing of multiple users, that is, seriously affects the detection probability. Therefore, when a sequence is multiplexed by phase rotation, the maximum number of sequences that can be multiplexed needs to consider the maximum transmission delay caused by the channel characteristics and the communication range.
The total sequence obtained by performing phase rotation on one base sequence in the frequency domain based on the above phase rotation theory may be referred to as a phase quadrature sequence. These phase orthogonal sequences are multiplexed onto the same time-frequency resource for transmission, and may be referred to as code division multiplexed sequences.
In the embodiment of the present application, the phases of the two sequences are not necessarily orthogonal, and the phases of the two sequences may be said to be orthogonal as long as the two sequences can be distinguished and correctly detected at the receiving end.
To facilitate understanding of the concept of phase rotation described above, reference may be made to a phase rotation schematic diagram exemplarily shown in fig. 4. In fig. 4, assuming that the initial phase of the base sequence is 0 and 12 sequences can be code-division multiplexed on the same channel, the phase difference between adjacent two sequences of the 12 sequences is 2pi/12=pi/6. Then. The phase rotation is carried out on the basis of the phase of the base sequence being 0 by 1 times pi/6, 2 times pi/6, 3 times pi/6, … and 11 times pi/6 to obtain other code division multiplexing sequences.
The following describes by way of example how to allocate a response sequence over the above-mentioned N time slots using one subchannel.
In the embodiment of the present application, it is assumed that the total number of sequences that can be multiplexed theoretically is M' according to the above-mentioned phase rotation method on one time domain symbol of one subchannel, but since each device that receives data needs to allocate two sequences, one sequence is used for replying to acknowledgement information that is ACK that is decoded correctly when decoding the data correctly, and the other sequence is used for replying to information that is NACK that is decoded incorrectly when decoding the data incorrectly. In addition, in one embodiment, the M 'sequences may be designed to be equally allocated to the N slots, and then the number of response sequences actually available for the sub-channel is m=floor (M'/(2*N))x 2*N. Wherein floor is a "round down" function, i.e., taking an integer no greater than M'/(2*N). For example, if it is assumed that M ' =17, n=2, then M '/(2*N) =4.25, floor (M '/(2*N))=4. The specific values of M' and N are determined according to practical situations, and are only illustrative. In this embodiment, however, the value of M may be an even number greater than or equal to 2.
Assuming that the base sequence in the sequence multiplexed on the above sub-channel is γ, the M sequences multiplexed on the above sub-channel can be expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1 (1)
Wherein n represents index numbers of the M sequences.
The M sequences multiplexed in the above sub-channels can also be expressed as:
r(n)=γ*e -j*θ*n ,n=0,1,2,3,…,M-1 (2)
wherein θ=2 pi/M. The phase difference between the two sequences r (j) and r (j+1) adjacent to each other with the index marks of any two sequences is θ. For example, the phase difference between the sequence r (0) and the sequence r (1) is θ. Where j may take on values of 0,1,2, …, M-2.
In one embodiment, the M sequences multiplexed on the sub-channel are equally allocated to the N slots for allocation to a device receiving data transmitted on the N slots, and then each slot is allocated M/N sequences. In addition, since each device receiving data in the above N time slots needs to allocate two sequences as response sequences, the M/N sequences allocated in each time slot may be divided into p=m/(2*N) pairs of sequences, which may be used for allocation to P devices. Each of the P sequence pairs includes an ACK sequence and a NACK sequence. Namely, P sequences in M/N sequences allocated on each time slot are ACK sequences and P NACK sequences.
Based on the above description, assuming that the slot numbers of the N slots are denoted by i, i=0, 1,2, …, N-1. In one embodiment, the M/N sequences allocated by the ith slot of the N slots may be expressed as:
Wherein, m is as described above 0 Representing the initial phase, m, of the base sequence gamma 0 The value of (2) may be configured by the system or network side. m is m 0 The value of (2) may be set to 0 by default, in which case the M/N sequences allocated by the ith slot of the N slots are expressed as:
note that 2×pi/M in the above formula (3) and formula (4) may be represented by θ.
As can be seen from the above formula (3) or formula (4), the M/N sequences allocated to the i-th slot of the N slots are sequences having consecutive index numbers among the M sequences multiplexed in the sub-channel. In addition, the M/N sequences allocated by the (i+1) th time slot in the N time slots are sequences obtained by adding 2P to the index label of each of the M/N sequences allocated by the (i) th time slot in the N time slots. For example, assuming that m=16 and n=2, each of the N slots is allocated with 8 sequences. The 8 sequences allocated by the i=0 time slot in the N time slots are the 8 sequences with index numbers n=0, 1,2,3,4,5,6 and 7, and the 8 sequences allocated by the i=1 time slot in the N time slots are the 8 sequences with index numbers n=8, 9,10,11,12,13,14 and 15. Of course, 4 of the 8 sequences allocated per slot are ACK sequences, and the other 4 are NACK sequences. Here, the values of M and N are merely exemplary, and the present solution is not limited thereto according to the actual situation.
In one possible embodiment, the M/N sequences allocated in the ith slot of the N slots are sequences with consecutive index numbers among the M sequences multiplexed in the subchannel, and the M/(2*N) P ACK sequences among the M sequences are also sequences with consecutive index numbers among the M sequences, and the P NACK sequences are also sequences with consecutive index numbers among the M sequences. In addition, P ACK sequences and P NACK sequences may constitute P sequence pairs.
For example, based on the above example, among the 8 sequences of index marks n=0, 1,2,3,4,5,6,7 allocated in the i=0 th slot of the N slots, the sequence of index marks n=0, 1,2,3 is an ACK sequence, the sequence of index marks n=4, 5,6,7 is a NACK sequence, or the sequence of index marks n=0, 1,2,3 is a NACK sequence, and the sequence of index marks n=4, 5,6,7 is an ACK sequence. Index numbers 0 and 4 may form a sequence pair, index numbers 1 and 5 may form a sequence pair, index numbers 2 and 6 may form a sequence pair, and index numbers 3 and 7 may form a sequence pair. Or other combinations of 4 sequence pairs are possible. The present embodiment is only illustrative, and the specific ordering is not limited according to the actual situation.
In a specific embodiment, in a case where index marks of the ACK sequence and the NACK sequence allocated in each of the above-mentioned slots are consecutive, respectively, M/N sequences allocated in the i-th slot of the above-mentioned N slots may be expressed as:
where ρ=0, 1,2, …, P-1. Alternatively, at m 0 In the case where the default value of (1) is 0, the M/N sequences allocated to the ith slot of the N slots may be expressed as:
note that 2×pi/M in the above formula (5) and formula (6) may be represented by θ.
As can be seen from the above equation (5) or equation (6), in the above ith slot, m cs In the case of P, the calculated sequence is the sequence with consecutive index marks of P, where m cs The calculated sequence in the case of =ρ+p is the sequence with consecutive index numbers of the other P. At m cs The calculated sequence is ACK sequence in case of =ρ, at m cs The calculated sequence is a NACK sequence in the case of =ρ+p. Or, alternatively, at m cs The calculated sequence is NACK sequence in case of =ρ, at m cs The calculated sequence is an ACK sequence in the case of =ρ+p. The specific ordering allocation is specific to the actual situation, and the present solution is not limited to this.
In addition, m is as described above cs Response sequence generated when =ρ and m as described above cs The response sequences generated when=ρ+p constitute one response sequence pair.
In a specific embodiment, the above equation (5) may be decomposed into two equations, which represent the ACK sequence and NACK sequence, respectively. The decomposition of equation (5) yields the following equation:
p sequences with consecutive index numbers among the M sequences are obtained through the formula (7) and the formula (8). Similarly, the P sequences obtained in the formula (7) may be ACK sequences, and the sequence obtained in the formula (8) may be NACK sequences. The P sequences obtained in the formula (7) may be NACK sequences, and the sequence obtained in the formula (8) may be ACK sequences. The specific ordering allocation is determined according to the actual situation, and the scheme is not limited to the specific ordering allocation.
In order to facilitate understanding that the M/N sequences allocated to each of the N slots are sequences with consecutive index marks, and index marks of the P ACK sequences and the NACK sequences in the M/N sequence sequences are respectively consecutive, see fig. 5. FIG. 5 shows an example of m 0 A schematic diagram of the phase distribution of the sequence calculated by the above formula (5) or formula (6) or by the formulas (7) and (8) when configured as 0.
The ACK sequence and NACK sequence in each slot can be seen to be consecutive in fig. 5. Specifically, the index of the P NACK sequences in time slot 0 is numbered 0,1,2, …, and the index of the P-1, P ACK sequences is numbered P, P+1, P+2, …,2P-1. The index of the P NACK sequences in slot 1 is numbered 2P,2P+1,2P+2, …,3P-1, and the index of the P ACK sequences is numbered 3P,3P+1,3P+2, …,4P-1. In addition, in fig. 5, the sequence with index number 0 and phase 0 is a base sequence, and since each of the latter sequences is obtained by phase-rotating the base sequence in the frequency domain, and the sequences obtained by phase-rotating are each obtained by shifting 2 pi/M based on the previous sequence, the phase difference between each two adjacent sequences is θ=2 pi/M.
In addition, it can be seen in fig. 5 that the sequence at the beginning of each slot is calculated at ρ=0, and that the sequences at the beginning of each of P ACKs and P NACKs in each slot are also calculated at ρ=0.
In one possible implementation manner, the M/N sequences allocated by the ith time slot in the N time slots, that is, the P sequence pairs, each sequence pair may be formed by two sequences calculated when ρ is the same by the above formula (7) and the formula (8). I.e., p=0, the two sequences calculated by the above-described formula (7) and formula (8) are one sequence pair, i.e., p=1, the two sequences calculated by the above-described formula (7) and formula (8) are one sequence pair, and so on until p=p-1, the two sequences calculated by the above-described formula (7) and formula (8) are one sequence pair, thereby obtaining P sequence pairs.
In a specific embodiment, after the P sequence pairs are allocated to the ith slot, when a device transmits data to a plurality of devices in the ith slot, the sequence pairs may be allocated to the plurality of devices in the order of the sequence pairs calculated by ρ=0, 1,2, …, and P-1 for feeding back a response sequence to the device transmitting data. For example, assuming that 1 transmits data to the devices 2 and 3 on the i-th slot, the calculated sequence of ρ=0 may be allocated to the device 2, and the calculated sequence of ρ=1 may be allocated to the device 3.
Based on the above-described manner in which sequences can be allocated to devices for feeding back response sequences to the devices transmitting data in the order of pairs of sequences calculated by ρ=0, 1,2, …, P-1, two possible optimized embodiments are described below, which can reduce to some extent interference between sequences transmitted on the same time-frequency resource on the basis of the above-described embodiments of sequence allocation.
In a first possible embodiment, assuming that the i-th slot of the N slots is a multicast transmission mode and the i+1-th slot is a unicast transmission mode, the sequence allocated for feedback by the device receiving data in the i+1-th slot is a sequence pair calculated when ρ=0 on the slot. According to the sequence allocation method shown in fig. 5, the phase of the sequence fed back by the device receiving data in the (i+1) th time slot is closer to the phase of the last sequence of the response sequence of the (i) th time slot, that is, the phase difference is smaller, and the device is easy to interfere with each other.
To reduce this interference, it is possible to reduce the interference by assigning the sequences assigned in the respective slots to the devices without having to assign them from the smallest index number to the largest index number from the smallest index number, by starting from the second or third or fourth index number of the sequence, etc., and then assigning them from the smallest index number to the largest index number in the slot, and then assigning them from the smallest index number to the largest index number from the smallest index number until all the sequences have been assigned.
One possible solution to the above-mentioned interference is given by way of example below. First, the above m can be configured 0 =p/2, then the M/N sequences allocated by the ith slot of the N slots can be expressed as:
note that 2×pi/M in the above formula (9) may be represented by θ.
In the ith time slot, at m cs The response sequence obtained in the case of =ρ is P ACK sequences, m cs The response sequence obtained in the case of =ρ+p is P NACK sequences. Alternatively, in the ith slot, m cs The response sequence obtained in the case of =ρ is P NACK sequences, m cs The response sequence obtained in the case of =ρ+p is P ACK sequences.
M is as above cs Response sequence generated when =ρ and m as described above cs The response sequences generated when=ρ+p constitute one response sequence pair; when the P sequences generated above are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
Of course, m is as above 0 The value of (2) may also be configured as other values, e.g., m 0 =3p/2, etc., m 0 The range of values of (2) may be greater than or equal to 1, but less than 2*P and notAn integer equal to P. The specific how to take the value can be determined according to the actual situation, and the scheme is not limited to this.
For ease of understanding, see fig. 6. FIG. 6 shows the "in the ith slot, at m cs The response sequence obtained in the case of =ρ is P NACK sequences, m cs The case where p+p is the response sequence P ACK sequences "exemplifies the procedure of allocating sequences.
As can be seen in fig. 6, the index numbers of the P ACK sequences within slot 0 are no longer consecutive for the sequence allocated to the device by equation (9), because at the time of the sequence allocation, it is no longer allocated starting from the sequence with index number 0, but from the sequence with index number Q (Q may be m 0 ) But in order to reduce the interference between NACK and ACK, the NACK sequence and ACK sequence are sequences with consecutive index marks. Since the scheme starts to allocate from the NACK sequence, the index number of the NACK sequence is continuous. The P sequences are allocated as NACK sequences starting from index number Q, and the index number of the last sequence of the P sequences is q+p-1. And then starting to allocate the ACK sequence, starting from Q+P, and after the sequence with the largest index number in the time slot is allocated, returning to continue to allocate the sequence with the index number of 0 until P ACK sequences.
The allocation process in other time slots such as time slot 1 is similar to the allocation process for the device in time slot 0, and will not be described again. Such a design is also index-consecutive sequences within each slot, except that the NACK and ACK sequences within a slot will have a set of sequences that are not index-consecutive sequences.
Referring also to fig. 6, when a device transmits data in a multicast manner in slot 0 and transmits data in a unicast manner in slot 1, if a device receiving data in slot 1 decodes the data in error, a NACK sequence with index number 2p+q may be allocated as a response sequence. The minimum phase difference between the 2p+q NACK sequence and the sequence in slot 0 is θ (2p+q- (2P-1))=θ (q+1). As can be seen from fig. 5, the phase interval is increased by θ×q, so that interference is reduced and the probability of correct sequence detection is increased.
In addition, if the device receiving the data in the above slot 1 decodes the data correctly, an ACK sequence with index number q+3p may be allocated as a response sequence. As can be seen from fig. 5, the minimum phase difference between the ACK sequence of q+3p and the sequence in slot 0 is θ (q+3p- (2P-1))=θ ((p+q+1). As compared with fig. 5, the phase interval is also greatly increased by θ×q, so that interference is reduced and the probability of correct sequence detection is increased.
Of course, the foregoing is merely illustrative, and other possible embodiments exist and are not listed here.
A second possible embodiment, in the first possible embodiment described above, although the interference between sequences between slots is reduced in the example of fig. 6, since the index numbers of the ACK sequences are no longer consecutive, they are separated by the NACK sequences, which increases the interference between the ACK sequences and the NACK sequences within the same slot. To solve this problem, the arrangement of the ACK sequence and the NACK sequence in each slot may be adjusted such that the index marks of the ACK sequence and the NACK sequence are still continuous, respectively, while ensuring that interference of sequences between slots is reduced.
One possible solution to the above problem is given by way of example below. First of all, the above m can be configured 0 =p/2, then the M/N sequences allocated by the ith slot of the N slots can be expressed as:
/>
note that 2×pi/M in the above formula (10) may be represented by θ.
In the ith time slot, at m q The response sequence obtained in the case of=0 is an ACK sequence with consecutive index numbers of P, where m q The response sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
Alternatively, in the ith slot, m q The response sequence obtained in the case of =0 is P index marksConsecutive NACK sequences, at m q The response sequence obtained in the case of P is an ACK sequence with consecutive index numbers of P.
When ρ is equal, m is equal to q Response sequence generated when=0 and m as described above q The response sequences generated when P constitute one response sequence pair; when the P sequences generated above are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
Likewise, the same is true. In the embodiment of the application, m 0 The value of (2) may also be configured as other values, e.g., m 0 =p or m 0 =3p/2, etc., m 0 The range of values of (c) may be an integer greater than or equal to 1, but less than 2*P and not equal to P. The specific how to take the value can be determined according to the actual situation, and the scheme is not limited to this.
In a specific embodiment, the above formula (10) may be decomposed into two formulas, which respectively represent formulas of ACK sequence and NACK sequence. The decomposition of equation (10) yields the following equation:
p sequences with consecutive index numbers among the M sequences are obtained through the formula (11) and the formula (12). Similarly, the P sequences obtained in the formula (11) may be ACK sequences, and the sequence obtained in the formula (12) may be NACK sequences. The P sequences obtained in the formula (11) may be NACK sequences, and the sequence obtained in the formula (12) may be ACK sequences. The specific ordering allocation is determined according to the actual situation, and the scheme is not limited to the specific ordering allocation.
For ease of understanding, see fig. 7. FIG. 7 shows the same pattern as "m in the ith slot q The response sequence obtained in the case of =0 is a NACK sequence with consecutive index numbers of P, where m q The response sequence obtained in the case of =p is that P index labels are consecutiveThis case exemplifies the procedure of allocating sequences.
As can be seen in fig. 7, the sequences allocated to the devices by equation (10), or equation (11) and equation (12), the index labels of the ACK and NACK sequences within each slot are each consecutive. But the allocation of the sequence in fig. 7 is different from the allocation of the sequence in fig. 5. The following is an exemplary illustration of time slot 0.
In the time slot 0 of fig. 5, sequences are allocated to the apparatus in order of the index numbers from the pair of sequences having index numbers 0 and P to the apparatus 1, for example, the sequences having index numbers 0 and P are first used to the apparatus 1, then the sequences having index numbers 1 and p+1 are used to the apparatus 2, then the sequences having index numbers 2 and p+2 are used to the apparatus 3, and so on.
However, in the slot 0 of fig. 7, sequences are allocated to the devices in order from the pairs of the index marks G and p+g in order from the small index marks to the large index marks, and when pairs of the index marks P-1 and 2P-1 are allocated, the pairs of the index marks 0 and P may be returned to be allocated in order from the pairs of the index marks from the small index marks to the large index marks until the pairs of the sequences in the slots are allocated. For example, the sequences with index numbers G and p+g are used for the allocation device 1, then the sequences with index numbers g+1 and p+g+1 are used for the allocation device 2, then the sequences with index numbers g+2 and p+g+2 are used for the allocation device 3, and so on, and after the sequences with index numbers P-1 and 2P-1 are used for the allocation device w, the sequences with index numbers 0 and P are returned for the allocation device w+1, and so on.
The allocation process in other time slots such as time slot 1 is similar to the allocation process for the device in time slot 0, and will not be described again.
The index G in FIG. 7 may have a value of (m 0 mod P) mod M.
According to the sequence distribution method, under the condition that the interference of sequences among time slots is reduced, the interference between the ACK sequences and the NACK sequences in the time slots can be reduced.
Of course, the foregoing is merely illustrative, and other possible embodiments exist and are not listed here.
In one possible implementation manner, the signal bandwidth of each of the M code division multiplexing sequences is the same as the bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as the bandwidth of the subchannel in which the first time-frequency resource is located. . The design can fully utilize resources and can improve the probability of correct detection of signals.
In one possible implementation manner, the device occupies multiple sub-channels to transmit when transmitting data in the ith time slot in the N time slots, for example, occupies K sub-channels to transmit, where K is an integer greater than or equal to 2. If the device occupies the K sub-channels to send the data to another device alone, i.e. the communication between the device and the other device is unicast, in which case the other device, after receiving the data, may choose to send a response to whether the data is decoded in correct sequence to the device sending the data on the K sub-channels. The other device may also select one or more of the K sub-channels to transmit a sequence to the device transmitting the data that is correct in response to whether the data is decoded. The response sequence transmitted by the other device to the device transmitting the data is, of course, a sequence allocated to the other device based on the allocation method described above. Specific allocation is referred to the description of the above method embodiments, and will not be repeated here.
In one possible implementation, the device occupies multiple sub-channels to transmit when transmitting data in the ith slot of the N slots, for example, occupies K sub-channels to transmit. If the device occupies the K subchannels to send the data to the plurality of devices, that is, the communication between the device and the plurality of devices is multicast communication, that is, the data is multicast data, in this case, the plurality of devices may respectively occupy the K subchannels to send a sequence to the device that sends the data in response to whether the data is decoded correctly. This means that at most P response sequences can be sent on the K subchannels, since at most P pairs of sequences are allocated on the i-th slot, and each fed-back sequence occupies K subchannels to send.
In another possible embodiment, the plurality of devices may also each select one of the K subchannels to send a sequence to the device that sends the data in response to whether the data is decoded correctly. This means that at most k×p response sequences can be sent on the K subchannels, and this embodiment increases the capacity of the response sequence of the device in the multicast transmission mode in a frequency division multiplexing manner, so as to achieve the purpose of multicast expansion.
In another possible embodiment, the plurality of devices may select one or more sub-channels among the K sub-channels to transmit a correct sequence to the device transmitting the data in response to whether the data is decoded. The specific selection occupies a plurality of sub-channels to transmit the sequence is determined according to actual conditions, and the scheme is not limited for many times.
The response sequence transmitted from the plurality of devices to the device that transmits the data is a sequence allocated to the plurality of devices based on the allocation method. Specific allocation is referred to the description of the above method embodiments, and will not be repeated here.
By the method of the above embodiment, a method is designed in which N time slots share one time-frequency resource to transmit a response sequence for decoding the received data correctly. The scheme achieves the aim of code division multiplexing by using a mode of phase rotation in a frequency domain or cyclic shift in a time domain. So that each time slot can be assigned to a corresponding response sequence. When unicast, multicast and broadcast coexist in one resource pool, no extra signaling overhead is needed, and corresponding time-frequency resources are allocated to each time slot in advance. In addition, considering that the response sequences sent by the devices in multicast or broadcast have certain consistency, NACK and ACK sequences in the response sequences corresponding to one feedback time slot are respectively continuous, so that the interference between the NACK and the ACK sequences is reduced.
The above-described scheme provided in the embodiment of the present application is mainly described in terms of interaction between terminal apparatuses and how to allocate response sequences for the above-described N slots. It will be appreciated that each terminal device, in order to implement the above-described functions, includes corresponding hardware structures and/or software modules that perform each function. Those of skill in the art will readily appreciate that the various illustrative terminal devices and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The embodiment of the present application may divide the functional modules of the terminal device according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules may be implemented in hardware or in software functional modules. It should be noted that, in the embodiment of the present application, the division of the modules is schematic, which is merely a logic function division, and other division manners may be implemented in actual implementation.
Fig. 8 shows a schematic diagram of a possible logic structure of the first terminal apparatus involved in the above-described embodiment in the case where respective functional blocks are divided with corresponding respective functions, the first terminal apparatus 800 includes: a receiving unit 801 and a transmitting unit 802. Illustratively, the receiving unit 801 is configured to support the first terminal device to perform the steps of receiving information in the foregoing illustrated method embodiment. The transmitting unit 802 is configured to support the first terminal device to perform the steps of transmitting information in the foregoing illustrated method embodiment.
Optionally, the first terminal device 800 may further include a processing unit and a storage unit. The storage unit is used for storing computer programs and data. The processing unit may invoke the computer program and/or data of the storage unit such that the first terminal device 800 receives the first data from the second terminal device on the first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1; and then, according to the first data, transmitting a first response sequence to the second terminal device on a first time-frequency resource, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used for responding to the data transmitted on the N time slots on the first time-frequency resource, and M is integer multiple of N.
In a hardware implementation, the processing unit may be a processor or a processing circuit. The receiving unit 801 may be a transceiver unit, a transceiver, a receiver, or a receiving circuit or an interface circuit, etc. The transmitting unit 802 may be a transceiver unit, a transceiver, a transmitter, or a transmitting circuit or an interface circuit, etc. The memory unit may be a memory. The processing unit, the receiving unit, the transmitting unit and the storage unit may be integrated or coupled together or may be separated.
Fig. 9 is a schematic diagram of a possible hardware structure of the first terminal device according to the above embodiment provided in the embodiment of the present application. As shown in fig. 9, the first terminal apparatus 900 may include: one or more processors 901, one or more memories 902, a network interface 903, one or more receivers 905, one or more transmitters 906, and one or more antennas 907. These components may be connected by a bus 904 or other means, as illustrated in FIG. 9. Wherein:
the network interface 903 may be used for the first terminal apparatus 900 to communicate with other communication devices, such as network devices. In particular, the network interface 903 may be a wired interface.
The receiver 905 may also be used for performing reception processing, such as signal demodulation, on the mobile communication signal received by the antenna 907. The transmitter 906 may be used to perform transmission processing, such as signal modulation, on the signal output by the processor 901. In some embodiments of the present application, the receiver 905 may be considered a wireless demodulator and the transmitter 906 may be considered a wireless modulator. In the first terminal apparatus 900, the number of the receivers 905 may be one or more, and the number of the transmitters 906 may be one or more. The antenna 907 may be used to convert electromagnetic energy in a transmission line into electromagnetic waves in free space or to convert electromagnetic waves in free space into electromagnetic energy in a transmission line. The number of antennas 907 may be one or more.
The memory 902 may be coupled to the processor 901 via the bus 904 or input/output ports, or the memory 902 may be integrated with the processor 901. The memory 902 is used to store various software programs and/or sets of instructions or data. In particular, memory 902 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory 902 may store an operating system (hereinafter referred to as a system), such as an embedded operating system, for example, uCOS, vxWorks, RTLinux. The memory 902 may also store network communication programs that may be used to communicate with one or more additional devices, one or more user devices, and one or more network devices.
The processor 901 may be a central processor unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules, and circuits described in connection with this disclosure. The processor may also be a combination that performs certain functions, such as a combination comprising one or more microprocessors, a combination of a digital signal processor and a microprocessor, or the like.
In the present embodiment, the processor 901 may be used to read and execute computer readable instructions. Specifically, the processor 901 may be configured to invoke a program stored in the memory 902, for example, a program for implementing a communication method provided in one or more embodiments of the present application on the side of the first terminal device, and execute instructions included in the program.
It should be noted that, the first terminal apparatus 900 shown in fig. 9 is only one implementation manner of the embodiment of the present application, and in practical application, the first terminal apparatus 900 may further include more or fewer components, which is not limited herein. For the specific implementation of the first terminal apparatus 900, reference may be made to the description related to the foregoing illustrated method embodiment, which is not repeated here.
Fig. 10 shows a schematic diagram of a possible logic structure of the second terminal apparatus involved in the above-described embodiment in the case where respective functional blocks are divided with corresponding respective functions, the second terminal apparatus 1000 includes: a receiving unit 1001 and a transmitting unit 1002. The receiving unit 1001 is for supporting the second terminal device to perform the steps of receiving information in the method embodiment shown above. The transmitting unit 1002 is configured to support the second terminal apparatus to perform the step of transmitting information in the foregoing illustrated method embodiment.
Optionally, the second terminal device 1000 may further include a processing unit and a storage unit. The storage unit is used for storing computer programs and data. The processing unit may invoke the computer program and/or data of the storage unit such that the second terminal device 1000 sends the first data to the first terminal device on the first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1; then, the first terminal device receives a first response sequence sent on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N.
In a hardware implementation, the processing unit may be a processor or a processing circuit. The receiving unit 1001 may be a transceiver unit, a transceiver, a receiver, or a receiving circuit or an interface circuit, or the like. The transmitting unit 1002 may be a transceiver unit, a transceiver, a transmitter, or a transmitting circuit or an interface circuit, etc. The memory unit may be a memory. The processing unit, the receiving unit, the transmitting unit and the storage unit may be integrated or coupled together or may be separated.
Fig. 11 is a schematic diagram of a possible hardware structure of the second terminal device according to the above embodiment provided in the embodiment of the present application. As shown in fig. 11, the second terminal apparatus 1100 may include: one or more processors 1101, one or more memories 1102, a network interface 1103, one or more receivers 1105, one or more transmitters 1106, and one or more antennas 1107. These components may be connected by a bus 1104 or otherwise, as illustrated in FIG. 11. Wherein:
the network interface 1103 may be used for the second terminal apparatus 1100 to communicate with other communication devices, such as network devices. In particular, the network interface 1103 may be a wired interface.
The receiver 1105 may also be configured to perform reception processing, such as signal demodulation, on the mobile communication signal received by the antenna 1107. The transmitter 1106 may be used to perform transmission processing, such as signal modulation, on the signal output by the processor 1101. In some embodiments of the present application, the receiver 1105 may be considered a wireless demodulator and the transmitter 1106 may be considered a wireless modulator. In the second terminal apparatus 1100, the number of the receivers 1105 may be one or more, and the number of the transmitters 1106 may be one or more. The antenna 1107 may be used to convert electromagnetic energy in a transmission line into electromagnetic waves in free space or to convert electromagnetic waves in free space into electromagnetic energy in a transmission line. The number of antennas 1107 may be one or more.
The memory 1102 may be coupled to the processor 1101 through a bus 1104 or input/output ports, and the memory 1102 may be integrated with the processor 1101. Memory 1102 is used to store various software programs and/or sets of instructions or data. In particular, memory 1102 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory 1102 may store an operating system (hereinafter referred to as a system), such as an embedded operating system, for example uCOS, vxWorks, RTLinux. Memory 1102 may also store network communication programs that may be used to communicate with one or more additional devices, one or more user devices, and one or more network devices.
The processor 1101 may be a central processor unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules, and circuits described in connection with this disclosure. The processor may also be a combination that performs certain functions, such as a combination comprising one or more microprocessors, a combination of a digital signal processor and a microprocessor, or the like.
In the present embodiment, the processor 1101 may be configured to read and execute computer readable instructions. In particular, the processor 1101 and the communication chip 1200 may be configured to invoke a program stored in the memory 1102, for example, a program for implementing a communication method provided in one or more embodiments of the present application on the second terminal device side, and execute instructions included in the program.
It should be noted that, the second terminal apparatus 1100 shown in fig. 11 is only one implementation manner of the embodiment of the present application, and in practical application, the second terminal apparatus 1100 may further include more or fewer components, which is not limited herein. For the specific implementation of the second terminal apparatus 1100, reference may be made to the description related to the foregoing illustrated method embodiment, which is not repeated here.
A further aspect of the present application provides a communication system comprising one or more first terminal devices, which may be the first terminal device 800 described in fig. 8, and one or more second terminal devices, which may be the second terminal device 1000 described in fig. 10. Alternatively, the first terminal device may be the first terminal device 900 illustrated in fig. 9, and the second terminal device may be the second terminal device 1100 illustrated in fig. 11.
Referring to fig. 12, fig. 12 shows a schematic structural diagram of a communication chip provided in the present application. As shown in fig. 12, the communication chip 1200 may include: a processor 1201, and one or more interfaces 1202 coupled to the processor 1201. Wherein:
the processor 1201 may be used to read and execute computer readable instructions. In a specific implementation, the processor 1201 may mainly include a controller, an operator, and a register. The controller is mainly responsible for instruction decoding and sending out control signals for operations corresponding to the instructions. The arithmetic unit is mainly responsible for performing fixed-point or floating-point arithmetic operations, shift operations, logic operations, and the like, and may also perform address operations and conversions. The register is mainly responsible for storing register operands, intermediate operation results and the like temporarily stored in the instruction execution process. In particular implementations, the hardware architecture of the processor 1201 may be an application specific integrated circuit (application specific integrated circuits, ASIC) architecture, a microprocessor (microprocessor without interlocked piped stages architecture, MIPS) architecture of an interlocking-less pipeline stage architecture, an advanced reduced instruction set machine (advanced RISC machines, ARM) architecture, or an NP architecture, among others. Processor 1201 may be single-core or multi-core.
The interface 1202 may be used to input data to be processed to the processor 1201, and may output a processing result of the processor 1201 to the outside. In particular implementations, interface 1202 may be a general purpose input output (general purpose input output, GPIO) interface that may be coupled to a plurality of peripheral devices, such as a display (LCD), a Radio Frequency (RF) module, and the like. The interface 1202 may be coupled to the processor 1201 by a bus 1203.
In this application, the processor 1201 may be configured to invoke, from the memory, an implementation program of the communication method provided in one or more embodiments of the present application on the side of the first terminal device or the second terminal device, and execute instructions included in the program. The memory may be integrated with the processor 1201, in which case the memory is part of the communication chip 1200. Alternatively, the memory is an element external to the communication chip 1200, and the processor 1201 calls instructions or data stored in the memory through the interface 1202.
The interface 1202 may be used to output results of execution by the processor 1201. The communication method provided in one or more embodiments of the present application may refer to the foregoing embodiments, and will not be described herein.
In one possible embodiment, the communication Chip 1200 may be a System on a Chip (SoC).
It should be noted that, the functions corresponding to the processor 1201 and the interface 1202 may be implemented by a hardware design, a software design, or a combination of hardware and software, which is not limited herein.
The embodiment of the present invention also provides a computer-readable storage medium storing a computer program that is executed by a processor to implement any one of the aforementioned communication methods on the first terminal device side.
The embodiment of the present invention also provides a computer-readable storage medium storing a computer program that is executed by a processor to implement any one of the aforementioned communication methods on the second terminal apparatus side.
The embodiments of the present invention also provide a computer program product, which when read and executed by a computer, performs any one of the foregoing on the first terminal device side or any one of the foregoing on the second terminal device side.
The embodiment of the invention also provides a computer program which, when executed on a computer, causes the computer to implement any one of the above-mentioned communication methods on the first terminal device side or any one of the above-mentioned communication methods on the second terminal device side.
The first terminal device or the second terminal device of the embodiment of the present invention may be replaced by a communication device.
In summary, by the method of the above embodiment, a method is designed in which N time slots share a time-frequency resource to transmit a response sequence indicating whether the received data is decoded correctly. The scheme achieves the aim of code division multiplexing by using a mode of phase rotation in a frequency domain or cyclic shift in a time domain. So that each time slot can be assigned to a corresponding response sequence. When unicast, multicast and broadcast coexist in one resource pool, no extra signaling overhead is needed, and corresponding time-frequency resources are allocated to each time slot in advance. In addition, considering that the response sequences sent by the devices in multicast or broadcast have certain consistency, NACK and ACK sequences in the response sequences corresponding to one feedback time slot are respectively continuous, so that the interference between the NACK and the ACK sequences is reduced.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present invention are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, by wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)), or wireless (e.g., infrared, wireless, microwave, etc.) means from one website, computer, server, or data center. Computer readable storage media can be any available media that can be accessed by a computer or data storage devices, such as servers, data centers, etc., that contain an integration of one or more available media. Usable media may be magnetic media (e.g., floppy disks, hard disks, magnetic tape), optical media (e.g., DVD), or semiconductor media (e.g., solid State Disk (SSD)), among others.
In summary, the above embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (47)

1. A method of communication, comprising:
the first terminal device receives first data from the second terminal device on a first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
the first terminal device sends a first response sequence to the second terminal device on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N.
2. The method of claim 1, wherein a signal bandwidth of each of the M code division multiplexing sequences is the same as a bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as a bandwidth of a subchannel in which the first time-frequency resource is located.
3. The method according to claim 1 or 2, wherein the M code division multiplexing sequences are used for being equally allocated to the N time slots, each of the N time slots being allocated M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
4. A method according to claim 3, wherein the M code division multiplexed sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexed sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
5. The method of claim 4, wherein the M/N code division multiplexing sequences allocated by the ith slot of the N slots are expressed as:
Wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
6. the method according to claim 4 or 5, wherein P ACK sequences allocated by the ith slot in the N slots are sequences with P consecutive index marks, and P NACK sequences allocated by the ith slot in the N slots are sequences with P consecutive index marks.
7. The method of claim 6, wherein the M/N code division multiplexing sequences allocated by the ith slot of the N slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
8. The method of claim 4, wherein the M/N code division multiplexing sequences allocated by the ith slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs When =ρThe generated code division multiplexing sequence and the m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
9. The method of claim 4, wherein the M/N code division multiplexing sequences allocated by the ith slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
10. The method of any of claims 1,2, 4, 5, 7 to 9, wherein the first data is received by the first terminal device on a plurality of sub-channels, wherein the first terminal device transmitting a first response sequence to the second terminal device on a first time-frequency resource according to the first data comprises:
In the case where the communication between the second terminal device and the first terminal device is unicast communication, the first terminal device selects one subchannel from the plurality of subchannels according to the first data, and transmits the first response sequence to the second terminal device on the first time-frequency resource;
or, in the case where the communication between the second terminal device and the first terminal device is unicast communication, the first terminal device transmits the first response sequence to the second terminal device on the first time-frequency resource according to the first data occupying the plurality of sub-channels.
11. The method according to any one of claims 1, 2, 4, 5, 7 to 9, wherein the first data is received by the first terminal device on a plurality of sub-channels, and wherein each of the receiving devices of the multicast occupies the plurality of sub-channels to transmit in response to a sequence of the first data in case the first data is multicast data;
or, in the case that the first data is multicast data, each device of all receiving devices of the multicast occupies one channel of the plurality of sub-channels to transmit in response to the sequence of the first data.
12. A method of communication, comprising:
the second terminal device transmits first data to the first terminal device on the first time slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
the second terminal device receives a first response sequence sent by the first terminal device on a first time-frequency resource according to the first data, wherein the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, the M code division multiplexing sequences are used for responding to the data sent on the N time slots on the first time-frequency resource, and M is integer multiple of N.
13. The method of claim 12, wherein a signal bandwidth of each of the M code division multiplexing sequences is the same as a bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as a bandwidth of a subchannel in which the first time-frequency resource is located.
14. The method according to claim 12 or 13, wherein the M code division multiplexing sequences are used for being equally allocated to the N time slots, each of the N time slots being allocated M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
15. The method according to claim 14, wherein the M code division multiplexed sequences are obtained by cyclic shift in the time domain from one base sequence γ, or the M code division multiplexed sequences are obtained by phase rotation in the frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e-j*(2*π/M)*n,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
16. The method of claim 15, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
17. the method according to claim 15 or 16, wherein P ACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks, and P NACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks.
18. The method of claim 17, wherein the M/N code division multiplexed sequences allocated by the i-th slot of the N slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs Code division multiplexing obtained in case of =ρNACK sequence with sequence of P index labels contiguous, m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
19. The method of claim 15, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
20. The method of claim 15, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
21. The method of any of claims 12, 13, 15, 16, 18 to 20, wherein the second terminal device transmitting first data to the first terminal device on a first time slot comprises:
the second terminal device occupies a plurality of sub-channels on a first time slot to transmit the first data to the first terminal device.
22. A terminal apparatus, comprising:
a receiving unit configured to receive first data from a second terminal apparatus on a first slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
A transmitting unit, configured to transmit a first response sequence to the second terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used to respond to data transmitted on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
23. The terminal device of claim 22, wherein a signal bandwidth of each of the M code division multiplexing sequences is the same as a bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as a bandwidth of a subchannel in which the first time-frequency resource is located.
24. The terminal device according to claim 22 or 23, wherein the M code division multiplexing sequences are used for being equally allocated to the N time slots, each of the N time slots being allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
25. The terminal apparatus according to claim 24, wherein the M code division multiplexed sequences are obtained by cyclic shift in a time domain from one base sequence γ, or the M code division multiplexed sequences are obtained by phase rotation in a frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e -j*(2*π/M)*n ,n=0,1,2,3,…,M-1
wherein n represents index labels of the M code division multiplexing sequences;
and M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
26. The terminal device of claim 25, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
27. the terminal device according to claim 25 or 26, wherein P ACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks, and P NACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks.
28. The terminal device of claim 27, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs Code division multiplexing obtained in case of =ρACK sequence with sequence of P index labels continuing, at m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
29. The terminal device of claim 25, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
30. The terminal device of claim 25, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
31. The terminal device according to any of the claims 22, 23, 25, 26, 28 to 30, wherein the first data is received by the terminal device on a plurality of sub-channels, the transmitting unit being specifically configured to:
when the communication between the second terminal device and the terminal device is unicast communication, selecting one sub-channel from the plurality of sub-channels according to the first data, and transmitting the first response sequence to the second terminal device on the first time-frequency resource;
Or, in the case where the communication between the second terminal device and the terminal device is unicast communication, the first response sequence is transmitted to the second terminal device on the first time-frequency resource according to the first data occupying the plurality of sub-channels.
32. The terminal apparatus according to any one of claims 22, 23, 25, 26, 28 to 30, wherein the first data is received by the terminal apparatus on a plurality of sub-channels, and wherein each of the receiving devices of the multicast occupies the plurality of sub-channels to transmit in response to a sequence of the first data in case the first data is multicast data;
or, in the case that the first data is multicast data, each device of all receiving devices of the multicast occupies one channel of the plurality of sub-channels to transmit in response to the sequence of the first data.
33. A terminal apparatus, comprising:
a transmission unit configured to transmit first data to a first terminal device on a first slot; the first time slot is one time slot in N time slots, and N is an integer greater than or equal to 1;
a receiving unit, configured to receive a first response sequence sent by the first terminal device on a first time-frequency resource according to the first data, where the first response sequence is one of sequences allocated to the first time slot in M code division multiplexing sequences, and the M code division multiplexing sequences are used to respond to data sent on the N time slots on the first time-frequency resource, and M is an integer multiple of the N.
34. The terminal device of claim 33, wherein a signal bandwidth of each of the M code division multiplexing sequences is the same as a bandwidth of the first time-frequency resource, and the bandwidth of the first time-frequency resource is the same as a bandwidth of a subchannel in which the first time-frequency resource is located.
35. The terminal device according to claim 33 or 34, wherein the M code division multiplexing sequences are used for being equally allocated to the N time slots, each of the N time slots being allocated with M/N code division multiplexing sequences; the M/N code division multiplexing sequences are used for allocation to p=m/(2*N) devices; each of the P devices is assigned two sequences, where the two sequences include an ACK sequence and a NACK sequence, P is a positive integer, and M is an integer multiple of P.
36. The terminal apparatus according to claim 35, wherein the M code division multiplexed sequences are obtained by cyclic shift in a time domain from one base sequence γ, or the M code division multiplexed sequences are obtained by phase rotation in a frequency domain from one base sequence γ; the M code division multiplexing sequences are expressed as:
r(n)=γ*e-j*(2*π/M)*n,n=0,1,2,3,…,M-1,
wherein n represents index labels of the M code division multiplexing sequences;
And M/N code division multiplexing sequences obtained by allocation of each time slot in the N time slots are sequences with M/N continuous index marks.
37. The terminal device of claim 36, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing an initial phase of the base sequence γ, the i=0, 1,2, …, N-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
38. the terminal device according to claim 36 or 37, wherein P ACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks, and P NACK sequences allocated by the ith slot of the N slots are sequences with P consecutive index marks.
39. The terminal device of claim 38, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein, ρ=0, 1,2, …, P-1;
or, the M/N code division multiplexing sequences allocated by the ith time slot in the N time slots are expressed as:
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of ρ is an ACK sequence with consecutive P index marks, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is a NACK sequence with consecutive index numbers P;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained in the case of ρ is a NACK sequence with consecutive index numbers of P, where m cs The code division multiplexing sequence obtained in the case of =ρ+p is an ACK sequence with consecutive P index marks;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair.
40. The terminal device of claim 36, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
in the ith time slot, at m cs The code division multiplexing sequence obtained in the case of =ρ is P ACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P NACK sequences;
alternatively, in the ith slot, at m cs The code division multiplexing sequence obtained when P is P NACK sequences, m cs The code division multiplexing sequence obtained in the case of =ρ+p is P ACK sequences;
the m is cs Code division multiplexing sequence generated when =ρ and said m cs The code division multiplexing sequences generated when p+p constitute one code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
41. The terminal device of claim 36, wherein the M/N code division multiplexing sequences allocated by the i-th slot of the N slots are expressed as:
wherein said m 0 Representing the initial phase of the base sequence gamma, the m 0 P/2, p=0, 1,2, …, P-1, i=0, 1,2, …, N-1;
at the ith time slotIn m, in q The code division multiplexing sequence obtained in the case of=0 is an ACK sequence with consecutive P index marks, where m q The code division multiplexing sequence obtained in the case of P is a NACK sequence with P consecutive index labels;
alternatively, in the ith slot, at m q The code division multiplexing sequence obtained in the case of=0 is a NACK sequence with consecutive index numbers of P, where m q The code division multiplexing sequence obtained in the case of P is an ACK sequence with P consecutive index marks;
when the values of ρ are equal, the m q Code division multiplexing sequence generated when=0 and the m q The code division multiplexing sequences generated when P are included form a code division multiplexing sequence pair; when the generated P sequences are allocated to the devices, P-1 is allocated in the order of ρ=0, 1,2, ….
42. The terminal device according to any of the claims 33, 34, 36, 37, 39 to 41, characterized in that said transmitting unit is specifically configured to:
the first data is transmitted to the first terminal device by occupying a plurality of sub-channels on a first time slot.
43. A communication system comprising a first terminal device and a second terminal device, wherein the first terminal device is a terminal device according to any one of claims 22 to 32, and the second terminal device is a terminal device according to any one of claims 33 to 42.
44. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program, which is executed by a processor to implement the communication method of any one of claims 1 to 11.
45. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program, which is executed by a processor to implement the communication method of any one of claims 12 to 21.
46. A computer program product, characterized in that the communication method according to any of claims 1 to 11 or 12 to 21 is to be performed when the computer program product is read and executed by a computer.
47. A communication chip comprising a processor and a communication interface, characterized in that the communication chip is configured to perform the method of any of claims 1 to 11 or any of claims 12 to 21.
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