CN114553644B - Adjustable pulse forming method based on DDS technology - Google Patents
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Abstract
The invention discloses an adjustable pulse forming method based on DDS technology, which takes the shape of the pulse edge and the pulse as a whole, loads the edge shape data in the memory of ROM, changes the accumulated quantity output by the accumulator into the read address input to the ROM, thereby forming a feedback table look-up method based on DDS.
Description
Technical Field
The invention belongs to the technical field of optical communication, and particularly relates to an adjustable pulse forming method based on a DDS (direct digital synthesizer) technology.
Background
Modern communication systems have higher and higher requirements on the signal-to-noise ratio of communication channels, and digital transmission modes with low bandwidth occupation and high speed become the main direction of research. In a digital baseband signal processor, the pulse shaping technology has very important significance for improving the channel utilization rate and reducing crosstalk.
The analog circuit adopts an analog filter to complete the pulse forming function in baseband pulse forming, and the circuit can design a corresponding active or passive filter according to the channel bandwidth requirement of a transmission signal to realize the edge forming of the baseband signal.
The digital mode is slow in baseband pulse edge forming speed, but the shape accuracy is greatly improved compared with the analog mode. The direct forming method of open-loop control uses an accumulator to accumulate the edge control words to a required value, and a feedback integration method sends an output level digital quantity serving as a feedback quantity back to a controller to be compared with the required level, so as to control the work of a post-stage accumulation module and output the level digital quantity. The technology of waveform synthesis by adopting a digital square circuit has guiding significance to the controllable pulse edge forming technology.
The edge requirements of baseband signals are different, and the forming process can be divided into linear edge forming and nonlinear edge forming according to the edge shape. Edge shaping control through analog circuit or digital circuit schemes has become the focus of research for signal characteristics required by different edge shaping.
The main application scenario of the analog circuit in baseband pulse forming is the circuit design of a forming filter, and the circuit can design a corresponding active or passive filter according to the channel requirement of a transmission signal to form the edge forming of a baseband signal. The most common filter circuit can be implemented by an RLC low pass filter circuit, but also an active filter scheme can be used.
In addition, an improved fast edge shaping method using step recovery diodes and nonlinear transmission lines can improve pulse shaping speed. However, due to the characteristic of fixed analog circuit structure, the forming method has no adjustability, is only suitable for pulse forming of symmetrical edges, and has single forming shape and large forming module size. Compared with an analog mode, the accuracy and the flexibility of the baseband pulse edge forming shape are greatly improved by using a digital mode. When the edge of the baseband pulse signal is required to be a linear edge, the method mainly comprises two methods of open-loop direct forming and closed-loop feedback integration. The direct forming method of open-loop control uses an accumulator to accumulate edge control words until an upper accumulation limit is reached. The basic structure diagram of the feedback integration method is shown in fig. 1, and the method takes the output level digital quantity as the feedback quantity to be sent back to the controller, and the controller compares the feedback with the required level, thereby controlling the work of the post-stage accumulation module. In order to realize adjustable pulse signal forming in a full digital mode, closed loop integration and waveform synthesis technology are combined. The end point of current waveform synthesis techniques is how to control the timing characteristics, such as the frequency and width of the generated waveform, ignoring the variable control of the pulse edge shape. By utilizing the dynamic characteristic of waveform synthesis and the accuracy characteristic of feedback integration, the method brings guiding significance for accurate adjustable pulse edge forming.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides an adjustable pulse forming method based on a DDS (Direct Digital Synthesis) technology, which realizes pulse forming by a Direct Digital Synthesis (DDS) feedback table look-up method.
In order to achieve the above object, the present invention provides an adjustable pulse forming method based on DDS technology, comprising the steps of:
(1) Initializing the module;
(1.1) initializing interface signals of the edge forming control module, wherein the interface signals comprise an enable signal, a reset signal and a clock signal;
(1.2) setting target amplitude A and target rising edge control word delta A of the forming pulse p Target falling edge control word Δ a d A target edge shape control word S;
(2) Setting the enable signal at a high level, and triggering the edge forming control module to start working;
(3) Forming judgment of baseband signals;
inputting an external baseband signal to an edge forming control module, and sampling the baseband signal by using a clock signal to obtain a sampling value;
controlling an alternative multiplexer MUX2-1 by using the sampling value so as to control the current forming mode of the edge forming control; when the sampling value is a high level, namely logic 1, starting a rising edge forming mode, and entering the step (4); when the sampling value is a low level, namely logic 0, starting a falling edge forming mode, and entering the step (5);
(4) The edge forming control module starts rising edge forming;
(4.1) the rising edge accumulator performs a cyclic accumulation with the target edge shape control word S as the start, the accumulation step being Δ A p The accumulated result is used as the search address Addr t Sending the data into an edge shape storage area; the expression of cyclic accumulation is shown in formula (1), wherein Addr 0 Representing the first address of the table lookup;
(4.2) obtaining the accumulated value Addr by each cycle t By usingTwo-stage DFF carries out two-beat clock register;
(4.3) controlling the read enabling of the ROM with the corresponding data stored in the S enabling edge shape storage area according to the target edge shape, and according to the searching address Addr t Searching corresponding ROM data A in the edge-shaped memory area t ；
Wherein, S is a target edge shape control word, and f (#) is a sampling value of a storage edge shape function;
(4.4) mixing A t Feeding back to the amplitude comparator for comparison, if A t Less than the target amplitude A and a rising edge step function value f (Δ A) p ) When the difference is larger, the working state of the rising edge accumulator is kept, and the edge forming control module outputs A t Edge shape as time t
Otherwise, releasing the accumulator to stop the enable signal and keeping the accumulated value Addr output before two beats of clock t-2 As the search address, and simultaneously outputs the target amplitude A as the output level value ^ greater than or equal to the edge shaping control module>
At the moment, the pulse rising edge forming task is finished;
wherein the output level
The expression of (a) is:
(5) The edge forming control module starts the falling edge forming;
(5.1) the falling edge subtracter circularly decreases by taking the target edge shape control word S as the beginning, and the decreasing step is deltaA d Taking the decrement result as the lookup address Addr t Sending the data into an edge-shaped storage area;
wherein, the expression of the cyclic decreasing is shown as the formula (4), in which Addr 0 Indicating the first address of the look-up table, addr h Represents the address value of the shape at a high level;
(5.2) obtaining the decreasing value Addr by each cycle t Using two-stage DFF to register two-beat clock;
(5.3) controlling the read enabling of the ROM with the corresponding data stored in the S enabling edge shape storage area according to the target edge shape, and according to the searching address Addr t Searching corresponding ROM data A in the edge-shaped memory area t ；
(5.4) mixing A t Feeding back to the amplitude comparator for comparison, if A t Greater than one falling edge step function value f (Δ A) d ) When the edge forming control module outputs A, the working state of the falling edge subtracter is kept, and the edge forming control module outputs A t Edge shape as time t
Otherwise, the subtracter stop enabling signal is released, and Addr is output 0 =0 as lookup address while outputting 0 as module output level value ÷>
At the moment, the pulse falling edge forming task is finished;
wherein the output level
The expression of (a) is:
the invention aims to realize the following steps:
the invention relates to an adjustable pulse forming method based on DDS technology, which takes the shape of the pulse edge and the pulse as a whole, loads the edge shape data in a memory of a ROM, and changes the accumulated amount output by an accumulator into a read address input to the ROM, thereby forming a feedback table look-up method based on DDS.
Meanwhile, the adjustable pulse forming method based on the DDS technology further has the following beneficial effects:
(1) The conventional feedback integration structure is relatively difficult to form nonlinear edges, and a ROM memory module is added in the structure of the feedback integration method by combining the idea that a DDS generates any waveform, so that various adjustable pulse edge forming can be realized;
(2) The shape of the edge of the pulse and the pulse are regarded as a whole, the pulse forming can be regarded as generating a waveform with a specific shape, the data of the edge shape is loaded in a memory, the logic design complexity can be effectively reduced by adopting a DDS-based table look-up mode, and the occupation of DSP resources for operation on an FPGA chip is reduced;
(3) The feedback look-up table pulse forming process based on the DDS technology can form any functional pulse edge, solves the problem of nonlinear edge forming and also avoids the complex design flow of a forming filter. By comparison, the method has relatively less occupied resources, simple algorithm and high efficiency;
(4) Under the scene of the requirement of rapid pulse edge forming, the method has good application value, and meanwhile, the method can be rapidly deployed based on the FPGA, so that the method has important significance for shortening the development period and reducing the cost;
(5) And storing a plurality of groups of edge data aiming at the arbitrariness of signal waveforms required by a part of navigation systems, determining the reading position of the edge data by selecting a control word according to the shape, and flexibly setting the storage depth and the data bit width according to the accuracy and arbitrariness required by the pulse edge.
Drawings
FIG. 1 is a schematic diagram of a conventional pulse forming method;
FIG. 2 is a schematic diagram of an adjustable pulse shaping method based on DDS technology according to the present invention;
FIG. 3 is another schematic diagram of an adjustable pulse shaping method based on DDS technology of the present invention;
FIG. 4 is a graph of the results of shaping a single-shape edge pulse;
FIG. 5 is a graph of the results of shaping using a Gaussian-shaped edge shaping function;
FIG. 6 is a graph of results of a forming function using a rolling lifting cosine type edge forming function;
FIG. 7 is a graph of the result of shaping by changing the target rising edge control word or falling edge control word;
FIG. 8 is a graph of the results of forming with varying target amplitudes;
fig. 9 is a comparison of resource occupation of the method of the present invention and the conventional method.
Detailed Description
The following description of the embodiments of the present invention is provided in order to better understand the present invention for those skilled in the art with reference to the accompanying drawings. It is to be expressly noted that in the following description, a detailed description of known functions and designs will be omitted when it may obscure the subject matter of the present invention.
Examples
Fig. 2 is a schematic diagram of an adjustable pulse shaping method based on the DDS technique of the present invention.
The conventional feedback integration structure is relatively difficult to form nonlinear edges, and a ROM (read only memory) module is added in the structure of a feedback integration method by combining the idea of generating any waveform by a DDS (direct digital synthesizer), so that various adjustable pulse edge forming can be realized; in this embodiment, the adjustable pulse shaping based on the DDS technique mainly aims at shaping single-shape edge pulses and shaping multiple-shape edge pulses, stores the required edge function data in the ROM, and changes the accumulated amount output by the accumulator into the read address input to the ROM, thereby forming the feedback lookup table method based on DDS. As shown in fig. 2, since the data stored in the ROM is generated in advance, and the shape of the pulse finally generated by the forming module is only related to the data waveform, the feedback lookup table method can generally implement the forming of the edge pulse with any single shape, and specifically includes the following steps:
s1, initializing a module;
s1.1, initializing interface signals of an edge forming control module, wherein the interface signals comprise an enable signal, a reset signal and a clock signal;
s1.2, setting target amplitude A =80 of the forming pulse and target rising edge control word delta A p =25, target falling edge control word Δ a d =25, target edge shape control word S =0;
s2, setting the enable signal at a high level, and triggering the edge forming control module to start working;
s3, base band signal forming judgment;
inputting an external baseband signal to an edge forming control module, and sampling the baseband signal by using a clock signal to obtain a sampling value;
controlling an alternative multiplexer MUX2-1 by using the sampling value so as to control the current forming mode of the edge forming control; when the sampling value is a high level, namely logic 1, starting a rising edge forming mode, and entering step S4; when the sampling value is a low level, namely logic 0, starting a falling edge forming mode, and entering step S5;
s4, starting rising edge forming by the edge forming control module;
s4.1, the rising edge accumulator takes the target edge shape control word S as the beginning to carry out cyclic accumulation, and the accumulation step is delta A p The accumulated result is used as the search address Addr t Sending the data into an edge shape storage area; the expression of cyclic accumulation is shown in formula (1), wherein Addr 0 Representing the first address of the table lookup;
s4.2, obtaining an accumulated value Addr by each round of circulation t Two-beat clock register is carried out by utilizing two-stage DFF, so as to eliminate 2-beat clock delay caused by the self characteristic of the ROM module;
s4.3, enabling the read enable of the ROM with corresponding data stored in the edge shape storage area according to the target edge shape control word S, and searching the address Addr t Finding corresponding ROM data A in an edge-shaped memory area t ；
Wherein S is a target edge shape control word, and f (×) is a sampling value of a storage edge shape function, which is a linear function in this example;
s4.4, adding A t Feeding back to the amplitude comparator for comparison, if A t Less than the target amplitude A and a rising edge step function value f (Δ A) p ) When the difference is larger, the working state of the rising edge accumulator is kept, and the edge forming control module outputs A t Edge shape as time t
Otherwise, releasing the accumulator stop enable signal and keeping the accumulated value Addr output before two beats of clock t-2 As the search address, and simultaneously outputs the target amplitude A as the output level value of the edge shaping control module>
At the moment, the pulse rising edge forming task is finished;
wherein the output level
The expression of (a) is:
s5, starting falling edge forming by the edge forming control module;
s5.1, the falling edge subtracter takes the target edge shape control word S as the start to carry out circular decrement, and the decrement step is delta A d Taking the decrement result as the lookup address Addr t Sending the data into an edge-shaped storage area;
wherein, the expression of the cyclic decreasing is shown as the formula (4), in which Addr 0 Indicating the first address of the lookup table, addr h Represents the address value of the shape at a high level;
s5.2, obtaining the decreasing value Addr by each cycle t Two-beat clock register is carried out by utilizing two-stage DFF, so as to eliminate 2-beat clock delay caused by the self characteristic of the ROM module;
s5.3, controlling the read enabling of the ROM with the corresponding data stored in the word S enabling edge shape storage area according to the target edge shape, and searching the address Addr t Finding corresponding ROM data A in an edge-shaped memory area t ；
S5.4, mixing A t Feeding back to the amplitude comparator for comparison if A t Greater than one falling edge step function value f (Δ A) d ) When the edge forming control module is used, the working state of the falling edge subtracter is kept, and meanwhile the edge forming control module outputs A t Edge shape as time t
Otherwise, releasing the enable signal of the subtractor to output Addr 0 =0 as lookup address while outputting 0 as module output level value ≥>
At the moment, the pulse falling edge forming task is finished;
wherein the output level
The expression of (a) is:
after the above-mentioned flow is completed, the basic pulse shaping operation is completed, and the shaping result is shown in fig. 4, where clk is a clock signal; rstn is an active low reset signal; lvl _ ctrl is the target amplitude; p _ d _ n and P _ d _ P are respectively falling edge stepping control words and rising edge stepping control words of edge control; sig _ in is a baseband data signal; the sig _ out signal is a shaped pulse.
The shapes of rising edges and falling edges of a baseband data chain are different from each other by partial navigation signals, and the shapes of the rising edges and the falling edges are not only reflected on the speed of edge change, but also reflected on the difference of the self shapes of nonlinear edges. For such application scenarios, it is difficult to accurately implement molding control by using only one set of edge data, i.e., it is possible to implement, and the control logic is very complex. To solve this problem, a plurality of sets of edge data may be stored, and determination of the read position of the edge data may be performed by shape selection control. Such schemes have high requirements for memory cells, generally have larger memory depth and data bit width according to the accuracy and arbitrariness required by pulse edges, and are challenging for memory resources. Therefore, a forming process extending a multi-shape edge pulse is performed on the basis of the forming process of the single-shape edge pulse, a specific forming flow is shown in fig. 3, and different parameters can be respectively changed on the basis of the forming process of the single-shape edge pulse, specifically:
the first method comprises the following steps: changing a target edge shape control word S, enabling read enabling signals of different ROM modules, searching waveform data values in a corresponding ROM table according to a current edge forming mode, and carrying out a forming process corresponding to a rising edge or a falling edge so as to realize the forming of multi-shape edge pulses; in the present embodiment, the target edge shape control word S is an arbitrary control word within 0 to 3 within the allowable range, and S =1 and S =2 are respectively taken, and when S =1, the system uses a gaussian-type edge shaping function, and S =2, the system uses a rolling-falling cosine-type edge shaping function. The control effect is shown in fig. 5 and fig. 6, where d _ stp and r _ stp are respectively a falling edge step control word and a rising edge step control word; tar _ lvl is the target amplitude; sig _ data is a baseband data signal; out _ sig is the shaped pulse output signal;
the second method comprises the following steps: changing the target rising edge control word Δ A p Or falling edge control word Δ a d According to Δ A p And Δ A d When in different edge forming modes, the adjusted edge accumulator or the accumulated value of the subtracter in the formulas (1) and (4) is used for realizing the forming of the multi-shape edge pulse after the forming steps S4 and S5 are finished;
in this example, Δ A is taken separately p =128 and Δ a d =64, take linear rising edge as example, let t p Denotes rise time, y max =2000 is the level value required by the output pulse, T =10ns is the driving clock period, the expression of the adjusting process is shown in formula (7), and the control effect is shown in fig. 7
The third method comprises the following steps: and changing the target amplitude A, and realizing the forming of the multi-shape side pulse after describing the process according to the steps S3 to S5. Setting the target amplitude a =256, completing the above pulse shaping step, and the shaping effect is shown in fig. 8.
The invention needs to be realized in a digital logic RTL level circuit form on a final formed product, so that the occupancy rate of resources needs to be balanced while the functions are perfect. Finally, the implementation platform of the invention is an FPGA chip, so that the digital logic RTL level circuit of the invention and the traditional method can be used for performing function test and resource occupation evaluation on the same FPGA chip. Through comparison and verification, the method and the device can determine that the method and the device have the advantages of low resource occupation and area while having the function advantages. A resource occupation pair is shown in fig. 9.
Although illustrative embodiments of the present invention have been described above to facilitate the understanding of the present invention by those skilled in the art, it should be understood that the present invention is not limited to the scope of the embodiments, and various changes may be made apparent to those skilled in the art as long as they are within the spirit and scope of the present invention as defined and defined by the appended claims, and all matters of the invention which utilize the inventive concepts are protected.
Claims (4)
1. An adjustable pulse forming method based on DDS technology is characterized by comprising the following steps:
(1) Initializing the module;
(1.1) initializing interface signals of the edge forming control module, wherein the interface signals comprise an enable signal, a reset signal and a clock signal;
(1.2) setting target amplitude A and target rising edge control word delta A of the forming pulse p Target falling edge control word Δ a d A target edge shape control word S;
(2) Setting the enable signal at a high level, and triggering the edge forming control module to start working;
(3) Forming judgment of baseband signals;
inputting an external baseband signal into the edge forming control module, and sampling the baseband signal by using a clock signal to obtain a sampling value;
controlling an alternative multiplexer MUX2-1 by using the sampling value so as to control the current molding mode of the edge molding control module; when the sampling value is a high level, namely logic 1, starting a rising edge forming mode, and entering the step (4); when the sampling value is a low level, namely logic 0, starting a falling edge forming mode, and entering the step (5);
(4) The edge forming control module starts rising edge forming;
(4.1) the rising edge accumulator performs a circular accumulation starting with the target edge shape control word SCumulative step of Δ A p The accumulated result is used as the search address Addr t Sending the data into an edge-shaped storage area; the expression of the cyclic accumulation is shown as formula (1), in which Addr 0 Representing the first address of the table lookup;
(4.2) obtaining an accumulated value Addr by each round of circulation t Using two-stage DFF to register two-beat clock;
(4.3) enabling the read enable of the ROM with corresponding data stored in the edge shape storage area according to the target edge shape control word S, and according to the search address Addr t Searching corresponding ROM data A in the edge-shaped memory area t ；
Wherein, S is a target edge shape control word, and f (#) is a sampling value of a storage edge shape function;
(4.4) mixing A t Feeding back to the amplitude comparator for comparison, if A t Less than the target amplitude A and a rising edge step function value f (Δ A) p ) When the difference is larger, the working state of the rising edge accumulator is kept, and the edge forming control module outputs A t Edge shape as time t
Otherwise, releasing the accumulator to stop the enable signal and keeping the accumulated value Addr output before two beats of clock t-2 As the search address, and simultaneously outputs the target amplitude A as the output level value ^ greater than or equal to the edge shaping control module>
At the moment, the pulse rising edge forming task is finished;
wherein the output level
The expression of (c) is:
(5) The edge forming control module starts the falling edge forming;
(5.1) the falling edge subtracter circularly decreases by taking the target edge shape control word S as the beginning, and the decreasing step is delta A d Taking the decrement result as the lookup address Addr t Sending the data into an edge shape storage area;
wherein, the expression of the cyclic decreasing is shown as the formula (4), in which Addr 0 Indicating the first address of the lookup table, addr h Represents the address value when the shape is at a high level;
(5.2) obtaining the decreasing value Addr by each cycle t Two-beat clock register is carried out by utilizing two-stage DFF;
(5.3) enabling the read enable of the ROM with corresponding data stored in the edge shape storage area according to the target edge shape control word S, and according to the search address Addr t Finding corresponding ROM data A in an edge-shaped memory area t ；
(5.4) mixing A t Feeding back to the amplitude comparator for comparison if A t Greater than one falling edge step function value f (Δ A) d ) When the edge forming control module outputs A, the working state of the falling edge subtracter is kept, and the edge forming control module outputs A t Edge shape as time t
Otherwise, releasing the enable signal of the subtractor to output Addr 0 =0 as the lookup address, whileOutput 0 as a module output level value>
At the moment, the pulse falling edge forming task is finished;
wherein the output level
The expression of (a) is:
2. the DDS technology-based tunable pulse shaping method as claimed in claim 1, wherein the target edge shape control word S is changed within an allowable range of 0 to 3, read enable signals of different ROM modules are enabled, waveform data values in corresponding ROM tables are searched according to a current edge shaping mode, and a shaping process corresponding to a rising edge or a falling edge is performed, so as to achieve shaping of multi-shaped edge pulses.
3. The DDS technology-based tunable pulse shaping method of claim 1 wherein the target rising edge control word Δ a p Or falling edge control word Δ a d Change within the permissible range of 0 to 255, and then according to Δ A p =128 and Δ a d =64, when different edge forming modes are adopted, after the forming steps (4) and (5) are finished, the forming of the multi-shape edge pulse is realized by the adjusted edge accumulator or the accumulated value of the subtracter;
wherein, taking linear rising edge as an example, let t p Denotes rise time, y max And (4) in order to output the level value required by the pulse, T is the period of the driving clock, and the expression of the adjusting process is shown in a formula (7).
4. The DDS technology-based tunable pulse shaping method as claimed in claim 1, wherein the target amplitude a =256 is changed within a permissible range of 0 to 65535, and then the shaping of the multi-shape edge pulse is realized after the processes described in steps S3 to S5 are completed.
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| CN103178809A (en) * | 2013-02-04 | 2013-06-26 | 深圳市鼎阳科技有限公司 | Method and module for DDS (direct digital synthesizer) pulse edge adjusting and pulse signal generator |
| CN109857188A (en) * | 2019-01-08 | 2019-06-07 | 优利德科技(中国)股份有限公司 | A kind of pulse wave generation method based on DDS, device and its system |
| CN113434006A (en) * | 2021-07-08 | 2021-09-24 | 电子科技大学 | High-resolution pulse waveform generating device based on DDS |
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| CN109857188A (en) * | 2019-01-08 | 2019-06-07 | 优利德科技(中国)股份有限公司 | A kind of pulse wave generation method based on DDS, device and its system |
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