CN114546585A

CN114546585A - Data processing method, storage medium and system

Info

Publication number: CN114546585A
Application number: CN202210044621.4A
Authority: CN
Inventors: 狄棒; 任晋奎; 吴斌斌; 缪仁将
Original assignee: Alibaba China Co Ltd
Current assignee: Alibaba China Co Ltd
Priority date: 2022-01-14
Filing date: 2022-01-14
Publication date: 2022-05-27

Abstract

The invention discloses a data processing method, a storage medium and a system. Wherein, the method comprises the following steps: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

Description

Data processing method, storage medium and system

Technical Field

The present invention relates to the field of data processing, and in particular, to a data processing method, a storage medium, and a system.

Background

Currently, when a plurality of Virtual Machines (VMs) share a Physical Host (Host), each operating system (Guest OS) running in the VMs colors its own Memory (Guest Physical Memory) and applies cache coloring. However, the cache coloring of the Guest OS is based on the Guest Physical Memory, and cannot act on the cache of the host, and there is a technical problem that the cache coloring cannot be cooperatively applied between the virtual host and the Physical host.

In view of the above problems, no effective solution has been proposed.

Disclosure of Invention

The embodiment of the invention provides a data processing method, a storage medium and a system, which are used for at least solving the technical problem that cache coloring cannot be cooperatively applied between a virtual host and a physical host.

According to an aspect of an embodiment of the present invention, there is provided a data processing method including: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

According to another aspect of the embodiments of the present invention, there is also provided a data processing method, including: determining a plurality of virtual hosts by calling a first interface, wherein the first interface comprises a first parameter, the parameter value of the first parameter is information of the plurality of virtual hosts, and the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; performing cache coloring on the physical host and/or the virtual host based on the mapping result to obtain a coloring result; and outputting the coloring result by calling a second interface, wherein the second interface comprises a second parameter, and the parameter value of the second parameter is the coloring result.

According to another aspect of the embodiments of the present application, there is also provided a computer-readable storage medium, where the computer-readable storage medium includes a stored program, and when the program runs, the apparatus where the computer-readable storage medium is located is controlled to execute the data processing method in any one of the above embodiments.

According to another aspect of the embodiments of the present application, there is also provided a computer terminal, including: a processor and a memory, the processor being configured to execute the program stored in the memory, wherein the program when executed performs the data processing method in any of the above embodiments.

In the embodiment of the present invention, a plurality of virtual hosts may be determined first, where the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result. It is easy to note that the first color of the physical host and the second color of the virtual host can be obtained, the colors can be reasonably distributed by combining the type of the first color and the type of the second color, when the first memory and the second memory are mapped, a continuous memory with alternate colors can be mapped, the utilization rate of the cache can be improved, and the technical problem that the cache coloring cannot be cooperatively applied between the virtual host and the physical host is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:

fig. 1 is a block diagram of a hardware structure of a computer terminal (or mobile device) for implementing a data processing method according to an embodiment of the present invention;

FIG. 2 is a flow chart of a method of data processing according to an embodiment of the present invention;

FIG. 3 is a schematic illustration of a color assignment according to an embodiment of the present invention;

FIG. 4 is a flow diagram of another data processing method according to an embodiment of the invention;

FIG. 5 is a schematic diagram of a data processing apparatus according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of another data processing apparatus according to an embodiment of the present invention;

fig. 7 is a block diagram of a computer terminal according to an embodiment of the present application.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

First, some terms or terms appearing in the description of the embodiments of the present application are applicable to the following explanations:

in the Cache coloring technology, a physical memory is colored according to a Cache Line (Cache Line) scheduling policy of a Last Level Cache (LLC for short), and memories of the same color are mapped to the same Cache Line. When the memory is allocated, in order to reduce Cache line Conflict (Cache Conflict) of the LLC, physical memories of different colors are used for mapping into a continuous virtual memory with alternate colors;

because an Excessive application (over description) processor (vCPU), that is, the number of vcpus applied for use is greater than the number of physical CPUs, at this time, a Spin lock (Spin Block) dependency may exist between the vcpus, thereby introducing additional performance overhead;

the Linux Kernel-based virtualization technology is Kernel-based Virtual Machine, abbreviated as KVM.

At present, a Physical Host also applies a Cache coloring technology to reduce Cache coherence, but the Physical Host cannot interfere with Memory allocation of Guest OS, and cannot ensure that the Guest OS uses Host Physical Memory of different colors to map into a continuous virtual Memory with alternate colors. Because a plurality of VMs cannot be mutually sensed and cannot cooperatively schedule Cache lines, the Cache Conflict is difficult to reduce while the utilization rate of the Cache is maximized.

In addition, the open source toolkit divides the Cache into different Cache slices by limiting the range of the LLC to which a specific physical CPU can access, and distributes the Cache slices to different VMs, so that the Cache Conflict among the VMs is reduced by the method. However, the open source toolkit does not solve the problem that the cache coloring technology cannot be cooperatively applied between the VM and the Host.

In order to solve the above problems, the present application provides a data processing method, which may comprehensively consider Cache coloring factors of the VM and the Host, and comprehensively schedule the Host Color and the Guest Color to realize coloring decision by Guest, and implement (schedule Cache) the Host to perform decision realizes cooperation between the Host and Guest.

Example 1

There is also provided, in accordance with an embodiment of the present invention, an embodiment of a data processing method, it should be noted that the steps illustrated in the flowchart of the accompanying drawings may be carried out in a computer system such as a set of computer-executable instructions, and that, although a logical order is illustrated in the flowchart, in some cases, the steps illustrated or described may be carried out in an order different than here.

The method provided by the first embodiment of the present application may be executed in a mobile terminal, a computer terminal, or a similar computing device. Fig. 1 shows a hardware configuration block diagram of a computer terminal (or mobile device) for implementing a data processing method. As shown in fig. 1, the computer terminal 10 (or mobile device 10) may include one or more (shown as 102a, 102b, … …, 102 n) processors 102 (the processors 102 may include, but are not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA, etc.), a memory 104 for storing data, and a transmission module 106 for communication functions. Besides, the method can also comprise the following steps: a display, an input/output interface (I/O interface), a Universal Serial Bus (USB) port (which may be included as one of the ports of the I/O interface), a network interface, a power source, and/or a camera. It will be understood by those skilled in the art that the structure shown in fig. 1 is only an illustration and is not intended to limit the structure of the electronic device. For example, the computer terminal 10 may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.

It should be noted that the one or more processors 102 and/or other data processing circuitry described above may be referred to generally herein as "data processing circuitry". The data processing circuitry may be embodied in whole or in part in software, hardware, firmware, or any combination thereof. Further, the data processing circuit may be a single stand-alone processing module, or incorporated in whole or in part into any of the other elements in the computer terminal 10 (or mobile device). As referred to in the embodiments of the application, the data processing circuit acts as a processor control (e.g. selection of a variable resistance termination path connected to the interface).

The memory 104 may be used to store software programs and modules of application software, such as program instructions/data storage devices corresponding to the data processing method in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by executing the software programs and modules stored in the memory 104, that is, implementing the data processing method of the application program. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory located remotely from the processor 102, which may be connected to the computer terminal 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device 106 is used for receiving or transmitting data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission device 106 includes a Network adapter (NIC) that can be connected to other Network devices through a base station to communicate with the internet. In one example, the transmission device 106 can be a Radio Frequency (RF) module, which is used to communicate with the internet in a wireless manner.

The display may be, for example, a touch screen type Liquid Crystal Display (LCD) that may enable a user to interact with a user interface of the computer terminal 10 (or mobile device).

It should be noted here that in some alternative embodiments, the computer device (or mobile device) shown in fig. 1 described above may include hardware elements (including circuitry), software elements (including computer code stored on a computer-readable medium), or a combination of both hardware and software elements. It should be noted that fig. 1 is only one example of a particular specific example and is intended to illustrate the types of components that may be present in the computer device (or mobile device) described above.

Under the operating environment, the present application provides a data processing method as shown in fig. 2, and fig. 2 is a flowchart of the data processing method according to an embodiment of the present application.

In step S202, a plurality of virtual hosts are determined.

Wherein multiple virtual hosts share the same physical host.

The virtual hosts may be vms (virtual machines). The physical Host may be Host.

The multiple virtual hosts described above may be run using a processor (CPU) in the physical host.

Step S204, a first color is assigned to each virtual host.

The first color is used for coloring the physical memory of the physical host to obtain the first memory.

The first memory may be a Host Physical memory (Host Physical memory). The first Color may be a Color of a physical memory (Host Color) of the physical Host.

In an alternative embodiment, the physical host may assign a first color to each of the virtual hosts based on the number of physical CPUs used by the virtual hosts. After the first color is obtained, the physical memory of the physical host may be colored according to the first color, so as to obtain the first memory of the physical host.

Step S206, based on the type of the first color and the type of the second color of each vm, map the first memory and the second memory to obtain a mapping result.

The first memory may be a physical host memory, and the second memory may be a virtual host memory.

And the second color is used for coloring the physical memory of each virtual host to obtain a second memory. The second Color may be a physical memory Color (Guest Color) of the virtual host.

The kind of the first color may be different colors included in the first color and the number of different colors.

The kind of the second color may be a different color contained in the second color and the number of different colors.

The mapping result may be a memory that is continuous but alternated in color by assigning the first color and the second color.

In an optional embodiment, the mapping process may be performed on the first memory and the second memory according to the number of the first colors and the number of the second colors of each virtual host, so as to obtain a mapping result. Specifically, when the number of the first colors of the physical host is smaller than the number of the second colors in the virtual host, it indicates that a plurality of second colors correspond to one first color, and at this time, when the physical host performs cache coloring on the virtual host, memory adjacency of the same color needs to be reduced as much as possible to obtain the second memory; when the number of the first colors of the physical machine is greater than or equal to the number of the second colors in the virtual host, it is indicated that one second color can be ensured to correspond to one first color, and at this time, the second memory obtained by coloring the physical memory of the virtual host through the second color can be mapped to different first memories.

In another optional embodiment, the virtual host may perform coloring allocation once by itself, and perform coloring allocation on the virtual host according to a scheduling result of the physical host after the physical host performs scheduling, to obtain the physical memory of the virtual host, that is, the physical memory in the virtual host actually needs to be determined by the physical host, that is, the virtual host may send the second color obtained by the self-coloring allocation to the physical host, and determine, by the physical host, cache line coloring applicable to the virtual host, that is, the mapping result.

And step S208, performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

In an optional embodiment, the first memory of the physical host may be cache-colored according to the color of the second memory in the mapping result, and the second memory of the virtual host may also be cache-colored according to the color of the first memory in the mapping result.

The cache line coloring technology needs to color the physical memory first, and after coloring, the physical memories with different colors can be combined into a virtual memory, so as to ensure that the same color cannot be put into the same cache. Optionally, when the cache line coloring technology is performed, a scheduling manner of the cache needs to be determined for the first time, coloring operation may be performed on the physical memory according to the scheduling manner, after coloring, the physical memories of different colors form a virtual memory, and finally coloring of the cache and the physical memory may be achieved, and colors in the same group in the cache are different. That is, once the color of the physical memory is determined, the color scheduled to the cache may be determined according to the color of the physical memory.

Through the steps, a plurality of virtual hosts can be determined, wherein the virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result. It is easy to note that the first color of the physical host and the second color of the virtual host can be obtained, the colors can be reasonably distributed by combining the type of the first color and the type of the second color, when the first memory and the second memory are mapped, a continuous memory with alternate colors can be mapped, the utilization rate of the cache can be improved, and the technical problem that the cache coloring cannot be cooperatively applied between the virtual host and the physical host is solved.

In the above embodiment of the present application, the method further includes: the number of categories of the first color is determined based on the number of target processors used by each virtual host.

The target processor may be a CPU.

The target processor may be a processor in a physical machine.

In an alternative embodiment, the physical host may determine the number of categories of the first color in proportion to the number of target processors used by each virtual host.

For example, if a first vm of the plurality of vms uses 4 target processors, it may be determined that the number of kinds of the first color assigned to the first vm is 4, if a second vm uses 3 target processors, it may be determined that the number of kinds of the first color assigned to the second vm is 3, and if a third vm uses 2 target processors, it may be determined that the number of kinds of the first color assigned to the third vm is 2.

In the above embodiments of the present application, determining the number of the kinds of the first color based on the number of processors used by each virtual host includes: the number of categories of the first color is determined based on a ratio of the number of processors used by each of the virtual hosts to a sum of the number of processors used by the plurality of virtual hosts.

In an alternative embodiment, the number of processors used by each virtual host may be obtained first, then the sum of the numbers of processors used by the plurality of virtual hosts is obtained, then a ratio of the number of processors used by each virtual host to the sum of the numbers of processors used by the plurality of virtual hosts is determined according to the number of processors used by each virtual host and the number of processors used by the plurality of virtual hosts, and the number of types of first colors allocated to each virtual host is determined.

FIG. 3 is a schematic diagram of Color allocation according to an embodiment of the present invention, and as shown in FIG. 3, when the virtual Host determines the number of types of Host colors, the Hypervisor (Hypervisor) allocates colors in proportion to the number of physical CPUs used by each VM. As shown in the left part of the figure, VM1, VM2, and VM3 obtain 4, 3, and 2 Host colors, respectively, according to the ratio of owned physical CPUs (4:3: 2). The Guest OS of each VM, each having 3 Guest colors (different letters in the left part of the figure represent different colors), also attempts to apply cache coloring. The Cache (memory) structure on Host is shown in the right part of the figure, wherein different shapes represent different colors, wherein the shape of the position where a can be located can represent purple, the shape of the position where B can represent orange, the shape of the position where C can represent yellow, the color represented by the shape of the last layer of VM1 can be beige, the shape of the position where D is located in VM2 can represent red, the shape of the position where E is located can represent green, the shape of the position where F is located can represent blue, the shapes of the positions where H and G are located in VM3 can represent purple, and the shape of the position where I is located can represent gray. When the number of Host colors is greater than or equal to the Guest colors of the current VM (in VM 1), Guest Physical memories of different colors are mapped to the Host Physical memories of different colors. When the number of the Host colors is smaller than the Guest colors of the current VM (in the VM 3), a plurality of Guest colors correspond to the same Host Color, and the Host reduces the neighborhood of the Host Physical Memory with the same Color as much as possible so as to reduce the probability of Cache Conflict.

In the above embodiment of the present application, mapping the first memory map and the second memory based on the type of the first color and the type of the second color of each vm, and obtaining a mapping result includes: and mapping the second memory to the first memory based on the first quantity of the types of the first colors and the second quantity of the types of the second colors to obtain a mapping result.

In an alternative embodiment, because the Guest Color is determined by some bit in the Physical Address (GPA) of the virtual machine, the Host can distinguish the Guest Color of each GPP by the GPA value of the Physical Page (GPP) of the virtual machine. After obtaining the information of the Guest Color, the Host may implement cache coloring according to the following different situations, and optionally, may determine whether the second memory may be mapped onto the first memories of different colors by comparing the first number of the types of the first Color with the second number of the types of the second Color, so as to reduce the risk of memory collision, and if the number of the types of the first Color is greater than or equal to the number of the types of the second Color, it is indicated that the first Color of the first memory is sufficient, the second colors of the second memory may be mapped onto the first memories one by one, so as to reduce the risk of memory collision; if the number of the types of the first color is smaller than the number of the types of the second color, it is indicated that the first color of the first color is insufficient, and in order to avoid memory conflict, the number of the second color adjacent to the same color on the first memory can be reduced as much as possible. Scheduling is performed by combining the first color of the physical host and the second color of the virtual host, so that cooperation between the physical host and the virtual host is realized, the utilization rate of the cache can be improved, and cache conflict is reduced.

In the above embodiment of the present application, mapping the second memory onto the first memory based on the first number of the types of the first colors and the second number of the types of the second colors to obtain a mapping result, where the mapping result includes: and mapping the second memories of the second quantity to the first memories of the second quantity one by one in response to the first quantity being larger than or equal to the second quantity.

In an optional embodiment, if the first number is greater than or equal to the second number, it indicates that the memories in different colors in the virtual host may be mapped to the memories in different colors in the physical host, so that colors of adjacent memories may be different, and cache conflicts may be effectively reduced.

In the above embodiment of the present application, mapping the second memory onto the first memory based on the first number of the types of the first colors and the second number of the types of the second colors to obtain a mapping result, where the mapping result includes: and in response to the first number being smaller than the second number, mapping the second memories of the first sub-number in the second number to the first memories of the first sub-number one by one, and mapping the second memories of the second sub-number in the second number to the first memories of the second sub-number corresponding to the same second color data.

In an optional embodiment, if the first number is smaller than the second number, the first color with different types in the first memory may be obtained first, and the first sub-number may be determined according to a color with the smallest number in the first colors with different types, and if the first color is one gray color and two purple colors, the first sub-number may be determined to be 1, the second sub-number may be determined to be 2, and 1 second memory in the second number may be mapped to 1 first memory, that is, 1 second memory in the second number may be mapped to the gray first memory; the 2 second memories of the second number may be mapped into the 2 first memories corresponding to the same purple.

As shown in fig. 3, a second memory colored by I may be first mapped onto a second memory colored by gray, and two second memories colored by H, G may be mapped onto 2 first memories colored by the same purple.

In the above embodiments of the present application, the second sub-number of the first memories are not adjacent.

In an alternative embodiment, to avoid a cache conflict, the second self-number of second memories may be set to be non-adjacent.

In the above embodiment of the present application, the method further includes: responding to the virtual host to release the resource data, and mapping the physical page corresponding to the newly added second color data into the virtual host; and/or, in response to the virtual host releasing the resource data, replacing the physical page corresponding to the reduced second color data in the virtual host.

In an alternative embodiment, after the virtual host releases resources, the released first color is recycled and then re-allocated to the virtual host according to the proportion of the physical host CPU, and at the same time, when a new virtual host is started, the first color is re-allocated. Specifically, when the Host Color is added to the VM, when an EPT (extended Page Table) changes, a physical Page corresponding to the newly added Host Color may be mapped to the VM; when the Host Color is reduced by the VM, the corresponding physical page corresponding to the reduced Host Color is not mapped into the VM any more when the EPT changes, and the physical page corresponding to the reduced Host Color is replaced out of the VM along with the replacement of the program memory. If the physical page corresponding to the reduced Host Color is not replaced out of the VM within a specified time (e.g., 5 minutes), the physical page can be forcibly replaced through memory migration.

In the above embodiment of the present application, the method further includes: determining a target priority based on a scheduling priority of a first processor of the virtual host and a scheduling priority of a second processor of the virtual host, wherein the first processor executes based on target data, and the target data is obtained by scheduling the second processor to a third processor of the physical host for execution; and determining a target processor to be scheduled by the virtual host based on the target priority.

The first processor may be a Waiter vCPU, the second processor may be a Pioneer vCPU, the target data may be a spin lock (SpinLock), and the third processor may be a pCPU.

In an alternative embodiment, since the number of vcpus allocated is greater than the number of physical cpus (pcpus), there are two vcpus: vCPU1 and vCPU2, there are the following: vCPU1 needs to acquire a Spin Lock (Spin Lock) to continue execution, which is now held by vCPU2, but vCPU2 has already been scheduled out of the pCPU (i.e., vCPU2 is not executing), thus requiring vCPU2 to be scheduled for execution on the pCPU before vCPU1 is executed. This process hinders the execution of the vCPU1, introducing additional performance overhead. To solve this problem, all Waiter vcpus and Pioneer vcpus may be integrated together to consider the scheduling priority, and the calculation of the specific priority, as shown in the formula:

P＝T_Pioneer*P_{w_vCPU}+T_Waiter*P_{p_vCPU}

wherein, P is the finally obtained scheduling priority value; TPioneer and TWaiter (0< TPioneer, TWaiter <1) are two constants that are used to multiply the Pioneer vCPU native priority value (Pw _ vCPU) and the Waiter vCPU native priority value (Pp _ vCPU), respectively.

At the time of scheduling, there are two cases:

firstly, the priority represented by P is highest in all vCPUs needing to be scheduled, and related Pioneer vCPUs in P can be scheduled preferentially;

secondly, the priority represented by P is not the highest among all the vCPUs needing to be scheduled, other vCPUs with high priority can be scheduled preferentially, and after the scheduling is completed, one priority of Pioneer vCPUs in P is improved.

Through the steps, the priority of the Waiter vCPU and the priority of the Pioneer vCPU are considered, and the scheduling fairness of the Waiter vCPU is guaranteed.

In the above embodiments of the present application, determining a processor to be scheduled by a virtual host based on a target priority includes: in response to the target priority being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the second processor as a target processor; and in response to the target priority not being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the processor with the priority higher than a target threshold value among the processors needing to be scheduled by the virtual host as the target processor.

In an alternative embodiment, if the target priority is the highest priority among the priorities of the processors that the virtual host needs to schedule, the second processor may be determined as the target processor, the target processor to be scheduled may be determined by the priority, and the associated Pioneer vCPU in P may be scheduled preferentially. If the target priority is not the highest priority among the priorities of the processors required to be scheduled by the virtual host, the processor with the priority higher than the target threshold among the processors required to be scheduled by the virtual host can be determined as the target processor to be scheduled, and after the scheduling is completed, one priority of P can be increased, so that the problem that the Excessive vCPU bridging problem cannot be solved for a long time can be avoided.

In the above embodiment of the present application, the method further includes: after the target processor is scheduled, the target priority is increased, and the second processor is scheduled according to the increased target priority.

In an alternative embodiment, after the target processor is scheduled, the target priority may be increased, and the second processor may be scheduled according to the increased target priority, so as to avoid the problem that the external vCPU pinning problem cannot be solved for a long time.

It should be noted that, in the current KVM scheduling policy for the explicit vCPU bridging, if there is a spin lock required by the vCPU (waiter vCPU), which is held by another vCPU (Pioneer vCPU), but the Pioneer vCPU is not scheduled on the pCPU, the Hypervisor sends a request for scheduling the Pioneer vCPU to the Host OS, and the Host OS schedules the Pioneer vCPU on the pCPU. However, if the request for scheduling the Pioneer vCPU is contradictory to the scheduling policy of the Host OS (considering scheduling fairness), the Host OS ignores the request for scheduling the Pioneer vCPU, and the Pioneer vCPU cannot be scheduled to the pCPU for a long time, which results in that the explicit vCPU bridging problem is not effectively solved. Through the steps, the priority of the Pioneer vCPU can be improved after each round of scheduling Pioneer vCPU fails, and the problem of the processing vCPU Spinning can be solved within a limited time.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are also included in the scope of the present invention.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention.

Through the above description of the embodiments, those skilled in the art can clearly understand that the data processing method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.

Example 2

There is also provided, in accordance with an embodiment of the present invention, a data processing method, it being noted that the steps illustrated in the flowchart of the figure may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than here.

Fig. 4 is a flowchart of a data processing method according to an embodiment of the present disclosure, and as shown in fig. 4, the method may include the following steps:

step S402, a plurality of virtual hosts are determined by calling a first interface.

The first interface comprises a first parameter, the parameter value of the first parameter is information of a plurality of virtual hosts, and the plurality of virtual hosts share the same physical host.

In the technical solution provided by step S402 of the present invention, the first interface may be an interface for performing data interaction between the server and the client.

Step S404, a first color is assigned to each virtual host.

Step S406, mapping the first memory map and the second memory based on the type of the first color and the type of the second color of each vm, and obtaining a mapping result.

And the second color is used for coloring the physical memory of each virtual host to obtain a second memory.

Step S408, coloring the cache line of the physical host and/or the cache line of the virtual host based on the mapping result to obtain a coloring result.

And step S410, outputting the coloring result by calling a second interface.

The second interface comprises a second parameter, and the parameter value of the second parameter is the coloring result.

In the technical solution provided in step S410 of the present invention, the second interface may be an interface for performing data interaction between the server and the client, and the server may transmit the detection result to the second interface as a parameter of the second interface, so as to achieve the purpose of issuing the coloring result to the client.

It should be noted that the preferred embodiments described in the above examples of the present application are the same as the schemes, application scenarios, and implementation procedures provided in example 1, but are not limited to the schemes provided in example 1.

Example 3

According to an embodiment of the present application, there is also provided a data processing apparatus for implementing the data processing method, as shown in fig. 5, the apparatus 500 includes: a determination module 502, an assignment module 504, a mapping module 506, and a coloring module 508.

The determining module is used for determining a plurality of virtual hosts, wherein the virtual hosts share the same physical host; the system comprises an allocation module, a storage module and a processing module, wherein the allocation module is used for allocating a first color to each virtual host, and the first color is used for coloring a physical memory of a physical host to obtain a first memory; the mapping module is used for mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and the coloring module is used for coloring the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

It should be noted here that the determining module 502, the allocating module 504, the mapping module 506, and the coloring module 508 correspond to steps S202 to S208 in embodiment 1, and the four modules are the same as the corresponding steps in the implementation example and the application scenario, but are not limited to the disclosure in the first embodiment.

In the above embodiments of the present application, the determining module is further configured to determine the number of the types of the first color based on the number of target processors used by each virtual host.

In the above embodiment of the present application, the determining module is further configured to determine the number of the types of the first color based on a ratio of the number of processors used by each of the virtual hosts to a sum of the number of processors used by the plurality of virtual hosts.

In the above embodiment of the present application, the mapping module is further configured to map the second memory onto the first memory based on the first number of the types of the first colors and the second number of the types of the second colors, so as to obtain a mapping result.

In the above embodiment of the present application, the mapping module is further configured to map the second number of second memories onto the second number of first memories one by one in response to that the first number is greater than or equal to the second number.

In the above embodiment of the application, the mapping module is further configured to map, in response to that the first number is smaller than the second number, the second memories of the first sub-number in the second number to the first memories of the first sub-number one by one, and map the second memories of the second sub-number in the second number to the first memories of the second sub-number corresponding to the same second color data.

In the above embodiments of the present application, the first memories of the second sub-number are not adjacent to each other.

In the above embodiment of the present application, the mapping module is further configured to map, in response to the virtual host releasing the resource data, the physical page corresponding to the newly added second color data to the virtual host; and/or, in response to the virtual host releasing the resource data, replacing the physical page corresponding to the reduced second color data in the virtual host.

In the above embodiment of the present application, the determining module is further configured to determine a target priority based on a scheduling priority of a first processor of the virtual host and a scheduling priority of a second processor of the virtual host, where the first processor executes based on target data, and the target data is obtained by scheduling the second processor to a third processor of the physical host for execution; the determination module is further configured to determine a target processor to be scheduled by the virtual host based on the target priority.

In the foregoing embodiment of the present application, the determining module is further configured to determine, in response to that the target priority is a highest priority among priorities of processors that the virtual host needs to schedule, the second processor as the target processor; the determining module is further configured to determine, as the target processor, a processor with a priority higher than a target threshold among the processors that the virtual host needs to schedule, in response to the target priority not being the highest priority among the priorities of the processors that the virtual host needs to schedule.

In the foregoing embodiment of the present application, the determining module is further configured to increase the target priority after the target processor is scheduled, and schedule the second processor according to the increased target priority.

Example 4

According to an embodiment of the present application, there is also provided a data processing apparatus for implementing the data processing method, as shown in fig. 6, the apparatus 600 includes: a determination module 602, an assignment module 604, a mapping module 606, a coloring module 608, and an output module 610.

The determining module is used for determining a plurality of virtual hosts by calling a first interface, wherein the first interface comprises a first parameter, the parameter value of the first parameter is information of the plurality of virtual hosts, and the plurality of virtual hosts share the same physical host; the allocation module is used for allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of the physical host to obtain a first memory; the mapping module is used for mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; the coloring module is used for coloring the cache line of the physical host and/or the cache line of the virtual host based on the mapping result to obtain a coloring result; the output module is used for outputting the coloring result by calling a second interface, wherein the second interface comprises a second parameter, and the parameter value of the second parameter is the coloring result.

It should be noted here that the determining module 602, the allocating module 604, the mapping module 606, the coloring module 608, and the outputting module 610 correspond to steps S402 to S410 of embodiment 2, and the five modules are the same as the corresponding steps in the implementation example and application scenario, but are not limited to the disclosure of embodiment 2. It should be noted that the above modules may be operated in the computer terminal 10 provided in embodiment 1 as a part of the apparatus.

Example 5

Embodiments of the present invention may provide a data processing system, which may include a computer terminal, which may be any one of computer terminal devices in a computer terminal group. Optionally, in this embodiment, the computer terminal may also be replaced with a terminal device such as a mobile terminal.

Optionally, in this embodiment, the computer terminal may be located in at least one network device of a plurality of network devices of a computer network.

In this embodiment, the computer terminal may execute program codes of the following steps in the data processing method of the application program: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

Alternatively, fig. 7 is a block diagram of a computer terminal according to an embodiment of the present invention. As shown in fig. 7, the computer terminal may include: one or more processors (only one shown), memory.

The memory may be configured to store software programs and modules, such as program instructions/modules corresponding to the secure data processing method and apparatus in the embodiments of the present invention, and the processor executes various functional applications and data processing by running the software programs and modules stored in the memory, that is, the method for detecting a system bug attack is implemented. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory located remotely from the processor, and these remote memories may be connected to the terminal through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The processor can call the information and application program stored in the memory through the transmission device to execute the following steps: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

Optionally, the processor may further execute the program code of the following steps: the number of categories of the first color is determined based on the number of target processors used by each virtual host.

Optionally, the processor may further execute the program code of the following steps: the number of categories of the first color is determined based on a ratio of the number of processors used by each of the virtual hosts to a sum of the number of processors used by the plurality of virtual hosts.

Optionally, the processor may further execute the program code of the following steps: and mapping the second memory to the first memory based on the first quantity of the types of the first colors and the second quantity of the types of the second colors to obtain a mapping result.

Optionally, the processor may further execute the program code of the following steps: and mapping the second memories of the second quantity to the first memories of the second quantity one by one in response to the first quantity being larger than or equal to the second quantity.

Optionally, the processor may further execute the program code of the following steps: and in response to the first number being smaller than the second number, mapping the second memories of the first sub-number in the second number to the first memories of the first sub-number one by one, and mapping the second memories of the second sub-number in the second number to the first memories of the second sub-number corresponding to the same second color data.

Optionally, the processor may further execute the program code of the following steps: the second sub-quantity of the first memories are not adjacent.

Optionally, the processor may further execute the program code of the following steps: responding to the virtual host to release the resource data, and mapping the physical page corresponding to the newly added second color data into the virtual host; and/or, in response to the virtual host releasing the resource data, replacing the physical page corresponding to the reduced second color data in the virtual host.

Optionally, the processor may further execute the program code of the following steps: determining a target priority based on a scheduling priority of a first processor of the virtual host and a scheduling priority of a second processor of the virtual host, wherein the first processor executes based on target data, and the target data is obtained by scheduling the second processor to a third processor of the physical host for execution; and determining a target processor to be scheduled by the virtual host based on the target priority.

Optionally, the processor may further execute the program code of the following steps: in response to the target priority being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the second processor as a target processor; and in response to the target priority not being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the processor with the priority higher than a target threshold value among the processors needing to be scheduled by the virtual host as the target processor.

Optionally, the processor may further execute the program code of the following steps: after the target processor is scheduled, the target priority is increased, and the second processor is scheduled according to the increased target priority.

The embodiment of the invention provides a data processing method, which comprises the steps of firstly determining a plurality of virtual hosts, wherein the virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring processing on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result. It is easy to note that the first color of the physical host and the second color of the virtual host can be obtained, the colors can be reasonably distributed by combining the type of the first color and the type of the second color, when the first memory and the second memory are mapped, a continuous memory with alternate colors can be mapped, the utilization rate of the cache can be improved, and the technical problem that the cache coloring cannot be cooperatively applied between the virtual host and the physical host is solved.

It can be understood by those skilled in the art that the structure shown in fig. 7 is only an illustration, and the computer terminal may also be a terminal device such as a smart phone (e.g., an Android phone, an iOS phone, etc.), a tablet computer, a palmtop computer, a Mobile Internet Device (MID), a PAD, and the like. Fig. 7 is a diagram illustrating a structure of the computer terminal. For example, the computer terminal may also include more or fewer components (e.g., network interfaces, display devices, etc.) than shown in FIG. 7, or have a different configuration than shown in FIG. 7.

Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.

Example 6

Embodiments of the present invention also provide a computer-readable storage medium. Optionally, in this embodiment, the storage medium may be configured to store a program code executed by the data processing method provided in the first embodiment.

Optionally, in this embodiment, the storage medium may be located in any one of computer terminals in a computer terminal group in a computer network, or in any one of mobile terminals in a mobile terminal group.

Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of a physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and coloring the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

Optionally, the storage medium is further configured to store program codes for performing the following steps: the number of categories of the first color is determined based on the number of target processors used by each virtual host.

Optionally, the storage medium is further configured to store program codes for performing the following steps: the number of categories of the first color is determined based on a ratio of the number of processors used by each of the virtual hosts to a sum of the number of processors used by the plurality of virtual hosts.

Optionally, the storage medium is further configured to store program codes for performing the following steps: and mapping the second memory to the first memory based on the first quantity of the types of the first colors and the second quantity of the types of the second colors to obtain a mapping result.

Optionally, the storage medium is further configured to store program codes for performing the following steps: and mapping the second memories of the second quantity to the first memories of the second quantity one by one in response to the first quantity being larger than or equal to the second quantity.

Optionally, the storage medium is further configured to store program codes for performing the following steps: and in response to the first number being smaller than the second number, mapping the second memories of the first sub-number in the second number to the first memories of the first sub-number one by one, and mapping the second memories of the second sub-number in the second number to the first memories of the second sub-number corresponding to the same second color data.

Optionally, the storage medium is further configured to store program codes for performing the following steps: the second sub-quantity of the first memories are not adjacent.

Optionally, the storage medium is further configured to store program codes for performing the following steps: responding to the virtual host to release the resource data, and mapping the physical page corresponding to the newly added second color data into the virtual host; and/or, in response to the virtual host releasing the resource data, replacing the physical page corresponding to the reduced second color data in the virtual host.

Optionally, the storage medium is further configured to store program codes for performing the following steps: determining a target priority based on a scheduling priority of a first processor of the virtual host and a scheduling priority of a second processor of the virtual host, wherein the first processor executes based on target data, and the target data is obtained by scheduling the second processor to a third processor of the physical host for execution; and determining a target processor to be scheduled by the virtual host based on the target priority.

Optionally, the storage medium is further configured to store program codes for performing the following steps: in response to the target priority being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the second processor as a target processor; and in response to the target priority not being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the processor with the priority higher than a target threshold value among the processors needing to be scheduled by the virtual host as the target processor.

Optionally, the storage medium is further configured to store program codes for performing the following steps: after the target processor is scheduled, the target priority is increased, and the second processor is scheduled according to the increased target priority.

The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims

1. A method of data processing, comprising:

determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host;

allocating a first color to each virtual host, wherein the first color is used for coloring a physical memory of the physical host to obtain a first memory;

mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory;

and performing coloring treatment on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.

2. The method of claim 1, further comprising:

determining a number of categories of the first color based on a number of target processors used by each of the virtual hosts.

3. The method of claim 2, wherein determining the number of categories of the first color based on the number of target processors used by each of the virtual hosts comprises:

determining the number of categories of the first color based on a ratio of the number of processors used by each of the VMs to a sum of the number of processors used by the VMs.

4. The method according to claim 1, wherein mapping the first memory map and the second memory based on the type of the first color and the type of the second color of each of the virtual hosts to obtain a mapping result, comprises:

and mapping the second memory to the first memory based on the first number of the types of the first colors and the second number of the types of the second colors to obtain the mapping result.

5. The method according to claim 4, wherein mapping the second memory onto the first memory based on the first number of the types of the first color and the second number of the types of the second color to obtain a mapping result comprises:

and in response to the first number being greater than or equal to the second number, mapping the second number of the second memories to the second number of the first memories one by one.

6. The method according to claim 4, wherein mapping the second memory onto the first memory based on the first number of the types of the first color and the second number of the types of the second color to obtain a mapping result comprises:

in response to that the first number is smaller than the second number, mapping the second memories of a first sub-number of the second number to the first memories of the first sub-number one by one, and mapping the second memories of a second sub-number of the second number to the first memories of the second sub-number corresponding to the same second color data.

7. The method of claim 6, wherein the second sub-quantity of the first memory is not contiguous.

8. The method of claim 1, further comprising:

responding to the virtual host to release the resource data, and mapping the physical page corresponding to the newly added second color data into the virtual host; and/or

And in response to the virtual host releasing the resource data, replacing the physical page corresponding to the reduced second color data in the virtual host.

9. The method according to any one of claims 1 to 8, further comprising:

determining a target priority based on a scheduling priority of a first processor of the virtual host and a scheduling priority of a second processor of the virtual host, wherein the first processor executes based on target data obtained by scheduling the second processor to execute on a third processor of the physical host;

determining a target processor to be scheduled by the virtual host based on the target priority.

10. The method of claim 9, wherein determining the processor to be scheduled by the virtual host based on the target priority comprises:

in response to the target priority being the highest priority among the priorities of the processors that the virtual host needs to schedule, determining the second processor as the target processor;

and in response to the target priority not being the highest priority among the priorities of the processors needing to be scheduled by the virtual host, determining the processor with the priority higher than a target threshold among the processors needing to be scheduled by the virtual host as the target processor.

11. The method of claim 10, further comprising:

and after the target processor is scheduled, increasing the target priority, and scheduling the second processor according to the increased target priority.

12. A method of data processing, comprising:

determining a plurality of virtual hosts by calling a first interface, wherein the first interface comprises a first parameter, the parameter value of the first parameter is information of the plurality of virtual hosts, and the plurality of virtual hosts share the same physical host;

allocating a first color to each virtual host, wherein the first color is used for performing coloring processing on a physical memory of the physical host to obtain a first memory;

coloring the cache line of the physical host and/or the cache line of the virtual host based on the mapping result to obtain a coloring result;

and outputting the coloring result by calling a second interface, wherein the second interface comprises a second parameter, and a parameter value of the second parameter is the coloring result.

13. A computer-readable storage medium, comprising a stored program, wherein the program, when executed by a processor, controls an apparatus in which the computer-readable storage medium is located to perform the method of any of claims 1-12.

14. An image processing system, comprising:

a processor;

a memory coupled to the processor for providing instructions to the processor for processing the following processing steps: determining a plurality of virtual hosts, wherein the plurality of virtual hosts share the same physical host; allocating a first color to each virtual host, wherein the first color is used for performing coloring processing on a physical memory of the physical host to obtain a first memory; mapping the first memory and the second memory based on the type of the first color and the type of the second color of each virtual host to obtain a mapping result, wherein the second color is used for coloring the physical memory of each virtual host to obtain the second memory; and performing coloring treatment on the cache line of the physical host and/or the cache line of the virtual host based on the mapping result.