CN114531039A - Parameter design method and system applied to CLLC direct-current transformer - Google Patents

Parameter design method and system applied to CLLC direct-current transformer Download PDF

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CN114531039A
CN114531039A CN202210172906.6A CN202210172906A CN114531039A CN 114531039 A CN114531039 A CN 114531039A CN 202210172906 A CN202210172906 A CN 202210172906A CN 114531039 A CN114531039 A CN 114531039A
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cllc
inductance
current transformer
direct
inductance ratio
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李青平
刘思达
徐云飞
李卫国
郝一
卢娟娟
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Global Energy Interconnection Research Institute
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Global Energy Interconnection Research Institute
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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Abstract

The invention provides a method and a system for designing parameters of a CLLC direct current transformer, wherein the method comprises the following steps: obtaining design deviation values of all parameters of the CLLC direct-current transformer; acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values; designing initial values and preset function expressions according to multiple groups of parameters, and calculating to obtain an initial inductance ratio of the CLLC direct-current transformer; determining an inductance ratio selection interval based on the initial inductance ratio; selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into a preset function expression to obtain quality factors corresponding to the inductance ratios; and selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer. And (3) obtaining a constraint condition of the ratio of the quality factor to the inductance by taking the component deviation as a consideration factor, so that when the resonance inductance and the resonance capacitance deviate from the design values, the output voltage still meets the range of the design requirement.

Description

Method and system for designing parameters of CLLC direct-current transformer
Technical Field
The invention relates to the technical field of power electronics, in particular to a method and a system for designing parameters of a CLLC direct-current transformer.
Background
In a high-voltage direct-current transmission system, a power electronic transformer usually adopts a multi-module series-parallel combined structure to solve the high-voltage problem. The key problem of normal operation of the system for the power electronic transformer formed by the direct current transformers with input series connection and output parallel connection structures is the problem of realizing voltage sharing and current sharing among modules. However, along with the improvement of the input voltage level, the number of modules is increased, the number of control and detection devices of corresponding modules is also increased, the structural design requirements of the equipment for the strong electromagnetic environment brought by the application of the module in the high-voltage environment are stricter, the structural design difficulty is undoubtedly increased by the excessive control and detection devices, and meanwhile, the reliability of the equipment is also influenced by the electromagnetic compatibility problem brought by the excessive control and detection devices.
In order to simplify the control complexity, the direct current transformer is applied to the module, and the direct current transformer works in a non-voltage-regulating mode by adopting open-loop control, is easy to realize soft switching, contributes to the improvement of power density, and is particularly suitable for occasions of high-voltage and high-power transmission. In a direct-current transformer topology, the CLLC resonant converter not only inherits the characteristics of natural soft switching and high power density of the LLC resonant converter, but also has the characteristic of consistent forward and reverse voltage gains. The CLLC resonant converter can work at a resonant frequency point in a fixed-frequency open-loop mode, and the voltage gain cannot change along with the load condition, so that the topology has the characteristic of automatic voltage balancing. Because the CLLC resonant converter works under open-loop control, the resonant converter is ensured to work under a constant gain, and the parameter design is particularly important. However, most of the existing researches aim at the CLLC resonant converter parameter design method under closed-loop control, and there are few CLLC resonant converter parameter design methods under open-loop operation.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is to overcome the defect that the CLLC resonant converter is designed by parameters under open loop in the prior art, thereby providing a method and a system for designing the parameters of the CLLC direct-current transformer.
The technical scheme provided by the invention is as follows:
the first aspect of the embodiment of the invention provides a parameter design method applied to a CLLC direct current transformer, which comprises the following steps: obtaining design deviation values of all parameters of the CLLC direct-current transformer; acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values; according to the multiple groups of parameter design initial values and a preset function expression, calculating to obtain an initial inductance ratio of the CLLC direct-current transformer; determining an inductance ratio selection interval based on the initial inductance ratio; selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into the preset function expression to obtain quality factors corresponding to the inductance ratios; and selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer.
Optionally, the obtaining multiple sets of parameter design initial values based on the parameter design deviation values includes: calculating to obtain a voltage gain fluctuation range and a fluctuation range of the normalized frequency according to the design deviation value of each parameter; and selecting a plurality of voltage gains according to the voltage gain fluctuation range, selecting a plurality of normalization frequencies according to the fluctuation range of the normalization frequencies, and arranging and combining the plurality of voltage gains and the plurality of normalization frequencies to obtain a plurality of groups of parameter design initial values.
Optionally, the preset function expression is as follows:
Figure BDA0003519150460000031
wherein M is the voltage gain of the CLLC direct current transformer; k is an inductance ratio; omeganTo normalize the resonant frequency.
Optionally, the calculating, according to the multiple sets of parameter design initial values and the preset function expression, an initial inductance ratio of the CLLC dc transformer includes: substituting a plurality of groups of parameter design initial values into the preset function expression, and calculating to obtain a functional relation between a quality factor and an inductance ratio; and (4) simultaneously establishing a plurality of quality factor equations, and calculating to obtain the initial inductance ratio of the CLLC direct-current transformer.
Optionally, the method for designing the CLLC dc transformer parameters further includes: and performing soft switching verification on the selected inductance ratio and the corresponding quality factor.
Optionally, soft-switching verification is performed on the selected inductance ratio and the corresponding quality factor by the following formula:
Figure BDA0003519150460000032
wherein Q is a quality factor; t is tdeadThe dead time of a switching tube of the CLLC direct current transformer is obtained; cossThe output capacitance of the selected switch tube; f. ofrIs the resonant frequency;
Figure BDA0003519150460000033
V0to output a voltage, P0Is the output power.
Optionally, when the selected inductance ratio and its corresponding quality factor do not meet the soft-switch verification requirement, the inductance ratio and the quality factor are reselected.
The second aspect of the embodiments of the present invention provides a system for designing parameters of a CLLC dc transformer, including: the first acquisition module is used for acquiring design deviation values of all parameters of the CLLC direct-current transformer; the second acquisition module is used for acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values; the first calculation module is used for calculating and obtaining the initial inductance ratio of the CLLC direct-current transformer according to the plurality of groups of parameter design initial values and a preset function expression; the first processing module is used for determining an inductance ratio selection interval based on the initial inductance ratio; the second processing module is used for selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into the preset function expression to obtain quality factors corresponding to the inductance ratios; the first selection module is used for selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer.
In a third aspect of the embodiments of the present invention, a computer-readable storage medium is provided, where the computer-readable storage medium stores computer instructions, and the computer instructions are configured to enable the computer to execute the method for designing parameters of a CLLC dc transformer according to the first aspect of the embodiments of the present invention.
A fourth aspect of an embodiment of the present invention provides a computer device, including: the CLLC direct current transformer parameter design method comprises a memory and a processor, wherein the memory and the processor are mutually connected in a communication mode, the memory stores computer instructions, and the processor executes the computer instructions so as to execute the CLLC direct current transformer parameter design method applied to the first aspect of the embodiment of the invention.
The technical scheme of the invention has the following advantages:
the invention provides a parameter design method applied to a CLLC direct current transformer, which comprises the following steps: obtaining design deviation values of all parameters of the CLLC direct-current transformer; acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values; designing initial values and preset function expressions according to multiple groups of parameters, and calculating to obtain an initial inductance ratio of the CLLC direct-current transformer; determining an inductance ratio selection interval based on the initial inductance ratio; selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into a preset function expression to obtain quality factors corresponding to the inductance ratios; and selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer. When CLLC direct current transformer parameters are designed, the component deviation is taken as a consideration factor, and the constraint condition of the quality factor Q and the inductance ratio k is obtained, so that when the resonance inductance and the resonance capacitance deviate from the design values, the output voltage still meets the design requirement.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 shows an SST basic structure and a DC/DC high frequency isolation unit according to an embodiment of the present invention;
FIG. 2 is a CLLC DC transformer topology structure in the embodiment of the present invention;
FIG. 3 is a voltage-current waveform of a CLLC DC transformer in an embodiment of the present invention;
fig. 4 is a flowchart of a specific example of a method for designing parameters of a CLLC dc transformer according to an embodiment of the present invention;
FIG. 5 is a fundamental wave equivalent model of a CLLC DC transformer in the embodiment of the present invention;
FIG. 6 is a graph illustrating the trend of the influence of k value transformation on the gain curve according to an embodiment of the present invention;
FIG. 7 is a graph illustrating the trend of the effect of Q value transformation on the gain curve according to the embodiment of the present invention;
FIG. 8 is a schematic block diagram of a specific example of a CLLC DC transformer parameter design system applied in the embodiment of the present invention;
fig. 9 is a block diagram of a specific example of a computer device according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
With the development and construction of new energy power systems, the adoption of a power electronic transformer (SST) to realize flexible access of distributed energy and novel load/energy storage has become a research hotspot. The SST is a hub for converting and distributing electric energy in a power distribution network, and can realize flexible access and flexible electric energy distribution of multiple voltage levels and alternating current/direct current power supplies/loads.
The basic structure of the SST which is commonly used at present is shown in fig. 1, and the SST has a DC/DC intermediate link, so that the SST is very convenient for accessing a new energy system, and is very wide in application. In order to cope with higher and higher voltage levels, a DC/DC high-frequency link in SST usually adopts an input-series output-parallel (iso) structure. The topology of the ISOP DC transformer is shown in FIG. 1, and is composed of N CLLC DC transformers.
The topology of the CLLC dc transformer is presented here as shown in fig. 2. When the inverter works in the forward direction, a complementary driving signal with the duty ratio of 50% is applied to the primary side to realize the function of voltage inversion, and a pulse width synchronous signal is applied to the secondary side. When the synchronous motor works in the reverse direction, 50% of complementary driving signals are applied to the secondary side, and pulse width synchronous signals are applied to the primary side. In the figure, Lm is the excitation inductance of the high-frequency transformer, Lr1 and Lr2 use the primary and secondary side leakage inductances of the high-frequency transformer as resonance inductances, Cr1 is the primary side resonance capacitance, and Cr2 is the secondary side resonance capacitance.
The waveform of the voltage and current flowing through the CLLC dc transformer during normal operation is shown in fig. 3, and it can be seen from the figure that the waveform of the current flowing through the CLLC dc transformer exhibits good sinusoidality, consistent with the transformer characteristics, and thus is very suitable for application in this scenario.
In order to realize constant voltage conversion in the CLLC dc transformer, it is necessary to analyze the voltage gain characteristics of the converter. Since the CLLC direct current transformer works near the resonant frequency point, the current flowing through the high-frequency transformer has good sine degree, and the voltage gain can be analyzed by adopting a fundamental wave equivalent analysis method. Here only the positive direction of power flow (left to right) is analyzed, assuming that the converter only passes the fundamental component through the resonant network, so that the resonant network can be equated to a line network. uAB and uCD are the fundamental components of the input and output voltages, respectively.
Because the CLLC resonant converter works under open-loop control, the resonant converter is ensured to work under a constant gain, and the parameter design is particularly important. However, most of the existing researches aim at the CLLC resonant converter parameter design method under closed-loop control, and there are few CLLC resonant converter parameter design methods under open-loop operation.
Therefore, the embodiment of the invention provides a parameter design method applied to a CLLC direct current transformer, as shown in FIG. 4, comprising the following steps:
step S1: and obtaining design deviation values of all parameters of the CLLC direct current transformer.
In a specific embodiment, the CLLC dc transformer is controlled by a fixed-frequency open loop, operates at a resonant frequency point, and performs modeling analysis on the resonant converter by using a fundamental equivalent analysis method, where an equivalent model is shown in fig. 5.
By reducing the secondary side parameters to the primary side, the following intermediate variables can be obtained from fig. 5:
Figure BDA0003519150460000081
in the formula: voTo output a voltage, PoIs output power, wherein'r2＝n2Lr2，C’r2＝Cr2/n2，ReqIs an equivalent resistance.
The transfer function is:
Figure BDA0003519150460000091
the formula is arranged to obtain:
H(jωs)＝ωsLmReq/(A+jB) (3)
wherein the intermediate variables are defined as follows:
Figure BDA0003519150460000092
the voltage gain expression is arranged as follows:
Figure BDA0003519150460000093
the intermediate parameters are:
Figure BDA0003519150460000094
wherein a is1＝k+hk+h、
Figure BDA0003519150460000095
The quality factor Q, the inductance ratio k, the primary and secondary capacitance matching value g, the primary and secondary inductance matching value h and the normalized resonant frequency omega influencing the voltage gain can be obtained from the gain expressionn. Therefore, if the voltage gain variation is to be analyzed, the influence of the above parameters on the voltage gain must be considered. However, the above formula is not intuitive as to the effect of parameter deviation on voltage gain.
For this reason, the present embodiment takes into account design deviation values of the respective parameters when collating the voltage gain expression. Specifically, if the primary and secondary inductance-capacitance parameters deviate, the inductance-capacitance parameters are as follows:
Figure BDA0003519150460000101
wherein: l isr1、Cr1、Lr2、Cr2Representing the actual value of a parameter, L, in the circuitP1、CP1、LS2、CS2Representing the theoretical design value. β represents the fluctuation value of each parameter. Wherein a, b, c and d are corresponding deviation coefficients.
Rearranging the inductance capacitance value with the deviation coefficient into a voltage gain expression as follows:
Figure BDA0003519150460000102
wherein b is1＝ak+ck+ac，
Figure BDA0003519150460000103
The voltage gain expression can intuitively reflect the influence of the deviation value of the resonant component on the voltage gain.
In practical situations, there will be some fluctuation between the high-side dc bus voltage and the low-side dc bus voltage, but the fluctuation of the bus voltage should be controlled within a certain range, as shown below:
Vin∈[(1-α％)VH,(1+α％)VH]
Vout∈[(1-α％)VL,(1+α％)VL] (8)
VHis the nominal value of the input-side voltage, VLIs the nominal value of the output side voltage, VinIs the allowable fluctuation value of the input voltage, VoutIs the allowable fluctuation value of the output voltage, and alpha% is the allowable fluctuation coefficient.
Figure BDA0003519150460000104
LxAnd CxRepresenting the actual inductance and capacitance values, LNAnd CNIs the optimum value for theoretical design, and the beta% is the allowable fluctuation coefficient.
Step S2: and acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values.
In one embodiment, the multiple sets of parameter design initial values are obtained as follows:
step S21: and calculating to obtain a voltage gain fluctuation range and a fluctuation range of the normalized frequency according to the design deviation value of each parameter.
Step S21: selecting a plurality of voltage gains according to the voltage gain fluctuation range, selecting a plurality of normalization frequencies according to the fluctuation range of the normalization frequencies, and carrying out permutation and combination on the plurality of voltage gains and the plurality of normalization frequencies to obtain a plurality of groups of parameter design initial values.
In the embodiment of the present invention, for the convenience of analysis, the variation in the parameter deviation is attributed to the variation in the normalized frequency, which facilitates the design of the parameter.
And (3) giving the transformer transformation ratio:
Figure BDA0003519150460000111
the maximum voltage gain is:
Figure BDA0003519150460000112
the minimum voltage gain is:
Figure BDA0003519150460000113
normalized frequency range:
Figure BDA0003519150460000114
minimum normalized frequency:
Figure BDA0003519150460000115
maximum normalized frequency:
Figure BDA0003519150460000116
the parameters are given, and a design basis is provided for the parameter design below. The data are collated to obtain a plurality of sets of parameter design initial values, as shown in table 1.
TABLE 1
Figure BDA0003519150460000121
Step S3: and designing initial values and a preset function expression according to multiple groups of parameters, and calculating to obtain the initial inductance ratio of the CLLC direct-current transformer.
In a specific embodiment, the method for calculating and obtaining the initial inductance ratio of the CLLC dc transformer according to the initial values and the preset function expressions of the multiple sets of parameter design includes the following steps:
step S31: substituting a plurality of sets of parameter design initial values into a preset function expression, and calculating to obtain a functional relation between the quality factor and the inductance ratio;
step S32: and (4) simultaneously establishing a plurality of quality factor equations, and calculating to obtain the initial inductance ratio of the CLLC direct-current transformer.
In the embodiment of the present invention, to facilitate the parametersThe voltage gain expression is put into expression (7) by substituting a, b, c, d, and 1, and the expression is put into order as an expression for the quality factor Q. The expression after the arrangement is about the voltage gain M, the ratio k of the excitation inductance to the resonance inductance, and the normalized resonance frequency omeganAs follows:
Figure BDA0003519150460000131
in the parameter design, step S2 has given the basis of the parameter design. By substituting different design values in table 1 into equation (16), a functional relationship between the quality factor Q and the inductance ratio k can be obtained. By combining different Q value equations, a certain initial k value can be obtained. This is meant to mean that for different gain requirements there is a certain value of k that allows the converter to operate under the same load conditions.
Step S4: and determining an inductance ratio selection interval based on the initial inductance ratio.
In a specific embodiment, the voltage gain curve obtained according to the gain expression is definitely based on the initial inductance ratio, and then the inductance ratio selection interval is determined based on the optimal selection principle.
Step S5: and selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into a preset function expression to obtain quality factors corresponding to the inductance ratios.
In one embodiment, the selected k value is substituted into the Q value equation in table 1 to solve the corresponding Q value.
Step S6: and selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer.
In a specific embodiment, fig. 6 shows the influence curves of different K values on the voltage gain, and it can be seen from the graph that as the K value increases, the voltage gain gradually becomes flat, and near the resonant frequency point, the gain is approximately constant to 1, so that the K value is selected to be larger. Fig. 7 shows the effect curves of different Q values on the voltage gain, and it can be seen from the graph that as the quality factor increases, the voltage gain shows a gradually decreasing trend until the gain requirement is not satisfied. So in the selection of the figure of merit, its value cannot be selected too large.
In an embodiment, the method for designing the parameters of the CLLC dc transformer further includes:
step S6: and performing soft switching verification on the selected inductance ratio and the corresponding quality factor.
In one embodiment, the soft switching condition is checked after the k and Q values are selected. Namely, the selection of the excitation inductor also needs to meet the condition of zero voltage switching-on of the switching tube, and the value range is as follows:
Figure BDA0003519150460000141
in the above formula tdeadAs dead time of the switching tube, CossOutput capacitance of the selected switch tube, frIs the resonant frequency.
If the design requirement is met, namely the soft switch passes the verification, ending the parameter design process; if the soft switch verification passes, the value of k can be increased or decreased properly, and the Q value is solved again to judge the soft switch condition.
The embodiment of the present invention further provides a system for designing parameters applied to a CLLC dc transformer, as shown in fig. 8, including:
the first acquisition module 1 is used for acquiring design deviation values of parameters of the CLLC direct-current transformer. For details, refer to the related description of step S1 in the above embodiment, and are not described herein again.
And the second acquisition module 2 is used for acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values. For details, refer to the related description of step S2 in the above embodiment, and are not described herein again.
And the first calculation module 3 is used for calculating the initial inductance ratio of the CLLC direct-current transformer according to the plurality of sets of parameter design initial values and the preset function expression. For details, refer to the related description of step S3 in the above embodiment, and are not described herein again.
And the first processing module 4 is configured to determine an inductance ratio selection interval based on the initial inductance ratio. For details, refer to the related description of step S4 in the above embodiment, and are not described herein again.
And the second processing module 5 is configured to select a plurality of inductance ratios based on the inductance ratio selection interval, and bring the plurality of inductance ratios into the preset function expression respectively to obtain quality factors corresponding to the plurality of inductance ratios. For details, refer to the related description of step S5 in the above embodiment, and are not described herein again.
And the first selection module 6 is used for selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer. For details, refer to the related description of step S6 in the above embodiment, and are not described herein again.
An embodiment of the present invention further provides a computer device, as shown in fig. 9, the device may include a processor 81 and a memory 82, where the processor 81 and the memory 82 may be connected by a bus or in another manner, and fig. 9 takes the connection by the bus as an example.
Processor 81 may be a Central Processing Unit (CPU). The Processor 81 may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, or combinations thereof.
The memory 82, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the corresponding program instructions/modules in embodiments of the present invention. The processor 81 executes various functional applications and data processing of the processor by executing non-transitory software programs, instructions and modules stored in the memory 82, that is, implements the method in the above-described method embodiments.
The memory 82 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by the processor 81, and the like. Further, the memory 82 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 82 may optionally include memory located remotely from the processor 81, which may be connected to the processor 81 via a network. Examples of such networks include, but are not limited to, the internet, intranets, mobile communication networks, and combinations thereof.
One or more modules are stored in the memory 82 and, when executed by the processor 81, perform the methods of embodiments of the present invention.
The details of the computer device can be understood by referring to the corresponding descriptions and effects in the embodiments shown in fig. 1 to fig. 7, and are not described herein again.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD) or a Solid State Drive (SSD), etc.; the storage medium may also comprise a combination of memories of the kind described above.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD) or a Solid State Drive (SSD), etc.; the storage medium may also comprise a combination of memories of the kind described above.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.

Claims (10)

1. A parameter design method applied to a CLLC direct current transformer is characterized by comprising the following steps:
obtaining design deviation values of all parameters of the CLLC direct-current transformer;
acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values;
according to the multiple groups of parameter design initial values and a preset function expression, calculating to obtain an initial inductance ratio of the CLLC direct-current transformer;
determining an inductance ratio selection interval based on the initial inductance ratio;
selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into the preset function expression to obtain quality factors corresponding to the inductance ratios;
and selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer.
2. The method for designing parameters of CLLC DC transformer according to claim 1, wherein said obtaining multiple sets of initial values of parameter design based on each deviation value of parameter design comprises:
calculating to obtain a voltage gain fluctuation range and a fluctuation range of the normalized frequency according to the design deviation value of each parameter;
and selecting a plurality of voltage gains according to the voltage gain fluctuation range, selecting a plurality of normalization frequencies according to the fluctuation range of the normalization frequencies, and arranging and combining the plurality of voltage gains and the plurality of normalization frequencies to obtain a plurality of groups of parameter design initial values.
3. The method for designing parameters of the CLLC DC transformer according to claim 2, wherein said preset function expression is as follows:
Figure FDA0003519150450000021
wherein M is the voltage gain of the CLLC direct-current transformer; k is an inductance ratio; omeganTo normalize the resonant frequency.
4. The method for designing the parameters of the CLLC DC transformer according to claim 3, wherein the step of calculating the initial inductance ratio of the CLLC DC transformer according to the multiple sets of the parameter design initial values and the preset function expression comprises the steps of:
substituting a plurality of groups of parameter design initial values into the preset function expression, and calculating to obtain a functional relation between a quality factor and an inductance ratio;
and (4) simultaneously establishing a plurality of quality factor equations, and calculating to obtain the initial inductance ratio of the CLLC direct-current transformer.
5. The method for designing parameters of the CLLC DC transformer according to claim 1, further comprising: and performing soft switching verification on the selected inductance ratio and the corresponding quality factor.
6. The method for designing parameters of the CLLC DC transformer according to claim 5, wherein the soft switching verification is performed on the selected inductance ratio and the corresponding quality factor by the following formula:
Figure FDA0003519150450000022
wherein Q is a quality factor; t is tdeadThe dead time of a switching tube of the CLLC direct current transformer is obtained; cossThe output capacitance of the selected switch tube; f. ofrIs the resonant frequency;
Figure FDA0003519150450000031
V0to output a voltage, P0Is the output power.
7. The method of claim 5, wherein the inductance ratio and the quality factor are re-selected when the selected inductance ratio and the quality factor corresponding thereto do not satisfy the soft-switching verification requirement.
8. A parameter design system applied to a CLLC direct current transformer is characterized by comprising:
the first acquisition module is used for acquiring design deviation values of all parameters of the CLLC direct-current transformer;
the second acquisition module is used for acquiring a plurality of groups of parameter design initial values based on the parameter design deviation values;
the first calculation module is used for calculating and obtaining the initial inductance ratio of the CLLC direct-current transformer according to the plurality of groups of parameter design initial values and a preset function expression;
the first processing module is used for determining an inductance ratio selection interval based on the initial inductance ratio;
the second processing module is used for selecting a plurality of inductance ratios based on the inductance ratio selection interval, and respectively substituting the inductance ratios into the preset function expression to obtain quality factors corresponding to the inductance ratios;
the first selection module is used for selecting an inductance ratio and a quality factor based on the variation trend of the voltage gain of the CLLC direct-current transformer.
9. A computer-readable storage medium, characterized in that the computer-readable storage medium stores computer instructions for causing the computer to execute the method for CLLC dc transformer parameter design according to any one of claims 1-7.
10. A computer device, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected with each other, the memory stores computer instructions, and the processor executes the computer instructions to execute the method for designing parameters of the CLLC dc transformer according to any one of claims 1 to 7.
CN202210172906.6A 2022-02-24 2022-02-24 Parameter design method and system applied to CLLC direct-current transformer Pending CN114531039A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117614287A (en) * 2024-01-18 2024-02-27 浙江大学 CLLC circuit capable of realizing high gain utilization rate by adjusting parameter design
CN117937950A (en) * 2024-03-21 2024-04-26 国网浙江省电力有限公司杭州市钱塘区供电公司 Parameter optimization method based on three-phase CLLC resonant converter and converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117614287A (en) * 2024-01-18 2024-02-27 浙江大学 CLLC circuit capable of realizing high gain utilization rate by adjusting parameter design
CN117614287B (en) * 2024-01-18 2024-04-12 浙江大学 CLLC circuit capable of realizing high gain utilization rate by adjusting parameter design
CN117937950A (en) * 2024-03-21 2024-04-26 国网浙江省电力有限公司杭州市钱塘区供电公司 Parameter optimization method based on three-phase CLLC resonant converter and converter

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