CN114528187A - Power consumption management method and device - Google Patents

Power consumption management method and device Download PDF

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Publication number
CN114528187A
CN114528187A CN202210162831.3A CN202210162831A CN114528187A CN 114528187 A CN114528187 A CN 114528187A CN 202210162831 A CN202210162831 A CN 202210162831A CN 114528187 A CN114528187 A CN 114528187A
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mode
switching
load
working mode
link
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路红飞
王骁
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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Priority to CN202210162831.3A priority Critical patent/CN114528187A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/302Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a software system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3041Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is an input/output interface
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3055Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3058Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
    • G06F11/3062Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3433Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment for load management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
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Abstract

The application discloses a power consumption management method and device, and belongs to the technical field of terminals. The power consumption management method comprises the following steps: obtaining an IO load of a system; switching the working mode of the PCIE link according to the IO load; and/or switching the working mode of the PCIE link according to the running state of the application program; different working modes correspond to different link rates, and different link rates correspond to different system power consumption.

Description

Power consumption management method and device
Technical Field
The application belongs to the technical field of terminals, and particularly relates to a power consumption management method and device.
Background
In the related art, in order to improve the data transmission performance of the memory module in the electronic device, two channels may be used for data transmission, so as to improve the data transmission performance by one time. For example, a dual channel of a nonvolatile memory (NVM Express, NVMe) and a Universal Flash Storage (UFS) may be used for data transmission.
However, the dual-channel data transmission is usually based on a Peripheral Component Interconnect Express (PCIE) bus, which increases the system power consumption while improving the data transmission performance, resulting in serious heat generation of the device. Therefore, an effective solution for solving the problem of high power consumption in dual-channel data transmission is needed.
Disclosure of Invention
An object of the embodiments of the present application is to provide a power consumption management method and apparatus, which can solve the problem of high system power consumption when a storage module in an electronic device uses two channels for data transmission.
In a first aspect, an embodiment of the present application provides a power consumption management method, where the method includes:
obtaining an IO load of a system;
switching the working mode of the PCIE link according to the IO load; and/or the presence of a gas in the gas,
switching the working mode of the PCIE link according to the running state of the application program;
different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
In a second aspect, an embodiment of the present application provides a power consumption management apparatus, including:
the acquisition module is used for acquiring the IO load of the system;
the link switching module is used for switching the working mode of the PCIE link according to the IO load; and/or switching the working mode of the PCIE link according to the running state of the application program;
different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
In a third aspect, embodiments of the present application provide an electronic device, which includes a processor and a memory, where the memory stores a program or instructions executable on the processor, and the program or instructions, when executed by the processor, implement the steps of the method according to the first aspect.
In a fourth aspect, embodiments of the present application provide a readable storage medium, on which a program or instructions are stored, which when executed by a processor implement the steps of the method according to the first aspect.
In a fifth aspect, an embodiment of the present application provides a chip, where the chip includes a processor and a communication interface, where the communication interface is coupled to the processor, and the processor is configured to execute a program or instructions to implement the method according to the first aspect.
In a sixth aspect, embodiments of the present application provide a computer program product, stored on a storage medium, for execution by at least one processor to implement the method according to the first aspect.
In the embodiment of the present application, multiple working modes may be set for a dual-channel PCIE link, where different working modes correspond to different link rates, and different link rates correspond to different system power consumptions. When the device runs, the IO load of the system can be acquired, and the working mode of the PCIE link is switched according to the IO load and/or the running state of the application program, so that the power consumption of the system is adjusted. Therefore, the working mode of the PCIE can be switched according to the IO load of the system and/or the running state of the application program, and further the adjustment of the power consumption of the system is realized, so that the data transmission performance and the system power consumption of the storage module can be considered, the better balance is achieved between the data transmission performance and the system power consumption, the overhigh power consumption of the system is avoided, and the user experience is improved.
Drawings
FIG. 1 is a schematic flow chart diagram of a power consumption management method according to an embodiment of the application;
FIG. 2 is a schematic flow chart diagram of a power consumption management method according to an embodiment of the application;
fig. 3 is a schematic diagram of a setting method of an application list according to an embodiment of the present application;
fig. 4 is a schematic diagram of a setting method of an application list according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a prompt message according to an embodiment of the application;
FIG. 6 is a schematic flow chart diagram of a power consumption management method according to an embodiment of the application;
fig. 7 is a schematic configuration diagram of a power consumption management apparatus according to an embodiment of the present application;
FIG. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 9 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present disclosure.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.
The following describes in detail a power consumption management method, a power consumption management apparatus, and an electronic device according to embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic flow chart of a power consumption management method according to an embodiment of the present application, which may be executed by an electronic device including a storage module, where the electronic device is a computer device, the storage module may be a magnetic disk, and where the electronic device is a terminal device (such as a smart phone), the storage module may be a storage memory in a smart terminal device. The power consumption management method of the embodiment of the application comprises the following steps.
S12: and obtaining the IO load of the system.
The IO load of the system may be monitored and obtained while the electronic device is operating. The system may be an IO system of an electronic device.
In the embodiment of the application, when the IO load of the system is obtained, the IO load can be obtained according to a set period. The setting period may be 60ms, or other time duration, and may be specifically set according to an actual scene, and is not specifically limited herein.
Optionally, as an embodiment, when the IO load of the system is obtained, specifically, first, the length of time that the system is in a busy state in a set period may be obtained, and then a ratio between the length of time that the system is in the busy state and the total length of the set period is determined as the IO load of the system. For example, the set period is 60ms, and in the 60ms, the duration that the system is in a busy state is 30ms, and the IO load is 50%. Whether the system is in a busy state can be determined by judging whether incomplete requests exist in the work queue, if no request waits for processing, the state of the system is in an idle state, and otherwise, the state of the system is in a busy state.
S14: switching the working mode of the PCIE link according to the IO load and/or switching the working mode of the PCIE link according to the running state of the application program; different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
The PCIE link is a link for performing data transmission based on a PCIE bus in the electronic device. In this embodiment of the application, the PCIE link may have a plurality of working modes, the number of the plurality of working modes may be 2, 3, or 4, and the like, and the specific number may be determined according to an actual scene, and is not specifically limited here. Each operating mode may correspond to a different link rate, and the different link rates correspond to different system power consumption. Specifically, the higher the link rate of the PCIE link, the higher the rate of data transmission, and the higher the system power consumption.
In S14, after the IO load of the system is obtained, the operating mode of the PCIE link may be switched according to the IO load and/or the operating state of the application program. For example, when the IO load is high and/or the number of running applications is large, the operating mode of the PCIE may be switched to the mode with the high link rate to increase the data transmission rate and meet the requirement of data transmission, and when the IO load is low and/or the number of running applications is small, the operating mode of the PCIE may be switched to the mode with the low link rate to reduce the system power consumption without requiring the high link rate.
Therefore, the working mode of the PCIE can be switched according to the IO load of the system and/or the running state of the application program, and further the adjustment of the power consumption of the system is realized, so that the data transmission performance and the system power consumption of the storage module can be considered, the better balance is achieved between the data transmission performance and the system power consumption, the overhigh power consumption of the system is avoided, and the user experience is improved.
Optionally, as an embodiment, when the working mode of the PCIE link is switched according to the IO load, an adjustment threshold for the IO load may be preset for different working modes of the PCIE link, so that when the working mode of the PCIE link is switched, mode switching may be performed according to the IO load and the preset adjustment threshold, so that accurate switching of the working modes may be implemented, and data transmission performance and system power consumption of the storage module may be better considered.
Specifically, in the current operating mode, it may be determined whether the IO load is greater than or equal to a first threshold. If the IO load is greater than or equal to the first threshold, the working mode of the PCIE link may be switched from the current working mode to the first mode, and the link rate of the first mode is greater than the link rate of the current working mode. Therefore, under the condition of high IO load, the current working mode can be switched to the working mode with high link rate, so that the data transmission rate can be increased, and the requirement of data transmission can be met. When the current working mode is switched to the first mode, if the current working mode is the first mode, the current working mode can be kept unchanged without switching.
In the current operating mode, it may also be determined whether the IO load is less than or equal to a second threshold. If the IO load is less than or equal to the second threshold, the working mode of the PCIE link may be switched from the current working mode to the second mode. The link rate of the second mode is less than the link rate of the current mode of operation. Thus, under the condition that the IO load is low, the working mode can be switched to the working mode with low link rate, and therefore, the system power consumption can be reduced under the condition that high link rate is not needed. When the current working mode is switched to the second mode, if the current working mode is the second mode, the current working mode can be kept unchanged without switching.
It should be noted that, in a possible implementation manner, the first threshold may be equal to the second threshold, so that when the mode is switched according to the first threshold and the second threshold, when the IO load is greater than or equal to the first threshold (that is, the second threshold), the current operating mode may be switched to the first mode, and when the IO load is less than or equal to the first threshold (that is, the second threshold), the current operating mode may be switched to the second mode. In another possible implementation manner, the first threshold may also be greater than the second threshold, so that when the mode is switched according to the first threshold and the second threshold, if the IO load is greater than or equal to the first threshold, the current operating mode may be switched to the first mode, if the IO load is less than or equal to the second threshold, the current operating mode may be switched to the second mode, and if the IO load is between the second threshold and the first threshold, the current operating mode may be kept unchanged.
For example, the working modes of the PCIE link include a high-speed mode, a medium-speed mode, and a low-speed mode, and the current working mode is the medium-speed mode. In this way, in one implementation, if the first threshold is equal to the second threshold, when the mode is switched, the medium speed mode may be switched to the high speed mode when the IO load is greater than or equal to the first threshold, and the medium speed mode may be switched to the low speed mode when the IO load is less than the first threshold. In another implementation manner, if the first threshold is greater than the second threshold, when the mode is switched, if the IO load is greater than or equal to the first threshold, the medium-speed mode may be switched to the high-speed mode, if the IO load is less than or equal to the second threshold, the medium-speed mode may be switched to the low-speed mode, and if the IO load is greater than the second threshold and less than the first threshold, the current medium-speed mode may be kept unchanged.
In addition, the threshold value corresponding to switching the operation mode from another operation mode to the operation mode may be the same as or different from the threshold value corresponding to switching the operation mode to another operation mode.
Taking the high-speed mode and the medium-speed mode as an example, in one implementation manner, a threshold of an IO load corresponding to switching between the high-speed mode and the medium-speed mode may be set to be a, so that when the current working mode is the medium-speed mode, the medium-speed mode may be switched to the high-speed mode if the IO load is greater than or equal to the threshold a, and after the working mode is switched to the high-speed mode, the high-speed mode may be switched to the medium-speed mode if the IO load is less than the threshold a. In another implementation manner, threshold values of an IO load corresponding to switching between the high-speed mode and the medium-speed mode may be set to be a and B, and a is smaller than B, so when the current working mode is the medium-speed mode, mode switching is not performed when the IO load is greater than or equal to the threshold value a, but the medium-speed mode is switched to the high-speed mode when the IO load is greater than or equal to the threshold value B, and after the working mode is switched to the high-speed mode, mode switching is not performed when the IO load is less than or equal to the threshold value B, but the high-speed mode is switched to the medium-speed mode when the IO load is less than or equal to the threshold value a.
In a possible implementation manner, when the working mode of the PCIE link includes a high-speed mode and a low-speed mode, and a threshold corresponding to the IO load when the high-speed mode is switched to the low-speed mode is different from a threshold corresponding to the IO load when the low-speed mode is switched to the high-speed mode, a specific implementation manner of switching the working mode of the PCIE link according to the IO load may be as shown in fig. 2. The embodiment shown in fig. 2 comprises the following steps:
step 101: after the system is started, initializing the upper limit value and the lower limit value of the IO load threshold value and monitoring period.
Here, the upper limit value of the IO load threshold is a threshold corresponding to the IO load when the low speed mode is switched to the high speed mode, and the lower limit value is a threshold corresponding to the IO load when the low speed mode is switched to the high speed mode. The monitoring period is a set period for obtaining the IO load.
Step 102: and resetting the monitoring timer.
Step 103: and starting a new period and detecting the IO load.
Step 104: and judging whether the period is up, if so, entering the step 105, otherwise, returning to the step 103 to continue timing.
Step 105: and calculating the proportion of the duration of the system in a busy state in the period to the whole period to obtain the IO load.
Step 106: and judging whether the IO load of the period is larger than the upper limit value, if so, entering a step 107, and otherwise, entering a step 109.
Step 107: if the IO load is greater than the upper limit, it is determined whether the current PCIE link is GEN1 (corresponding to the low speed mode), if so, step 108 is performed, otherwise, step 112 is performed.
Step 108: in case the current link is GEN1, the link is switched to GEN2 (corresponding to high speed mode).
Step 109: and judging whether the IO load is smaller than a lower limit value, if so, entering a step 110, otherwise, entering a step 112.
Step 110: and under the condition that the IO load is smaller than the lower limit value, judging whether the current link is GEN2, if so, entering a step 111, and otherwise, entering a step 112.
Step 111: in the case that the current link is GEN2, the link is switched to GEN 1.
Step 112: and if the link switching condition is not met, continuing to maintain the current link and entering the next monitoring period.
The embodiment shown in fig. 2 can realize the autonomous switching of the PCIE link working mode, that is, the whole switching process is completed by software, manual intervention by a user is not required, and the method is intelligent, efficient, convenient and fast. In addition, the high-speed mode and the low-speed mode can be flexibly switched according to the IO load, so that both the system performance and the power consumption can be considered, the balance between the system performance and the power consumption is better, and the user experience is improved.
Optionally, as an embodiment, in the step S14, when the operating mode of the PCIE link is switched, the operating mode of the PCIE link may also be switched only according to an operating state of an application program installed in the electronic device.
Specifically, an application list may be preset, where at least one application program of application programs installed in the electronic device is recorded in the preset application list, and the at least one application program corresponds to a target operating mode of the PCIE link. The target operating mode may be any one of a plurality of operating modes of the PCIE link, for example, the target operating mode may be an operating mode with the highest link rate or an operating mode with the lowest link rate. The target working mode corresponding to the at least one application program may be that the at least one application program corresponds to a same working mode, where the same working mode is the target working mode, and when one or more application programs in the at least one application program operate, the working mode of the PCIE link needs to be switched to the target working mode.
When the operating mode of the PCIE link is switched according to the operating state of the application program, the operating state of the application program installed in the electronic device may be monitored, and when the operating state of any application program changes, for example, the application program changes from operating to closing, or changes from closing to starting to operate, it may be determined whether the number of the application programs that are currently operating in the preset application list is greater than zero. And under the condition that the number of the running application programs in the preset application list is greater than zero, switching the current working mode to the target working mode. Optionally, if the current operating mode is already the target operating mode, the current operating mode may be kept unchanged without switching.
In this way, the working mode of the PCIE link may be switched according to the running state of the application program in the electronic device, and specifically, the working mode of the PCIE link may be switched to the target working mode when the number of the application programs that are running in the preset application list is greater than zero, so that the personalized use requirement of the user on the specified application may be met, and the user experience may be improved.
At least one application program in the preset application list may be set by a user, or may be set by default by the system, or may be set by the system according to historical usage data of each installed application by the user, which is not specifically limited herein.
Optionally, as an embodiment, in the case that at least one application program in the preset application list is set by the user, the user may perform the setting at least in the following two ways.
The first mode is as follows: the setting is made by an application icon.
Specifically, a user can perform preset operation on an application icon of a system desktop, the system can pop up a setting menu after receiving the preset operation of the user, the menu can include corresponding setting options, and the user can set the setting through the corresponding options.
As shown in fig. 3, after the user presses the WeChat icon for a long time, the system may pop up a setting menu, where the setting menu includes five options, namely "application split", "uninstall application", "join high-speed list", "edit desktop", and "my two-dimensional code", and the user may click on the "join high-speed list" option to join the WeChat into the preset application list. Optionally, after adding the WeChat to the preset application list, when the user presses the icon of the WeChat for a long time again, the popup menu may include an "exit high speed List" option (not shown in FIG. 3), and the user may remove the WeChat from the preset application list by clicking the "exit high speed List" option.
The second mode is as follows: the setting is performed by the setting function of the system.
Specifically, the management options of the application list can be added to the application and the authority in the setting function of the system, and the user can view the application programs in the application list through the path of "system setting- > application and authority- > application list management" and can also set the application programs in the application list.
As shown in fig. 4, after entering the application and the authority set by the system, a high-speed application list (i.e., the preset application list) is displayed at the lowest part of the application and authority page, and after the user clicks the high-speed application list, the application programs included in the list can be viewed. In addition, each application is followed by a "-" minus sign, and clicking on the minus sign removes the application from the list. There is a "+" symbol below the list and clicking on the plus sign can add a new application to the list.
Optionally, as an embodiment, a plurality of preset application lists may be set in the same manner, and different preset application lists may correspond to different operating modes of the PCIE link. Specifically, each preset application list may include at least one application program, and the at least one application program may correspond to one of the operation modes of the PCIE link. For example, the working mode of the PCIE link includes a high-speed mode, a medium-speed mode, and a low-speed mode, an application list 1 and an application list 2 may be set, where the application list 1 corresponds to the high-speed mode, the application list 2 corresponds to the medium-speed mode, and the priority of the application list 1 is higher than that of the application list 2, when both the application list 1 and the application list 2 have applications that have been started, the working mode may be switched to the high-speed mode because the priority of the application list 1 is higher than that of the application list 2, and when there is no application that has been started and operated in the application list 1 and there is an application that has been started and operated in the application list 2, the working mode may be switched to the medium-speed mode.
Optionally, as an embodiment, in the above S14, the operating mode of the PCIE link may also be switched according to the IO load and the operating state of the application program at the same time. Specifically, the operating state of the installed application programs in the electronic device may be monitored, the current operating mode may be switched to the target operating mode when the number of the application programs running in the preset application list is greater than zero, and the operating mode of the PCIE link may be switched according to the IO load when the number of the application programs running in the preset application list is equal to zero. The preset application list may be the same as the preset application list in the above embodiment in which the operating mode of the PCIE link is switched only according to the operating state of the application program, and will not be described in detail here. The specific implementation manner of switching the current working mode to the target working mode according to the running state of the application program may refer to the specific implementation of the above corresponding steps, and a description thereof is not repeated here. According to the specific implementation manner of the working mode of the IO load PCIE link, reference may also be made to the specific implementation of the above corresponding steps, and descriptions are not repeated here.
Therefore, when the working mode of the PCIE link is switched, the working mode of the PCIE link can be switched preferentially according to the running state of the application program, so that the personalized use requirement of a user on the specified application can be met, and the user experience is improved. Under the condition that the number of the running application programs in the preset application list is equal to zero, the working mode of the PCIE link can be switched according to the IO load, so that the data transmission performance and the system power consumption of the storage module can be considered under the condition that a user does not have personalized use requirements, the overhigh system power consumption is avoided, and the user experience can be improved.
Optionally, as an embodiment, in the case that the operating mode of the PCIE link is switched according to the operating state of the application, or the operating mode of the PCIE link is switched according to the IO load and the operating state of the application, after the current operating mode of the PCIE link is switched to the target operating mode with a higher link rate, considering that the actual IO load of the system may not need such a high link rate, or a user may mistakenly add a certain application program into the preset application list to cause that the operating mode is switched to the target operating mode when the application program operates, so that the power consumption of the system is relatively high, therefore, an early warning mechanism may be set to avoid that the power consumption of the system is in an insignificant high power consumption state.
Specifically, after the current working mode of the PCIE link is switched to the target working mode, it may be determined whether the IO load is less than the third threshold within the preset time period. The preset duration and the third threshold may be set according to an actual scene, and are not specifically limited herein. If the IO load is less than the third threshold within the preset duration, it may be indicated that the current IO load is low, and such a high link rate may not be required, and at this time, a prompt message may be displayed, where the prompt message may be used to prompt a user whether to switch the target operating mode. If the user confirms to switch, the switching confirmation information can be input, and the target working mode can be switched to the third mode under the condition that the switching confirmation information of the user is received. The third mode may be any mode of operation having a link rate lower than that of the target mode of operation. If the user confirms not to switch, the prompt message can be ignored, so that the target working mode can be kept unchanged under the condition that the switching information confirmed by the user is not received.
As shown in fig. 5, after the operating mode is switched to the high-speed mode according to the operating state of the application program, and the IO load is smaller than the third threshold within the preset time period, the system may display a power consumption warning (i.e., a prompt message) on the desktop, where the power consumption warning includes detailed prompt messages, and an ignore option and a detail option. If the user confirms that the current high-speed mode is kept unchanged, the user can click an ignoring option, and after the system receives the ignoring information, the user can keep the current high-speed mode unchanged. If the user wants to view the details, the user can click on the details option and the system will display the details. If the user confirms to switch the modes according to the detail information, the user can click the option of switching the low-speed mode in the detail, and after receiving the confirmed switching information of the user, the system can switch the current high-speed mode to the low-speed mode. If the user confirms that the high-speed mode is still kept unchanged according to the detail information, the user can click an ignoring option, and after the system receives the ignoring information, the current high-speed mode can be kept unchanged.
Optionally, as an embodiment, the third threshold may be determined according to an adjustment threshold corresponding to the target operating mode. For example, when other working modes are switched to the target working mode, the threshold corresponding to the IO load is a, and when the target working mode is switched to the other working modes, the threshold corresponding to the IO load is B, and the third threshold may be set to a value between a and B, so that the problem that the personalized use requirement of the user for the specified application cannot be met due to the fact that the target working mode is switched to the other working modes by mistake under the condition that the IO load fluctuates can be avoided.
Taking the working modes of the PCIE link include a high-speed mode and a low-speed mode, and the high-speed mode is a target working mode, for example, when the low-speed mode is switched to the high-speed mode according to the IO load, the threshold corresponding to the IO load is 70%, and when the high-speed mode is switched to the low-speed mode according to the IO load, the threshold corresponding to the IO load is 30%, and then the third threshold may be set to 50%.
In a possible implementation manner, when the working modes of the PCIE link include a high-speed mode and a low-speed mode, the target working mode is the high-speed mode, and the threshold corresponding to the IO load when the high-speed mode is switched to the low-speed mode is different from the threshold corresponding to the IO load when the low-speed mode is switched to the high-speed mode, and the early warning threshold (i.e., the third threshold) is located between the two thresholds, the implementation logic for performing early warning on the target working mode (i.e., the high-speed mode) may be as shown in fig. 6. The embodiment shown in fig. 6 comprises the following steps:
step 201: the user adds a specific application to the application list.
Step 202: and if the application list is not empty, starting an early warning mechanism.
Step 203: and judging whether the applications in the list are started or not, if at least one application is started, entering the step 204, and if not, entering the step 212.
Step 204: and judging whether the current system starts an early warning mechanism or not, if so, entering a step 205, and otherwise, entering a step 212.
Step 205: and judging whether the current link is in a high-speed mode, if so, entering a step 207, and otherwise, entering a step 206.
Step 206: the link is switched to high speed mode.
Step 207: and judging whether the long time is lower than the early warning threshold value according to the early warning mechanism, if so, entering a step 208, and otherwise, returning to the step 202.
Step 208: and sending out early warning prompts to the user.
Step 209: judging whether the user selects to switch to the low-speed mode, if so, entering a step 211, otherwise, entering a step 210;
step 210: and under the condition that the user selects to ignore the early warning prompt, the current high-speed mode is kept, and the early warning mechanism is closed, so that repeated reminding is avoided.
Step 211: and switching the high-speed mode to the low-speed mode when the user selects to switch to the low-speed mode.
Step 212: and switching the link according to the IO load after switching to the low-speed mode.
Step 213: and circularly judging whether a new application is started in the application list, if not, continuously maintaining the current rate switching mode, otherwise, returning to the step 202, and starting a new round of early warning mechanism.
The embodiment shown in fig. 6 enables a user to have permission to specify a specific application to run in a high-speed mode through the application list, thereby satisfying the customized requirements of the user and improving the user experience. Because the IO load threshold is fixed, when the system is stuck, the rate is not cut to the highest rate, so that based on the application list, the user can add the application which is easy to be stuck into the list, thereby making up the deficiency of the default IO load threshold to a certain extent, and further improving the system performance and the user experience. By providing an early warning mechanism, the situation that a user adds some light-load applications into an application list, unnecessary power consumption is caused when the system runs in a high-speed mode for a long time, and the endurance time of the system is prolonged can be avoided.
In the embodiment of the present application, multiple working modes may be set for a dual-channel PCIE link, where different working modes correspond to different link rates, and different link rates correspond to different system power consumptions. When the device runs, the IO load of the system can be acquired, and the working mode of the PCIE link is switched according to the IO load and/or the running state of the application program, so that the power consumption of the system is adjusted. Therefore, the working mode of the PCIE can be switched according to the IO load of the system and/or the running state of the application program, and further the adjustment of the power consumption of the system is realized, so that the data transmission performance and the system power consumption of the storage module can be considered, the better balance is achieved between the data transmission performance and the system power consumption, the overhigh power consumption of the system is avoided, and the user experience is improved.
According to the power consumption management method provided by the embodiment of the application, the execution main body can be a power consumption management device. In the embodiment of the present application, a power consumption management apparatus executes a power consumption management method as an example, and the power consumption management apparatus provided in the embodiment of the present application is described.
Fig. 7 is a schematic structural diagram of a power consumption management apparatus according to an embodiment of the present application, which may correspond to a terminal or an electronic device in other embodiments. As shown in fig. 7, the apparatus 700 includes the following modules.
An obtaining module 701, configured to obtain an IO load of a system;
a link switching module 702, configured to switch a working mode of a PCIE link according to the IO load; and/or switching the working mode of the PCIE link according to the running state of the application program;
different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
Optionally, as an embodiment, the link switching module 702 is further configured to:
under the condition that the IO load is larger than or equal to a first threshold value, switching the current working mode into a first mode; the link rate of the first mode is greater than the link rate of the current operating mode;
under the condition that the IO load is smaller than or equal to a second threshold value, switching the current working mode into a second mode; the link rate of the second mode is less than the link rate of the current operating mode;
wherein the first threshold is greater than or equal to the second threshold.
Optionally, as an embodiment, the link switching module 702 is further configured to:
under the condition that the running state of the application program changes and the number of the application programs running in the preset application list is greater than zero, switching the current working mode into a target working mode;
the preset application list comprises at least one application program, and the at least one application program corresponds to a target working mode of the PCIE link.
Optionally, as an embodiment, the link switching module 702 is further configured to:
under the condition that the number of the running application programs in the preset application list is larger than zero, switching the current working mode into the target working mode;
and under the condition that the number of the running application programs in the preset application list is equal to zero, switching the working mode of the PCIE link according to the IO load.
Optionally, as an embodiment, the link switching module 702 is further configured to:
displaying prompt information under the condition that the IO load is smaller than a third threshold value within a preset time length, wherein the prompt information is used for prompting a user whether to switch the target working mode;
under the condition of receiving switching confirmation information, switching the target working mode into a third mode, wherein the link rate of the third mode is less than that of the target working mode;
and keeping the target working mode unchanged under the condition that the switching confirmation information is not received.
Optionally, as an embodiment, the obtaining module 701 is further configured to:
acquiring the duration of the system in a busy state in a set period;
and determining the proportion between the duration of the system in a busy state and the total duration of the set period as the IO load.
The apparatus 700 according to the embodiment of the present application may refer to the method flow shown in fig. 1 corresponding to the embodiment of the present application, and each unit/module and the other operations and/or functions described above in the apparatus 700 are respectively for implementing the corresponding flow in the method shown in fig. 1, and can achieve the same or equivalent technical effects, and are not repeated herein for brevity.
The power consumption management apparatus in the embodiment of the present application may be an electronic device, or may be a component in the electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal, or may be a device other than a terminal. The electronic Device may be, for example, a Mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic Device, a Mobile Internet Device (MID), an Augmented Reality (AR)/Virtual Reality (VR) Device, a robot, a wearable Device, an ultra-Mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and may also be a server, a Network Attached Storage (NAS), a Personal Computer (PC), a Television (TV), a teller machine, a self-service machine, and the like, and the embodiments of the present application are not particularly limited.
The power consumption management device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, and embodiments of the present application are not limited specifically.
The power consumption management device provided in the embodiment of the present application can implement each process implemented in the method embodiments of fig. 1 to fig. 6, and is not described here again to avoid repetition.
Optionally, as shown in fig. 8, an electronic device 800 is further provided in this embodiment of the present application, and includes a processor 801 and a memory 802, where the memory 802 stores a program or an instruction that can be executed on the processor 801, and when the program or the instruction is executed by the processor 801, the steps of the foregoing power consumption management method embodiment are implemented, and the same technical effects can be achieved, and are not described again here to avoid repetition.
It should be noted that the electronic device in the embodiment of the present application includes the mobile electronic device and the non-mobile electronic device described above.
Fig. 9 is a schematic diagram of a hardware structure of an electronic device implementing an embodiment of the present application.
The electronic device 900 includes, but is not limited to: a radio frequency unit 901, a network module 902, an audio output unit 903, an input unit 904, a sensor 905, a display unit 906, a user input unit 907, an interface unit 908, a memory 909, and a processor 910.
Those skilled in the art will appreciate that the electronic device 900 may further include a power source (e.g., a battery) for supplying power to various components, and the power source may be logically connected to the processor 910 through a power management system, so as to manage charging, discharging, and power consumption management functions through the power management system. The electronic device structure shown in fig. 9 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than those shown, or combine some components, or arrange different components, and thus, the description is not repeated here.
The processor 910 is configured to obtain an IO load of a system; switching the working mode of the PCIE link according to the IO load; and/or switching the working mode of the PCIE link according to the running state of the application program; different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
In the embodiment of the present application, multiple working modes may be set for a dual-channel PCIE link, where different working modes correspond to different link rates, and different link rates correspond to different system power consumptions. When the device runs, the IO load of the system can be acquired, and the working mode of the PCIE link is switched according to the IO load and/or the running state of the application program, so that the power consumption of the system is adjusted. Therefore, the working mode of the PCIE can be switched according to the IO load of the system and/or the running state of the application program, and further the adjustment of the power consumption of the system is realized, so that the data transmission performance and the system power consumption of the storage module can be considered, the better balance is achieved between the data transmission performance and the system power consumption, the overhigh power consumption of the system is avoided, and the user experience is improved.
Optionally, the processor 910 is further configured to switch the current operating mode to the first mode when the IO load is greater than or equal to a first threshold; the link rate of the first mode is greater than the link rate of the current operating mode;
under the condition that the IO load is smaller than or equal to a second threshold value, switching the current working mode into a second mode; the link rate of the second mode is less than the link rate of the current operating mode;
wherein the first threshold is greater than or equal to the second threshold.
Optionally, the processor 910 is further configured to switch the current working mode to the target working mode when the running state of the application program changes and the number of the application programs running in the preset application list is greater than zero;
the preset application list comprises at least one application program, and the at least one application program corresponds to a target working mode of the PCIE link.
Optionally, the processor 910 is further configured to switch the current working mode to the target working mode when the number of the application programs currently running in the preset application list is greater than zero;
and under the condition that the number of the running application programs in the preset application list is equal to zero, switching the working mode of the PCIE link according to the IO load.
Optionally, the processor 910 is further configured to display a prompt message when the IO load is smaller than a third threshold within a preset time period, where the prompt message is used to prompt a user whether to switch the target operating mode;
under the condition of receiving switching confirmation information, switching the target working mode into a third mode, wherein the link rate of the third mode is less than that of the target working mode;
and keeping the target working mode unchanged under the condition that the switching confirmation information is not received.
Optionally, the processor 910 is further configured to obtain a duration of the system being in a busy state in a set period;
and determining the proportion between the duration of the system in a busy state and the total duration of the set period as the IO load.
It should be understood that, in the embodiment of the present application, the input Unit 904 may include a Graphics Processing Unit (GPU) 9041 and a microphone 9042, and the Graphics Processing Unit 9041 processes image data of a still picture or a video obtained by an image capturing device (such as a camera) in a video capturing mode or an image capturing mode. The display unit 906 may include a display panel 9061, and the display panel 9061 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 907 includes at least one of a touch panel 9071 and other input devices 9072. A touch panel 9071 also referred to as a touch screen. The touch panel 9071 may include two parts, a touch detection device and a touch controller. Other input devices 9072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail herein.
The memory 909 may be used to store software programs as well as various data. The memory 909 may mainly include a first storage area storing a program or an instruction and a second storage area storing data, wherein the first storage area may store an operating system, an application program or an instruction (such as a sound playing function, an image playing function, and the like) required for at least one function, and the like. Further, the memory 909 may include volatile memory or nonvolatile memory, or the memory 909 may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM), a Static Random Access Memory (Static RAM, SRAM), a Dynamic Random Access Memory (Dynamic RAM, DRAM), a Synchronous Dynamic Random Access Memory (Synchronous DRAM, SDRAM), a Double Data Rate Synchronous Dynamic Random Access Memory (Double Data Rate SDRAM, ddr SDRAM), an Enhanced Synchronous SDRAM (ESDRAM), a Synchronous Link DRAM (SLDRAM), and a Direct Memory bus RAM (DRRAM). The memory 909 in the embodiments of the subject application includes, but is not limited to, these and any other suitable types of memory.
Processor 910 may include one or more processing units; optionally, the processor 910 integrates an application processor, which mainly handles operations related to the operating system, user interface, and applications, and a modem processor, which mainly handles wireless communication signals, such as a baseband processor. It is to be appreciated that the modem processor described above may not be integrated into processor 910.
The embodiment of the present application further provides a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or the instruction is executed by a processor, the process of the embodiment of the power consumption management method is implemented, and the same technical effect can be achieved, and in order to avoid repetition, details are not repeated here.
The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read only memory ROM, a random access memory RAM, a magnetic or optical disk, and the like.
The embodiment of the present application further provides a chip, where the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is configured to execute a program or an instruction to implement each process of the foregoing power consumption management method embodiment, and can achieve the same technical effect, and in order to avoid repetition, the details are not repeated here.
It should be understood that the chips mentioned in the embodiments of the present application may also be referred to as system-on-chip, system-on-chip or system-on-chip, etc.
Embodiments of the present application provide a computer program product, where the program product is stored in a storage medium, and the program product is executed by at least one processor to implement the processes in the foregoing power consumption management method embodiments, and can achieve the same technical effects, and in order to avoid repetition, details are not repeated here.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. Further, it should be noted that the scope of the methods and apparatus of the embodiments of the present application is not limited to performing the functions in the order illustrated or discussed, but may include performing the functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present application.
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (12)

1. A method for power consumption management, comprising:
obtaining an IO load of a system;
switching the working mode of the PCIE link according to the IO load; and/or the presence of a gas in the gas,
switching the working mode of the PCIE link according to the running state of the application program;
different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
2. The method according to claim 1, wherein the switching the operating mode of the PCIE link according to the IO load includes:
under the condition that the IO load is larger than or equal to a first threshold value, switching the current working mode into a first mode; the link rate of the first mode is greater than the link rate of the current operating mode;
under the condition that the IO load is smaller than or equal to a second threshold value, switching the current working mode into a second mode; the link rate of the second mode is less than the link rate of the current operating mode;
wherein the first threshold is greater than or equal to the second threshold.
3. The method according to claim 1, wherein the switching the operating mode of the PCIE link according to the running state of the application program includes:
under the condition that the running state of the application program changes and the number of the application programs running in the preset application list is greater than zero, switching the current working mode into a target working mode;
the preset application list comprises at least one application program, and the at least one application program corresponds to a target working mode of the PCIE link.
4. The method according to claim 3, wherein switching the operating mode of the PCIE link according to the IO load and switching the operating mode of the PCIE link according to the running state of the application program includes:
under the condition that the number of the running application programs in the preset application list is larger than zero, switching the current working mode into the target working mode;
and under the condition that the number of the running application programs in the preset application list is equal to zero, switching the working mode of the PCIE link according to the IO load.
5. The method according to claim 3 or 4, wherein after switching the current operation mode to the target operation mode, the method further comprises:
displaying prompt information under the condition that the IO load is smaller than a third threshold value within a preset time length, wherein the prompt information is used for prompting a user whether to switch the target working mode;
under the condition of receiving switching confirmation information, switching the target working mode into a third mode, wherein the link rate of the third mode is less than that of the target working mode;
and keeping the target working mode unchanged under the condition that the switching confirmation information is not received.
6. The method of claim 1, wherein obtaining the IO load of the system comprises:
acquiring the duration of the system in a busy state in a set period;
and determining the proportion between the duration of the system in a busy state and the total duration of the set period as the IO load.
7. A power consumption management apparatus, comprising:
the acquisition module is used for acquiring IO load of the system;
the link switching module is used for switching the working mode of the PCIE link according to the IO load; and/or switching the working mode of the PCIE link according to the running state of the application program;
different working modes correspond to different link rates, and different link rates correspond to different system power consumption.
8. The apparatus of claim 7, wherein the link switching module is further configured to:
under the condition that the IO load is larger than or equal to a first threshold value, switching the current working mode into a first mode; the link rate of the first mode is greater than the link rate of the current operating mode;
under the condition that the IO load is smaller than or equal to a second threshold value, switching the current working mode into a second mode; the link rate of the second mode is less than the link rate of the current operating mode;
wherein the first threshold is greater than or equal to the second threshold.
9. The apparatus of claim 7, wherein the link switching module is further configured to:
under the condition that the running state of the application program changes and the number of the application programs running in the preset application list is greater than zero, switching the current working mode into a target working mode;
the preset application list comprises at least one application program, and the at least one application program corresponds to a target working mode of the PCIE link.
10. The apparatus of claim 9, wherein the link switching module is further configured to:
under the condition that the number of the running application programs in the preset application list is larger than zero, switching the current working mode into the target working mode;
and under the condition that the number of the running application programs in the preset application list is equal to zero, switching the working mode of the PCIE link according to the IO load.
11. The apparatus of claim 9 or 10, wherein the link switching module is further configured to:
displaying prompt information under the condition that the IO load is smaller than a third threshold value within a preset time length, wherein the prompt information is used for prompting a user whether to switch the target working mode;
under the condition of receiving switching confirmation information, switching the target working mode into a third mode, wherein the link rate of the third mode is less than that of the target working mode;
and keeping the target working mode unchanged under the condition that the switching confirmation information is not received.
12. The apparatus of claim 7, wherein the obtaining module is further configured to:
acquiring the duration of the system in a busy state in a set period;
and determining the proportion between the duration of the system in a busy state and the total duration of the set period as the IO load.
CN202210162831.3A 2022-02-22 2022-02-22 Power consumption management method and device Pending CN114528187A (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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