CN114509981B - Controller hardware redundancy control method and system - Google Patents
Controller hardware redundancy control method and system Download PDFInfo
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24182—Redundancy
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Abstract
The invention discloses a controller hardware redundancy control method and system, relates to the technical field of automatic control, and mainly aims to solve the problem of low reliability of a control system. The method mainly comprises the steps that a first CPU of a controller performs data communication through a first ring network, wherein the first ring network is a network in which the first CPU performs data communication with at least one expansion interface module; when the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller; according to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network. The method is mainly used for redundant control of the controller hardware.
Description
Technical Field
The invention relates to the technical field of automatic control, in particular to a controller hardware redundancy control method and system.
Background
The programmable logic controller (PLC: programmable Logic Controller) is a digital operation controller with a microprocessor and used for automatic control, is widely applied to industrial automation systems and used as a controller, and in the fields of metallurgy, transportation, electric power and the like with higher requirements on reliability, the automation systems are required to reliably and stably operate, fault tolerance technology represented by redundancy design is an effective measure for improving the reliability of a PLC control system, and the PLC redundancy is widely applied to various fields as an important means for improving the reliability of the industrial control system.
The redundant design generally guarantees system functions through increasing the subassembly, and the PLC redundancy includes hardware redundancy and software redundancy two modes, and the soft redundant system of PLC starts and operates simultaneously through two central processing units (CPU, central processing unit), realizes the redundant backup between the CPU, in the current controller hardware redundancy scheme, reserve and interface module concatenate in same network, can't guarantee under the circumstances of system normal operating, the unusual condition of all types of modules or subassembly to lead to the lower problem of reliability.
Disclosure of Invention
In view of this, the present invention provides a method and a system for controlling hardware redundancy of a controller, which mainly aims to solve the problem that in the existing hardware redundancy scheme of a controller, standby and interface modules are connected in series in the same network, so that the abnormal condition of all types of modules or components can not be ensured under the condition that the system operates normally, thereby causing lower reliability.
According to one aspect of the present invention, there is provided a controller hardware redundancy control method, including:
The method comprises the steps that a first CPU of a controller performs data communication through a first ring network, wherein the first ring network is a network in which the first CPU performs data communication with at least one expansion interface module;
When the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller;
According to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network.
Further, the expansion interface module includes at least two communication slave modules, and the data communication of the first CPU of the controller through the first ring network includes:
the first communication main module of the first CPU performs data communication with the first communication auxiliary module of the at least one expansion interface module through the first ring network;
The second CPU performs data communication through a second ring network, including:
and the second communication main module of the second CPU is in data communication with the second communication auxiliary module of the at least one expansion interface module through the second ring network.
Further, the controller includes two CPUs, and before the first CPU of the controller performs data communication through the first ring network, the method further includes:
Determining a first CPU and a second CPU from the two CPUs, wherein the first CPU is an operation CPU and is used for executing processing operation according to a control task of the controller, and the second CPU is a standby CPU and is used for monitoring instructions of the first CPU.
Further, the determining the first CPU and the second CPU from the two CPUs includes:
the two CPUs respectively conduct communication instruction self-monitoring;
If one of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the CPU which does not monitor the communication instruction abnormality as a first CPU;
If the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining one CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU;
If the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
Further, according to the switching instruction, the data communication between the second CPU and the expansion interface module through the second ring network includes:
responding to the received switching instruction, the second CPU sends a data synchronization request to the first CPU and receives synchronization data of the first CPU;
and according to the synchronous data, the second CPU executes processing operation of the first CPU, wherein the processing operation comprises logic control, arithmetic processing, instruction receiving and sending and running state monitoring.
Further, the method further comprises the following steps: when the first CPU does not monitor the abnormality of the communication instruction, the second CPU performs data communication with the first CPU according to a preset scanning period, and monitors the first CPU according to a communication state obtained by the data communication;
When the communication state of the first CPU is monitored to be in an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data.
According to another aspect of the present invention, there is provided a controller hardware redundancy control system comprising:
the system comprises a first CPU, a second CPU and at least one expansion interface module;
the first CPU is used for carrying out data communication through the first ring network, and when the communication instruction is abnormal, the first CPU sends a switching instruction to the second CPU;
the second CPU is used for receiving the switching instruction and carrying out data communication through a second ring network according to the switching instruction;
the expansion interface module is used for carrying out data communication with the first CPU through the first ring network and carrying out data communication with the second CPU through the second ring network;
Wherein the first ring network and the second ring network operate independently.
Further, the first CPU includes a first communication master module, the second CPU includes a second communication master module, the expansion interface module includes at least two communication slave modules, and the first communication master module is configured to perform data communication with the first communication slave module of at least one expansion interface module through the first ring network;
The second communication master module is configured to perform data communication with the second communication slave module of at least one expansion interface module through the second ring network.
Further, the system comprises two CPUs, and the system further comprises a determining module;
The determining module is used for determining a first CPU and a second CPU from the two CPUs;
The first CPU is an operation CPU, and is specifically used for executing processing operation according to a control task of the controller;
The second CPU is a standby CPU, and is specifically configured to monitor an instruction of the first CPU.
Further, the determining module is specifically configured to perform communication instruction self-monitoring by the two CPUs respectively;
If one of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the CPU which does not monitor the communication instruction abnormality as a first CPU;
If the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining one CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU;
If the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
Further, the second CPU is specifically configured to send a data synchronization request to the first CPU and receive synchronization data of the first CPU in response to the received switching instruction;
and according to the synchronous data, the second CPU executes processing operation of the first CPU, wherein the processing operation comprises logic control, arithmetic processing, instruction receiving and sending and running state monitoring.
Further, the second CPU is further configured to perform data communication with the first CPU according to a preset scanning period when the first CPU does not monitor an abnormality of a communication instruction, and monitor the first CPU according to a communication state obtained by the data communication;
When the communication state of the first CPU is monitored to be in an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data.
By means of the technical scheme, the technical scheme provided by the embodiment of the invention has at least the following advantages:
the invention provides a controller hardware redundancy control method and a system, in the embodiment of the invention, a first CPU of a controller is used for carrying out data communication through a first ring network, and the first ring network is a network for carrying out data communication between the first CPU and at least one expansion interface module; when the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller; according to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network, so that when the current CPU and the ring network operate abnormally, the first CPU can be switched to the standby CPU and the standby ring network to ensure smooth switching and normal operation of the control system, and the reliability of the control system is greatly improved.
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present invention more readily apparent.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 shows a flow chart of a controller hardware redundancy control method provided by an embodiment of the invention;
FIG. 2 is a flowchart of another method for controlling hardware redundancy of a controller according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a controller hardware redundancy system according to an embodiment of the present invention;
FIG. 4 shows a flow chart of a controller hardware redundancy control process provided by an embodiment of the invention;
Fig. 5 shows a block diagram of a controller hardware redundancy control system according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Aiming at the prior art, the system function is generally ensured by adding components, the PLC redundancy comprises two modes of hardware redundancy and software redundancy, the PLC soft redundancy system is started and operated simultaneously through two CPUs, the redundancy backup between the CPUs is realized, in the prior art, the hardware redundancy scheme of the controller, the backup and the interface module are connected in series in the same network, and the problem that the reliability is lower is caused because the abnormal conditions of all types of modules or components can not be ensured under the condition that the system normally operates. The embodiment of the invention provides a controller hardware redundancy control method, as shown in fig. 1, which comprises the following steps:
101. The first CPU of the controller performs data communication through a first ring network, wherein the first ring network is a network in which the first CPU performs data communication with at least one expansion interface module.
In the embodiment of the invention, the controller can be a programmable logic controller (PLC: programmable Logic Controller) for carrying out redundancy design on the CPU and the communication looped network, namely, two identical CPUs, a synchronous module, a communication main module and looped networks respectively corresponding to the communication main module and used for data communication are configured in the PLC, wherein the two CPUs and the looped networks respectively corresponding to the two CPUs do not operate at the same time, and when one CPU is used as a main CPU to operate, the other CPU is used as a redundant standby CPU; the number of the expansion interface modules for carrying out data communication with the CPU can be one, two or more, and the specific number can be configured according to the interface requirement of the control equipment. In the running process of the PLC, the first CPU performs data communication through the first ring network between the first communication main module and the expansion interface module, and controls the input and output states of all interface units in the expansion interface module according to program instructions set by a user, so that the control of the PLC external equipment is realized.
It should be noted that, the first CPU does not refer to a certain CPU in the PLC, but refers to a CPU in the PLC in an operating state, and the first ring network does not refer to a certain ring network in the PLC, but refers to a network for performing data communication between a communication main module of the first CPU and an expansion interface module, for example, if the CPU in the current operating state is a No. 1 CPU and a ring network corresponding to the No. 1 CPU is a No. 1 ring network, in the current CPU redundancy control, the No. 1 CPU is the first CPU, and the No. 1 ring network is the first ring network; if the current running state is the CPU No. 2 and the ring network corresponding to the CPU No. 2 is the ring network No. 2, in the current CPU redundancy control, the CPU No. 2 is the first CPU, and the ring network No. 2 is the first ring network.
102. And when the first CPU monitors that the communication instruction is abnormal, sending a switching instruction to a second CPU of the controller.
In the embodiment of the invention, the first CPU monitors the running state of each module in the PLC while performing data communication with the expansion interface module, when a communication abnormal instruction is monitored, for example, the first CPU does not receive a reply instruction of the synchronization module and/or the communication main module, receives a communication state abnormal instruction of the communication auxiliary module, and the like, the first CPU generates a switching instruction for instructing to switch to the standby CPU and sends the switching instruction to the second CPU, requests the second CPU to perform a CPU switching action, for example, the communication auxiliary module in the first ring network is damaged, the communication main module of the first CPU does not receive the reply instruction of the communication auxiliary module, generates the communication abnormal instruction and sends the communication abnormal instruction to the first CPU, and the first CPU generates the switching instruction and sends the switching instruction to the second CPU after receiving the communication abnormal instruction. The first CPU judges the running state of each module through the state of command interaction of each module and the content of command sending, when the abnormal condition of the module occurs, the first CPU can rapidly monitor the abnormality and timely send a switching command, thereby realizing smooth switching between the main CPU and the standby CPU.
It should be noted that, the power supply in the expansion interface module is also designed in redundancy, that is, the expansion interface module includes a main power supply and a standby power supply, and because the switching of the power supply in the expansion interface module does not affect the data communication of the ring network, when the main power supply in the expansion interface module is damaged or abnormal, the switching of the CPU and the ring network is not performed, and only the main power supply and the standby power supply in the expansion interface module are switched. By configuring redundant backup power supplies in the expansion interface module, the reliability of the expansion interface module can be effectively improved, unnecessary switching of the CPU and the ring network caused by the abnormality of the power supply of the expansion interface module is avoided, and therefore the reliability of the control system is improved, and the operation workload of the CPU is reduced.
103. According to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network.
In the embodiment of the invention, after the second CPU receives the switching instruction sent by the first CPU, the second CPU takes over all processing operations being executed by the first CPU, the ring network which performs data communication with the expansion interface module is also switched from the first ring network corresponding to the first CPU to the second ring network corresponding to the second CPU, the second CPU continuously controls the state of the input and output unit of the expansion interface module through the second ring network, and meanwhile, the original first CPU and the corresponding original first ring network also stop running, so that a system or a technician can debug and overhaul the abnormal CPU and related modules in the ring network according to the abnormal instruction.
It should be noted that, the first ring network and the second ring network are independently operated, that is, the first ring network and the second ring network have no shared communication module, and the connection network has no cross connection, when the first ring network is abnormal, the operation CPU can be switched to the second CPU, the second ring network takes over the first ring network to continue to execute the data communication task, meanwhile, the technician can debug, overhaul and replace any component in the first ring network, so as to recover the normal function of the first ring network, for example, the first CPU monitors that the communication slave module of the first ring network is damaged, after the second CPU executes the operation task of the first CPU according to the switching instruction, the technician can replace the communication slave module under the condition that the operation of the second CPU and the second ring network is not affected, and through the design of the independent double ring network, the maintenance and replacement of any module or component in the controller system can be realized under the condition that the normal operation of the PLC system is ensured, thereby effectively ensuring the stability and reliability of the operation of the PLC system.
The invention provides another controller hardware redundancy control method, as shown in fig. 2, which comprises the following steps:
201. and determining a first CPU and a second CPU from the two CPUs.
In the embodiment of the invention, the controller comprises two CPUs, but only one CPU has operation authority and executes processing operation in the operation process of the controller, and the other CPU is used as a redundant standby CPU, so that before the controller is formally started to execute control operation, it is required to determine which CPU is used as a first CPU and has operation authority, and which CPU is used as a second CPU and is in a standby state, thereby ensuring the normal operation of the hardware redundancy control system of the controller.
In one embodiment of the present invention, for further explanation and limitation, determining the first CPU and the second CPU from the two CPUs in step 201 includes: the two CPUs respectively conduct communication instruction self-monitoring; if one CPU of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the other CPU which does not monitor the communication instruction abnormality as a first CPU; if the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining the CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU; if the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
In the embodiment of the invention, in order to determine a more preferable CPU from two CPUs of a controller as a first CPU, arbitration is needed between the two CPUs to determine the CPU which is most suitable for running, firstly, the CPU in the controller respectively carries out communication instruction self-monitoring, namely, the CPU respectively carries out communication instruction transceiving with a synchronous module, a communication main module and a communication auxiliary module, whether the operation of the modules in a communication network is abnormal or not is determined according to the communication state of data communication, if one CPU monitors the communication instruction abnormality, the CPU which monitors the communication instruction abnormality is determined as a second CPU, and then the CPU which does not monitor the communication instruction abnormality is taken as the first CPU; if no communication command abnormality is monitored by both CPUs, the two CPUs are instructed to mutually send commands to handshake with the other CPU, the CPU which finishes the handshake command transmission first is determined to be the first CPU, the other CPU is determined to be the second CPU, if the two CPUs finish the handshake command transmission at the same time, one CPU is randomly selected as the first CPU, the other CPU is determined to be the second CPU, in addition, the occupation condition of the application program in the CPUs can be judged as a judging condition, namely, the CPU occupied by the application program or the CPU with the highest application program occupation rate is determined to be the first CPU, and the judging condition can be applied to any link of the selecting judging process, and the embodiment of the invention is not particularly limited.
It should be noted that, by performing functional inspection on the CPU and the related communication modules through CPU self-monitoring, the CPU and the ring network which cannot normally execute the operation task can be preferentially removed, and pre-detection is implemented before all the CPUs and each module in the controller are operated, so that the reliability of the operation of the controller is effectively ensured.
202. And the first communication main module of the first CPU performs data communication with the first communication auxiliary module of the at least one expansion interface module through the first ring network.
203. And when the first CPU monitors that the communication instruction is abnormal, sending a switching instruction to a second CPU of the controller.
204. And the second communication main module of the second CPU is in data communication with the second communication auxiliary module of the at least one expansion interface module through the second ring network.
In the embodiment of the invention, in order to avoid influencing the overall operation of the control system due to abnormal communication slave modules of the expansion interface modules, two communication slave modules are configured in each expansion interface module, as shown in fig. 3, a first communication slave module and a second communication slave module are configured on an expansion frame back plate of each expansion interface module, a first ring network is formed by a first communication main module on the first main frame back plate and the first communication slave module of the expansion interface module through optical fibers or Ethernet handles, and a second ring network is formed by a second communication main module on the first main frame back plate and the second communication slave module of the expansion interface module through optical fibers or Ethernet handles. In the running process of the control system, the first CPU and the expansion interface module interact I/O data and states through the corresponding first ring network, when the first CPU monitors that the related modules of the first ring network are abnormal, the CPU running is switched to the second CPU, and the second CPU and the expansion interface module interact the I/O data and states through the corresponding second ring network.
It should be noted that, the communication slave module included in the expansion interface module may be two or more, when the communication slave module is plural, a corresponding number of CPUs and communication master modules need to be configured, each communication master module and corresponding communication slave modules form an independent operation ring network, wherein when one CPU and ring network are in an operation state, the rest CPUs and ring networks are all used as standby ring networks, when the first ring network is abnormal, the CPU can randomly select any CPU and corresponding ring network from the standby CPUs and ring networks as the second CPU and second ring network, for example, the expansion interface module is configured with the communication slave modules 1-4, CPU 1-4 and communication master modules 1-4, the communication slave modules 1-4 and the communication master modules 1-4 respectively form ring networks 1-4, when the ring network 1 is the first ring network, the rest 3 ring networks are used as redundant standby ring networks, if the ring network 1 is abnormal, the CPU1 selects any ring network from ring networks 2-4, if the ring network 2 is selected to continue data communication, and when the ring network 1 is not repaired, the CPU2 is abnormal, the communication slave modules from the ring network 2, the communication slave modules are selected from the ring networks 3, the communication slave modules are not selected from the ring networks, and the communication master modules are controlled by any other ring networks, and the fault-tolerant systems are not configured, and the fault-tolerant systems can be controlled in time, and the fault-tolerant systems can be controlled, and the fault-tolerant operation can be controlled, and the fault-tolerant systems can be controlled, and the fault-tolerant operation can be more easily be controlled, and the fault-tolerant and the operation can be controlled.
In one embodiment of the present invention, for further explanation and limitation, in step 102, according to the switching instruction, the data communication between the second CPU and the expansion interface module through the second ring network includes: responding to the received switching instruction, the second CPU sends a data synchronization request to the first CPU and receives synchronization data of the first CPU; and according to the synchronous data, the second CPU executes processing operation of the first CPU, wherein the processing operation comprises logic control, arithmetic processing, instruction receiving and sending and running state monitoring.
In the embodiment of the invention, in order to realize data communication between a first CPU and a second CPU, a first synchronization module on a main frame backboard of the first CPU is connected with a second synchronization module on a main frame backboard of the second CPU through optical fibers, when the second CPU receives a switching instruction of the first CPU, the second CPU takes over all operation authorities of the first CPU, and sends a data synchronization request to the first synchronization module of the first CPU through the second synchronization module, and in response to the synchronization request of the second synchronization module, the first synchronization module synchronizes synchronization data such as variable data, programs, events and the like to the second CPU, and the second CPU executes processing operations such as logic control, operation processing, instruction receiving and transmitting, running state monitoring and the like according to the synchronization data.
In one embodiment of the present invention, for further explanation and limitation, there is provided a further method for controlling hardware redundancy of a controller, the method comprising:
And step 1, when the first CPU does not monitor the abnormality of the communication instruction, the second CPU performs data communication with the first CPU according to a preset scanning period, and monitors the first CPU according to a communication state obtained by the data communication.
And step 2, when the communication state of the first CPU is monitored to be in an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data.
In the embodiment of the invention, since the first CPU can only find that the operation of other modules or components except the CPU is abnormal when the first CPU itself is abnormal, the second CPU cannot send a switching instruction to the second CPU, so that in the operation process of the first CPU, the second CPU performs communication data with the first CPU according to the preset scanning period and the preset interrupt time threshold, for example, the preset scanning period is set to be a scanning period, if the communication between the first CPU and the second CPU is interrupted, that is, the first CPU does not communicate with the second CPU according to the preset scanning period, and the scanning period for interrupting the communication exceeds the preset interrupt time threshold, the second CPU is judged to actively take over all operation authorities of the first CPU, and acquire the synchronous data of the first CPU, and continuously execute operation tasks according to the synchronous data instead of the first CPU.
The operation state of the first CPU is monitored through the second CPU, and when the operation abnormality of the first CPU is found, the second CPU is actively switched to the operation state, and all operation authorities of the first CPU are taken over, so that the risk of abnormal operation of the controller caused by the operation abnormality of the first CPU can be reduced, smooth switching between the operation main CPU and the standby CPU is realized, and the stability and the reliability of the operation of a control system where the controller is located are further improved.
In an embodiment of the present invention, for further explanation and limitation, a method for controlling redundancy of controller hardware in a specific application scenario is provided, as shown in fig. 4, the method includes:
Starting a controller and initializing operation data of the controller; determining a main CPU and a standby CPU by arbitrating the CPU of the controller; the main CPU synchronizes the program and variable data with the standby CPU; the main CPU and the communication module interactively expand the interface data and the interface state of the interface module; the main CPU monitors whether the communication module and the synchronization module are abnormal, and when the abnormality is monitored, a switching instruction is sent to the standby CPU and is switched to the standby CPU; in each scanning period, the standby CPU and the main CPU perform data and state synchronization, and monitor whether the main CPU is abnormal; and when the standby CPU receives a switching instruction sent by the main CPU or detects that the main CPU is abnormal, switching to the main CPU.
The invention provides a controller hardware redundancy control method and a system, in the embodiment of the invention, a first CPU of a controller is used for carrying out data communication through a first ring network, and the first ring network is a network for carrying out data communication between the first CPU and at least one expansion interface module; when the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller; according to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network, so that when the current CPU and the ring network operate abnormally, the first CPU can be switched to the standby CPU and the standby ring network to ensure smooth switching and normal operation of the control system, and the reliability of the control system is greatly improved.
Further, as an implementation of the method shown in fig. 1, an embodiment of the present invention provides a controller hardware redundancy control system, as shown in fig. 5, where the system includes: a first CPU 31, a second CPU 32, an expansion interface module 33, wherein
The first CPU31 is configured to perform data communication through a first ring network, and send a switching instruction to the second CPU when an abnormality of a communication instruction is monitored;
the second CPU32 is configured to receive the switching instruction, and perform data communication through a second ring network according to the switching instruction;
The expansion interface module 33 is configured to perform data communication with the first CPU through the first ring network, and perform data communication with the second CPU through the second ring network;
Wherein the first ring network and the second ring network operate independently.
Further, the first CPU includes a first communication master module, the second CPU includes a second communication master module, the expansion interface module includes at least two communication slave modules, and the first communication master module is configured to perform data communication with the first communication slave module of at least one expansion interface module through the first ring network;
The second communication master module is configured to perform data communication with the second communication slave module of at least one expansion interface module through the second ring network.
Further, the system comprises two CPUs, and the system further comprises a determining module;
The determining module is used for determining a first CPU and a second CPU from the two CPUs;
The first CPU is an operation CPU, and is specifically used for executing processing operation according to a control task of the controller;
The second CPU is a standby CPU, and is specifically configured to monitor an instruction of the first CPU.
Further, the determining module is specifically configured to perform communication instruction self-monitoring by the two CPUs respectively;
If one CPU of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the other CPU which does not monitor the communication instruction abnormality as a first CPU;
If the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining the CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU;
If the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
Further, the second CPU is specifically configured to send a data synchronization request to the first CPU and receive synchronization data of the first CPU in response to the received switching instruction;
and according to the synchronous data, the second CPU executes processing operation of the first CPU, wherein the processing operation comprises logic control, arithmetic processing, instruction receiving and sending and running state monitoring.
Further, the second CPU is further configured to perform data communication with the first CPU according to a preset scanning period when the first CPU does not monitor an abnormality of a communication instruction, and monitor the first CPU according to a communication state obtained by the data communication;
When the communication state of the first CPU is monitored to be in an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data.
The invention provides a controller hardware redundancy control method and a system, in the embodiment of the invention, a first CPU of a controller is used for carrying out data communication through a first ring network, and the first ring network is a network for carrying out data communication between the first CPU and at least one expansion interface module; when the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller; according to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network, so that when the current CPU and the ring network operate abnormally, the first CPU can be switched to the standby CPU and the standby ring network to ensure smooth switching and normal operation of the control system, and the reliability of the control system is greatly improved.
It will be appreciated by those skilled in the art that the modules or steps of the invention described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may alternatively be implemented in program code executable by computing devices, so that they may be stored in a memory device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps within them may be fabricated into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (5)
1. A method for controlling hardware redundancy of a controller, comprising:
The method comprises the steps that a first CPU of a controller performs data communication through a first ring network, wherein the first ring network is a network in which the first CPU performs data communication with at least one expansion interface module;
When the first CPU monitors that the communication instruction is abnormal, a switching instruction is sent to a second CPU of the controller;
According to the switching instruction, the second CPU performs data communication through a second ring network, wherein the second ring network is a network for performing data communication between the second CPU and the at least one expansion interface module and independently operates with the first ring network;
when the first CPU does not monitor the abnormality of the communication instruction, the second CPU performs data communication with the first CPU according to a preset scanning period, and monitors the first CPU according to a communication state obtained by the data communication;
when the communication state of the first CPU is monitored to be an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data;
the controller comprises two CPUs, and before the first CPU of the controller performs data communication through the first ring network, the method further comprises:
Determining a first CPU and a second CPU from the two CPUs, wherein the first CPU is an operation CPU and is used for executing processing operation according to a control task of the controller, and the second CPU is a standby CPU and is used for monitoring an instruction of the first CPU;
the determining the first CPU and the second CPU from the two CPUs includes:
the two CPUs respectively conduct communication instruction self-monitoring;
If one CPU of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the other CPU which does not monitor the communication instruction abnormality as a first CPU;
If the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining the CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU;
If the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
2. The method of claim 1, wherein the expansion interface module comprises at least two communication slave modules, and wherein the first CPU of the controller performs data communication through a first ring network comprises:
the first communication main module of the first CPU performs data communication with the first communication auxiliary module of the at least one expansion interface module through the first ring network;
The second CPU performs data communication through a second ring network, including:
and the second communication main module of the second CPU is in data communication with the second communication auxiliary module of the at least one expansion interface module through the second ring network.
3. The method of claim 1, wherein the data communication between the second CPU and the expansion interface module via the second ring network according to the switching instruction comprises:
responding to the received switching instruction, the second CPU sends a data synchronization request to the first CPU and receives synchronization data of the first CPU;
and according to the synchronous data, the second CPU executes processing operation of the first CPU, wherein the processing operation comprises logic control, arithmetic processing, instruction receiving and sending and running state monitoring.
4. A controller hardware redundancy control system, comprising: the system comprises a first CPU, a second CPU and at least one expansion interface module;
the first CPU is used for carrying out data communication through the first ring network, and when the communication instruction is abnormal, the first CPU sends a switching instruction to the second CPU;
the second CPU is used for receiving the switching instruction and carrying out data communication through a second ring network according to the switching instruction;
the expansion interface module is used for carrying out data communication with the first CPU through the first ring network and carrying out data communication with the second CPU through the second ring network;
Wherein the first ring network and the second ring network operate independently;
The second CPU is further used for carrying out data communication with the first CPU according to a preset scanning period when the first CPU does not monitor communication instruction abnormality, and monitoring the first CPU according to a communication state obtained by the data communication;
when the communication state of the first CPU is monitored to be an interrupt state and the interrupt time interval of the interrupt state is larger than a preset interrupt time threshold, the second CPU acquires the synchronous data of the first CPU and executes the processing operation of the first CPU according to the synchronous data;
the system comprises two CPUs, and a determining module;
The determining module is used for determining a first CPU and a second CPU from the two CPUs;
The first CPU is an operation CPU, and is specifically used for executing processing operation according to a control task of the controller;
the second CPU is a standby CPU and is specifically used for monitoring the instruction of the first CPU;
the determining module is specifically used for the two CPUs to respectively perform communication instruction self-monitoring;
If one CPU of the CPUs monitors the communication instruction abnormality, determining the CPU which monitors the communication instruction abnormality as a second CPU, and determining the other CPU which does not monitor the communication instruction abnormality as a first CPU;
If the two CPUs do not self-monitor communication instruction abnormality, executing a handshake instruction through the two CPUs, determining one CPU which completes the handshake instruction execution first as a first CPU, and determining the other CPU as a second CPU;
If the two CPUs complete the execution of the handshake instruction at the same time, one CPU is randomly determined to be a first CPU, and the other CPU is determined to be a second CPU.
5. The system of claim 4, wherein the first CPU comprises a first communication master module, the second CPU comprises a second communication master module, the expansion interface module comprises at least two communication slave modules, and the first communication master module is configured to communicate data with the first communication slave module of at least one expansion interface module through the first ring network;
The second communication master module is configured to perform data communication with the second communication slave module of at least one expansion interface module through the second ring network.
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