CN114499545A - Encoding method and apparatus - Google Patents

Encoding method and apparatus Download PDF

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CN114499545A
CN114499545A CN202011159292.5A CN202011159292A CN114499545A CN 114499545 A CN114499545 A CN 114499545A CN 202011159292 A CN202011159292 A CN 202011159292A CN 114499545 A CN114499545 A CN 114499545A
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code
layer
mother
codes
decoding
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陈立
程津骏
张华滋
李榕
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Huawei Technologies Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152Bose-Chaudhuri-Hocquenghem [BCH] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

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Abstract

The embodiment of the application discloses a coding method and a device, wherein the method comprises the following steps: the encoding apparatus constructs an H-layer (U | U + V) structure code based on M short codes, an ith code of the H-layer (U | U + V) structure code being a (U | U + V) structure code composed of a 2 i-th code of an (H-1) th layer and a (2i-1) th code of the (H-1) th layer, and an ith code of the 1 st layer of the H-layer (U | U + V) structure code being composed of a 2 i-th code of the M mother codes and the (2i-1) th code. Correspondingly, the decoding device side decomposes the mother code layer by layer based on the received coded bits, reconstructs the H-layer (U | U + V) structure code based on the decoding result of the mother code, and obtains the final decoding estimation of the H-th code of the H-layer (U | U + V) structure code. The scheme of the application can be used for channel coding and channel decoding processes.

Description

Encoding method and apparatus
Technical Field
The present disclosure relates to channel coding technologies, and in particular, to a coding method and apparatus.
Background
Channel coding is a key technique in wireless communication systems, which determines the ability to correct transmission errors by coding the information to be transmitted and appending redundant information. Currently, the channel coding is of various kinds, such as may include: a (Reed-Muller, RM) code, a Low Density Parity Check (LDPC) code, a Turo code, a polar code, a BCH code, etc.
However, the existing channel coding is usually a long code, and the decoding performance is low. In order to realize high-reliability low-delay transmission, a channel code having excellent decoding performance in a medium-short code length range is particularly important.
Disclosure of Invention
The embodiment of the application provides an encoding method and an encoding device, which are used for solving the problem that the decoding performance of the existing encoding is low.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:
in a first aspect, an embodiment of the present application provides an encoding method, which may include: determining M mother codes, wherein the M mother codes are short codes, and constructing a multi-layer (U | U + V) structure code (such as an H-layer (U | U + V) structure code based on the M mother codes according to the following rule, wherein H is an integer greater than or equal to 1, and M is 2H): the ith code of the H layer in the H layer (U | U + V) structure codes is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure codes and the (2i-1) code of the (H-1) layer, the ith code of the 1 layer in the H layer (U | U + V) structure codes is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with the value range of 1 to H, and i is an integer with the value range of 1 to 2H-hIs an integer of (1).
Based on the method described in the first aspect, a multi-layer (U | U + V) structure code may be constructed based on a plurality of short codes, the number of layers of the multi-layer (U | U + V) structure code and the code length of the H-th layer code are related to the code length of the short codes and the number of the short codes, the number of the required short codes is doubled when the number of layers is increased by one layer, and the code length of the H-th layer code is doubled.
In one possible design, determining the M mother codes includes: determining the channel capacity of M sub-channels corresponding to M mother codes according to the channel capacity of the sub-channel corresponding to the code of the H layer; and determining the code rate of the mth mother code according to the channel capacity of a sub-channel corresponding to the mth mother code in the M mother codes, and selecting the mother code meeting the code rate of the mth mother code from the plurality of mother codes, wherein M is an integer with the value of 1 to M. Based on the possible design, the code rate of the mother code can be designed based on the channel capacity of the sub-channel corresponding to the mother code, and the system design is simplified.
In one possible design, determining a code rate of an mth mother code according to a channel capacity of a sub-channel corresponding to the mth mother code in the M mother codes includes: the code rate of the mth mother code is equal to the channel capacity of the sub-channel corresponding to the mth mother code; or the difference value between the code rate of the mth mother code and the channel capacity of the sub-channel corresponding to the mth mother code is less than or equal to the threshold value. Based on the possible design, the channel capacity of the sub-channel corresponding to the mother code or an approximate value slightly smaller than the channel capacity can be used as the code rate of the mother code, so that the designed mother code meets the maximum channel capacity transmission, and the transmission performance is improved.
In one possible design, determining channel capacities of M subchannels corresponding to M mother codes according to channel capacities of subchannels corresponding to codes of a H-th layer includes: determining the noise power of the sub-channel corresponding to the code of the H layer according to the channel capacity of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the code of the H layer according to the noise power of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the M mother codes according to the mean value of the soft information of the codes of the H layer and a recursion mode, wherein the recursion mode comprises the following steps: the mean value of the soft information of the 2i code of the (h-1) th layer and the mean value of the soft information of the (2i-1) th code of the (h-1) th layer are determined according to the mean value of the soft information of the i code of the h layer; and determining the noise power of the sub-channel corresponding to the mth mother code according to the average value of the soft information of the mth mother code in the M mother codes, and determining the channel capacity of the sub-channel corresponding to the mth mother code according to the noise power of the sub-channel corresponding to the mth mother code. Based on the possible design, the channel power of the sub-channel corresponding to the code can be determined layer by layer, and the system design is simplified.
In one possible design, the M mother codes are BCH codes or RS codes with the same code length. Based on the possible design, the BCH code can be used as a mother code to construct an H-layer (U | U + V) structure code, and the system design is simplified.
In a second aspect, an embodiment of the present application provides a decoding method, which may include: determining soft information of M mother codes for constructing an H-layer (U | U + V) structure code according to the soft information of the coded bits; wherein the coded bits are code-to-information ratio of an H-th layer using an H-layer (U | U + V) structure codeCode bits obtained by coding, H is an integer of 1 or more, and M is 2H(ii) a Performing decoding operation on soft information of the mth mother code in the M mother codes to determine a decoding result of the mth mother code; wherein M is an integer from 1 to M; and reconstructing the H-layer (U | U + V) structure code based on the decoding result of each mother code in the M mother codes to obtain the final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code.
Based on the method of the second aspect, soft information of M mother codes used for constructing the H-layer (U | U + V) structure code can be obtained through layer-by-layer decomposition, decoding operation is further performed on the soft information of the M mother codes of the H-layer (U | U + V) structure code to obtain a decoding result of the mother codes, the H-layer (U | U + V) structure code is reconstructed layer by layer according to the decoding result of the mother codes, and a final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code is obtained. Since the decoding result of the mother code includes a plurality of candidate lists, higher decoding performance can be obtained by increasing the candidate list of the mother code.
In one possible design, determining soft information for M mother codes used to construct an H-layer (U | U + V) structure code based on soft information for coded bits includes: using soft information of the coded bits as soft information of a code of an H-th layer of an H-layer (U | U + V) structure code; obtaining soft information of M mother codes by utilizing a layer-by-layer decomposition algorithm based on the soft information of the H-th layer code; the layer-by-layer decomposition algorithm comprises the following steps: the soft information of the 2 i-th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-layer, and the soft information of the (2i-1) th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-th layer of the H-layer (U | U + V) structure code and the decoding result of the 2 i-th code of the (H-1) th layer. Based on the possible design, the soft information of M mother codes can be obtained by decomposing according to the inverse process of constructing the H-layer (U | U + V) structure code, and the system design is simplified.
In one possible design, the decoding the soft information of the mth mother code in the M mother codes to determine the decoding result of the mth mother code includes: on the basis of the soft information of the mth mother code, a candidate code word list is obtained by utilizing the OSD operation of decomposition statistic decoding, and the candidate code word list comprises one or more candidate code words; selecting theta candidate code words with high reliability from the candidate code word list as the decoding result of the mth mother code; wherein θ is an integer greater than or equal to 1. Based on the possible design, the decoding result of the mother code can be obtained in a candidate list mode, so that a plurality of possible H-layer codes can be obtained by combining with the candidate list combination, and the most reliable code is selected from the plurality of possible H-layer codes to be used as the final decoding estimation.
In one possible design, reconstructing an H-layer (U | U + V) structure code based on the decoding result of each of the M mother codes to obtain a final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code, includes: and based on the decoding result of each mother code in the M mother codes, obtaining the decoding result of the H-th layer code of the H-layer (U | U + V) structural code by using a layer-by-layer reconstruction algorithm, and selecting a decoding result with higher reliability from the decoding result of the H-th layer as the final decoding estimation of the H-th layer code. Wherein, the ith code of the H layer in the H layer (U | U + V) structure code comprises
Figure BDA0002743799210000021
The result of the decoding is that,
Figure BDA0002743799210000022
the decoding result number of (2i-1) th codes of (H-1) th layer in the H-layer (UU + V) structure code,
Figure BDA0002743799210000023
the decoding result number of the 2i code of the (H-1) th layer in the H layer (U | U + V) structure code; h is an integer ranging from 1 to H, i is an integer ranging from 1 to 2H-hAn integer of (d); the layer-by-layer reconstruction algorithm comprises the following steps: one decoding result of the ith code of the H layer in the H-layer (U | U + V) structure code is composed of one decoding result of the 2i code of the (H-1) layer and one decoding result of the (2i-1) code of the (H-1) layer, and one decoding result of the ith code of the 1 st layer in the H-layer (U | U + V) structure code is composed of one decoding result of the 2i code of the M mother codes and one decoding result of the (2i-1) code.
Based on the possible design, after the H-layer codes are recovered based on the decoding result of the mother codes, a most reliable code is selected from the list to be used as a final decoding estimation, and the decoding performance is improved.
In one possible design, the M mother codes are BCH codes or RS codes with the same code length. Based on the possible design, the BCH code can be used as a mother code to construct an H-layer (U | U + V) structure code, and the system design is simplified.
In a third aspect, the present application provides an apparatus, which may be an encoding apparatus or a chip or a system on a chip in an encoding apparatus, and may also be a module or a unit in an encoding apparatus for implementing the encoding method described in this embodiment of the present application, or another module or unit capable of implementing the method performed by an encoding apparatus. The apparatus may carry out the functions performed by the encoding apparatus in the first aspect or in each of the possible designs described above. In one design, the apparatus may include a module unit or means (means) corresponding to one for performing the method/operation/step/action described in the first aspect, and the module, unit or means may be implemented by hardware, software, or hardware to perform corresponding software. The hardware or software includes one or more modules or units corresponding to the above functions. Such an apparatus may include: a processing unit;
the processing unit is used for determining M mother codes and constructing an H-layer (U | U + V) structure code based on the M mother codes; the M mother codes are short codes with the same code length n and the code length n smaller than or equal to a code length threshold; h is an integer greater than or equal to 1, M is 2HThe ith code of the H layer in the H layer (U | U + V) structure code is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure code and the (2i-1) code of the (H-1) layer, the ith code of the 1 layer in the H layer (U | U + V) structure code is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1).
For the way in which the M mother codes and the processing unit construct the H-layer (U | U + V) structure code based on the M mother codes, reference may be made to the first aspect or the possible design of the first aspect, which is not repeated herein. For example, the specific implementation of the apparatus may refer to the behavior function of the encoding apparatus in the encoding method provided by the first aspect or any possible design of the first aspect, and details are not repeated here. Thus, the apparatus provided may achieve the same advantageous effects as the first aspect or any of the possible designs of the first aspect.
In yet another possible design, the apparatus according to the third aspect may be a decoding apparatus or a chip or a system on a chip in a decoding apparatus, or may also be a module or a unit in a decoding apparatus for implementing the decoding method according to the embodiment of the present application, or another module or unit capable of implementing the method performed by a decoding apparatus. The apparatus may implement the functions performed by the decoding means in the second aspect or in each of the possible designs of the second aspect. In one design, the apparatus may include a module unit or means (means) corresponding to one for executing the method/operation/step/action described in the second aspect, and the module, unit or means may be implemented by hardware, software, or hardware to execute corresponding software. The hardware or software includes one or more modules or units corresponding to the above functions.
For example, the apparatus is configured to determine soft information of M mother codes for constructing an H-layer (U | U + V) structure code according to the soft information of the coded bits; wherein the coded bits are coded bits obtained by coding information bits using a code of an H-th layer of an H-layer (U | U + V) structure code, H is an integer of 1 or more, and M is 2H(ii) a Performing decoding operation on soft information of the mth mother code in the M mother codes to determine a decoding result of the mth mother code; wherein M is an integer from 1 to M; and reconstructing the H-layer (U | U + V) structure code based on the decoding result of each mother code in the M mother codes to obtain the final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code.
In a fourth aspect, an apparatus is provided, which may be an encoding apparatus or a chip or a system on a chip in an encoding apparatus, or other modules or units capable of implementing the encoding apparatus side method. The apparatus may implement the functions performed by the encoding apparatus in the above-described first aspect or in each possible design, and the functions may be implemented by hardware. In one possible design, the apparatus may include: a processor for determining M mother codes and constructing a code based on the M mother codesMaking an H layer (U | U + V) structure code; the M mother codes are short codes with the same code length n and the code length n smaller than or equal to a code length threshold; h is an integer greater than or equal to 1, M is 2HThe ith code of the H layer in the H layer (U | U + V) structure code is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure code and the (2i-1) code of the (H-1) layer, the ith code of the 1 layer in the H layer (U | U + V) structure code is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1).
In yet another possible design, the apparatus according to the fourth aspect may be a decoding apparatus or a chip or a system on a chip in a decoding apparatus, or may also be a module or a unit in a decoding apparatus for implementing the decoding method according to the embodiment of the present application, or another module or unit capable of implementing the method performed by a decoding apparatus, for example, the apparatus may include: a processor and a communication interface. The apparatus comprises a processor and a communication interface for enabling the apparatus to carry out the functions performed by the decoding means in the second aspect or in each of the possible designs of the second aspect.
In yet another possible design, the fourth aspect apparatus may further include a memory to hold computer instructions and/or data. When the apparatus is operating, the processor executes the computer instructions stored in the memory to cause the apparatus to perform the encoding method according to the first aspect or any one of the possible designs of the first aspect; alternatively, the decoding method according to the second aspect or any one of the possible designs of the second aspect is performed.
In a fifth aspect, there is provided a computer-readable storage medium having stored therein instructions, which, when run on a computer, cause the computer to perform the encoding method of the first aspect or any of the possible designs of the above aspects; alternatively, the decoding method according to the second aspect or any one of the possible designs of the second aspect is performed.
A sixth aspect provides a computer program product comprising instructions, the computer program product may comprise program instructions which, when run on a computer, cause the computer to perform the encoding method of the first aspect or any of the possible designs of the above aspect; alternatively, the decoding method according to the second aspect or any one of the possible designs of the second aspect is performed.
In a seventh aspect, a chip system is provided, where the chip system includes a processor and a communication interface, and the chip system may be configured to implement the functions performed by the encoding apparatus in the first aspect or any possible design of the first aspect. In yet another possible design, the chip system may implement the functions performed by the decoding apparatus in the second aspect or in each possible design of the second aspect. In one possible design, the system on chip further includes a memory, the memory is used for storing program instructions and/or data, and when the system on chip runs, the processor executes the program instructions stored in the memory, so that the system on chip executes the encoding method described in the first aspect or any one of the possible designs of the first aspect. Alternatively, the decoding method according to the second aspect or any one of the possible designs of the second aspect is performed. The chip system may be formed by a chip, and may also include a chip and other discrete devices, without limitation.
Drawings
FIG. 1 is a diagram illustrating the encoding of a polar code;
fig. 2 is a schematic diagram of a network architecture according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of an apparatus according to an embodiment of the present disclosure;
fig. 4 is a flowchart of an encoding method according to an embodiment of the present application;
fig. 5 is a schematic diagram of channel capacity provided by an embodiment of the present application;
FIG. 6 is a schematic diagram of constructing an H-layer (U | U + V) structure code according to an embodiment of the present disclosure;
fig. 7 is a schematic diagram of (U | U + V) codes provided in the present application;
fig. 8 is a flowchart of a decoding method according to an embodiment of the present application;
fig. 9 is a schematic diagram of layer-by-layer decomposition and LLR updating provided in an embodiment of the present application;
FIG. 10 is a schematic diagram illustrating an OSD operation according to an embodiment of the application;
fig. 11 is a schematic diagram of a reconstructed 2-layer (U | U + V) structure code according to an embodiment of the present disclosure;
fig. 12 is a graph of bit error rate provided by an embodiment of the present application;
fig. 13 is a graph illustrating a further error rate according to an embodiment of the present disclosure;
fig. 14 is a schematic structural diagram of an apparatus according to an embodiment of the present disclosure.
Detailed Description
Prior to the description of the embodiments of the present application, terms of the related art to which the embodiments of the present application relate will be explained. It should be noted that the explanation is for the purpose of making the embodiments of the present application easier to understand, and should not be construed as limiting the scope of the claims of the embodiments of the present application.
Channel coding: the information bits to be transmitted are coded by using coding and redundancy is added to obtain coded bits, and the capability of correcting transmission errors of the information bits is realized. The coding types are many, and include RM codes, LDPC codes, Turo codes, and (U | U + V) structure codes (such as polar codes).
The polar code is a channel code having a (U | U + V) structure, which is a channel code theoretically reaching shannon's bound. The polar code is a coding scheme proposed based on the channel polarization phenomenon, as shown in fig. 1, and u is coded at the coding sideNThe code is continuously processed by the (U | U + V) structure in a certain way to obtain RNSo that each sub-channel exhibits different reliability, e.g. capacity W of partial sub-channels with increasing code lengthN/2Will approach 1, another part WN/2Will approach 0, select channel W with capacity approaching 1N/2Y obtained by transmitting information1~yN/2Error-free transmission can be achieved. Although the polarization code is proved to be a code capable of reaching the channel capacity, the polarization effect of the polarization code in the medium and short code length is not ideal, so that the polarization code can be decoded in any wayFor example, the decoding performance is common if Serial Cancellation (SC) or Serial Cancellation List (SCL) is adopted.
In view of this, the present embodiment provides an encoding method, which constructs an H-layer (U | U + V) structure code by using M short codes, wherein an H-th code in the H-layer (U | U + V) structure code is an (U | U + V) structure code composed of a (H-1) th code and a (H-1) th code, and an i-th code in the 1 st layer in the H-layer (U | U + V) structure code is composed of a 2 i-th code in the M mother codes and the (2i-1) th code. Correspondingly, the decoding device side decomposes the mother code layer by layer based on the received coded bits, reconstructs the H-layer (U | U + V) structure code based on the decoding result of the mother code, and obtains the final decoding estimation of the H-th code of the H-layer (U | U + V) structure code. Thus, the code with better decoding performance in a medium-long range is designed.
The method provided by the embodiment of the application is described below by combining the drawings in the specification.
The technical solution of the embodiment of the present application may be applied to various mobile communication systems supporting channel coding, for example: universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication system, fourth generation (4th generation, 4G) system, Long Term Evolution (LTE) system, and future 5G (5G) communication system, new radio, NR) system, NR-vehicle to anything communication (V2X) system, or other next generation communication system, etc., and may also be applied to Wireless Local Area Network (WLAN) supporting IR-HARQ, such as: the method can be applied to any one of the 802.11 series protocols of the international Institute of Electrical and Electronics Engineers (IEEE) currently adopted by the WLAN. For example, to the 802.11ay standard, or to the 802.11ay next generation standard, etc. The embodiment of the present application will be described by taking the communication system shown in fig. 2 as an example.
As shown in fig. 2, the communication system may include one or more Basic Service Sets (BSSs), where a network node in a BSS includes an Access Point (AP) and a Station (STA), and a transmitting end and a receiving end in this embodiment of the present application may be an AP or an STA in the communication system, or may be chips located in the AP or the STA. The scheme of the embodiment of the application can be applied to communication between the AP and the STA, one-to-one communication between the STA and the STA, and one-to-many and many-to-many communication. For example, communication may be between one AP and one STA (e.g., as shown in the left side of fig. 2), communication may be between an AP and multiple STAs (e.g., as shown in the right side of fig. 2), communication may be between multiple APs and multiple STAs, or communication may be between multiple STAs and an AP.
The encoding method provided by the embodiment of the application can be applied to various communication scenarios, for example, can be applied to one or more of the following communication scenarios: enhanced mobile broadband (eMBB), ultra-reliable low latency communication (URLLC), Machine Type Communication (MTC), large-scale Machine Type Communication (MTC), device-to-device (D2D), vehicle-to-outside (V2X), vehicle-to-vehicle (V2V), and internet of things (IoT), among others. The encoding method provided by the embodiment of the application can be suitable for services which need low time delay and high reliability transmission, such as services of unmanned driving, industrial automation, traffic safety and control, remote service and the like.
The network elements or devices involved in the communication system shown in fig. 2 are described below.
The AP is a device having a wireless transceiving function, and may be a directional multi-gigabit (DMG) AP, an enhanced directional multi-gigabit (EDMG) AP, or an AP supporting 60GHz, which is not limited in this embodiment. The AP may also be referred to as a base station.
The STA may be a device having a wireless transceiving function, for example, a wireless device supporting 60GHz communication. The STA may also be referred to as a subscriber unit, access terminal, mobile station, remote terminal, mobile device, user terminal, wireless communication device, user agent, user device, or User Equipment (UE). Specifically, the terminal equipment (terminal equipment) or User Equipment (UE) or Mobile Station (MS) or Mobile Terminal (MT) may be used. Specifically, the terminal may be a mobile phone (mobile phone), a tablet computer or a computer with a wireless transceiving function, and may also be a Virtual Reality (VR) terminal, an Augmented Reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in unmanned driving, a wireless terminal in telemedicine, a wireless terminal in a smart grid, a wireless terminal in a smart city (smart city), a smart home, a vehicle-mounted terminal, and the like.
It should be noted that, in this embodiment of the present application, the receiving end and the sending end are relative concepts, the receiving end may refer to a device that encodes information bits by using the (U | U + V) structure code designed in the present application to obtain encoded bits and sends the encoded bits to the opposite end, and the receiving end may refer to a device that receives encoded bits encoded by using the (U | U + V) structure code designed in the present application and a device that decodes the received encoded bits. For example, the transmitting end may be the AP101 in the left diagram of fig. 2, and the receiving end may be the STA102 in the left diagram of fig. 2.
Furthermore, fig. 2 is an exemplary framework diagram, the number of nodes included in fig. 2 is not limited, and the communication system may include other nodes besides the functional nodes shown in fig. 2, such as: gateway devices, application servers, etc., without limitation. The sending end and the receiving end in the embodiment of the present application may be network nodes in the communication system, or may be chips in the network nodes in the wlan communication system.
Wherein, each network element shown in fig. 2 is as follows: the AP and STA may adopt the structure shown in fig. 3 or include the components shown in fig. 3. Fig. 3 is a schematic diagram of a device 300 according to an embodiment of the present application, as follows: the apparatus 300 may be an AP or a chip in an AP or a system on a chip. As shown in fig. 3, the apparatus 300 may include a processor 301, a communication line 302, and a transceiver circuit 303. Further, the apparatus 300 may further include a memory 304. The processor 301, the memory 304, and the transceiver circuit 303 may be connected to each other via a communication line 302.
The processor 301 may be a Central Processing Unit (CPU), a general purpose processor Network (NP), a Digital Signal Processor (DSP), a microprocessor, a microcontroller, a Programmable Logic Device (PLD), or any combination thereof. The processor 301 may also be other means with processing functionality such as a circuit, a device, a software module, or the like. The processor 301 may have encoding, modulation, demodulation, decoding, and the like.
A communication link 302 for communicating information between the various components included in the apparatus 300.
Transceiver circuitry 303 for communicating with other devices or other communication networks. The other communication network may be an ethernet, a Radio Access Network (RAN), a Wireless Local Area Network (WLAN), or the like. The transceiver circuit 303 may be a radio frequency module or any device capable of enabling communication. In the embodiment of the present application, only the transceiver circuit 303 is taken as an example of a radio frequency module, where the radio frequency module may include an antenna, a radio frequency circuit, and the like, and the radio frequency circuit may include a radio frequency integrated chip, a power amplifier, and the like.
A memory 304 for storing instructions and a rate-compatible LDPC code check matrix. Wherein the instructions may be a machine program. The rate-compatible LDPC code check matrix may be a check matrix obtained by performing row-column expansion on an LDPC code check matrix in an existing WLAN standard, for example: may be the check matrix H of ((n-k)/Z + Q) row x (n/Z + Q) column described below.
The memory 304 may be a read-only memory (ROM) or other types of static storage devices that can store static information and/or instructions, a Random Access Memory (RAM) or other types of dynamic storage devices that can store information and/or instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, magnetic disc storage media or other magnetic storage devices, and the optical disc storage includes a compact disc, a laser disc, an optical disc, a digital versatile disc, a blu-ray disc, and the like.
It should be noted that the memory 304 may exist independently from the processor 301, or may be integrated with the processor 301. The memory 304 may be used for storing instructions or program code or some data or the like. The memory 304 may be located within the apparatus 300 or may be located outside the apparatus 300, without limitation. The processor 301 is configured to execute the instructions stored in the memory 304 to implement an encoding method provided in the following embodiments of the present application.
In one example, the processor 301 may include one or more CPUs, such as CPU0 and CPU1 in fig. 3.
As an alternative implementation, the apparatus 300 comprises multiple processors, for example, the processor 307 may be included in addition to the processor 301 in fig. 3.
As an alternative implementation, the apparatus 300 further includes an output device 305 and an input device 306. Illustratively, the input device 306 is a keyboard, mouse, microphone, or joystick-like device, and the output device 305 is a display screen, speaker (spaker), or like device.
It should be noted that the apparatus 300 may be a desktop computer, a portable computer, a network server, a mobile phone, a tablet computer, a wireless AP, an embedded device, a chip system, or a device with a similar structure as in fig. 3. Further, the constituent structures shown in fig. 3 do not constitute limitations of the apparatus, and the apparatus may include more or less components than those shown in fig. 3, or may combine some components, or a different arrangement of components, in addition to the components shown in fig. 3.
In the embodiment of the present application, the chip system may be composed of a chip, and may also include a chip and other discrete devices.
A coding method provided in the embodiment of the present application is described below with reference to the communication system shown in fig. 2. Among them, each device in the following embodiments may have the components shown in fig. 3. In which acts, terms, and the like, referred to throughout the various embodiments of the application are all referred to. In the embodiment of the present application, the name of the message exchanged between the devices or the name of the parameter in the message, etc. are only an example, and other names may also be used in the specific implementation, which is not limited.
Fig. 4 is a flowchart of an encoding method according to an embodiment of the present application, where the encoding method may be performed by an encoding apparatus, and the encoding apparatus may be located in the AP or the STA in fig. 2. As shown in fig. 4, the method may include:
step 401: m mother codes are determined.
Wherein, M mother codes can be used to construct an H-layer (U | U + V) structure code, where M ═ 2HFor example, if M is 4 and there is 4 mother codes, a 2-layer (U | U + V) structure code may be constructed. The M mother codes may be short codes with the same code length n and the code length n smaller than the code length threshold, where n is an integer greater than or equal to 1, for example, the mother codes may be BCH (Bose-Chaudhuri-Hocquenghem code) codes or Reed-Solomon (RS) codes or other short codes, and the code length n ═ 63 of BCH.
In the embodiments of the present application, the M mother codes used for constructing the H-layer (U | U + V) structure code may be a 0-th layer code called an H-layer (U | U + V) structure code or a bottom-most layer code of the H-layer (U | U + V) structure code.
Taking the mother code as BCH as an example, the BCH code described in this embodiment of the present application may be a binary BCH code, and is a linear block code with a good algebraic structure, and its excellent minimum hamming distance enables it to have a strong error correction capability and a high decoding performance. Specifically, the BCH code described in this embodiment of the present application may be defined in the finite field GF (2)p) The binary linear block code above, wherein α is a primitive element of the finite field, and the code length is n-2p-1, the encoding of which can be obtained by multiplying an information polynomial by a generator polynomial. Generating a polynomial g (x) as a polynomial ring defined over GF (2) and satisfying g (x) l (x)n-1). G (x) of BCH code capable of correcting t errors is satisfied at GF (2)p) Must have 2t consecutive powers of alpha (e.g. alpha, alpha)2,…,α2t) As its root, the dimension of the BCH code is then k ═ n-deg g (x), where deg g (x) is the power of the g (x) polynomial.
In this embodiment of the present application, in order to enable an H-layer (U | U + V) structure code formed by M mother codes to achieve optimal performance, a code rate of the mother code may be designed based on a channel capacity of a sub-channel (or referred to as an equivalent sub-channel) experienced by the mother code, for example, a channel capacity of a sub-channel corresponding to the mother code may be used as a code rate of the mother code, or a value close to the channel capacity of the sub-channel corresponding to the mother code may be used as the code rate of the mother code, that is, a difference between the channel capacity of the sub-channel corresponding to the mother code and the code rate of the mother code is smaller than or equal to a threshold, where the threshold may be set as needed. In this way, the code rate of the mother code can be designed to be approximately close to the channel capacity of the sub-channel experienced by the mother code, so as to achieve the channel capacity of the sub-channel and realize the error-free transmission of information as much as possible.
In the embodiment of the present application, the sub-channel may refer to an Additive White Gaussian Noise (AWGN) channel or other channels, which is not limited. The present application will be described by taking only a subchannel as an AWGN channel as an example.
Specifically, the M mother codes may be determined by referring to the following manner (one) or manner (two):
the method (I): determining channel capacities of M sub-channels corresponding to M mother codes according to channel capacities of sub-channels corresponding to H-th layer codes of H-layer (U | U + V) structure codes to be constructed, and determining a code rate of an mth mother code according to channel capacities of sub-channels corresponding to the mth mother code in the M mother codes, for example, taking the channel capacity of the sub-channel corresponding to the mth mother code as the code rate of the mth mother code, or taking a value close to the channel capacity of the sub-channel corresponding to the mth mother code as the code rate of the mth mother code; and selecting a mother code satisfying the code rate of the mth mother code from the plurality of mother codes, wherein M is an integer from 1 to M.
In this embodiment, determining the channel capacities of the M subchannels corresponding to the M mother codes according to the channel capacity of the subchannel corresponding to the H-th code may include: determining the noise power of the sub-channel corresponding to the code of the H layer according to the channel capacity of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the code of the H layer according to the noise power of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the M mother codes according to the mean value of the soft information of the codes of the H layer and a recursion mode, determining the noise power of the sub-channel corresponding to the mth mother code according to the mean value of the soft information of the mth mother code in the M mother codes, and determining the channel capacity of the sub-channel corresponding to the mth mother code according to the noise power of the sub-channel corresponding to the mth mother code.
Wherein, the channel capacity of the sub-channel corresponding to the code of the H-th layer is known or pre-configured or determined according to the code rate of the code of the H-th layer. Taking the channel capacity of the subchannel corresponding to the code of the H-th layer as an example, which is determined according to the code rate of the code of the H-th layer, the code rate of the code of the H-th layer may be preset as needed, in one possible design, the code rate of the code of the H-th layer may be used as the channel capacity of the subchannel corresponding to the code of the H-th layer, or, in another possible design, a value close to the code rate of the code of the H-th layer may be used as the channel capacity of the subchannel corresponding to the code of the H-th layer. For example, assuming that the code rate of the code of the H-th layer is 0.55, the channel capacity of the subchannel corresponding to the code of the H-th layer may also be 0.55.
Determining the noise power of the subchannel corresponding to the code of the H-th layer according to the channel capacity of the subchannel corresponding to the code of the H-th layer may include: and (2) substituting the channel capacity of the subchannel corresponding to the code of the H-th layer into the following formula (1) according to a relational expression between the channel capacity of the subchannel and the noise power of the subchannel, wherein the relational expression is shown in the following formula (1), and calculating the noise power of the subchannel corresponding to the code of the H-th layer.
Channel capacity log2(1+ SNR) formula (1)
Wherein, the calculation formula of the signal to noise ratio (SNR) in the formula (1) is: SNR is P/N, and SNR is calculated in dB, P is signal power, and N is noise power.
The soft information of the code according to the embodiment of the present application may refer to Log Likelihood Ratios (LLRs) of the code words included in the code, for example, the code length of the 2 i-th code of the (H-1) th layer of the H-layer (U | U + V) structure code is 2h- 1n, 2i code of (h-1) th layer includes 2h-1n code words, soft information of the 2 i-th code of the (h-1) th layer may include
Figure BDA0002743799210000091
Figure BDA0002743799210000092
Figure BDA0002743799210000093
LLR of 1 st codeword of 2i th code representing (h-1) th layer,
Figure BDA0002743799210000094
the LLR of the 2 nd codeword of the 2i th code representing the (h-1) th layer, and so on,
Figure BDA0002743799210000095
2 nd code representing 2i th code of (h-1) th layerh-1LLRs for n codewords. For example, the code length of ith code of H layer of H layer (U | U + V) structure code is 2hn, the ith code of the h layer includes 2hn code words, the soft information of the code of the h-th layer may include
Figure BDA0002743799210000096
Figure BDA0002743799210000097
LLR of 1 st codeword of ith code representing h layer,
Figure BDA0002743799210000098
the LLR of the 2 nd codeword of the ith code representing the h-th layer, and so on,
Figure BDA0002743799210000099
2 nd code representing ith code of h-th layerhLLRs for n codewords.
In the embodiment of the present application, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1).
In this embodiment of the present application, determining the mean of the soft information of the code of the H-th layer according to the noise power of the subchannel corresponding to the code of the H-th layer may include: and substituting the noise power of the subchannel corresponding to the code of the H-th layer into the following formula (2) according to a relational expression between the noise power of the subchannel and the mean value of the soft information of the code, wherein the relational expression is shown in the following formula (2), and calculating to obtain the mean value of the soft information of the code of the H-th layer.
Figure BDA00027437992100000910
The soft information is used as the LLR,
Figure BDA00027437992100000911
can represent the mean value of the soft information of the ith code in the H layer of the H layer (U | U + V) structure code, and j is the value range of 1 to 2hThe integer of n is an example. Equation 2 can be modified into
Figure BDA00027437992100000912
Wherein
Figure BDA00027437992100000913
And representing the noise power of the subchannel corresponding to the ith code in the h layer.
Wherein, the recursive manner may include: the mean value of the soft information of the (H-1) th code of the H-layer (U | U + V) structure code and the mean value of the soft information of the (2i-1) th code of the (H-1) th layer are determined according to the mean value of the soft information of the ith code of the H layer. Wherein H is an integer ranging from 1 to H, and i is an integer ranging from 1 to 2H-hIs an integer of (1).
Taking soft information as LLR for example, the mean value of the soft information of the 2i code of the (h-1) th layer is
Figure BDA00027437992100000914
The mean value of the soft information of the (2i-1) th code of the (h-1) th layer is
Figure BDA00027437992100000915
The soft information of the ith code of the h layer has an average value of
Figure BDA00027437992100000916
The soft information of the ith code of the h layer may be averaged to
Figure BDA00027437992100000917
Substituting the soft information into the following formula (3), calculating to obtain the average value of the soft information of the 2i code of the (h-1) th layer, and taking the average value of the soft information of the i code of the h layer as
Figure BDA00027437992100000918
Substituting the soft information into the following formula (4) to calculate the average value of the soft information of the (2i-1) th code of the (h-1) th layer.
Figure BDA00027437992100000919
Figure BDA00027437992100000920
Wherein j in the formula (3) is a value range of 1-2h-1n, i is an integer having a value in the range of 1 to 2H-hIs an integer of (1). The function φ (x) in equation (3) is shown in equation (5) below, and x in equation (5) may be replaced with
Figure BDA00027437992100000921
Figure BDA0002743799210000101
For example, the sub-channel is AWGN channel, soft information is LLR, mother code is BCH, and the ith code of the H layer in the H layer (U | U + V) structure code is BCH
Figure BDA0002743799210000102
For example, each one
Figure BDA0002743799210000103
All canViewed as having experienced respective equivalent subchannels Wi (h)The equivalent subchannel has a channel capacity of I (W)i (h)). In order to design the code rate of each BCH code, the channel capacity I (W) of the known H-th layer is needed1 (H)) Determining equivalent subchannel capacities at layer 0
Figure BDA0002743799210000104
Gaussian approximation treats each equivalent subchannel as an AWGN channel with different noise magnitudes, and the subchannel capacities are recursively determined by recursion of their corresponding equivalent noise powers. Definition of
Figure BDA0002743799210000105
Is composed of
Figure BDA0002743799210000106
The bit of the jth codeword of (a),
Figure BDA0002743799210000107
its LLR, j is 1,2 …,2hn is the same as the formula (I). These LLRs can all be viewed as gaussian random variables, where the LLRs for layer H obey a normal distribution:
Figure BDA0002743799210000108
wherein sigma2Is the noise variance of the gaussian channel. The mean of the LLR of the h-th layer and the LLR of the (h-1) -th layer satisfies the above equation (3) and equation (4).
The mean values of LLRs from the H-th layer to the 0-th layer can be sequentially obtained by the recursive relationship shown in the above equations (3) and (4). In which the mother codes of layer 0 are obtained
Figure BDA0002743799210000109
Then, the noise level of the sub-channel corresponding to each mother code can be obtained according to the above formula (2)
Figure BDA00027437992100001010
Thus, it is obtained according to the formula (1)
Figure BDA00027437992100001011
AWGN channel W for noise poweri (0)Channel capacity I (W)i (0)) For example, fig. 5 shows the channel capacity I (W) corresponding to a layer 2 code assuming a known layer 2 (U | U + V) structure code1 (2)) Based on the above information, the sub-channel capacity I (W) corresponding to four mother codes for constructing a 2-layer (U | U + V) structure code determined by Gaussian approximation1 (0))、I(W2 (0))、
Figure BDA00027437992100001012
And then the code rate of the mother code is obtained according to the channel capacity of the AWGN channel corresponding to the mother code.
For example, taking the mother code as a BCH code, and taking the code length of the BCH code as 63 bits as an example, in order to design a 2-layer (U | U + V) structure code with a code rate of 0.55, the channel capacities of the sub-channels corresponding to 4 mother codes for constructing the 2-layer (U | U + V) structure code may be determined by using the above method, for example, the channel capacities of the sub-channels corresponding to the determined 4 mother codes are respectively:
Figure BDA00027437992100001013
Figure BDA00027437992100001014
due to the discontinuity of code rate selection of BCH codes, the actually selected code rate is generally smaller than the capacity of the extracted sub-channel, so the 4 BCH codes should be selected as (63,57), (63,39), (63,36), (63,7), respectively.
Furthermore, the dimensions of the plurality of mother codes determined by the first mode and the code rate of the H-th layer code of the multilayer (U | U + V) structure code constructed by using the mother codes can be correspondingly stored, so that the mother codes which can meet the code rate of the H-th layer code can be selected from the stored corresponding relation according to the code rate of the H-th layer code designed in the following.
E.g. by kiIs a mother code
Figure BDA00027437992100001015
The following table shows the H-th layer of the 2-layer (U | U + V) structure codeThe following table two shows the correspondence between the code rate (or referred to as the total code rate) of the H-th layer code of the 3-layer (U | U + V) structure code and the dimensions of the four mother codes.
Watch 1
R (Total code rate) k1 k2 k3 k4
0.67 63 45 45 16
0.587 57 45 36 10
0.551 57 39 36 7
0.516 57 36 30 7
0.452 57 30 24 0
0.369 51 24 18 0
0.290 51 18 10 0
Watch two
R (Total code rate) k1 k2 k3 k4 k5 k6 k7 k8
0.672 63 63 57 39 57 36 24 0
0.591 63 57 57 30 51 24 16 0
0.532 63 57 51 24 45 18 10 0
0.458 63 51 45 16 39 10 7 0
0.37 57 45 39 10 30 7 0 0
0.325 57 39 30 7 24 7 0 0
It should be noted that table one and table two are merely exemplary tables, and the embodiments of the present application are not limited to the row numbers of table one and table two.
Mode (ii): acquiring the code rate of the H-th layer code of the H-th layer (U | U + V) structure code to be constructed, and selecting and constructing M mother codes of the H-th layer (U | U + V) structure code according to the corresponding relation between the prestored code rate (or called total code rate) of the H-th layer code and the dimensionality of the mother codes.
For example, assuming that the total code rate is 0.67, and a 2-layer (U | U + V) structure code is to be constructed, the lookup table one can know that the dimensions of the mother codes used for constructing the 2-layer (U | U + V) structure code are 63,45, 16, respectively, and in the case that the code length of the mother codes is 63 bits, the 4 mother codes are (63,63), (63,45), (63,45), (63,16), respectively.
For another example, assuming that the total code rate is 0.672 and a 3-layer (U | U + V) structure code is to be constructed, the look-up table two can know that the dimensions of mother codes used for constructing the 3-layer (U | U + V) structure code are 63,57, 39, 57, 36, 24, 0, respectively, and when the code length of the mother codes is 63 bits, 8 mother codes are (63,63), (63,57), (63,39), (63,57), (63,36), (63,24), (63,0), respectively.
In this embodiment of the present application, a code rate of a code on an H layer of an H layer (U | U + V) structure code may be referred to as an overall code rate R or a transmission code rate, where the transmission code rate may refer to a rate at which a transmitting end encodes information bits by using the code on the H layer of the H layer (U | U + V) structure code to obtain coded bits, and transmits the coded bits to a receiving end.
Step 402: and constructing an H-layer (U | U + V) structure code based on the M mother codes.
Wherein, the ith code of the H layer in the H layer (U | U + V) structure code is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure code and the (2i-1) code of the (H-1) layer, the ith code of the 1 st layer in the H layer (U | U + V) structure code is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1). That is, two first-layer (U | U + V) structure codes are regarded as new U codes and V codes, respectively, and a second-layer (U | U + V) structure code can be constructed by reusing the structure. By analogy, a multi-layer (U | U + V) structure code can be constructed by using more BCH codes as mother codes, and the total code length is doubled when the number of layers is increased by one layer.
For example, FIG. 6 shows the construction of an H-layer (U | U + V) structure code, in which
Figure BDA0002743799210000111
I-th code indicating h-th layer, i-1, 2, …,2H-hCode length of 2hn is the same as the formula (I). The code of layer 0 is BCH code, and 2 is always neededHA BCH mother code with a total code length of 2Hn is the same as the formula (I). The relationship of each code between layers is
Figure BDA0002743799210000112
Wherein, in the embodiment of the application,
Figure BDA0002743799210000113
which may be referred to as the U-code,
Figure BDA0002743799210000114
which may be referred to as a V-code,
Figure BDA0002743799210000115
and
Figure BDA0002743799210000116
the (U | U + V) structure can be formed by the method shown in FIG. 7
Figure BDA0002743799210000117
As shown in fig. 7, the U code and the V code are xor-ed
Figure BDA0002743799210000118
The (U + V) code is obtained through calculation, and then the U code and the (U + V) code are combined to obtain a tree diagram (U | U + V) structure code, namely, multiple protection of multiple U codes can be formed by superposing the U code on the V code, for example, important information can be placed on the U code, and relatively unimportant information can be placed on the V code, so that unequal error protection is formed.
Further, the information bits may be encoded based on the H-th layer code of the constructed H-layer (U | U + V) structure code to obtain encoded bits, and the encoded bits may be sent to the receiving section.
Based on the method shown in fig. 4, a multi-layer (U | U + V) structure code can be constructed based on M short codes, the number of layers of the multi-layer (U | U + V) structure code and the code length of the H-th layer code can be flexibly designed according to the code length of the short codes and the number of the short codes, for example, the number of the short codes required is doubled when the number of layers is increased by one layer, and the code length of the H-th layer code is doubled, i.e., the code designed by the (U | U + V) structure can flexibly change the code length, so as to meet the design requirements of the medium and long codes, and the information bits can be channel-coded by the H-th layer code of the (U | U + V) structure code, so that the high-reliability low-delay transmission of the information bits can be realized.
As the inverse process of the encoding process, after the receiving end receives the encoded bits, the receiving end can perform decoding processing on the encoded bits to obtain the final decoding estimation. In the embodiment of the present application, the decoding process of the H-layer (U | U + V) structure code is a recursive process, which may include three operations: 1) the layer-by-layer decomposition of the (U | U + V) code and the update of LLR; 2) decoding the mother code; 3) layer-by-layer reconstruction of (U | U + V) codes. The decoded input of the H-layer (U | U + V) code is received
Figure BDA0002743799210000121
Soft information (here, LLR values) of the respective bits of
Figure BDA0002743799210000122
The output is a decoded estimate of each mother code. Specifically, the decoding process can be illustrated with reference to fig. 8.
Fig. 8 is a flowchart of a decoding method according to an embodiment of the present application, where the method may be executed by a decoding device, and the decoding device may be a functional module in the AP or the STA in fig. 2, as shown in fig. 8, the method may include:
step 801: soft information of M mother codes for constructing an H-layer (U | U + V) structure code is determined according to soft information of coded bits.
The description of the M mother codes may refer to step 401. The coded bits may be coded bits obtained by coding information bits using a code of an H-th layer of an H-layer (U | U + V) structure code, H being an integer greater than or equal to 1, and M ═ 2H
For example, determining soft information of M mother codes for constructing an H-layer (U | U + V) structure code according to soft information of coded bits may include: using soft information of the coded bits as soft information of a code of an H-th layer of an H-layer (U | U + V) structure code; and obtaining soft information of M mother codes by utilizing a layer-by-layer decomposition algorithm based on the soft information of the H-th layer code.
The layer-by-layer decomposition algorithm may include: the soft information of the 2 i-th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-layer, and the soft information of the (2i-1) th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-th layer of the H-layer (U | U + V) structure code and the decoding result of the 2 i-th code of the (H-1) th layer.
The description of the soft information may refer to fig. 5, and the soft information may be LLR.
Taking soft information as an example of LLR, referring to the procedure shown in fig. 9, starting from the H-th layer of the H-layer (U | U + V) structure code, the procedure will be described
Figure BDA0002743799210000123
Decomposed into U codes
Figure BDA0002743799210000124
And V code
Figure BDA0002743799210000125
And is represented by the following formula (6) and formula (7)
Figure BDA0002743799210000126
The LLR of the U code and the V code is obtained by calculation, and the LLR is updated layer by layer from the H layer to the bottom layer by parity of reasoning, and each LLR is updated from the H layer to the bottom layer
Figure BDA0002743799210000127
Decomposed to obtain U code
Figure BDA0002743799210000128
And V code
Figure BDA0002743799210000129
Until the LLR of each mother code of the layer 0 is recovered.
Figure BDA00027437992100001210
Figure BDA00027437992100001211
Wherein, the formula (6) is the update of the V-code LLR, the formula (7) shows the update of the U-code LLR, and in the formula (6) and the formula (7), j is a value range of 1 to 2h-1n, i is an integer having a value in the range of 1 to 2H-hH is an integer ranging from 1 to H, in the formula (6)
Figure BDA00027437992100001212
X, Y ∈ R, can be
Figure BDA00027437992100001213
As X, will
Figure BDA00027437992100001214
As Y, substituting the formula f (X, Y) to obtain
Figure BDA00027437992100001215
Wherein, in the above formula (7)
Figure BDA00027437992100001216
Is the decoding result of the jth bit of the 2 i-th codeword of the (h-1) -th layer.
Step 802: performing decoding operation on soft information of the mth mother code in the M mother codes to determine a decoding result of the mth mother code; wherein M is an integer having a value of 1 to M.
For example, the decoding the soft information of the mth mother code of the M mother codes, and determining the decoding result of the mth mother code may include: utilizing an Ordered Statistical Decoding (OSD) operation to obtain a candidate code word list based on the soft information of the mth mother code, wherein the candidate code word list comprises one or more candidate code words; and selecting theta candidate code words with high reliability from the candidate code word list, wherein theta is an integer greater than or equal to 1 as a decoding result of the mth mother code.
For example, soft information is taken as LLR for example, and the mother code of the bottom layer is calculated
Figure BDA0002743799210000131
Soft information of (2):
Figure BDA0002743799210000132
thereafter, refer to the method pair shown in FIG. 10
Figure BDA0002743799210000133
The operation of the OSD is performed,
Figure BDA0002743799210000134
the OSD decoding has a candidate code word list, and the most reliable theta is selected from the code word listiiNot less than 1)
Figure BDA0002743799210000135
As
Figure BDA0002743799210000136
Is output.
The OSD decoding process shown in fig. 10 may include: and receiving the n-bit information, sequencing according to the reliability of the n-bit information, and selecting the most reliable k bits from the n-bit information. The n-bit information may refer to an LLR of each bit of n bits included in the code, and the reliability of each bit is measured by the LLR of each bit, and the greater the absolute value of the LLR, the more reliable the corresponding bit is. The τ order OSD will turn over the most reliable k bits in the received symbol by 0,1, … in turn, τ bits are re-encoded, all re-encoded code words are put in the candidate code word list, and one code word closest to the received vector is selected from the candidate code words as the decoded output. For codes with code rate not less than 0.5, the decoding order is selected
Figure BDA0002743799210000137
I.e. Maximum Likelihood (ML) decoding performance can be approached, wherein dminIs the minimum hamming distance of the code.
Step 803: and reconstructing the H-layer (U | U + V) structure code based on the decoding result of each mother code in the M mother codes to obtain the final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code.
For example, reconstructing the H-layer (U | U + V) structure code based on the decoding result of each of the M mother codes, and obtaining the final decoding estimation of the H-layer (U | U + V) structure code may include: and based on the decoding result of each mother code in the M mother codes, obtaining the decoding result of the H-th layer code of the H-layer (U | U + V) structural code by using a layer-by-layer reconstruction algorithm, and selecting a decoding result with higher reliability from the decoding result of the H-th layer as the final decoding estimation of the H-th layer code.
The layer-by-layer reconstruction algorithm comprises the following steps: one decoding result of the ith code of the H layer in the H-layer (U | U + V) structure code is composed of one decoding result of the 2i code of the (H-1) layer and one decoding result of the (2i-1) code of the (H-1) layer, and one decoding result of the ith code of the 1 st layer in the H-layer (U | U + V) structure code is composed of one decoding result of the 2i code of the M mother codes and one decoding result of the (2i-1) code, that is to say
Figure BDA0002743799210000138
This operation requires recovery of layer H from layer 0 all the time
Figure BDA0002743799210000139
Wherein, the ith code of the H layer in the H layer (U | U + V) structure code comprises
Figure BDA00027437992100001310
The result of the decoding is that,
Figure BDA00027437992100001311
the decoding result number of (2i-1) th codes of (H-1) th layer in the H-layer (UU + V) structure code,
Figure BDA00027437992100001312
is the 2 i-th of the (H-1) th layer in the H-layer (U | U + V) structure codeThe number of decoding results of the code; h is an integer ranging from 1 to H, i is an integer ranging from 1 to 2H-hIs an integer of (1). That is to say if
Figure BDA00027437992100001313
Is/are as follows
Figure BDA00027437992100001314
Having a theta2i-1The number of the main components is one,
Figure BDA00027437992100001315
is/are as follows
Figure BDA00027437992100001316
Having a theta2iThen recombined
Figure BDA00027437992100001317
Is/are as follows
Figure BDA00027437992100001318
Will have a2i-1θ2iAnd (4) respectively. Illustratively, if the lowest mother code
Figure BDA00027437992100001319
Are respectively in the size of theta12,…,
Figure BDA00027437992100001362
Then reverting to the H layer
Figure BDA00027437992100001320
Is of list size theta1θ2
Figure BDA00027437992100001361
For example, fig. 11 shows a flowchart of decoding a list of 2-layer (U | U + V) codes, which combines the above three operations,
Figure BDA00027437992100001321
the specific decoding steps are as follows. Decoded input is
Figure BDA00027437992100001322
Soft information of
Figure BDA00027437992100001323
Firstly, the method is to
Figure BDA00027437992100001324
Is decomposed into
Figure BDA00027437992100001325
And
Figure BDA00027437992100001326
(update)
Figure BDA00027437992100001327
The LLRs of (a) of (b),
Figure BDA00027437992100001328
need to wait for LLR update
Figure BDA00027437992100001329
Decoding result of (1). Then will be
Figure BDA00027437992100001330
Is decomposed into
Figure BDA00027437992100001331
And
Figure BDA00027437992100001332
(update)
Figure BDA00027437992100001333
The LLRs of (a) of (b),
Figure BDA00027437992100001334
need to wait for LLR update
Figure BDA00027437992100001335
Decoding result of (1). To pair
Figure BDA00027437992100001336
Using OSD decoding with decoding list size of theta4. Then updates each decoding in the list separately
Figure BDA00027437992100001337
Can determine theta3And (5) decoding. Complete the process
Figure BDA00027437992100001338
And
Figure BDA00027437992100001339
after decoding, recover
Figure BDA00027437992100001340
At this time
Figure BDA00027437992100001341
Total theta3θ4One, i.e. the list size is theta3θ4. To pair
Figure BDA00027437992100001342
Each of which is updated separately
Figure BDA00027437992100001343
The LLR of (a). Will be provided with
Figure BDA00027437992100001344
Is decomposed into
Figure BDA00027437992100001345
And
Figure BDA00027437992100001346
(update)
Figure BDA00027437992100001347
The LLRs of (a) of (b),
Figure BDA00027437992100001348
need to wait for LLR update
Figure BDA00027437992100001349
Decoding result of (1). To pair
Figure BDA00027437992100001350
Using OSD decoding with decoding list size of theta2. To pair
Figure BDA00027437992100001351
Is updated separately for each decoding of the data stream
Figure BDA00027437992100001352
The LLR of (a). To pair
Figure BDA00027437992100001353
OSD decoding is carried out, and the size of a decoding list is theta1. Finish making
Figure BDA00027437992100001354
And
Figure BDA00027437992100001355
can recover
Figure BDA00027437992100001356
With a list size theta1θ2. At this point has already finished
Figure BDA00027437992100001357
And
Figure BDA00027437992100001358
can recover
Figure BDA00027437992100001359
With a list size theta1θ2θ3θ4. Selecting from the list the one having the closest Euclidean distance to the received symbol vector as
Figure BDA00027437992100001360
Final decoding estimation ofAnd (6) counting.
Further, the information bits are obtained according to the final decoding estimation decoding of the H-th layer code of the H-layer (U | U + V) structure code, for example, the information bits can be obtained by comparing the final decoding estimation decoding of the H-th layer code with the received coded bits.
In order to verify the decoding performance of the (U | U + V) structure code provided in the embodiment of the present application, fig. 12 shows the error rate graphs of the 2-layer (U | U + V) structure code and the (256,140) polarization code using BCH codes of (63,57), (63,36), (63,30), (63,7) as mother codes, wherein 4 BCH codes are selected to have OSD orders approaching the ML performance, which are 1,2,2, and 3 respectively. The OSD decoding orders of the three curves are the same, but the decoding lists of the BCH codes are different in size, and the parameter of the A curve is (theta)1234) (1,1,1,1), which is equivalent to no list decoding; the parameter of the B curve is (theta)1234) Where (2,2,2,2) is plotted as (θ)1234) (1,1,2, 2). It can be seen that the larger the list, the better the coding performance. Comparing the B and C curves, it can be seen that setting the list size of the two BCH codes decoded later to 1 does not cause much performance loss. Therefore, to reduce complexity, the list size of the BCH codes decoded later may all be set to 1. Generally speaking, the decoding performance of the (U | U + V) structure code provided by the embodiment of the present application is good, the size of the decoding list can be adjusted according to actual requirements, and the larger the list is, the better the performance is. And the decoding complexity is not high, mainly depends on OSD of each BCH code, but is low because the decoding orders are all small.
For another example, fig. 13 shows a graph of the error rate of a 3-layer (U | U + V) structure code, in which eight mother codes are selected as BCH codes of (63,63), (63,57), (63,57), (63,30), (63,51), (63,24), (63,16), (63,0), and OSD thereof also adopts a decoding order approximating ML, which is 1,1,1,2,1,3,3,3, respectively. The list size of curve a is (1,1,1,1, 1) and the list size of curve B is (1,1,1,1,1,2,2, 1). The error rate of the 3-layer (U | U + V) structure code is smaller than that of the polarization code, and the performance is better than that of the polarization code. Comparing the a-curve and B-curve corresponding to the 3-layer (U | U + V) structure code, it can be seen that setting the list size of the sixth and seventh decoded two BCH codes to 1 does not cause much performance loss. Therefore, to reduce complexity, the list size of the BCH codes decoded later may all be set to 1. Generally speaking, the decoding performance of the (U | U + V) structure code provided by the embodiment of the present application is good, the size of the decoding list can be adjusted according to actual requirements, and the larger the list is, the better the performance is. And the decoding complexity is not high, mainly depends on OSD of each BCH code, but is low because the decoding orders are all small.
The above-mentioned scheme provided by the embodiments of the present application is mainly introduced from the perspective of interaction between the nodes. It will be appreciated that each node, for example a key management network element, comprises corresponding hardware structures and/or software modules for performing each function in order to implement the above-described functions. Those skilled in the art will readily appreciate that the methods of the embodiments of the present application can be implemented in hardware, software, or a combination of hardware and computer software, in conjunction with the exemplary algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the key management network element may be divided into functional modules according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. It should be noted that, in the embodiment of the present application, the division of the module is schematic, and is only one logic function division, and there may be another division manner in actual implementation.
Fig. 14 shows a block diagram of an apparatus 140, where the apparatus 140 may be an encoding apparatus, a chip in the encoding apparatus, a system on chip, or other apparatuses capable of implementing the functions of the encoding apparatus in the above method, and the apparatus 140 may be configured to perform the functions of the encoding apparatus in the above method embodiments. Alternatively, the apparatus 140 may be a decoding apparatus, a chip in the decoding apparatus, a system on chip, or other apparatuses capable of implementing the function of the decoding apparatus in the above method, and the apparatus 140 may be configured to perform the function of the decoding apparatus in the above method embodiments. As one way of implementation, the apparatus 140 shown in fig. 14 includes: a processing unit 1401.
For example, the processing unit 1401 is configured to determine M mother codes, and construct an H-layer (U | U + V) structure code based on the M mother codes; the M mother codes are short codes with the same code length n and the code length n smaller than or equal to a code length threshold; h is an integer greater than or equal to 1, M is 2HThe ith code of the H layer in the H layer (U | U + V) structure code is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure code and the (2i-1) code of the (H-1) layer, the ith code of the 1 layer in the H layer (U | U + V) structure code is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1).
For another example, the processing unit 1402 is configured to determine soft information of M mother codes used for constructing an H-layer (U | U + V) structure code according to the soft information of the coded bits; wherein the coded bits are coded bits obtained by coding information bits using a code of an H-th layer of an H-layer (U | U + V) structure code, H is an integer of 1 or more, and M is 2H(ii) a Performing decoding operation on soft information of the mth mother code in the M mother codes to determine a decoding result of the mth mother code; wherein M is an integer from 1 to M; and reconstructing the H-layer (U | U + V) structure code based on the decoding result of each mother code in the M mother codes to obtain the final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code.
Specifically, all relevant contents of each step related to the method embodiment shown in fig. 4 or fig. 8 may be referred to the functional description of the corresponding functional module, and are not described herein again. The device 140 is used to perform the functions of the encoding device and the decoding device in the method shown in fig. 4 or fig. 8, so that the same effects as the above method can be achieved.
In this embodiment, the apparatus 140 may also be presented in a form of dividing each functional module in an integrated manner. As used herein, a "functional block" may refer to an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor and memory that execute one or more software or firmware programs, an integrated logic circuit, and/or other devices that provide the described functionality. In a simple embodiment, those skilled in the art may realize that the functions/implementation procedures of the processing unit 1401 in the apparatus 140 may be implemented by the processor calling the computer-executable instructions stored in the memory. The function/implementation procedure of the transceiving unit 1402 in fig. 14 may be implemented through a communication interface. For example, as yet another implementation, the apparatus 140 may adopt the composition structure shown in fig. 3.
In the embodiment of the present application, the chip system may be composed of a chip, and may also include a chip and other discrete devices.
The embodiment of the application also provides a computer readable storage medium. All or part of the processes in the above method embodiments may be performed by relevant hardware instructed by a computer program, which may be stored in the above computer-readable storage medium, and when executed, may include the processes in the above method embodiments. The computer readable storage medium may be the terminal device of any of the foregoing embodiments, such as: including internal storage units of the data transmitting end and/or the data receiving end, such as a hard disk or a memory of the terminal device. The computer readable storage medium may also be an external storage device of the terminal device, such as a plug-in hard disk, a Smart Memory Card (SMC), a Secure Digital (SD) card, a flash memory card (flash card), and the like, which are provided on the terminal device. Further, the computer-readable storage medium may include both an internal storage unit and an external storage device of the terminal apparatus. The computer-readable storage medium stores the computer program and other programs and data required by the terminal device. The above-described computer-readable storage medium may also be used to temporarily store data that has been output or is to be output.
The embodiment of the application also provides a computer instruction. All or part of the flow of the above method embodiments may be performed by computer instructions to instruct relevant hardware (such as a computer, a processor, a network device, a terminal, and the like). The program may be stored in the computer-readable storage medium described above.
It should be understood that in the embodiment of the present application, "B corresponding to a" means that B is associated with a. For example, B may be determined from A. It should also be understood that determining B from a does not mean determining B from a alone, but may also be determined from a and/or other information. In addition, the term "connect" in the embodiment of the present application refers to various connection manners, such as direct connection or indirect connection, to implement communication between devices, and this is not limited in this embodiment of the present application.
In the description of the present application, a "/" indicates a relationship in which the objects associated before and after are an "or", for example, a/B may indicate a or B; in the present application, "and/or" is only an association relationship describing an associated object, and means that there may be three relationships, for example, a and/or B, and may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. Also, in the description of the present application, "a plurality" means two or more than two unless otherwise specified. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple. In addition, in order to facilitate clear description of technical solutions of the embodiments of the present application, in the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same items or similar items having substantially the same functions and actions. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance. Also, in the embodiments of the present application, words such as "exemplary" or "for example" are used to mean serving as examples, illustrations or illustrations. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present relevant concepts in a concrete fashion for ease of understanding.
Through the above description of the embodiments, it is clear to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above function distribution may be completed by different functional modules according to needs, that is, the internal structure of the device may be divided into different functional modules to complete all or part of the above described functions.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the modules or units is only one logical functional division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another device, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may be one physical unit or a plurality of physical units, that is, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application may be substantially or partially implemented in the form of software products, which are stored in a storage medium and include instructions for causing a device, such as: the method can be a single chip, a chip, or a processor (processor) for executing all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a U disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.
The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (24)

1. A method of encoding, the method comprising:
determining M mother codes; the M mother codes are short codes with the same code length n and the code length n smaller than or equal to a code length threshold value;
constructing an H-layer (U | U + V) structure code based on the M mother codes; wherein H is an integer greater than or equal to 1, and M is 2HThe H layer (U | U + V) structure code comprises the 2i layer code of the (H-1) layer and the (2i-1) layer code of the (H-1) layer, the 1 layer (I) code of the H layer (U | U + V) structure code comprises the 2i code and the (2i-1) code of the M mother codes, H is an integer with a value range from 1 to H, i is an integer with a value range from 1 to HA value in the range of 1 to 2H-hIs an integer of (1).
2. The method of claim 1, wherein determining the M mother codes comprises:
determining the channel capacity of M sub-channels corresponding to the M mother codes according to the channel capacity of the sub-channel corresponding to the H-th layer code;
determining the code rate of the mth mother code according to the channel capacity of a sub-channel corresponding to the mth mother code in the M mother codes, wherein M is an integer with the value of 1-M;
and selecting a mother code satisfying the code rate of the mth mother code from the plurality of mother codes.
3. The method according to claim 2, wherein the determining the code rate of the mth mother code according to the channel capacity of the sub-channel corresponding to the mth mother code among the M mother codes comprises:
the code rate of the mth mother code is equal to the channel capacity of the sub-channel corresponding to the mth mother code; or,
and the difference value between the code rate of the mth mother code and the channel capacity of the sub-channel corresponding to the mth mother code is less than or equal to a threshold value.
4. The method according to claim 2 or 3, wherein the determining channel capacities of the M subchannels corresponding to the M mother codes according to the channel capacity of the subchannel corresponding to the H-th code comprises:
determining the noise power of the sub-channel corresponding to the code of the H layer according to the channel capacity of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the H-th layer code according to the noise power of the sub-channel corresponding to the H-th layer code;
determining the mean value of the soft information of the M mother codes according to the mean value of the soft information of the codes of the H layer and a recursion mode, wherein the recursion mode comprises the following steps: the mean value of the soft information of the 2 i-th code of the (h-1) th layer and the mean value of the soft information of the (2i-1) th code of the (h-1) th layer are determined according to the mean value of the soft information of the i-th code of the h-th layer;
and determining the noise power of a sub-channel corresponding to the mth mother code according to the average value of the soft information of the mth mother code in the M mother codes, and determining the channel capacity of the sub-channel corresponding to the mth mother code according to the noise power of the sub-channel corresponding to the mth mother code.
5. The method according to any one of claims 1 to 4,
the M mother codes are BCH codes or Reed-Solomon codes RS codes with the same code length.
6. A method of decoding, the method comprising:
determining soft information of M mother codes for constructing an H-layer (U | U + V) structure code according to the soft information of the coded bits; wherein the coded bits are coded bits obtained by coding information bits using an H-th layer code of the H-layer (U | U + V) structure code, H is an integer greater than or equal to 1, and M is 2H
Decoding soft information of an mth mother code in the M mother codes to determine a decoding result of the mth mother code; wherein M is an integer from 1 to M;
reconstructing the H-layer (U | U + V) structure code based on the decoding result of each mother code in the M mother codes to obtain the final decoding estimation of the H-th layer code of the H-layer (U | U + V) structure code.
7. The method of claim 6, wherein determining soft information of M mother codes for constructing an H-layer (UlU + V) structure code according to the soft information of the coded bits comprises:
using soft information of the coded bits as soft information of a code of an H-th layer of the H-layer (UlU + V) structured code;
obtaining soft information of the M mother codes by utilizing a layer-by-layer decomposition algorithm based on the soft information of the H-th layer code;
wherein the layer-by-layer decomposition algorithm comprises: the soft information of the 2 i-th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-layer, and the soft information of the (2i-1) th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-th layer of the H-layer (U | U + V) structure code and the decoding result of the 2 i-th code of the (H-1) th layer.
8. The method according to claim 6 or 7, wherein said performing a decoding operation on the soft information of an mth mother code of the M mother codes to determine a decoding result of the mth mother code comprises:
obtaining a candidate code word list by utilizing decomposition statistics decoding OSD operation based on soft information of an mth mother code, wherein the candidate code word list comprises one or more candidate code words;
selecting theta candidate code words with higher reliability from the candidate code word list as a decoding result of the mth mother code; wherein θ is an integer greater than or equal to 1.
9. The method according to any of claims 6-8, wherein said reconstructing the H-layer (UlU + V) structure code based on the decoding result of each mother code of the M mother codes to obtain the final decoding estimation of the H-layer code of the H-layer (UlU + V) structure code comprises:
obtaining a decoding result of a code of an H-th layer of the H-layer (U | U + V) structure code by utilizing a layer-by-layer reconstruction algorithm based on a decoding result of each mother code in the M mother codes; wherein an ith code of an H layer of the H layer (U | U + V) structure codes includes
Figure FDA0002743799200000021
A result of the decoding, said
Figure FDA0002743799200000022
The number of decoding results for the (2i-1) th code of the (H-1) th layer in the H-layer (U | U + V) structured code, the
Figure FDA0002743799200000023
The decoding result number of the 2i code of the (H-1) th layer in the H layer (U | U + V) structure code; h is an integer ranging from 1 to H, and i is an integer ranging from 1 to 2H-hAn integer of (d); the layer-by-layer reconstruction algorithm comprises: a decoding result of the ith code of the H layer in the H-layer (U | U + V) structure code is composed of a decoding result of the 2i code of the (H-1) th layer and a decoding result of the (2i-1) th code of the (H-1) th layer, and a decoding result of the ith code of the 1 st layer in the H-layer (U | U + V) structure code is composed of a decoding result of the 2i code of the M mother codes and a decoding result of the (2i-1) th code;
and selecting a decoding result with higher reliability from the decoding results of the H-th layer as the final decoding estimation of the code of the H-th layer.
10. The method according to any one of claims 6 to 9,
the M mother codes are BCH codes or Reed-Solomon codes RS codes with the same code length.
11. An encoding apparatus, characterized in that the encoding apparatus comprises:
the processing unit is used for determining M mother codes; the M mother codes are short codes with the same code length n and the code length n smaller than or equal to a code length threshold value;
the processing unit is further configured to construct an H-layer (U | U + V) structure code based on the M mother codes; wherein H is an integer greater than or equal to 1, and M is 2HThe ith code of the H layer in the H layer (U | U + V) structure code is composed of the 2i code of the (H-1) layer in the H layer (U | U + V) structure code and the (2i-1) code of the (H-1) layer, the ith code of the 1 st layer in the H layer (U | U + V) structure code is composed of the 2i code and the (2i-1) code in the M mother codes, H is an integer with a value range of 1 to H, and i is an integer with a value range of 1 to 2H-hIs an integer of (1).
12. The apparatus according to claim 11, wherein the processing unit is specifically configured to:
determining the channel capacity of M sub-channels corresponding to the M mother codes according to the channel capacity of the sub-channel corresponding to the code of the H layer;
determining a code rate of an mth mother code in the M mother codes according to a channel capacity of a sub-channel corresponding to the mth mother code, wherein M is an integer from 1 to M;
and selecting a mother code satisfying the code rate of the mth mother code from the plurality of mother codes.
13. The apparatus of claim 12,
the code rate of the mth mother code is equal to the channel capacity of the sub-channel corresponding to the mth mother code; or,
and the difference value between the code rate of the mth mother code and the channel capacity of the sub-channel corresponding to the mth mother code is less than or equal to a threshold value.
14. The apparatus according to claim 12 or 13, wherein the processing unit is specifically configured to:
determining the noise power of the sub-channel corresponding to the code of the H layer according to the channel capacity of the sub-channel corresponding to the code of the H layer; determining the mean value of the soft information of the codes of the H layer according to the noise power of the sub-channel corresponding to the codes of the H layer;
determining the mean value of the soft information of the M mother codes according to the mean value of the soft information of the codes of the H layer and a recursion mode, wherein the recursion mode comprises the following steps: the mean value of the soft information of the 2 i-th code of the (h-1) th layer and the mean value of the soft information of the (2i-1) th code of the (h-1) th layer are determined according to the mean value of the soft information of the i-th code of the h-th layer;
and determining the noise power of a sub-channel corresponding to the mth mother code according to the average value of the soft information of the mth mother code in the M mother codes, and determining the channel capacity of the sub-channel corresponding to the mth mother code according to the noise power of the sub-channel corresponding to the mth mother code.
15. The apparatus according to any one of claims 11-14,
the M mother codes are BCH codes or Reed-Solomon codes RS codes with the same code length.
16. A decoding apparatus, characterized in that the decoding apparatus comprises:
a processing unit for determining soft information of M mother codes for constructing an H-layer (U | U + V) structure code according to the soft information of the coded bits; wherein the coded bits are coded bits obtained by coding information bits using an H-th layer code of the H-layer (U | U + V) structure code, H is an integer greater than or equal to 1, and M is 2H
The processing unit is further configured to perform decoding operation on soft information of an mth mother code in the M mother codes, and determine a decoding result of the mth mother code; wherein M is an integer from 1 to M;
the processing unit is further configured to reconstruct the H-layer (U | U + V) structure code based on a decoding result of each mother code of the M mother codes, and obtain a final decoding estimation of a H-th layer code of the H-layer (U | U + V) structure code.
17. The apparatus according to claim 16, wherein the processing unit is specifically configured to:
using soft information of the coded bits as soft information of a code of an H-th layer of the H-layer (UlU + V) structured code;
obtaining soft information of the M mother codes by utilizing a layer-by-layer decomposition algorithm based on the soft information of the H-th layer code;
wherein the layer-by-layer decomposition algorithm comprises: the soft information of the 2 i-th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-layer, and the soft information of the (2i-1) th code of the (H-1) th layer of the H-layer (U | U + V) structure code is determined according to the soft information of the i-th code of the H-th layer of the H-layer (U | U + V) structure code and the decoding result of the 2 i-th code of the (H-1) th layer.
18. The apparatus according to claim 16 or 17, wherein the processing unit is configured to perform a decoding operation on the soft information of an mth mother code of the M mother codes, and determine a decoding result of the mth mother code, and includes:
obtaining a candidate code word list by utilizing decomposition statistics decoding OSD operation based on soft information of an mth mother code, wherein the candidate code word list comprises one or more candidate code words;
selecting theta candidate code words with higher reliability from the candidate code word list as a decoding result of the mth mother code; wherein θ is an integer greater than or equal to 1.
19. The apparatus according to any of claims 16-18, wherein the processing unit is configured to reconstruct the H-layer (U | U + V) structure code based on the decoding result of each of the M mother codes, and obtain a final decoding estimation of the H-layer (U | U + V) structure code, and comprises:
obtaining a decoding result of a code of an H-th layer of the H-layer (U | U + V) structure code by utilizing a layer-by-layer reconstruction algorithm based on a decoding result of each mother code in the M mother codes; wherein an ith code of an H layer of the H layer (U | U + V) structure codes includes
Figure FDA0002743799200000041
A result of the decoding, said
Figure FDA0002743799200000042
The number of decoding results for the (2i-1) th code of the (H-1) th layer in the H-layer (U | U + V) structured code, the
Figure FDA0002743799200000043
The decoding result number of the 2i code of the (H-1) th layer in the H layer (U | U + V) structure code; h is an integer ranging from 1 to H, and i is an integer ranging from 1 to 2H-hAn integer of (d); the layer-by-layer reconstruction algorithm comprises: the H layer (U)One decoding result of the ith code of the H layer in the I U + V) structure code is composed of one decoding result of the 2i code of the (H-1) layer and one decoding result of the (2i-1) code of the (H-1) layer, and one decoding result of the ith code of the 1 st layer in the H layer (U I U + V) structure code is composed of one decoding result of the 2i code of the M mother codes and one decoding result of the (2i-1) code;
and selecting a decoding result with higher reliability from the decoding results of the H-th layer as the final decoding estimation of the code of the H-th layer.
20. The apparatus according to any one of claims 16 to 19,
the M mother codes are BCH codes or Reed-Solomon codes RS codes with the same code length.
21. An apparatus for performing the encoding method of any one of claims 1-5 or the decoding method of any one of claims 6-10.
22. An apparatus, characterized in that the apparatus comprises a processor and a memory, the memory being coupled to the processor, the processor being configured to perform the encoding method of any of claims 1-5 or the decoding method of any of claims 6-10.
23. A computer readable storage medium, wherein the computer readable storage medium stores computer instructions which, when run on a computer, cause the computer to perform the encoding method of any one of claims 1-5 or the decoding method of any one of claims 6-10.
24. A computer program product, wherein the computer program product comprises computer instructions which, when run on a computer, cause the computer to perform the encoding method of any one of claims 1-5 or the decoding method of any one of claims 6-10.
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