CN114498804A

CN114498804A - Electronic equipment and control circuit for starting up or waking up system

Info

Publication number: CN114498804A
Application number: CN202110846783.5A
Authority: CN
Inventors: 王峰; 祁泽睿
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2021-07-26
Filing date: 2021-07-26
Publication date: 2022-05-13
Anticipated expiration: 2041-07-26
Also published as: CN114498804B

Abstract

The embodiment of the application provides electronic equipment and a control circuit for starting or awakening a system, and relates to the technical field of terminals. The electronic device includes: the USB interface, the control circuit and the power management unit; the control circuit includes a switching device; the power management unit is used for triggering the electronic equipment to start or wake up a system process when the first pin receives the first level; the control circuit is used for outputting a first level to a first pin of the power management unit when the USB interface is connected with a power supply, and outputting a second level to the first pin after the first level is output; or when the USB is not connected with the power supply, the control circuit is kept at a second level at the connection position of the first pin; the first level is inverted from the second level. In the embodiment of the application, the control circuit can realize the starting or awakening of the system logic of the electronic device when the electronic device is inserted into the charger, so that the electronic device in the embodiment of the application can be suitable for a universal third-party charging chip.

Description

Electronic equipment and control circuit for starting up or waking up system

Technical Field

The embodiment of the application relates to the technical field of terminals, in particular to electronic equipment and a control circuit for starting or waking up a system.

Background

With the development of terminal technology, electronic devices are increasingly used. In one scenario, the electronic device performs wireless or wired charging when in the power-off state, and the electronic device may execute a power-on procedure when the electronic device is connected to the power supply. In another scenario, the electronic device performs wireless or wired charging in the power-on state, and when the electronic device is powered on, the electronic device may execute a wake-up system procedure, where the wake-up system procedure includes: and waking up the electronic equipment to display the charging interface.

Taking an electronic device as an example of a mobile phone, a power-on process or a system wake-up process during charging can be realized in the mobile phone based on a main chip and a main chip set. The main chip set can be understood as a set chip coupled with the main chip, and the main chip set for implementing a system to be powered on or awakened during charging may include a charging chip, where the charging chip identifies the insertion of the charger based on a specific protocol, and controls the mobile phone to be powered on or awaken the system after identifying the insertion of the charger, for example, the specific protocol includes a System Power Management Interface (SPMI).

However, the main chip set is used as a part of the main chip, the control process realized based on the main chip set completely depends on protocol communication between the chips, once the supply of the main chip set is interrupted, the third-party charging chip cannot be coupled with the main chip to communicate to realize the starting or waking system of the mobile phone, so that the mobile phone cannot realize the starting or waking system flow based on the third-party charging chip, and the development of electronic equipment such as the mobile phone is restricted.

Disclosure of Invention

The embodiment of the application provides electronic equipment and a control circuit for starting or awakening a system so as to support the processes of starting the electronic equipment and the like through a third-party chip.

In a first aspect, an embodiment of the present application provides an electronic device for booting or waking up a system, including: the USB interface, control circuit and power management unit of the universal serial bus; the control circuit includes a switching device; the control circuit is arranged on the first pin of the power management unit and the power line V of the USB interface_BUSBetween the pins; the power management unit is used for triggering the electronic equipment to start or wake up a system process when the first pin receives the first level; a control circuit for outputting a first level to the first pin of the power management unit when the USB interface is connected with power supply, and outputting the first level to the first pin of the power management unit when the USB interface is connected with power supplyOutputting a second level to the first pin after the first level is output; or when the USB is not connected with the power supply, the control circuit is kept at a second level at the connection position of the first pin; the first level is inverted from the second level.

In the embodiment of the application, the control circuit is arranged in the electronic equipment, the control circuit can realize the starting or awakening system logic of the electronic equipment when the electronic equipment is inserted into the charger, and the control circuit comprises the switching device instead of a special main chip set, so that the electronic equipment can be suitable for a universal third-party charging chip.

In a possible design, the electronic device further comprises a charging chip; a voltage stabilizing pin of the charging chip is connected with the first pin; v of charging chip and USB interface_BUSPin connection for receiving a signal from V_BUSA charging input of the pin; wherein, at V_BUSWhen the pin is at a high level, the voltage-stabilizing pin outputs a high level; at V_BUSWhen the pin is at low level, the voltage-stabilizing pin outputs low level.

Because the control circuit is connected between the voltage stabilizing pin of the charging chip and the power management unit, the voltage of the voltage stabilizing pin of the charging chip is stable, and the interference or impact of the control circuit on the power management unit caused by unstable voltage can be effectively improved.

In a possible design, the first level is a low level, the electronic device further comprises a first switch, one end of the first switch is connected with the first pin, and the other end of the first switch is grounded; and the first switch is used for pulling the first pin down to low level when the first pin is conducted. In this embodiment, the first pin may correspond to the power-ON control pin PWR _ ON _ N of the specific embodiment. Therefore, the triggering of the starting or awakening system of the electronic equipment can be realized based on the first switch.

In a possible design, the control circuit comprises: a first resistor, a second switch and a third switch; one end of the first resistor is connected with the voltage stabilizing pin, and the other end of the first resistor is connected with the control end of the second switch and one end of the third switch; one end of the second switch is connected with the first pin, and the other end of the second switch is grounded; the control end of the third switch is used for receiving the first control signal, and the other end of the third switch is grounded; the second switch and the third switch are disconnected by default; and at the moment when the USB interface is connected with the power supply, the second switch is conducted, and after the second switch is conducted, the electronic equipment controls the third switch to be conducted through the first control signal, so that the second switch is turned off. Therefore, the first resistor can divide the voltage output by the voltage-stabilizing pin, so that the impact of the voltage output by the voltage-stabilizing pin on the second switch is reduced, and the electronic equipment can execute a starting or awakening system process after the USB of the electronic equipment is plugged into a power supply based on the second switch and the third switch, and the electronic equipment is not triggered to execute the starting or awakening system process after the starting or awakening system process is executed.

In possible design, the first control signal is sent by a processing unit of the electronic device, and a control end of the third switch is connected with a general purpose input/output (GPIO) interface of the processing unit of the electronic device; or the first control signal is sent by a dormant power-down power supply in the electronic equipment, and the control end of the third switch is connected with the dormant power-down power supply; the power supply is powered off when the electronic equipment is in a dormant state or a shutdown state, and is powered on when the USB interface is connected to the power supply. Therefore, through simple hardware design, the self-adaptive control of the first control signal can be realized, and the complexity of the control circuit is reduced.

In possible design, the second switch and the third switch are both N-type field effect transistors (NMOS); or, the second switch and the third switch are both P-type field effect transistors (PMOS), a first inverter is arranged between the first resistor and the second switch, and a second inverter is arranged between the first control signal and the third switch.

In a possible design, the control circuit comprises: a first resistor, a fourth switch and a fifth switch; one end of the first resistor is connected with the voltage stabilizing pin, and the other end of the first resistor is connected with one end of the fifth switch; one end of the fourth switch is connected with the first pin, the other end of the fourth switch is grounded, and the control end of the fourth switch is connected with the other end of the fifth switch; the control end of the fifth switch is used for receiving a second control signal; the fourth switch and the fifth switch are disconnected by default; and at the moment when the USB interface is connected with the power supply, the fourth switch and the fifth switch are connected, and after the fourth switch is connected, the electronic equipment controls the fifth switch to be disconnected through the second control signal, so that the fourth switch is disconnected. Therefore, the first resistor can divide the voltage output by the voltage-stabilizing pin, the impact of the voltage output by the voltage-stabilizing pin on the fourth switch is reduced, and the electronic equipment executes the starting or waking system process after the USB of the electronic equipment is plugged into the power supply based on the fourth switch and the fifth switch, and is not triggered to execute the starting or waking system process after the starting or waking system process is executed.

In possible designs, the second control signal is sent by a processing unit of the electronic device, and a control end of the fifth switch is connected with a general purpose input/output (GPIO) interface of the processing unit of the electronic device; or the second control signal is sent by a dormancy power-off power supply in the electronic equipment, and the control end of the fifth switch is connected with the dormancy power-off power supply of the electronic equipment; the power supply is powered off when the electronic equipment is in a dormant or shutdown state, and is powered on when the USB interface is connected with the power supply.

In possible designs, the fourth switch and the fifth switch are both N-type field effect transistors (NMOS); or the fourth switch and the fifth switch are both P-type field effect transistors (PMOS), and a third phase inverter is arranged between the control end of the fourth switch and the other end of the fifth switch.

In a possible design, the control circuit further includes a second resistor, one end of the second resistor is connected to the other end of the first resistor, and the other end of the second resistor is grounded.

In a possible design, the control circuit is provided on a substrate of the electronic device.

In a possible design, the electronic device further includes a display screen, where the display screen is used to display a startup interface when the electronic system is started, and the startup interface includes the charging identifier, or the display screen is used to display a charging interface when the electronic device wakes up the system. The power-on interface or the charging interface may be set according to the electronic device, and the embodiment of the present application is not limited. The charging identifier may be used to indicate that the electronic device is connected to the charger, and the embodiment of the present application is not limited to this specific content.

In a second aspect, an embodiment of the present application provides a control circuit for powering on or waking up a system, where the control circuit includes a switching device; the control circuit is arranged between a first pin of a power management unit of the electronic equipment and a power line V of a USB interface of the electronic equipment_BUSBetween the pins; the control circuit is used for outputting a first level to a first pin of the power management unit when the USB interface is connected with a power supply, and outputting a second level to the first pin after the first level is output; or when the USB is not connected with the power supply, the control circuit is kept at a second level at the connection position of the first pin; the first level is inverted from the second level.

In a possible design, the control circuit comprises: a first resistor, a second switch and a third switch;

one end of the first resistor is connected with the voltage-stabilizing pin, and the other end of the first resistor is connected with the control end of the second switch and one end of the third switch; one end of the second switch is connected with the first pin, and the other end of the second switch is grounded; the control end of the third switch is used for receiving the first control signal, and the other end of the third switch is grounded; the second switch and the third switch are disconnected by default; and at the moment when the USB interface is connected with the power supply, the second switch is conducted, and after the second switch is conducted, the electronic equipment controls the third switch to be conducted through the first control signal, so that the second switch is turned off.

In possible design, the first control signal is sent by a processing unit of the electronic device, and a control end of the third switch is connected with a general purpose input/output (GPIO) interface of the processing unit of the electronic device; or the first control signal is sent by a dormancy power-off power supply in the electronic equipment, and the control end of the third switch is connected with the dormancy power-off power supply of the electronic equipment; the dormant power-off power supply is a power supply which is powered off when the electronic equipment is in a dormant or shutdown state and is powered on at the moment when the USB interface is connected with the power supply.

In possible design, the second switch and the third switch are both N-type field effect transistors (NMOS); or the second switch and the third switch are both P-type field effect transistors (PMOS), a first inverter is arranged between the first resistor and the second switch, and a second inverter is arranged between the first control signal and the third switch.

In a possible design, the control circuit comprises: a first resistor, a fourth switch and a fifth switch; one end of the first resistor is connected with the voltage stabilizing pin, and the other end of the first resistor is connected with one end of the fifth switch; one end of the fourth switch is connected with the first pin, the other end of the fourth switch is grounded, and the control end of the fourth switch is connected with the other end of the fifth switch; the control end of the fifth switch is used for receiving a second control signal; the fourth switch and the fifth switch are disconnected by default; and at the moment when the USB interface is connected with the power supply, the fourth switch and the fifth switch are connected, and after the fourth switch is connected, the electronic equipment controls the fifth switch to be disconnected through the second control signal, so that the fourth switch is disconnected.

In a possible design, the control circuit further comprises a second resistor, one end of the second resistor is connected with the other end of the first resistor, and the other end of the second resistor is grounded.

In the second aspect and the possible design of the second aspect, the effect is similar to that in the first aspect and the possible design of the second aspect, and is not described again here.

Drawings

Fig. 1 is a schematic view of a charging scenario provided in an embodiment of the present application;

fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

fig. 3 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

FIG. 8 is a schematic diagram of a control circuit according to an embodiment of the present disclosure;

fig. 9 is a schematic structural diagram of a PMU according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The term "plurality" herein means two or more. The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter associated objects are in an "or" relationship; in the formula, the character "/" indicates that the preceding and following related objects are in a relationship of "division".

It is to be understood that the various numerical references referred to in the embodiments of the present application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of the present application.

It should be understood that, in the embodiment of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiment of the present application.

When the electric quantity of the electronic equipment is insufficient, the electronic equipment can charge the battery based on wireless charging or wired charging.

Fig. 1 is a schematic diagram of wired charging of an electronic device according to an embodiment of the present disclosure, and as shown in fig. 1, when the electronic device needs to be charged, one end of a charger may be connected to a power supply, and the other end of the charger may be connected to the electronic device.

If the electronic device is in the power-off state, the electronic device can automatically execute a power-on process and display a power-on interface after being connected with a power supply, and can also execute a wake-up system process and display a charging interface after being powered on. If the electronic equipment is in the starting state, the electronic equipment can wake up the system and display a charging interface after being connected with the power supply. The charging interface can include a charging mode and/or a charging identifier such as the amount of power of the electronic device. In a possible implementation, the power-on interface may also include a charging identifier.

It can be understood that the electronic device may also be charged wirelessly, the electronic device is disposed on the wireless charging device, and the electronic device in the power-off state may implement a power-on process, or the electronic device in the power-on state may implement a system wake-up process.

In possible designs, a main chip and a charging chip matched with the main chip are required to communicate based on a specific protocol, and the system starting or awakening process when the electronic equipment is connected with a power supply is realized.

However, in the design, the charging chip is equivalent to a part of the main chip, the charging chip and the main chip have a strong coupling relationship, the charging chip must use a basic special chip, and a third-party charging chip produced by a third party may not comply with a specific protocol, if the third-party charging chip is applied to the electronic device, the electronic device cannot be started or a system flow is awakened when the charging chip is inserted into the electronic device, so that the use habit of a user is not met, the third-party charging chip is not used by a manufacturer of the electronic device, the development of the third-party charging chip is restricted, and the development of the electronic device is also restricted.

Therefore, in the embodiment of the application, the control circuit is arranged in the electronic device, and the control circuit can realize the starting or waking system logic of the electronic device when the electronic device is inserted into the charger, so that the electronic device in the embodiment of the application can be suitable for a universal third-party charging chip.

For example, fig. 2 provides a schematic structural diagram of an electronic device according to an embodiment of the present application.

As shown in fig. 2, the electronic device 200 may include: system On Chip (SOC) 201, main power management unit (master PMU) Integrated Circuit (IC) 202, charging chip 203, Universal Serial Bus (USB) interface (connector)204, control circuit 205, power on key (power on key)206, battery (battery)207, slave PMU IC (slave PMU IC)208, front camera (front camera)209, rear camera (front camera)210, rear camera (front camera)211, rear camera (rear camera)212, modem (ufmodem) 213, radio frequency (radio frequency) front, RF) IC214, antenna (antenna)215, low power consumption memory (low power management unit) 216, flash memory module (flash memory) 216, flash memory module (dr) 217, Liquid Crystal Display (LCD) 218, display panel (LCD) and display panel, A fingerprint module (fingerprint module)219, an audio codec (audio codec)220, a sensor (sensor)221, a motor (motor)222, a speaker (speaker)223, a Microphone (MIC)224, and a receiver (receiver) 225.

It is to be understood that the illustrated structure of the embodiment of the present application does not specifically limit the electronic device 200. In other embodiments of the present application, the electronic device 200 may include more or fewer components than illustrated, or combine certain components, or split certain components, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Where SOC201 may be a processor, SOC201 may include one or more processing units, such as: SOC201 may include an Application Processor (AP), a modem 213, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), among others. The different processing units may be separate devices or may be integrated into one or more processors.

A controller may be disposed in the SOC201, and the controller may generate an operation control signal according to the instruction operation code and the timing signal, so as to complete the control of instruction fetching and instruction execution.

A memory may also be provided in SOC201 for storing instructions and data. In some embodiments, the memory in SOC201 is a cache memory. The memory may hold instructions or data that have just been used or recycled by SOC 201. If SOC201 needs to reuse the instruction or data, it may be called directly from the memory. Avoiding repeated accesses reduces the latency of the SOC201, thereby increasing the efficiency of the system.

In some embodiments, SOC201 may include one or more interfaces. The interface may include an integrated circuit (I2C) interface, an integrated circuit built-in audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, and/or a Subscriber Identity Module (SIM) interface, and the like.

The I2C interface is a bi-directional synchronous serial bus that includes a serial data line SDA and a Serial Clock Line (SCL). In some embodiments, SOC201 may contain multiple sets of I2C buses. The SOC201 may be coupled to a touch sensor, a charger, a flash, a camera, etc., via different I2C bus interfaces, respectively. For example: the SOC201 may couple the touch sensor through an I2C interface, so that the SOC201 and the touch sensor communicate through an I2C bus interface, thereby implementing the touch function of the electronic device 200.

The I2S interface may be used for audio communication. In some embodiments, SOC201 may contain multiple sets of I2S buses. The SOC201 may be coupled to the audio processing module 220 via an I2S bus, enabling communication between the SOC201 and the audio processing module 220. In some embodiments, the audio processing module 220 can transmit audio signals to the wireless communication module through the I2S interface, so as to realize the function of answering a call through a bluetooth headset.

The PCM interface may also be used for audio communication, sampling, quantizing and encoding analog signals. In some embodiments, the audio processing module 220 and the wireless communication module may be coupled by a PCM bus interface. In some embodiments, the audio processing module 220 may also transmit the audio signal to the wireless communication module through the PCM interface, so as to implement the function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.

The UART interface is a universal serial data bus used for asynchronous communications. The bus may be a bidirectional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the SOC201 with a wireless communication module. For example: the SOC201 communicates with a bluetooth module in the wireless communication module through a UART interface to implement a bluetooth function. In some embodiments, the audio processing module 220 may transmit the audio signal to the wireless communication module through the UART interface, so as to realize the function of playing music through the bluetooth headset.

The MIPI interface may be used to connect the SOC201 with peripheral devices such as a display screen and a camera. The MIPI interface includes a Camera Serial Interface (CSI), a Display Serial Interface (DSI), and the like. In some embodiments, SOC201 and the camera communicate through a CSI interface, implementing the shooting function of electronic device 200. The SOC201 and the display screen communicate via a DSI interface, and the display function of the electronic device 200 is realized.

The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal and may also be configured as a data signal. In some embodiments, the GPIO interface may be used to connect the SOC201, the camera, the display screen, the wireless communication module, the audio processing module 220, the sensor, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, a MIPI interface, and the like.

It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present application is only an illustration, and does not limit the structure of the electronic device 200. In other embodiments of the present application, the electronic device 200 may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.

The master PMU202 and the slave PMU208 may both be referred to as power management modules, and the PMUs referred to in this embodiment of the present application may be the master PMU202 or the slave PMU208, which is not specifically limited in this embodiment of the present application. For convenience of description, the PMU is taken as the main PMU202 in the embodiment of the present application for illustration.

Main PMU202 may connect power-on key 206, charging chip 203, and SOC 201. The main PMU202 is configured to receive input from the battery 207 and/or the charging chip 203, and to supply power to the SOC201, the internal memory, the display, the camera, and the wireless communication module. Main PMU202 may also be used to monitor battery capacity, battery cycling times, battery state of health (leakage, impedance), etc. The main PMU202 may also be configured to trigger the electronic device 200 to execute a power-on procedure or a system wake-up procedure when the charging or power-on key 206 is pressed, where a specific triggering process will be described in subsequent embodiments and will not be described herein again. In some embodiments, main PMU202 may also be located in SOC 201. In other embodiments, main PMU202 and charging chip 203 may be located in the same device.

The charging chip 203 may also be referred to as a charging management module, a Charger chip, or the like, and the Charger chip includes, for example, a Charger IC. The charging chip 203 is used for receiving charging input from a charger (or adapter). The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging chip 203 may receive a charging input of a wired charger through the USB interface 204. In some wireless charging embodiments, the charging chip 203 may receive a wireless charging input through a wireless charging coil of the electronic device. The charging chip 203 can also supply power to the electronic device through the main PMU202 while charging the battery 207.

The USB interface 204 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface may be used to connect a charger to charge the electronic device 200, and may also be used to transmit data between the electronic device 200 and a peripheral device. And the earphone can also be used for connecting an earphone and playing audio through the earphone. The interface may also be used to connect other electronic devices. The USB interface can comprise a power line V_BUSPin, V when power is plugged into USB interface_BUSPin high level, passing V_BUSThe pins may provide power to the electronic device. When the USB interface is not plugged in the power supply, V_BUSThe pin is low.

In the embodiment of the present application, the control circuit 205 is disposed between the charging chip 203 and the SOC201, and the control circuit 205 may implement the following logic: when the USB interface 204 is connected to the power supply, the control circuit 205 outputs a first level to a pin of the PMU for powering on or waking up the system, where the first level may cause the electronic device to perform a system powering on or waking up process, and then the electronic device 200 may implement the system powering on or waking up process by triggering the charging chip 203, or may implement the system powering on or waking up process by triggering the power-on key 206. When the electronic device 200 is in the power-off or sleep state, a connection point of the control circuit 205 and a pin of the PMU for powering on or waking up the system is at a second level, which does not cause the electronic device to perform a power-on or wake-up system procedure, and if the electronic device 200 needs to perform the power-on or wake-up system procedure, the power-on key 206 of the electronic device 200 may be triggered. The first level is inverted from the second level, and the exemplary first level may be a high level and the second level may be a low level. Of course, in a possible implementation, the first level may be a low level and the second level may be a high level. For convenience of description, the following embodiments will exemplarily describe that the first level is a high level and the second level is a low level, and the description does not necessarily limit the first level and the second level.

Thus, based on the control circuit 205, the embodiment of the application can implement a system starting or waking up process by triggering the electronic device 200 through the charging chip 203 or the power-on key 206, and the charging chip 203 is decoupled from the SOC201, and the charging chip 203 may not comply with the SPMI protocol, thereby increasing the selectable range of the charging chip 203 in the electronic device 200.

The power-on key 206 may be a mechanical key or a touch key. The electronic device 200 may receive a power-on key input to implement a power-on or wake-up system process.

The electronic device 200 may implement a photographing function through an Image Signal Processor (ISP), a camera, a video codec, a Graphics Processing Unit (GPU), a display screen, an application processor, and the like. The cameras may include a front facing camera 209, and three rear facing cameras 210 and 212. It will be appreciated that the number of cameras, and the particular form of the cameras, may be adjusted according to the application.

The ISP is used for processing data fed back by the camera. For example, when a photo is taken, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converting into an image visible to naked eyes. The ISP can also carry out algorithm optimization on the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in a camera.

The camera is used to capture still images or video. The object generates an optical image through the lens and projects the optical image to the photosensitive element. The photosensitive element may be a Charge Coupled Device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The light sensing element converts the optical signal into an electrical signal, which is then passed to the ISP where it is converted into a digital image signal. And the ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into image signal in standard RGB, YUV and other formats. In some embodiments, the electronic device 200 may include 1 or N cameras, N being a positive integer greater than 1.

The digital signal processor is used for processing digital signals, and can process digital image signals and other digital signals. For example, when the electronic device 200 selects a frequency bin, the digital signal processor is used to perform fourier transform or the like on the frequency bin energy.

Video codecs are used to compress or decompress digital video. The electronic device 200 may support one or more video codecs. In this way, the electronic device 200 may play or record video in a variety of encoding formats, such as: moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, and the like.

The neural Network Processor (NPU) is a neural-network (NN) computing processor that processes input information quickly by referencing a biological neural network structure, for example, by referencing a transfer mode between neurons in a human brain, and may also learn by itself continuously. The NPU can implement applications such as intelligent recognition of the electronic device 200, for example: image recognition, face recognition, speech recognition, text understanding, and the like.

The wireless communication function of the electronic device 200 may be implemented by the modem 213, the rf chip 214, the antenna 215, a mobile communication module, a wireless communication module, a baseband processor, and the like.

The antenna 215 may be implemented to transmit and receive electromagnetic wave signals based on the rf chip 214. Each antenna in the electronic device 200 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 215 may be multiplexed as a diversity antenna for a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module may provide a solution including wireless communication of 2G/3G/4G/5G, etc. applied to the electronic device 200. The mobile communication module may include at least one filter, a switch, a power amplifier, a Low Noise Amplifier (LNA), and the like. The mobile communication module can receive electromagnetic waves from the antenna 1, filter and amplify the received electromagnetic waves, and transmit the electromagnetic waves to the modem 213 for demodulation. The mobile communication module can also amplify the signal modulated by the modem 213 and convert the signal into electromagnetic wave to radiate the electromagnetic wave through the antenna 1. In some embodiments, at least part of the functional modules of the mobile communication module may be provided in the processor. In some embodiments, at least part of the functional modules of the mobile communication module may be provided in the same device as at least part of the modules of the processor.

Modem 213 may include a modulator and a demodulator. The modulator is used for modulating a low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then passes the demodulated low frequency baseband signal to a baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 223, the receiver 225, etc.) or displays an image or video through a display screen. In some embodiments, modem 213 may be a stand-alone device. In other embodiments, the modem 213 may be separate from the processor, and may be provided in the same device as the mobile communication module or other functional module.

The wireless communication module may provide a solution for wireless communication applied to the electronic device 200, including Wireless Local Area Networks (WLANs) (e.g., wireless fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), Infrared (IR), and the like. The wireless communication module may be one or more devices integrating at least one communication processing module. The wireless communication module receives electromagnetic waves through the antenna, frequency-modulates and filters electromagnetic wave signals, and sends the processed signals to the processor. The wireless communication module can also receive a signal to be sent from the processor, frequency-modulate and amplify the signal, and convert the signal into electromagnetic waves through the antenna to radiate the electromagnetic waves.

The external memory interface may be used to connect an external memory card, such as a Micro SD card, to extend the memory capability of the electronic device 200. The external memory card communicates with the SOC201 through an external memory interface to implement a data storage function. For example, files such as music, video, etc. are saved in an external memory card.

The internal memory may be used to store computer-executable program code, which includes instructions. The internal memory may include a program storage area and a data storage area. The storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required by at least one function, and the like. The storage data area may store data (e.g., audio data, a phone book, etc.) created during use of the electronic device 200, and the like. In addition, the internal memory may include a high speed random access memory, and may further include a non-volatile memory, such as at least one disk storage device, a flash memory device, LPDDR216, UFS217, and the like. The SOC201 executes various functional applications of the electronic device 200 and data processing by executing instructions stored in an internal memory and/or instructions stored in a memory provided in the processor.

The display screen is used for displaying images, videos and the like. The display screen includes a display panel. The display panel may employ an LCD module 218, an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (active-matrix organic light-emitting diode, AMOLED), a flexible light-emitting diode (flex-emitting diode, FLED), a miniature, a Micro-led, a quantum dot light-emitting diode (QLED), and the like. In some embodiments, the electronic device 200 may include 1 or N display screens, N being a positive integer greater than 1. The LCD module 218 may be a touch screen, and may also receive a touch operation of a user based on the LCD module.

The fingerprint module 219 is used for collecting fingerprints. The electronic device 200 can utilize the collected fingerprint characteristics to unlock the fingerprint, access the application lock, photograph the fingerprint, answer an incoming call with the fingerprint, and the like.

The electronic device 200 may implement audio functions through the audio processing module 220, the speaker 223, the receiver 225, the microphone 224, the headphone interface, and the application processor. Such as music playing, recording, etc.

The audio processing module 220 is used for converting digital audio information into an analog audio signal output and also for converting an analog audio input into a digital audio signal. The audio processing module 220 may also be used to encode and decode audio signals. In some embodiments, the audio processing module 220 may be disposed in the SOC201, or some functional modules of the audio processing module 220 may be disposed in the SOC 201.

The speaker 223, also called a "horn", is used to convert audio electrical signals into sound signals. The electronic apparatus 200 can listen to music through the speaker 170A or listen to a handsfree call.

A receiver 225, also called "earpiece", is used to convert the electrical audio signal into an acoustic signal. When the electronic apparatus 200 receives a call or voice information, it is possible to receive a voice by placing the receiver 170B close to the human ear.

The microphone 224, also referred to as a "microphone," is used to convert sound signals into electrical signals. When making a call or sending voice information, the user can input a voice signal into the microphone 224 by speaking near the microphone 224 through the mouth. The electronic device 200 may be provided with at least one microphone 224. In other embodiments, the electronic device 200 may be provided with two microphones 224, which may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device 200 may further include three, four or more microphones 224 for collecting sound signals, reducing noise, identifying sound sources, implementing directional recording functions, and the like.

The motor 222 may generate a vibration indication. The motor 222 may be used for both an electrical vibration alert and a touch vibration feedback. For example, touch operations applied to different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 222 may also respond to different vibration feedback effects for touch operations applied to different areas of the display screen. Different application scenes (such as time reminding, receiving information, alarm clock, game and the like) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.

The electronic device 200 may also include various sensors 221 (not shown in the figures) and the like. The embodiment of the present application does not limit the specific structure of the electronic device 200.

In summary, in the embodiment of the present application, the control circuit 205 is disposed between the charging chip 203 and the SOC201, based on the control circuit 205, the electronic device 200 may trigger the electronic device 200 to implement a system booting or waking up process through the charging chip 203 or the power-on key 206, and the charging chip 203 is decoupled from the SOC201, so that the charging chip 203 may not comply with the SPMI protocol, which improves the selectable range of the charging chip 203 in the electronic device 200.

It should be noted that the embodiments of the present application are "in. . . When "or" is in. . . The time "may refer to the instant of a certain time point, or may refer to a period of time before or after a certain time point.

The control circuit is described in detail below with reference to fig. 3. For example, fig. 3 shows a control circuit provided in an embodiment of the present application.

As shown in fig. 3, there are two possible implementations of the control circuit 320 for the access circuit.

One possible implementation is: v at USB interface_BUSA control circuit 320 is provided between the pin and the PMU 330.

Wherein, V_BUSThe level of the pin satisfies the following level logic: when the electronic equipment is not connected with the power supply, V_BUSThe pin is low level, and when the electronic equipment is connected with a power supply, V_BUSThe pin is high.

The control circuit 320 satisfies the following control logic: at V_BUSWhen the pin is at a low level, the control circuit 320 is not active or at a high impedance state, and the connection between the control circuit 320 and the boot control pin PWR _ ON _ N of the PMU330 is at a high level. At V_BUSWhen the pin goes high, the control circuit 320 may output a low level to the power-ON control pin PWR _ ON _ N of the PMU330, and then the control circuit 320 outputs a high level to the power-ON control pin PWR _ ON _ N, or it may be understood that a connection between the control circuit and the power-ON control pin PWR _ ON _ N of the PMU330 always maintains a high level at V_BUSWhen the pin goes high, the control circuit 320 may control the power-on of the PMU330The pin PWR _ ON _ N outputs a low level pulse.

The power-ON control pin PWR _ ON _ N of the PMU330 satisfies the following level logic: when PWR _ ON _ N is at a high level, the PMU330 may not trigger the electronic device to perform a system booting or waking procedure, and when PWR _ ON _ N is at a low level, the PMU330 triggers the electronic device to perform the system booting or waking procedure.

Thus, when the electronic device is in a power-off or hibernation state, V_BUSThe pin is low level, the control circuit 320 is not effective or is in high resistance state, the connection between the control circuit 320 and the startup control pin PWR _ ON _ N of the PMU330 is high level, the PMU330 cannot trigger the electronic device to start or wake up the system flow, and when the electronic device is connected to the power supply through the USB interface, the V is connected to the power supply through the USB interface_BUSThe pin goes high and the PMU330 may trigger the electronic device to start up or wake up the system process.

It should be noted that, as shown in fig. 3, when the connection between the control circuit 320 and the power-ON control pin PWR _ ON _ N of the PMU330 is at a high level, the electronic device may further implement a power-ON or wake-up system procedure based ON the triggering of the power-ON key (i.e., the first switch SW 1).

Specifically, when the power-ON key is pressed, the power-ON control pin PWR _ ON _ N of the PMU330 is grounded to a low level, and the electronic device may perform a power-ON or wake-up process. Therefore, the electronic equipment can realize the starting or awakening of the system in two modes of inserting a power supply or triggering a starting key.

A second possible implementation: a control circuit 320 is provided between charging chip 310 and PMU 330.

Wherein, the voltage-stabilizing pin (e.g. REGN pin) and V of the charging chip 310_BUSThe voltage-stabilizing pin of the charging chip 310 is at high level, V, when the voltage-stabilizing pin of VBUS pin is at high level_BUSWhen the pin is at a low level, the voltage-stabilizing pin of the charging chip 310 is also at a low level.

The logic of the control circuit 320 accessing the charging chip 310 is similar to the above possible implementation, and is not described herein again.

It should be noted that, in the second possible implementation, because the control circuit 320 is connected between the voltage stabilizing pin of the charging chip 310 and the PMU330, the voltage of the voltage stabilizing pin of the charging chip 310 is stable, and interference or impact of voltage instability of the control circuit 320 on the PMU330 can be effectively improved.

It is understood that the control circuit 320 in the embodiment of the present application may satisfy one of the above possible implementation manners of the control logic, and the specific configuration manner of the control circuit 320 may be adapted and adjusted according to actual situations, and the embodiment of the present application is not limited in particular.

For a more clear description of the embodiments of the present application, several possible implementations of the control circuit 320 are described in detail below with reference to fig. 3-8.

As shown in fig. 3, the control circuit 320 may include a first resistor R1, a second resistor R2, a second switch SW2, and a third switch SW 3. SW2 has a control terminal, a first terminal and a second terminal; SW3 has a control terminal, a first terminal and a second terminal.

One end of R1 is connected with V_BUSThe other end of the pin or the voltage-stabilizing pin of the charging chip 310 is connected to the control end of SW2, the first end of SW3 and one end of R2, the other end of R2 is grounded, the first end of SW2 is connected to the power-on control pin of the PMU330, the second end of SW2 is grounded, the second end of SW3 is grounded, and the control end of SW3 is connected to the control signal CTRL.

For example, taking the voltage-stabilizing pin REGN of the charging chip 310 connected to one end of R1 as an example, the operation principle of the control circuit 320 is as follows:

r1 and R2 are voltage dividing resistors, and are configured to divide the voltage of REGN and output the divided voltage to SW2, so as to avoid the higher voltage of REGN from causing impact on SW2, and the values of R1 and R2 may be selected in combination with an actual application scenario, which is not specifically limited in the embodiment of the present application. The SW3 and the SW2 are disconnected by default, when the USB of the electronic device is plugged into a power supply, the SW2 of the control circuit 320 is closed, the PWR _ ON _ N pin of the PMU330 is grounded to generate a low level, the electronic device executes a power-ON or wake-up system process, further, the electronic device may control the CTRL signal, so that the SW3 is closed after the electronic device is powered ON or wake-up the system, the control terminal of the SW2 is grounded, the SW2 is disconnected, and the control circuit 320 no longer triggers the electronic device to execute the power-ON or wake-up system process.

In a possible implementation manner, R2 may be omitted, and in the control circuit of fig. 3, a portion connected with R2 may be omitted (not shown), and an implementation principle of the simplified control circuit (not shown) is similar to the operation principle of fig. 3, and is not described herein again.

In another possible implementation manner, R1 and R2 may be omitted, and the control circuit of fig. 3 may be simplified as follows: the VBUS pin or the voltage-stabilizing pin of the charging chip 310 is connected to the control terminal of the SW2 and the first terminal of the SW3, other connection modes are not changed, and the implementation principle of the simplified control circuit (not shown in the figure) is similar to the operation principle of fig. 3, and is not described herein again.

Wherein, both SW2 and SW3 in fig. 3 are used to implement the switching function. Specific devices of SW2 and SW3 include, but are not limited to, the following: a single Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a plurality of MOSFETs that collectively implement a switching function, an integrated circuit that builds a circuit that implements a switching function, and so on. For convenience of description, the following embodiments exemplify SW2 and SW3 as single MOSFETs.

The MOSFET may be an N-type field effect transistor (NMOS) or a P-type field effect transistor (NMOS), and the specific implementation of the control circuit when the SW2 and the SW3 are NMOS may be different from the specific implementation of the control circuit when the SW2 and the SW3 are PMOS.

For example, fig. 4 shows a specific implementation of the control circuit when SW2 and SW3 are NMOS, and fig. 5 shows a specific implementation of the control circuit when SW2 and SW3 are PMOS.

As shown in FIG. 4, SW2 is an NMOS implemented Q1 and SW3 is an NMOS implemented Q2. The cost of the NMOS is lower and therefore the switch circuit of fig. 4 has a lower cost.

The CTRL signal defaults to a low level, and REGN is low in the power-off or sleep state of the electronic device.

R1 and R2 are voltage dividing resistors for dividing the level of REGN and outputting the divided level to Q1. In a shutdown or sleep standby state of the electronic device, the CTRL signal is at a low level, the REGN pin of the charging chip 310 is also at a low level, Q1 and Q2 are both not conductive, the PWR _ ON _ N pin of the PMU330 is pulled high by a resistor inside the chip, and the PMU330 may trigger a startup or wake-up system through POWER _ KEY control.

When the USB interface of the electronic equipment is plugged into the power supply, V_BUSThe pin is at high level, the REGN pin generates a high level signal, after voltage division is performed through R1 and R2, the Q1 is controlled to be turned ON, and after the Q1 is turned ON, the level of the PWR _ ON _ N pin is pulled down, so that the PMU330 is triggered to turn ON or wake up the system.

When the system is started or awakened successfully, the CTRL signal is controlled to become a high level signal, and the Q2 is controlled to be turned ON, so that the gate of the Q1 becomes a low level, the Q1 is turned off, and the PWR _ ON _ N returns to a high level. At this time, POWER _ KEY may normally trigger a low level signal to the PMU330, so as to control the electronic device to POWER off or to sleep or wake up the system.

In a possible implementation manner, the CTRL signal may be controlled by software, for example, the control terminal of the Q2 is connected to a GPIO interface of the electronic device, the GPIO interface sends out a CTRL signal with a low level to the control terminal of the Q2 in a default state, and after the electronic device determines that the system booting or waking up procedure is implemented, the electronic device sends out a CTRL signal with a high level to the control terminal of the Q2 through the GPIO interface. In this way, the electronic device can flexibly control the CTRL signal through software.

In another possible implementation, the CTRL signal may be controlled by hardware, for example, a control terminal of the Q2 is connected to a sleep power-down power supply of the electronic device, the sleep power-down power supply is powered down when the electronic device is in a sleep or power-off state, the CTRL signal is at a low level when the power-down power supply is powered down, the sleep power-down power supply is powered up when the electronic device is plugged into the power supply after the electronic device determines a power-on or system-wake-up procedure, and the CTRL signal is at a high level when the power-up power supply is powered up. Therefore, through simple hardware design, the self-adaptive control of the CTRL signal can be realized, and the waste of computing resources of the electronic equipment is reduced.

It will be appreciated that R2 in fig. 4 may be omitted, which saves on electrical components and reduces the complexity of the control circuitry.

As shown in FIG. 5, SW2 is a PMOS implementation of Q3 and SW3 is a PMOS implementation of Q4.

The control logic of the PMOS and the NMOS is different, and when the control end of the PMOS is in a low level, the PMOS is conducted. Fig. 5 differs from fig. 4 in that an inverter is added before Q3 and Q4 in fig. 5, and the control circuit in fig. 5 can also implement the control logic for PMU330 as described in fig. 4 through the inverting action of the inverters.

In one possible implementation, the CTRL signal defaults to a low level, and REGN is low in the power-off or sleep state of the electronic device.

R1 and R2 are voltage dividing resistors for dividing the level of REGN and outputting the divided level to the inverter F1. In the shutdown or sleep standby state of the electronic device, the CTRL signal is low, and after inversion by the inverter F2, the control terminal of Q4 is high, and Q4 is not turned on. The REGN pin of the charging chip 310 is also low level, after the phase inversion by the inverter F1, the control terminal of the Q3 is high level signal, the Q3 is also not conductive, the PWR _ ON _ N pin of the PMU330 is pulled high by the internal resistor of the chip, and the PMU330 can trigger the startup or wake-up system through POWER _ KEY control.

When the USB interface of the electronic equipment is plugged into the power supply, V_BUSThe pin is high level, the REGN pin generates a high level signal, after voltage division by R1 and R2 and inversion by an inverter F1, the control end of Q3 is low level signal, Q3 is controlled to be turned ON, and after Q3 is turned ON, the level of the PWR _ ON _ N pin is pulled down, which triggers the PMU330 to turn ON or wake up the system.

When the system is started or awakened successfully, the CTRL signal can be controlled to be changed into a high level signal, after the CTRL signal is inverted by the inverter F2, the control terminal of the Q4 is a low level signal, the Q4 is controlled to be turned ON, the gate of the Q3 is changed into a high level, the Q3 is turned off, and the PWR _ ON _ N returns to the high level. At this time, POWER _ KEY may normally trigger a low level signal to the PMU330, so as to control the electronic device to POWER off or to sleep or wake up the system.

In another possible implementation manner, the inverter F2 may be omitted, the CTRL signal may be controlled by a GPIO interface of the electronic device, the CTRL signal defaults to a high level, and after the electronic device determines to implement a power-on or system wake-up procedure, the electronic device sends a CTRL signal of a low level to the control terminal of the Q2 through the GPIO interface.

It will be appreciated that both R1 and R2 of fig. 5 may be omitted, which saves on electrical components and reduces the complexity of the control circuitry.

For example, fig. 6 shows another control circuit provided in the embodiment of the present application.

As shown in fig. 6, the control circuit 320 may include a first resistor R1, a second resistor R2, a fourth switch SW4, and a fifth switch SW 5. SW4 has a control terminal, a first terminal and a second terminal; SW5 has a control terminal, a first terminal and a second terminal.

One end of R1 is connected with V_BUSThe other end of R1 is connected to the first end of SW5 and one end of R2, the other end of R2 is grounded, the second end of SW5 is connected to the control end of SW4, the first end of SW4 is connected to the switch control pin of PMU330, the second end of SW4 is grounded, and the control end of SW5 is connected to the control signal CTRL.

the working principle and the alternative mode of R1 and R2 are described with reference to fig. 3-5, and are not described herein again.

In the embodiment of the present application, SW4 is turned off by default. SW5 is closed by default. When the USB of the electronic device is plugged into a power supply, SW4 of the control circuit 320 is turned ON, the PWR _ ON _ N pin of the PMU330 is grounded, a low level is generated, the electronic device executes a power-ON or system wake-up process, further, the electronic device can control the CTRL signal, so that SW5 is turned off after the electronic device is turned ON or the system wake-up process is performed, the control terminal of SW4 is turned off without a control signal, and the control circuit 320 does not trigger the electronic device to execute the power-ON or system wake-up process.

For example, fig. 7 shows a specific implementation of the control circuit when SW4 and SW5 are NMOS, and fig. 8 shows a specific implementation of the control circuit when SW4 and SW5 are PMOS.

In a shutdown or sleep standby state of the electronic device, the REGN pin of the charging chip 310 is at a low level, the CTRL signal is at a high level, the Q6 is turned ON, the Q5 is not turned ON, the PWR _ ON _ N pin of the PMU330 is pulled high by a resistor inside the chip, and the PMU330 may trigger a startup or wake-up system through POWER _ KEY control.

When the USB interface of the electronic equipment is plugged into the power supply, V_BUSPin high, REGN pin productionAnd generating a high level signal, dividing the voltage by R1 and R2 to control the Q5 to be conducted, and pulling down the level of the PWR _ ON _ N pin after the Q5 is conducted to trigger the PMU330 to turn ON or wake up the system.

When the system is started or awakened successfully, the CTRL signal can be controlled to become a low level signal, and the Q6 is controlled to be turned off, so that the gate of the Q5 has no control signal, the Q1 is turned off, and the PWR _ ON _ N returns to a high level. At this time, POWER _ KEY may normally trigger a low level signal to the PMU330, so as to control the electronic device to POWER off or to sleep or wake up the system.

In a possible implementation manner, the CTRL signal may be controlled by software, for example, the control terminal of the Q6 is connected to a GPIO interface of the electronic device, the GPIO interface sends a CTRL signal with a high level to the control terminal of the Q6 in a default state, and after the electronic device determines to implement a power-on or wake-up system procedure, the electronic device sends a CTRL signal with a low level to the control terminal of the Q2 through the GPIO interface. In this way, the electronic device can flexibly control the CTRL signal through software.

It will be appreciated that R2 in fig. 7 may be omitted, which saves on electrical components and reduces the complexity of the control circuitry.

As shown in FIG. 8, SW3 is Q7 for a PMOS implementation and SW4 is Q8 for a PMOS implementation.

Fig. 8 differs from fig. 7 in that an inverter F3 is added before Q7 in fig. 8, and the control circuit in fig. 8 can also implement the control logic for PMU330 as described in fig. 7 through the inverting action of inverter F3.

R1 and R2 are voltage dividing resistors for dividing the level of REGN and outputting the divided level to the inverter F3. In the shutdown or sleep standby state of the electronic device, the CTRL signal is at a low level, Q8 is turned on, the REGN pin of the charging chip 310 is at a low level, and after inversion by the inverter F3, the control terminal of Q7 is at a high level, and Q7 is not turned on. The PWR _ ON _ N pin of the PMU330 is pulled high by a resistor inside the chip, and the PMU330 may trigger POWER-ON or wake-up of the system through POWER _ KEY control.

When the USB interface of the electronic equipment is plugged into the power supply, V_BUSThe pin is high level, the REGN pin generates a high level signal, after voltage division by R1 and R2 and inversion by an inverter F3, the control end of Q7 is low level signal, Q7 is controlled to be turned ON, and after Q7 is turned ON, the level of the PWR _ ON _ N pin is pulled down, which triggers the PMU330 to turn ON or wake up the system.

When the system is started or awakened successfully, the CTRL signal can be controlled to become a high level signal, and the Q8 is turned off, so that the gate of the Q7 has no control signal, the Q7 is turned off, and the PWR _ ON _ N returns to a high level. At this time, POWER _ KEY may normally trigger a low level signal to the PMU330, so as to control the electronic device to POWER off or to sleep or wake up the system.

It will be appreciated that both R1 and R2 of fig. 8 may be omitted, which saves on electrical components and reduces the complexity of the control circuitry.

It should be noted that in fig. 1 to 8, the same components or similar operation principles may be supplemented with each other, and are not described herein again.

Based on any of the embodiments in fig. 1 to fig. 8, for example, fig. 9 shows a specific structural diagram of a PMU, and in combination with the specific structural diagram of the PMU, the embodiment of the application describes in detail a process of starting up or waking up a system of an electronic device based on PMU.

As shown in fig. 9, the PMU may include a control center (control core), a plurality of BUCK circuits (BUCK), and a plurality of low dropout regulators (LDO).

The control center in the PMU can realize communication with the SOC through a SYS-RESET-OUT-N pin, a PMU-RESET-N pin, a SPMI-CLK pin, a SPMI-DATA pin and the like, and the specific communication process is not limited in the embodiment of the application.

The VBAT-SYS pin in the PMU can receive the input of the battery power supply, and the plurality of BUCKs and the plurality of LDOs in the PMU can output power supply to the terminal system.

In the boot process, when a PWR _ ON _ N pin of a PMU is pulled down to a low level, a plurality of BUCKs and a plurality of LDOs of the PMU are sequentially electrified according to a preset sequence, the PMU pulls up an SYS-RESET-OUT-N, an SOC reads an image file of an operating system from a UFS, and the SOC places the image file into a DDR for operation, so that the electronic equipment system can realize normal operation and complete the boot process.

When the electronic device enters the sleep state, the electronic device may turn off a screen of the electronic device based on a sleep command issued by the system, and power of a system portion of the electronic device is turned off to enter the sleep state (or called a standby state).

In the process of waking up the system, the PWR _ ON _ N pin of the PMU is pulled down to be low level, the PMU sends a terminal wake-up signal to the SOC, and the system of the electronic equipment runs and restores to a normal working state.

It can be understood that, in the process of starting up or waking up the system of the electronic device, the PWR _ ON _ N level control of the PMU and the specific implementation of the control circuit may refer to corresponding records in fig. 1 to 8, which are not described herein again.

In summary, the embodiment of the present application can complete compatible actions of starting up the plug-in charger of the electronic device and starting up the case through the low-cost control circuit, and can implement actions of the start-up key after starting up the electronic device without being affected by the control logic of the control circuit.

It should be noted that the control circuit in the embodiment of the present application may be disposed on a substrate of the electronic device, or may be disposed or integrated at any position of the electronic device according to an actual application scenario, which is not specifically limited in the embodiment of the present application.

The electronic device of the embodiment of the application can be a device based on battery charging, for example, a handheld device with a wireless connection function, an in-vehicle device, and the like. Currently, some examples of electronic devices are: a mobile phone (mobile phone), a tablet computer, a notebook computer, a palm computer, a Mobile Internet Device (MID), a wearable device, a Virtual Reality (VR) device, an Augmented Reality (AR) device, a wireless terminal in industrial control (industrial control), a wireless terminal in self driving (self driving), a wireless terminal in remote operation (remote local supply), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation security (transportation safety), a wireless terminal in city (city), a wireless terminal in smart home (smart home), a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a wireless local loop (wireless local) phone, a personal digital assistant (WLL) station, a handheld personal communication device with wireless communication function, a wireless terminal in industrial control (industrial control), a wireless terminal in transportation security (personal control), a wireless terminal in city (smart home), a wireless terminal in smart home (smart home), a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a wireless local loop (personal digital assistant (PDA) phone, a wireless local communication device with wireless communication function, a wireless communication device, a, A computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, an electronic device in a 5G network, or an electronic device in a Public Land Mobile Network (PLMN) for future evolution, and the like, which are not limited in this embodiment of the present application.

By way of example and not limitation, in embodiments of the present application, the electronic device may also be a wearable device. Wearable equipment can also be called wearable intelligent equipment, is the general term of applying wearable technique to carry out intelligent design, develop the equipment that can dress to daily wearing, like glasses, gloves, wrist-watch, dress and shoes etc.. A wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The wearable device is not only a hardware device, but also realizes powerful functions through software support, data interaction and cloud interaction. The generalized wearable smart device includes full functionality, large size, and can implement full or partial functionality without relying on a smart phone, such as: smart watches or smart glasses and the like, and only focus on a certain type of application functions, and need to be used in cooperation with other devices such as smart phones, such as various smart bracelets for physical sign monitoring, smart jewelry and the like.

In addition, in the embodiment of the present application, the electronic device may also be an electronic device in an internet of things (IoT) system, where IoT is an important component of future information technology development, and a main technical feature of the electronic device is to connect an article with a network through a communication technology, so as to implement an intelligent network with interconnected human-computer and interconnected objects.

The electronic device in the embodiment of the present application may also be referred to as: user Equipment (UE), Mobile Station (MS), Mobile Terminal (MT), access terminal, subscriber unit, subscriber station, mobile station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or user device, etc.

In an embodiment of the present application, the electronic device or each network device includes a hardware layer, an operating system layer running on top of the hardware layer, and an application layer running on top of the operating system layer. The hardware layer includes hardware such as a Central Processing Unit (CPU), a Memory Management Unit (MMU), and a memory (also referred to as a main memory). The operating system may be any one or more computer operating systems that implement business processing through processes (processes), such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a windows operating system. The application layer comprises applications such as a browser, an address list, word processing software, instant messaging software and the like.

For example, fig. 10 shows a schematic structural diagram of a specific electronic device.

The electronic device may include a processor 110, an internal memory 121, a Universal Serial Bus (USB) interface, a charging management module 140, a power management module 141, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a sensor module 180, a key 190, an indicator 192, a camera 193, a display 194, and the like. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, an inductance sensor 180F, a proximity light sensor 180G, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

It is to be understood that the illustrated structure of the embodiments of the present application does not constitute a specific limitation to electronic devices. In other embodiments of the present application, an electronic device may include more or fewer components than shown, or some components may be combined, some components may be split, or a different arrangement of components may be used. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Processor 110 may include one or more processing units. The different processing units may be separate devices or may be integrated into one or more processors. A memory may also be provided in processor 110 for storing instructions and data.

The charging management module 140 is configured to receive charging input from a charger. The charger may be a wireless charger or a wired charger. The power management module 141 is used for connecting the charging management module 140 and the processor 110.

The wireless communication function of the electronic device may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor, the baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Antennas in electronic devices may be used to cover single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas.

The mobile communication module 150 may provide a solution including 2G/3G/4G/5G wireless communication applied to the electronic device. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a Low Noise Amplifier (LNA), and the like. The mobile communication module 150 may receive the electromagnetic wave from the antenna 1, filter, amplify, etc. the received electromagnetic wave, and transmit the electromagnetic wave to the modem processor for demodulation.

The wireless communication module 160 may provide a solution for wireless communication applied on an electronic device.

The electronic device implements the display function through the GPU, the display screen 194, and the application processor, etc. The GPU is a microprocessor for image processing, and is connected to the display screen 194 and an application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering.

The display screen 194 is used to display images, video, and the like. The display screen 194 includes a display panel. In some embodiments, the electronic device may include 1 or N display screens 194, with N being a positive integer greater than 1.

The electronic device may implement a shooting function through the ISP, the camera 193, the video codec, the GPU, the display screen 194, the application processor, and the like.

The camera 193 is used to capture still images or video. In some embodiments, the electronic device may include 1 or N cameras 193, N being a positive integer greater than 1.

The internal memory 121 may be used to store computer-executable program code, which includes instructions. The internal memory 121 may include a program storage area and a data storage area.

The electronic device may implement audio functions through the audio module 170, the speaker 170A, the receiver 170B, and the application processor. Such as music playing, recording, etc.

It should be noted that, structural parts in the electronic device in fig. 10 may refer to the description of the embodiment corresponding to fig. 2, and are not described again here.

The above embodiments, structural diagrams or simulation diagrams are only schematic illustrations of the technical solutions of the present application, and the dimensional ratios thereof do not limit the scope of the technical solutions, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the above embodiments should be included in the scope of the technical solutions.

Claims

1. An electronic device for powering on or waking up a system, comprising: the USB interface, control circuit and power management unit of the universal serial bus; the control circuit includes a switching device;

the control circuit is arranged between a first pin of the power management unit and a power line V of the USB interface_BUSBetween the pins;

the power management unit is used for triggering the electronic equipment to start or wake up a system process when the first pin receives a first level;

the control circuit is used for outputting the first level to a first pin of the power management unit when the USB interface is connected with a power supply, and outputting a second level to the first pin after the first level is output; or when the USB does not have a power supply, the control circuit is kept at the second level at the connection position of the first pin; the first level is inverted from the second level.

2. The electronic device of claim 1, further comprising a charging chip; the voltage stabilizing pin of the charging chip is connected with the first pin;

v of the charging chip and the USB interface_BUSPin connection for receiving the signal from the V_BUSA charging input of the pin; wherein, at said V_BUSWhen the pin is at high level, the voltage-stabilizing pin outputs high level; at the V_BUSWhen the pin is at low level, the voltage-stabilizing pin outputs low level.

3. The electronic device according to claim 2, wherein the first level is a low level, the electronic device further comprising a first switch, one end of the first switch being connected to the first pin, and the other end of the first switch being grounded;

the first switch is used for pulling the first pin down to a low level when the first switch is conducted.

4. The electronic device of claim 2 or 3, wherein the control circuit comprises: a first resistor, a second switch and a third switch;

one end of the first resistor is connected with the voltage stabilizing pin, and the other end of the first resistor is connected with the control end of the second switch and one end of the third switch;

one end of the second switch is connected with the first pin, and the other end of the second switch is grounded;

the control end of the third switch is used for receiving a first control signal, and the other end of the third switch is grounded;

wherein the second switch is disconnected from the third switch by default; and when the USB interface is connected with a power supply, the second switch is switched on, and after the second switch is switched on, the electronic equipment controls the third switch to be switched on through the first control signal, so that the second switch is switched off.

5. The electronic device of claim 4, wherein the first control signal is sent by a processing unit of the electronic device, and a control terminal of the third switch is connected to a General Purpose Input Output (GPIO) interface of the processing unit of the electronic device;

or the first control signal is sent by a sleep power-off power supply in the electronic equipment, and the control end of the third switch is connected with the sleep power-off power supply; the power supply is powered off when the electronic equipment is in a dormant or shutdown state, and is powered on when the USB interface is connected with the power supply.

6. The electronic device of claim 4, wherein the second switch and the third switch are both N-type field effect transistors, NMOS;

or, the second switch and the third switch are both P-type field effect transistors (PMOS), a first phase inverter is arranged between the first resistor and the second switch, and a second phase inverter is arranged between the first control signal and the third switch.

7. The electronic device of claim 2 or 3, wherein the control circuit comprises: a first resistor, a fourth switch and a fifth switch;

one end of the first resistor is connected with the voltage stabilizing pin, and the other end of the first resistor is connected with one end of the fifth switch;

one end of the fourth switch is connected with the first pin, the other end of the fourth switch is grounded, and the control end of the fourth switch is connected with the other end of the fifth switch;

the control end of the fifth switch is used for receiving a second control signal;

wherein the fourth switch is disconnected from the fifth switch by default; and at the moment when the USB interface is connected with a power supply, the fourth switch and the fifth switch are connected, and after the fourth switch is connected, the electronic equipment controls the fifth switch to be connected through the second control signal, so that the fourth switch is connected.

8. The electronic device according to claim 7, wherein the second control signal is sent by a processing unit of the electronic device, and a control terminal of the fifth switch is connected to a general purpose input output GPIO interface of the processing unit of the electronic device;

or the second control signal is sent by a sleep power-off power supply in the electronic device, and the control end of the fifth switch is connected with the sleep power-off power supply of the electronic device; the dormant power-off power supply is powered off when the electronic equipment is in a dormant or shutdown state and powered on at the moment when the USB interface is connected with the power supply.

9. The electronic device of claim 7, wherein the fourth switch and the fifth switch are both N-type field effect transistors, NMOS;

or, the fourth switch and the fifth switch are both P-type field effect transistors (PMOS), and a third inverter is arranged between the control end of the fourth switch and the other end of the fifth switch.

10. The electronic device according to any one of claims 4 to 9, wherein the control circuit further comprises a second resistor, one end of the second resistor is connected to the other end of the first resistor, and the other end of the second resistor is grounded.

11. The electronic device of any of claims 1-10, wherein the control circuit is disposed on a substrate of the electronic device.

12. The electronic device of any of claims 1-11, further comprising a display screen;

the display screen is used for displaying a starting interface when the electronic system is started, and the starting interface comprises a charging identifier; or, the method is used for displaying a charging interface when the electronic device wakes up the system.

13. A control circuit for powering on or waking up a system, the control circuit comprising a switching device; the control circuit is arranged on a first pin of a power management unit of the electronic equipment and a power line V of a USB interface of the electronic equipment_BUSBetween the pins;

14. The control circuit of claim 13, wherein the control circuit comprises: a first resistor, a second switch and a third switch;

15. The control circuit of claim 14, wherein the first control signal is sent by a processing unit of the electronic device, and a control terminal of the third switch is connected to a general purpose input output GPIO interface of the processing unit of the electronic device;

16. The control circuit of claim 14, wherein the second switch and the third switch are both N-type field effect transistors, NMOS;

17. The control circuit of claim 13, wherein the control circuit comprises: a first resistor, a fourth switch and a fifth switch;

18. The control circuit of claim 17, wherein the second control signal is sent by a processing unit of the electronic device, and a control terminal of the fifth switch is connected to a general purpose input output GPIO interface of the processing unit of the electronic device;

19. The control circuit of claim 17, wherein the fourth switch and the fifth switch are both N-type field effect transistors, NMOS;

20. The control circuit according to any one of claims 14 to 19, further comprising a second resistor, one end of the second resistor being connected to the other end of the first resistor, the other end of the second resistor being connected to ground.

21. The control circuit of any of claims 13-20, wherein the control circuit is disposed on a substrate of the electronic device.