CN114491572A - Data processing apparatus and data processing method - Google Patents
Data processing apparatus and data processing method Download PDFInfo
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- CN114491572A CN114491572A CN202011421032.0A CN202011421032A CN114491572A CN 114491572 A CN114491572 A CN 114491572A CN 202011421032 A CN202011421032 A CN 202011421032A CN 114491572 A CN114491572 A CN 114491572A
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Abstract
The invention discloses a data processing device and a data processing method. The memory is used for storing a computer program and N groups of encrypted private keys, wherein N is a positive integer. The processor is coupled to the memory and is used for executing the computer program to perform: generating a first string according to the first data; arranging the first string upside down to generate a second string; generating a third string according to the N groups of private keys and the second string; encrypting the third string to generate a first encrypted string; inverting the first encrypted string to generate a fourth string; encrypting the fourth string to generate a second encrypted string; and outputting the second encrypted string as second data. One of the advantages of the data processing apparatus is that the test items and test parameters of the wafer test can be encrypted and protected to prevent data leakage or falsification.
Description
Technical Field
A data processing device and a data processing method, and more particularly, to a data processing device and a data processing method for data encryption and decryption.
Background
Wafer test (Wafer Probe) is a test for electrical function of each chip on a Wafer to determine whether the chip functions normally. Generally, different product characteristics will have different Test items and Test parameters, and each Test item is represented by a Test Number (Test Number). If the chip fails to pass any of the test items, the chip is determined to be Bad by the test machine (Bad Die) and marked with a Bad bit Number (Fail bit Number).
Therefore, if the test parameters are altered, the accuracy of the wafer yield determined by the tester is seriously affected.
Disclosure of Invention
The invention aims to provide a data processing device which can encrypt and protect test items and test parameters of a wafer test so as to prevent data leakage or falsification.
The invention provides a data processing method which is suitable for a data processing device, wherein the data processing method comprises the following steps: generating a first string according to the first data; arranging the first string upside down to generate a second string; generating a third string according to the N sets of private keys and the second string, wherein N is a positive integer; encrypting the third string to generate a first encrypted string; inverting the first encrypted string to generate a fourth string; encrypting the fourth string to generate a second encrypted string; and outputting the second encrypted string as second data.
In some embodiments, the generating the third string according to the N sets of private encryption keys and the second string comprises: the second string is arranged between at least one of the N sets of private keys and at least another one of the N sets of private keys.
In some embodiments, the first encrypted string and the second encrypted string are Base64 encrypted strings.
In the data processing method of some embodiments, the data processing method further includes: generating a second encrypted string according to the second data; decrypting the second encrypted string to generate a fourth string; arranging the fourth string in an inverted manner to generate a first encrypted string; decrypting the first encrypted string to generate a third string; generating a second string according to the N groups of private keys and the third string; arranging the second string upside down to generate a first string; and outputting the first string as the first data.
In some embodiments, the generating the second string according to the N sets of private encryption keys and the third string comprises: removing the N sets of private keys from the third string.
The invention provides a data processing device, which comprises a memory and a processor. The memory is used for storing a computer program and N groups of encrypted private keys, wherein N is a positive integer. The processor is coupled to the memory and is used for executing the computer program to perform: generating a first string according to the first data; arranging the first string upside down to generate a second string; generating a third string according to the N groups of private keys and the second string; encrypting the third string to generate a first encrypted string; inverting the first encrypted string to generate a fourth string; encrypting the fourth string to generate a second encrypted string; and outputting the second encrypted string as second data.
In some embodiments, generating the third string according to the N sets of private keys and the second string comprises: the second string is arranged between at least one of the N sets of private keys and at least another one of the N sets of private keys.
In some embodiments, the data processing apparatus further comprises a processor configured to execute the computer program to: generating a second encrypted string according to the second data; decrypting the second encrypted string to generate a fourth string; arranging the fourth string in an inverted manner to generate a first encrypted string; decrypting the first encrypted string to generate a third string; generating a second string according to the N groups of private keys and the third string; arranging the second string upside down to generate a first string; and outputting the first string as the first data.
In some embodiments, generating the second string according to the N sets of private keys and the third string comprises: removing the N sets of private keys from the third string.
In some embodiments of the data processing apparatus, the processor performs the encryption operation according to Base64 encoding.
One of the advantages of the data processing apparatus and the data processing method is that the test items and the test parameters of the wafer test can be encrypted and protected to prevent data leakage or falsification.
Drawings
Fig. 1 is a schematic diagram of a data processing apparatus according to some embodiments.
Fig. 2A-2B are flow diagrams of data processing methods according to some embodiments.
Fig. 3 is a schematic diagram of an inverted arrangement according to some embodiments.
Fig. 4 is a schematic diagram illustrating a private key writing according to an embodiment.
Description of the main reference numerals:
100-a data processing device; 110-a processor; 120-a memory; 130-I/O interface; 140-a bus; 121-computer program; 122-private key; 200-a data processing method; 301, 302, 401-string; data 1-first Data; data 2-second Data; S201-S208-flow; S210-S280-flow.
Detailed Description
The following detailed description of the embodiments is provided in conjunction with the accompanying drawings, which are included to illustrate and not to limit the invention, and the description of the structural operations is not intended to limit the order of execution, but rather any arrangement of components which may be rearranged to produce a device with equivalent functionality is within the scope of the disclosure.
The term (terms) used throughout the specification and claims has the ordinary meaning as commonly understood in each term used in the art, in the disclosure herein, and in the specific context, unless otherwise indicated. Certain terms used to describe the invention are discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art in describing the invention.
Fig. 1 is a schematic diagram of a data processing apparatus 100 according to some embodiments. As shown in FIG. 1, the data processing apparatus 100 comprises a processor 110, a memory 120, an I/O interface 130, and a bus 140. The processor 110, the memory 120, and the I/O interface 130 are coupled to each other via a bus 140, thereby operating in cooperation. For example, the processor 110 can access the computer program 121 and the N sets of private keys 122 in the memory 120 through the bus 140 to execute the data processing method 200 of fig. 2A-2B, which will be described later, wherein N is a positive integer.
In addition, the I/O interface 130 can be used as an interface for inputting or outputting Data (e.g., the first Data1 or the second Data2) for one or more external input/output devices (not shown), such as: a mouse, keyboard, touch screen …, etc., for transmitting and receiving data over the bus 140.
In some embodiments, processor 110 may be implemented with an Application Specific Integrated Circuit (ASIC), a field programmable logic array (FPGA), a Microprocessor (MCU), a Central Processing Unit (CPU), or other suitable processor.
In some embodiments, memory 120 may comprise any type of system memory, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), or read-only memory (ROM).
In some embodiments, the bus 140 may be one or more of any type of several bus architectures including a memory bus or memory controller, a peripheral bus, a video bus, or other suitable bus.
Fig. 2A-2B are flow diagrams of data processing methods 200 according to some embodiments. As shown in fig. 2A, when the processor 110 executes the computer program 121, the computer program 121 causes the processor 110 to execute the processes S201 to S208 of the data processing method 200. Fig. 3 is a schematic diagram of an inverted arrangement according to some embodiments. Fig. 4 is a schematic diagram illustrating a private key writing according to an embodiment. For convenience of description, the operation flow in fig. 2A will be described in more detail with reference to fig. 3 and 4, which will be described later, but the invention is not limited thereto.
In the flow S201, the first Data1 is received with the Data processing apparatus 100. In some embodiments, the first Data1 is the original Data to be protected. For example, the first Data1 may include various test parameters (Condition table) and test items for Wafer test (Wafer Probe).
In flow S202, the processor 110 generates a first string according to the first Data 1. In some embodiments, the processor 110 retrieves the content of the first Data1 to generate the first string by executing the computer program 121. For example, the processor 110 may convert the first Data1 into a text file containing the first string. In some embodiments, the computer program 121 may be written in a programming language such as Python, C, or Java.
In flow S203, the processor 110 arranges the first string upside down to generate a second string. For example, FIG. 3 shows a string 301 and a string 302 representing a first string and a second string, respectively, where the string 301 comprises three parts corresponding to the contents of the first Data1, which are "ABCDEFGHIJK", "LMNOP", and "QR", respectively, in top-down order. The processor 110 then inverts "ABCDEFGHIJK", "LMNOP" and "QR" to "KJIHGFEDCBA", "PONML" and "RQ", respectively, and replaces "ABCDEFGHIJK" with "RQ" as the first row, "PONML" with "LMNOP" as the second row and "KJIHGFEDCBA" with "QR" as the third row to form the string 302 by operation S203. That is, to form string 302, processor 110 reverses the order of the characters in each row of string 301 and also reverses the order of the rows of string 301.
In process S204, processor 110 generates a third string according to N sets of private keys 122 and the second string. In some embodiments, processor 110 generates a third string by arranging the second string between at least one of N sets of private keys 122 and at least another of N sets of private keys 122. For example, FIG. 4 shows string 401 corresponding to the third string, where string 401 includes two sets of private keys 122 (XX and YY, respectively). Processor 110 arranges string 302 between two sets of private keys 122 "XX" and "YY" to generate string 401 by operation S204. In some embodiments, the private key 122 is a string pre-stored in the memory 120.
In block S205, the processor 110 encrypts the third string to generate a first encrypted string. In some embodiments, the processor 110 may perform the encryption operation according to the Base64 encoding to generate the first encryption string.
In process S206, the processor 110 further inverts the first encrypted string to generate a fourth string. The inversion arrangement is similar to the aforementioned process S203, and will not be described herein again.
The processor 110 encrypts the fourth string to generate a second encrypted string in flow S207, and the processor 110 outputs the second encrypted string as the second Data2 in flow S208. The encryption method of the process S207 is similar to the process S205, and is not described herein again.
In summary, the Data processing apparatus 100 executes the computer program 121 to operate the Data processing method 200 through the processor 110 to encrypt the first Data1, so that the second Data2 cannot be easily interpreted by a person not holding the private key 122, thereby protecting the content of the first Data 1.
In some embodiments, as shown in fig. 2B, the data processing method 200 further includes a process S210, a process S220, a process S230, a process S240, a process S250, a process S260, a process S270, and a process S280.
In the flow S210, the second Data2 is received with the Data processing apparatus 100. In some embodiments, the processor 110 may determine to execute the Data processing method 200 of fig. 2A for encryption or execute the Data processing method 200 of fig. 2B for decryption according to the received Data (e.g., the first Data1 or the second Data 2).
In process S220, the processor 110 generates a second encrypted string according to the second Data2, and in process S230, the processor 110 decrypts the second encrypted string to generate a fourth string. The flow S220 and the flow S230 correspond to the flow S208 and the flow S207, respectively. In some embodiments, processor 110 may convert second Data2 into a text file containing the second string. In some embodiments, the processor 110 may reverse the second encrypted string to restore the fourth string according to the Base64 encoding.
In process S240, the processor 110 inverts the fourth string to generate a first encrypted string. The process S240 corresponds to the process S206, and the inverted arrangement manner is similar to the process S203, which is not described herein again.
In flow S250, the processor 110 decrypts the first encrypted string to generate a third string. The process S250 corresponds to the process S205. In some embodiments, the processor 110 may also perform the inverse operation according to the Base64 to decrypt the first encrypted string and return the decrypted string to the third string.
In process S260, processor 110 generates a second string according to N sets of private keys 122 and the third string. In some embodiments, processor 110 causes the third string to be restored back to the second string by removing N sets of private keys 122 from the third string. For example, as shown in FIG. 4, processor 110 removes two sets of private keys 122 "XX" and "YY" from string 401 to generate string 302 of FIG. 3 by operation S260.
In block 270, the processor 110 inverts the second string to generate a first string, and in block 280, the processor 110 outputs the first string as first data. The flow S270 corresponds to the flow S203. For example, the processor 110 may restore the string 302 in the process S203 to the string 301 by operating the process S270, and output the string 301 as the first Data1 in the process S280.
In summary, the Data processing apparatus 100 can restore the second Data2 to the first Data1 by performing the above-described flow in fig. 2B, so that the content of the first Data1 can be interpreted.
Although the present disclosure has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure, and therefore, the scope of the present disclosure should be limited only by the terms of the appended claims.
Claims (10)
1. A data processing method, adapted to a data processing apparatus, wherein the data processing method comprises:
generating a first string according to the first data;
arranging the first string upside down to generate a second string;
generating a third string according to N sets of private keys and the second string, wherein N is a positive integer;
encrypting the third string to produce a first encrypted string;
inverting the first encrypted string to generate a fourth string;
encrypting the fourth string to produce a second encrypted string; and
and outputting the second encrypted string as second data.
2. The data processing method of claim 1, wherein generating the third string according to the N sets of private encryption keys and the second string comprises:
arranging the second string between at least one of the N sets of private keys and at least another one of the N sets of private keys.
3. The data processing method of claim 1, wherein the first encrypted string and the second encrypted string are Base64 encrypted strings.
4. The data processing method of claim 1, wherein the data processing method further comprises:
generating the second encrypted string according to the second data;
decrypting the second encrypted string to generate the fourth string;
inversely arranging the fourth string to generate the first encrypted string;
decrypting the first encrypted string to generate the third string;
generating the second string according to the N sets of private keys and the third string;
arranging the second string upside down generates the first string; and
and outputting the first string as the first data.
5. The data processing method of claim 4, wherein generating the second string according to the N sets of private encryption keys and the third string comprises:
removing the N sets of private keys from the third string.
6. A data processing apparatus, comprising:
the memorizer, is used for storing a computer program and N groups of encryption private keys, wherein N is a positive integer; and
a processor, coupled to the memory, for executing the computer program to perform:
generating a first string according to the first data;
arranging the first string upside down to generate a second string;
generating a third string according to the N groups of private keys and the second string;
encrypting the third string to produce a first encrypted string;
inverting the first encrypted string to generate a fourth string;
encrypting the fourth string to produce a second encrypted string; and
and outputting the second encrypted string as second data.
7. The data processing apparatus of claim 6, wherein generating the third string based on the N sets of private keys and the second string comprises:
arranging the second string between at least one of the N sets of private keys and at least another one of the N sets of private keys.
8. The data processing apparatus of claim 6, wherein the processor is configured to execute the computer program to:
generating the second encrypted string according to the second data;
decrypting the second encrypted string to generate the fourth string;
inversely arranging the fourth string to generate the first encrypted string;
decrypting the first encrypted string to generate the third string;
generating the second string according to the N sets of private keys and the third string;
arranging the second string upside down generates the first string; and
and outputting the first string as the first data.
9. The data processing apparatus of claim 8, wherein generating the second string based on the N sets of private keys and the third string comprises:
removing the N sets of private keys from the third string.
10. The data processing apparatus of claim 6, wherein the processor is configured to perform encryption operations according to Base64 encoding.
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| Application Number | Priority Date | Filing Date | Title |
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| TW109139588A TWI749866B (en) | 2020-11-12 | 2020-11-12 | Data processing device and method of processing data |
| TW109139588 | 2020-11-12 |
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