CN114490199A - Test synchronization method, device, equipment and storage medium - Google Patents

Test synchronization method, device, equipment and storage medium Download PDF

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CN114490199A
CN114490199A CN202111537596.5A CN202111537596A CN114490199A CN 114490199 A CN114490199 A CN 114490199A CN 202111537596 A CN202111537596 A CN 202111537596A CN 114490199 A CN114490199 A CN 114490199A
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test
processor
test terminal
terminal
test sequence
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穆建元
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Beijing Co Wheels Technology Co Ltd
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Beijing Co Wheels Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2268Logging of test results
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/16Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]

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Abstract

The embodiment of the application provides a test synchronization method, a test synchronization device, test synchronization equipment and a storage medium. The first test terminal can synchronously send at least one first test sequence and a time release node corresponding to the at least one first test sequence to the first processor and the second test terminal; the second testing terminal can update the time of the second testing terminal according to the time release node corresponding to the received at least one first testing sequence, and test the second processor according to the updated time and the received at least one first testing sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.

Description

Test synchronization method, device, equipment and storage medium
Technical Field
The present invention relates to the field of test technologies, and in particular, to a test synchronization method, apparatus, device, and storage medium.
Background
With the development of science and technology, the requirements of various industries on the test efficiency are higher and higher. In the field of intelligent automobiles, when an on-board domain controller is tested, two devices are generally adopted to respectively test two different processors in the on-board domain controller. However, the testing processes of the two devices are relatively independent, resulting in poor time accuracy of the test results. Therefore, a solution is urgently needed.
Disclosure of Invention
The embodiment of the application provides a test synchronization method, a test synchronization device, test synchronization equipment and a storage medium, which are used for improving the time precision of a test result obtained by testing a vehicle-mounted domain controller.
The embodiment of the present application further provides a test synchronization method, including: the method comprises the steps that a first test terminal determines at least one first test sequence adopted for testing a first processor in the vehicle-mounted domain controller; and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to a first processor and a second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
Further optionally, the first test terminal and the second test terminal run different operating systems; the operating system operated by the first test terminal is adapted to the first processor, and the operating system operated by the second test terminal is adapted to the second processor.
Further optionally, after sending at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, the method further includes: and receiving first state data returned by the first processor, and synchronizing the first state data to the second test terminal.
Further optionally, the sending, to the first processor and a second test terminal having a different operating system from the first test terminal, at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence includes: and synchronously sending the at least one first test sequence and the time release node corresponding to the at least one first test sequence to the first processor and the second test terminal through at least one of TCP, UDP and a specified serial port protocol.
The embodiment of the application also provides a test synchronization method, which is applied to a vehicle-mounted domain controller, and the method comprises the following steps: receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller; updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence; and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
Further optionally, the testing the second processor according to the received at least one first test sequence includes: converting the at least one first test sequence to obtain at least one second test sequence adaptive to an operating system running on the second test terminal; sending the at least one second test sequence to the second processor.
Further optionally, after testing a second processor of a different type from the first processor in the onboard controller, the method further includes: receiving first state data sent by the first test terminal and returned by the first processor; and converting the received first state data to obtain second state data adaptive to an operating system running on the second test terminal, and outputting the second state data.
The embodiment of the present application further provides a test synchronization apparatus, which is used for testing the vehicle-mounted domain controller, and the apparatus includes: a determination module to: determining at least one first test sequence adopted for testing a first processor in the vehicle-mounted domain controller; a test module to: and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to a first processor and a second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
The embodiment of the present application further provides a test synchronization apparatus, which is used for testing the vehicle-mounted domain controller, and the apparatus includes: a receiving module to: receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller; an update module to: updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence; a test module to: and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
An embodiment of the present application further provides an electronic device, including: a memory and a processor; wherein the memory is to: storing one or more computer instructions; the processor is to execute the one or more computer instructions to: the steps in the test synchronization method are performed.
Embodiments of the present application further provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to implement the steps in the test synchronization method.
In a method, an apparatus, a device, and a storage medium for test synchronization, a first test terminal may send at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to a first processor and a second test terminal synchronously; the second testing terminal can update the time of the second testing terminal according to the time release node corresponding to the received at least one first testing sequence, and test the second processor according to the updated time and the received at least one first testing sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic structural diagram of a test synchronization system according to an exemplary embodiment of the present application;
FIG. 2 is a schematic diagram of one practical application provided by an exemplary embodiment of the present application;
FIG. 3 is a schematic diagram of a test synchronization method provided in an exemplary embodiment of the present application;
FIG. 4 is a schematic diagram of a test synchronization method provided in an exemplary embodiment of the present application;
FIG. 5 is a schematic diagram of a test synchronization apparatus provided in an exemplary embodiment of the present application;
FIG. 6 is a schematic diagram of a test synchronization apparatus provided in an exemplary embodiment of the present application;
fig. 7 is a schematic structural diagram of an electronic device according to an exemplary embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
For the prior art, two devices are generally adopted to independently test two different processors in a vehicle-mounted domain controller, which results in low test efficiency. In some embodiments of the present application, a solution is provided that includes a test synchronization system comprised of a first test terminal and a second test terminal. In the test synchronization system, a first test terminal can synchronously send at least one first test sequence and a time release node corresponding to each of the at least one first test sequence to a first processor and a second test terminal; the second test terminal can update the time of the second test terminal according to the time release node corresponding to the received at least one first test sequence, and test the second processor according to the updated time and the received at least one first test sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved. The technical solutions provided by the embodiments of the present application are described in detail below with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a test synchronization system according to an exemplary embodiment of the present application, and as shown in fig. 1, the test synchronization system 100 includes a first test terminal 10 and a second test terminal 20.
The test synchronization system 100 is used for testing a vehicle-mounted domain controller, and the vehicle-mounted domain controller at least comprises a first processor and a second processor which are different in type. The first processor and the second processor are used for limiting, and are only used for distinguishing the two processors contained in the vehicle-mounted domain controller. In some embodiments, the on-board domain controller includes a first processor of Arm Cortex-M7 and a second processor of Arm Cortex-A53.
The first test terminal 10 and the second test terminal 20 may be implemented as a vehicle-mounted terminal, a computer, a tablet computer, or other types of upper computer devices, which is not limited in this embodiment. The first test terminal 10 and the second test terminal 20 may run different operating systems. It should be noted that, in the field of testing of the in-vehicle domain controller, it is generally required that a specific development software or development environment is used to respectively test the first processor and the second processor, such as CANOE (controller environment), etc., but some development software and development environment are not common to all operating systems, or some development software and development environment cannot be run efficiently in all operating systems. Thus, in this embodiment, to facilitate efficient testing of the first processor and the second processor, an operating system adapted to the first processor may be run on the first test terminal 10 and an operating system adapted to the second processor may be run on the second terminal 20. For example, the first test terminal 10 needs to use the software R1 to test the first processor, and the software R1 can only run on the Windows operating system, or the software R1 can run on the Windows operating system when the efficiency is higher. When the first test terminal 10 needs to test the first processor using the software R2, and the software R2 can only run on the Linux operating system, or the software R2 works more efficiently on the Linux operating system, the Linux operating system can be run on the second test terminal 20.
In the test synchronization system 100, the first test terminal 10 is configured to: and synchronously sending at least one first test sequence and the time release node corresponding to the at least one first test sequence to the first processor and the second test terminal 20.
The test sequence can be a continuous level sequence which is used for carrying out up/down test on the vehicle-mounted domain controller; the test sequence may also be a sequence composed of a plurality of control signals sent by other controllers, where the sequence is used to perform a response test on the vehicle-mounted controller, and the like, and the embodiment is not limited.
The "first" is used to limit the test sequences, and is used only to distinguish the test sequences transmitted by the first test terminal 10, and the transmission order and number of the test sequences are not limited.
Wherein the time distribution node refers to a point in time when the first test terminal 10 sends a test sequence to the first processor. When the first test terminal 10 transmits at least one first test sequence to the first processor, a time point at which the at least one first sequence is transmitted may be synchronously transmitted to the second test terminal 20 as a time distribution node. It should be noted that the above-mentioned process may be performed once every time the test sequence is sent.
For example, the first test terminal 10 was at 9 a.m.: 00: 00 sends the first test sequence L1 to the first processor, while at the same time point 9, at which the first test sequence L1 was sent, may be: 00: 00 as the time distribution node J0, and synchronously transmits the test sequence L1 and the time distribution node J0 to the second test terminal 20. The first test terminal 10, at 9 a.m.: 01: 00 sends the first test sequence L2 to the first processor, while at the same time point 9, at which the first test sequence L2 was sent, may be: 01: 00 as the time distribution node J1, and transmits the test sequence L2 to the second test terminal 20 in synchronization with the time distribution node J0.
In the test synchronization system 100, the second test terminal 20 may update the time of the second test terminal 20 according to the time release node corresponding to each of the received at least one first test sequence, so that the time of the second test terminal 20 is the same as that of the first test terminal 10. Continuing with the previous example, after the second test terminal receives the time distribution node J0, it may send its time 9: 00: 02 is updated to 9: 00: 00.
after the updated time, the second test terminal 20 may test the second processor according to the updated time and the received at least one first test sequence. For example, the second test terminal 20 compares time 9: 00: 02 is updated to 9: 00: 00, can be in the range of 9: 00: 00, testing the second processor according to the at least one first test sequence.
In this embodiment, the test synchronization system includes a first test terminal 10 capable of synchronously sending at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and the second test terminal 20; the second test terminal 20 included in the test synchronization system may update the time of the second test terminal 20 according to the time release node corresponding to each of the received at least one first test sequence, and test the second processor according to the updated time and the received at least one first test sequence. By the embodiment, the time distribution node and the test sequence can be synchronized between the first test terminal 10 and the second test terminal 20, so that the first test terminal 10 and the second test terminal 20 can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
In some optional embodiments, the second test terminal 10 is specifically configured to: the at least one first test sequence is transformed to obtain at least one second test sequence adapted to an operating system running on the second test terminal 20, and the at least one second test sequence is sent to the second processor. Since the operating systems run by the first test terminal 10 and the second test terminal 20 are different, and the first processor and the second processor are respectively suitable for different operating systems, the second test terminal 20 cannot directly use the first test sequence for testing the second processor after receiving the first test sequence. Thus, the second test terminal 20 may convert the first test sequence into a second test sequence that is compatible with the operating system running on the second test terminal 20. After the conversion, a second test sequence may be sent to the second processor to test the second processor. For example, the second test terminal 20 running the Linux operating system may convert the first test sequence J1 received from the first test terminal 10 running the Windows operating system into the second test sequence Z1 adapted to the Linux operating system, and transmit the second test sequence Z1 to the second processor to test the second processor.
By the embodiment, the same test content can be synchronized and the same content can be tested, and the test sequence conversion mode is adopted, so that the editing and development of the test sequence do not need to be carried out on the second test terminal 20, the automatic test is realized, and the labor cost is saved.
In some optional embodiments, the first test terminal 10 is further configured to: and receiving the first state data returned by the first processor, and synchronizing the first state data to the second test terminal 20. Wherein the first state data may include: at least one of a test log and a processor state.
The test log is used for recording events and test results generated in the test process. Wherein the processor state may include: normal operation, pre-sleep, sleep or abnormal operation, etc. Taking power-up and power-down of the first processor as an example, after the first test terminal 10 tests the first processor, the received first state data returned by the first processor are a processor state and a test log of abnormal operation, and the received state data are synchronized to the second test terminal 20. In this way, after the test is completed, the user may view the status data on any one of the first test terminal 10 and the second test terminal 20 to analyze the reason for the abnormal operation of the first processor according to the status data.
In some optional embodiments, the second test terminal 20 is further configured to: and converting the received first state data to obtain second state data adapted to the operating system running on the second test terminal 20, and outputting the second state data.
Further optionally, maintenance for abnormal operation of the processor may be performed based on the state data. If the test results of the test sequence do not correspond to the expected results, further repairs or adjustments to the processor may be made. For example, a power-on sequence is sent to the processor, but the processor still sleeps, which indicates that the processor is in an exception at this time, and an error may be reported for the operation and maintenance staff to check.
In some scenarios, since the operating systems of the first test terminal and the second test terminal are different, there is a possibility that the first state data cannot be displayed on the second test terminal. Thus, in some embodiments, the first state data may be transformed into second state data adapted to an operating system running on the second test terminal. Such as: the second test terminal running the Linux operating system converts the first state data K1 received from the first test terminal running the Windows operating system into second state data Y1 adapted to the Linux operating system and outputs the second state data Y1 so that the user can view the state data on the second test terminal.
In some optional embodiments, the first test terminal is specifically configured to: at least one first test sequence and a time release node corresponding to the at least one first test sequence are synchronously sent to the first processor and the second test terminal 20 through at least one of a Transmission Control Protocol (TCP), a User Datagram Protocol (UDP) and a specified serial Protocol.
Among them, UDP is a connectionless transport layer protocol, and provides a method for an application to send encapsulated IP packets without establishing a connection. Among them, TCP is a connection-oriented, reliable transport-layer communication protocol based on byte streams, a transport protocol specifically designed to provide reliable end-to-end byte streams over unreliable internetworks. The specified serial protocol may include: and serial port protocols such as RS232 or RS-232C and the like can be selected according to actual requirements.
The test synchronization system provided in the embodiment of the present application will be further described with reference to fig. 2 and a practical application scenario. XCU in the figure may include: an Arm Cortex-M7 processor and an Arm Cortex-a53 processor, hereinafter referred to as M core and a core, respectively.
In the first test terminal running the Windows operating system, CANoe, python (a programming language), and a data synchronization server program, etc. are run. The first test terminal is connected with the M core by using a CAN (Controller Area Network) bus, and is connected with a second test terminal running a Linux operating system by using a tcp/udp communication protocol.
In a second test terminal running a Linux operating system, a shell (a command parser), python, c/c + + (a programming language), a data synchronization client program and the like are run, a tcp/udp communication protocol and an RS232 serial port protocol are used for being connected with an A core in an XCU, and the tcp/udp communication protocol is used for being connected with a first test terminal running a Windows operating system.
The data synchronization server in the first test terminal is used as a time release node while sending a test sequence to the M core in the XCU, and synchronizes the system time of the data synchronization server to the XCU and the second test terminal, so as to ensure the time synchronization of all devices in the test process.
The linux system used by the second test terminal running the data synchronization client can more conveniently communicate and debug with the core A in the XCU. The data synchronization client communicates with the data synchronization server by using a tcp/udp communication protocol, so that the real-time performance of data can be ensured, and sufficient bandwidth can be ensured during large-data-volume transmission.
In addition to the test synchronization system provided by each of the above embodiments, the embodiments of the present application also provide a test synchronization method, which will be described below with reference to the accompanying drawings.
Fig. 3 is a flowchart illustrating a test synchronization method according to an exemplary embodiment of the present application, where the method may include the steps shown in fig. 3 when executed on the first test terminal side:
step 301, the first test terminal determines at least one first test sequence adopted for testing the first processor in the vehicle-mounted domain controller.
Step 302, at least one first test sequence and a time release node corresponding to the at least one first test sequence are sent to the first processor and the second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
Further optionally, the first test terminal and the second test terminal run different operating systems; the operating system run by the first test terminal is adapted to the first processor, and the operating system run by the second test terminal is adapted to the second processor.
The processors are limited by adopting a first processor and a second processor, and are only used for distinguishing two processors contained in the vehicle-mounted domain controller. In some embodiments, the on-board domain controller includes a first processor of Arm Cortex-M7 and a second processor of Arm Cortex-A53.
The first test terminal and the second test terminal may be implemented as a vehicle-mounted terminal, a computer, a tablet computer, or other types of upper computer devices, which is not limited in this embodiment. The first test terminal and the second test terminal may run different operating systems. It should be noted that, in the field of testing of the in-vehicle domain controller, it is generally required that a specific development software or development environment is used to respectively test the first processor and the second processor, such as CANOE (controller environment), etc., but some development software and development environment are not common to all operating systems, or some development software and development environment cannot be run efficiently in all operating systems. Therefore, in this embodiment, in order to facilitate efficient testing of the first processor and the second processor, the operating system adapted to the first processor may be run on the first test terminal, and the operating system adapted to the second processor may be run on the second terminal. For example, the first test terminal needs to use the software R1 to test the first processor, and the software R1 can only run on the Windows operating system, or the software R1 can run the Windows operating system on the Windows operating system when the efficiency is higher. When the first test terminal needs to test the first processor by using the software R2, and the software R2 can only run on the Linux operating system, or the software R2 works more efficiently on the Linux operating system, the Linux operating system can be run on the second test terminal.
Further optionally, after sending at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, the first state data returned by the first processor may be received, and the first state data may be synchronized to the second test terminal.
Wherein the first state data may include: at least one of a test log and a processor state.
The test log is used for recording events and test results generated in the test process. Wherein the processor state may include: normal operation, pre-sleep, sleep or abnormal operation, etc. Taking powering on and powering off the first processor as an example, after the first test terminal tests the first processor, the received first state data returned by the first processor are processor states and test logs which run abnormally, and the received state data are synchronized to the second test terminal. In this way, after the test is completed, the user can check the state data on any one of the first test terminal and the second test terminal, so as to analyze the reason for the abnormal operation of the first processor according to the state data.
Further optionally, when the first test terminal synchronously sends the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal, the first test terminal may synchronously send the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal through at least one of TCP, UDP, and a specified serial protocol.
Among them, UDP is a connectionless transport layer protocol, and provides a method for an application to send encapsulated IP packets without establishing a connection. Among them, TCP is a connection-oriented, reliable transport-layer communication protocol based on byte streams, a transport protocol specifically designed to provide reliable end-to-end byte streams over unreliable internetworks. The specified serial protocol may include: and serial port protocols such as RS232 or RS-232C and the like can be selected according to actual requirements.
In this embodiment, the first test terminal may send the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal synchronously. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
The embodiment of the present application further provides a test synchronization method, which will be described below with reference to the accompanying drawings.
Fig. 4 is a flowchart illustrating a test synchronization method according to an exemplary embodiment of the present application, where the method may include the steps shown in fig. 4 when executed on the first test terminal side:
step 401, receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to each of the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the in-vehicle domain controller.
Step 402, updating the time of the second test terminal according to the time release node corresponding to each of the at least one first test sequence.
And 403, testing a second processor, which is different from the first processor in type, in the vehicle-mounted controller according to the updated time and the received at least one first test sequence.
By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
In some optional embodiments, since the operating systems run by the first test terminal and the second test terminal are different, and the first processor and the second processor are respectively adapted to different operating systems, the second test terminal cannot directly use the first test sequence for testing the second processor after receiving the first test sequence. Thus, the second test terminal may convert the first test sequence into a second test sequence adapted to an operating system running on the second test terminal. After the conversion, a second test sequence may be sent to the second processor to test the second processor. For example, the second test terminal running the Linux operating system may convert the first test sequence J1 received from the first test terminal running the Windows operating system into the second test sequence Z1 adapted to the Linux operating system, and send the second test sequence Z1 to the second processor to test the second processor.
By the implementation mode, the same test content can be synchronized and tested, and the test sequence conversion mode is adopted, so that the editing and development of the test sequence at the second test terminal are not needed, the automatic test is realized, and the labor cost is saved.
In some scenarios, since the operating systems of the first test terminal and the second test terminal are different, there is a possibility that the first state data cannot be displayed on the second test terminal. Therefore, in some embodiments, after testing a second processor of the in-vehicle controller, which is of a different type from the first processor, the second test terminal may receive first state data sent by the first test terminal and returned by the first processor, and convert the first state data into second state data adapted to an operating system running on the second test terminal. After the transition, the second state data may be output. Such as: the second test terminal running the Linux operating system converts the first state data K1 received from the first test terminal running the Windows operating system into second state data Y1 adapted to the Linux operating system, and outputs the second state data Y1 so that a user can view the state data on the second test terminal.
In this way, after the test is completed, the user can check the state data on any one of the first test terminal and the second test terminal, so as to analyze the reason for the abnormal operation of the first processor according to the state data.
Further optionally, the operating system run by the first test terminal is adapted to the first processor, and the operating system run by the second test terminal is adapted to the second processor.
In this embodiment, the second test terminal may update the time of the second test terminal according to the time release node corresponding to each of the received at least one first test sequence, and test the second processor according to the updated time and the received at least one first test sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
It should be noted that all execution subjects of the steps of the methods provided in the above embodiments may be the same device, or different devices may also be used as execution subjects of the methods. For example, the execution subjects of steps 11 to 12 may be device a; for another example, the execution subject of step 11 may be device a, and the execution subject of step 12 may be device B; and so on.
In addition, in some of the flows described in the above embodiments and the drawings, a plurality of operations are included in a specific order, but it should be clearly understood that the operations may be executed out of the order presented herein or in parallel, and the order of the operations, such as 11, 12, etc., is merely used for distinguishing between different operations, and the order itself does not represent any execution order. Additionally, the flows may include more or fewer operations, and the operations may be performed sequentially or in parallel.
It should be noted that, the descriptions of "first", "second", etc. in this document are used for distinguishing different messages, devices, modules, etc., and do not represent a sequential order, nor limit the types of "first" and "second" to be different.
An embodiment of the present application provides a test synchronization apparatus, as shown in fig. 5, the test synchronization apparatus includes: a determination module 501 and a test module 502.
Wherein the determining module 501 is configured to: determining at least one first test sequence adopted for testing a first processor in a vehicle-mounted domain controller; a test module 502 for: and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to a first processor and a second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor in type, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
The first test terminal and the second test terminal run different operating systems; the operating system run by the first test terminal is adapted to the first processor, and the operating system run by the second test terminal is adapted to the second processor.
Further optionally, the testing module 502 is further configured to: after at least one first test sequence and a time release node corresponding to the at least one first test sequence are sent to the first processor and a second test terminal with a different operating system from the first test terminal, first state data returned by the first processor are received, and the first state data are synchronized to the second test terminal.
Further optionally, when the test module 502 sends at least one first test sequence and a time release node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, the test module is specifically configured to: and synchronously sending the at least one first test sequence and the time release node corresponding to the at least one first test sequence to the first processor and the second test terminal through at least one of TCP, UDP and a specified serial port protocol.
In this embodiment, the first test terminal may synchronously send the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal; therefore, the second test terminal can update the time of the second test terminal according to the time release node corresponding to the received at least one first test sequence, and test the second processor according to the updated time and the received at least one first test sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
An embodiment of the present application provides a test synchronization apparatus, as shown in fig. 6, the test synchronization apparatus includes: a receiving module 601, an updating module 602 and a testing module 603.
The receiving module 601 is configured to: receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller; an update module 602 configured to: updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence; a test module 603 configured to: and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
Further optionally, when testing the second processor according to the received at least one first test sequence, the testing module 603 is specifically configured to: and converting the at least one first test sequence to obtain at least one second test sequence adaptive to an operating system running on the second test terminal, and sending the at least one second test sequence to the second processor.
Further optionally, after testing a second processor of the onboard controller, which is different from the first processor in type, the receiving module 601 is further configured to: receiving first state data sent by the first test terminal and returned by the first processor; and converting the received first state data to obtain second state data adaptive to an operating system running on the second test terminal, and outputting the second state data.
In this embodiment, the first test terminal may synchronously send the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal; therefore, the second test terminal can update the time of the second test terminal according to the time release node corresponding to the received at least one first test sequence, and test the second processor according to the updated time and the received at least one first test sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
Fig. 7 is a schematic structural diagram of an electronic device according to an exemplary embodiment of the present application, and as shown in fig. 7, the electronic device includes: a memory 701 and a processor 702.
A memory 701 for storing a computer program and may be configured to store other various data to support operations on the terminal device. Examples of such data include instructions for any application or method operating on the terminal device, contact data, phonebook data, messages, pictures, videos, etc.
The memory 701 may be implemented by any type or combination of volatile and non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.
In some embodiments, a processor 702, coupled to the memory 701, is configured to execute the computer program in the memory 701 to: determining at least one first test sequence adopted for testing a first processor in a vehicle-mounted domain controller; and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to the first processor and the second test terminal, so that the second test terminal updates the time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
Further optionally, the first test terminal and the second test terminal run different operating systems; the operating system run by the first test terminal is adapted to the first processor, and the operating system run by the second test terminal is adapted to the second processor.
Further optionally, the processor 702, after sending at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, is further configured to: and receiving first state data returned by the first processor, and synchronizing the first state data to the second test terminal.
Further optionally, when the processor 702 sends at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, the processor is specifically configured to: and synchronously sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to the first processor and the second test terminal through at least one of TCP, UDP and a specified serial port protocol.
In other embodiments, the processor 702, coupled to the memory 701, is configured to execute the computer program in the memory 701 to: receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller; updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence; and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
Further optionally, when the processor 702 tests the second processor according to the updated time and the received at least one first test sequence, it is specifically configured to: and converting the at least one first test sequence to obtain at least one second test sequence adaptive to an operating system running on a second test terminal, and sending the at least one second test sequence to the second processor.
Further optionally, the processor 702, after testing a second processor of a different type than the first processor in the onboard controller, is further configured to: and converting the received first state data to obtain second state data adaptive to an operating system running on a second test terminal, and outputting the second state data.
The memory of FIG. 7 described above may be implemented by any type or combination of volatile or non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
The display 703 in fig. 7 described above includes a screen, which may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation.
Further, as shown in fig. 7, the electronic device further includes: communication components 704 and power components 705 among other components. Only some of the components are schematically shown in fig. 7, and the electronic device is not meant to include only the components shown in fig. 7.
The communications component 704 of fig. 7 described above is configured to facilitate communications between the device in which the communications component resides and other devices in a wired or wireless manner. The device in which the communication component is located may access a wireless network based on a communication standard, such as WiFi, 2G, 3G, 4G, or 5G, or a combination thereof. In an exemplary embodiment, the communication component receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component may be implemented based on Near Field Communication (NFC) technology, Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
The power supply 705 provides power to various components of the device in which the power supply is located. The power components may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device in which the power component is located.
In this embodiment, the first test terminal may synchronously send the at least one first test sequence and the time distribution node corresponding to the at least one first test sequence to the first processor and the second test terminal; the second testing terminal can update the time of the second testing terminal according to the time release node corresponding to the received at least one first testing sequence, and test the second processor according to the updated time and the received at least one first testing sequence. By the implementation mode, the time release node and the test sequence can be synchronized between the first test terminal and the second test terminal, so that the first test terminal and the second test terminal can synchronously test the vehicle-mounted domain controller, and the time precision of the test result is improved.
Accordingly, embodiments of the present application further provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to implement the steps in the test synchronization method.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement or the like made within the spirit and principle of the present application shall be included in the scope of the claims of the present application.

Claims (11)

1. A test synchronization method is applied to a vehicle-mounted domain controller and is characterized by comprising the following steps:
the method comprises the steps that a first test terminal determines at least one first test sequence adopted for testing a first processor in the vehicle-mounted domain controller;
and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to a first processor and a second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
2. The method of claim 1, wherein the first test terminal and the second test terminal run different operating systems; the operating system operated by the first test terminal is adapted to the first processor, and the operating system operated by the second test terminal is adapted to the second processor.
3. The method of claim 1, wherein after sending at least one first test sequence and a time distribution node corresponding to each of the at least one first test sequence to the first processor and a second test terminal having a different operating system from the first test terminal, further comprising:
and receiving first state data returned by the first processor, and synchronizing the first state data to the second test terminal.
4. A method according to any of claims 1-3, wherein sending at least one first test sequence and the time distribution nodes to which the at least one first test sequence each corresponds to the first processor and a second test terminal having a different operating system than the first test terminal comprises:
and synchronously sending the at least one first test sequence and the time release node corresponding to the at least one first test sequence to the first processor and the second test terminal through at least one of TCP, UDP and a specified serial port protocol.
5. A test synchronization method is applied to a vehicle-mounted domain controller and is characterized by comprising the following steps:
receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller;
updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence;
and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
6. The method of claim 5, wherein testing the second processor according to the received at least one first test sequence comprises:
converting the at least one first test sequence to obtain at least one second test sequence adaptive to an operating system running on the second test terminal;
sending the at least one second test sequence to the second processor.
7. The method of claim 5 or 6, further comprising, after testing a second processor of a different type than the first processor in the on-board controller:
receiving first state data sent by the first test terminal and returned by the first processor;
and converting the received first state data to obtain second state data adaptive to an operating system running on the second test terminal, and outputting the second state data.
8. A test synchronization apparatus for testing an in-vehicle domain controller, the apparatus comprising:
a determination module to: determining at least one first test sequence adopted for testing a first processor in the vehicle-mounted domain controller;
a test module to: and sending at least one first test sequence and a time release node corresponding to the at least one first test sequence to a first processor and a second test terminal, so that the second test terminal updates time according to the time release node and tests a second processor, which is different from the first processor, in the vehicle-mounted domain controller according to the updated time and the received at least one first test sequence.
9. A test synchronization apparatus for testing an in-vehicle domain controller, the apparatus comprising:
a receiving module to: receiving at least one first test sequence sent by a first test terminal and a time release node corresponding to the at least one first test sequence; the at least one first test sequence is used for testing a first processor in the vehicle-mounted domain controller;
an update module to: updating the time of the second test terminal according to the time release node corresponding to the at least one first test sequence;
a test module to: and testing a second processor of the vehicle-mounted controller, which is different from the first processor in type, according to the updated time and the received at least one first test sequence.
10. An electronic device, comprising: a memory and a processor;
wherein the memory is to: storing one or more computer instructions;
the processor is to execute the one or more computer instructions to: performing the steps of the method of any one of claims 1-7.
11. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, causes the processor to carry out the steps of the method according to any one of claims 1 to 7.
CN202111537596.5A 2021-12-15 2021-12-15 Test synchronization method, device, equipment and storage medium Pending CN114490199A (en)

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