CN114465486A

CN114465486A - Switching power supply and control method thereof

Info

Publication number: CN114465486A
Application number: CN202210074721.1A
Authority: CN
Inventors: 王旷; 刘文亮; 李海松
Original assignee: Shenzhen Xinpeng Electronics Co ltd
Current assignee: Shenzhen Xinpeng Electronics Co ltd
Priority date: 2022-01-21
Filing date: 2022-01-21
Publication date: 2022-05-10

Abstract

A switching power supply and a control method thereof. The switching power supply includes: the circuit comprises a transformer, a first switch circuit, a second switch circuit, a third switch circuit, a fourth switch circuit and a clamping capacitor; the primary side controller includes: a first switch control signal output end, a second switch control signal output end, a third switch control signal output end, a fourth switch control signal output end, an input voltage detection port and a zero voltage detection port; the primary side controller is suitable for controlling the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit based on the detection values of the input voltage detection port and the zero voltage detection port to realize zero voltage switching-on. By adopting the scheme, the power density of the switching power supply can be improved.

Description

Switching power supply and control method thereof

Technical Field

The invention relates to the technical field of switching power supplies, in particular to a switching power supply and a control method thereof.

Background

In order to improve the power density of a switching power supply, especially the popularization of a high-power mobile phone quick charger, a flyback converter based on quasi-resonance control is widely concerned in the industry.

The core components of the flyback converter include: the transformer, the main switch on the primary side of the transformer, and the diode and the capacitor on the secondary side of the transformer. And a high-frequency square wave signal is generated at two ends of the primary coil of the transformer by closing and conducting the main switch. The transformer transmits the generated square wave signal to the secondary coil in a magnetic field induction mode, and the signal received by the secondary coil is subjected to filtering and rectifying effects of a diode and a capacitor to obtain stable direct current output at an output end.

However, the switching frequency of the conventional switching power supply is still difficult to meet the requirement, and the power density of the switching power supply is affected.

Disclosure of Invention

The invention aims to solve the problems that: how to increase the power density of a switching power supply.

To solve the above problem, an embodiment of the present invention provides a switching power supply, including: a flyback converter and a primary side controller; wherein the flyback converter includes: the circuit comprises a transformer, a first switch circuit, a second switch circuit, a third switch circuit, a fourth switch circuit and a clamping capacitor; the primary side controller includes: a first switch control signal output terminal, a second switch control signal output terminal, a third switch control signal output terminal, a fourth switch control signal output terminal, an input voltage detection port and a zero voltage detection port;

the first end of the first switch circuit is connected with the direct current input voltage output end; the second end of the first switch circuit is connected with the transformer and the input voltage detection port of the primary side controller; the control end of the first switch circuit is connected with the first switch control signal output end;

the first end of the second switching circuit is connected with the second end of the first switching circuit and the input voltage detection port of the primary side controller; the second end of the second switch circuit is connected with the second end of the fourth switch circuit and the ground wire; the control end of the second switch circuit is connected with the second switch control signal output end;

the first end of the third switch circuit is connected with the second end of the first switch circuit and the input voltage detection port of the primary side controller; a second terminal of the third control circuit is connected with a first terminal of the fourth switching circuit; the control end of the third control circuit is connected with the third switch control signal output end; the third switching circuit is connected with the transformer through the clamping capacitor;

the first end of the fourth switching circuit is connected with the zero voltage detection port of the transformer and the primary side controller; the second end of the fourth switching circuit is connected with the current sampling port of the primary side controller; the control end of the fourth switch circuit is connected with the fourth switch control signal output end;

the primary side controller is suitable for controlling the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit based on the detection values of the input voltage detection port and the zero voltage detection port to realize zero voltage switching-on.

The embodiment of the invention also provides a control method of the flyback converter, which comprises the following steps:

when the second switch circuit is switched off, the first switch circuit is controlled to be switched on at zero voltage;

when the first switch circuit is switched off and the second switch circuit meets a zero-voltage switching-on condition, controlling the second switch circuit to carry out zero-voltage switching-on;

after the fourth switching circuit is switched off and the third switching circuit meets the zero-voltage switching-on condition, controlling the third switching circuit to carry out zero-voltage switching-on;

and after the third switch circuit is switched off and the fourth switch circuit meets the zero-voltage switching-on condition, controlling the fourth switch circuit to carry out zero-voltage switching-on.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:

by applying the scheme of the invention, the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit can realize zero voltage switching-on under the control of the primary side controller, so that the switching loss of the flyback converter can be reduced, the switching frequency of the switching power supply is improved, and the power density of the switching power supply is improved.

Drawings

Fig. 1 is a schematic circuit diagram of a switching power supply;

FIG. 2 is a schematic diagram showing the timing relationship between the drain voltage, the gate voltage and the primary current of the main switch under heavy and light load conditions;

fig. 3 is a schematic diagram of a switching power supply circuit of a flyback converter including secondary-side feedback according to an embodiment of the present invention;

fig. 4 is a schematic diagram of another switching power supply circuit of the flyback converter with secondary-side feedback according to the embodiment of the present invention;

fig. 5 is a schematic diagram of a switching power supply circuit of a flyback converter with secondary-side feedback according to another embodiment of the present invention;

FIG. 6 is a schematic diagram showing a timing relationship between signals of the switching power supply in the discontinuous mode according to an embodiment of the present invention;

FIG. 7 is a timing diagram of signals of the switching power supply in the critical mode according to an embodiment of the present invention;

fig. 8 is a schematic diagram of a switching power supply circuit of a flyback converter including primary-side feedback according to an embodiment of the present invention;

fig. 9 is a schematic diagram of a circuit configuration of a switching power supply including a primary side controller with secondary side feedback according to an embodiment of the present invention;

fig. 10 is a schematic diagram of another switching power supply circuit including a primary side feedback primary side controller according to an embodiment of the present invention.

Detailed Description

A switching power supply typically includes a flyback converter and a primary side controller. In the existing switching power supply, a main switch for controlling the operation of a transformer is a hard switch, and the switching loss of the hard switch is large, so that the switching loss of a flyback converter is large. In addition to the turn-on loss of the main switch, the RCD snubber circuit in the flyback converter also increases the switching loss of the flyback converter. The following description is made in conjunction with a specific switching power supply configuration:

fig. 1 is a schematic circuit diagram of a switching power supply. Referring to fig. 1, the switching power supply may include: the transformer, the primary side control circuit, the rectification voltage stabilizing circuit and the RCD absorption circuit which are positioned on the primary side of the transformer, and the secondary side control circuit and the rectification filter circuit which are positioned on the secondary side of the transformer.

The actual transformer can be in the circuitEquivalent to an ideal transformer T1 and leakage inductance L_sAnd excitation inductance L_m. Wherein, the leakage inductance L_sMeans that: when the magnetic flux generated by the primary winding Np of the actual transformer is not transferred to the secondary winding Ns to generate magnetic flux leakage, the inductance is formed. Excitation inductance L_mMeans that: the primary inductance of the ideal transformer T, that is, the inductance formed by the portion where the magnetic lines of force generated by the primary winding Np of the actual transformer are transferred to the secondary winding Ns. The turn ratio of the primary coil Np to the secondary coil Ns is n: 1.

the primary side control circuit may include: a primary side controller 11 and a main switch Q. The primary controller 11 has a GATE port, a CS port, a FB port, and a QR port. The GATE port of the primary side controller 11 is connected to the GATE of the main switch Q. The CS port of the primary side controller 11 is connected to the source terminal of the main switch Q. And the FB port of the primary side controller 11 is connected with a light receiving optocoupler 12. The light receiving optical coupler 12 is used for receiving an optical signal generated by a light emitting optical coupler 13 in the secondary side control circuit. The FB port of the primary side controller 11 receives an optical signal based on the optical receiving optocoupler 12, and can further know that the diode D is connected₁Rectified voltage (i.e., the output voltage of the transformer) and load information. QR port of primary side controller 11 passes through resistance R₁Connected to auxiliary winding Na, resistor R₁Another terminal of (1) and a resistor R₂And (4) connecting. The auxiliary coil Na can induce the voltage V at one end of the transformer connected with the main switch Q_swA change in (c). The main switch Q may be equivalent in circuit to: a full-control switch, a body diode and a junction capacitor C_ds。

A primary side controller 11 based on the source end voltage of the main switch Q and the output voltage V of the flyback converter_oVoltage V at one end connected to main switch Q in combination with transformer_swControls the output voltage of the GATE port, thereby controlling the main switch Q to be turned off or on.

In fig. 1, the rectifying voltage regulator circuit includes: AC rectifier 14 and voltage-stabilizing capacitor C_BULK。

When the main switch Q is switched on, the commercial power voltage VAC passes through the AC rectifier 14 to obtain a direct current input voltage V_INConnecting the primary winding of the transformer toThe current in the primary winding Np of the transformer and the magnetic field in the magnetic core of the transformer are increased, and energy is stored in the magnetic core. At this time, the voltage generated in the secondary coil Ns is reversed, so that the diode D₁Is in reverse bias state and cannot be conducted, and is composed of a capacitor C₀To a load R_LSupply voltage V_oAnd current I_d。

The primary current I in the primary winding Np after the main switch Q is switched off_pAt the same time, the magnetic field in the transformer core starts to fall, and a forward voltage is induced in the secondary winding Ns. At this time, the diode D₁In a forward biased state, a conducting current I_dFlowing into the capacitor C_oAnd a load R_L. The energy stored in the transformer core is transferred to a capacitor C_oAnd a load R_LIn (1).

The secondary side control circuit may include a secondary side controller 15 and a light emitting optocoupler 13. The secondary side controller 15 has a VDD port, an OPTO port, and a CS port. VDD port and capacitor C of the secondary side controller 15_oLoad R of_LConnected for obtaining the output voltage V of the flyback converter_oThe CS port of the secondary side controller 15 is used for controlling the current flowing through the resistor R_CSIs sampled. The OPTO port of the secondary side controller 15 is connected with a diode D through a light-emitting optocoupler 13₁Is connected to the cathode. The secondary side controller 15 may be based on a diode D₁And the light-emitting optocoupler 13 is controlled to generate a corresponding light signal so as to transmit the cathode voltage of the diode D1 to the light-receiving optocoupler 12.

The RCD absorption circuit has a resistor R_CCapacitor C_CAnd a diode D₂Composition for absorbing leakage inductance L of transformer_sThe spike voltage generated when the main switch Q is turned off.

The left side of fig. 2 shows a heavy load (i.e. load R)_LResistance value is small), the drain terminal voltage V of the main switch Q_swGATE voltage GATE and primary current I_pThe timing relationship between them is shown schematically. The right side of fig. 2 shows a light load (i.e., load R)_LLarge resistance) of the main switch Q, the voltage V at the drain terminal of the main switch Q_swGATE voltage GATE and primary current I_pTime sequence ofAnd (5) a relationship schematic diagram.

Referring to fig. 2, in order to reduce the turn-on loss of the main switch Q, before the main switch Q is turned on, the drain terminal voltage V of the main switch Q needs to be selected through the QR port of the primary side controller 11_swResonating to open at the valley bottom. At this time, the drain voltage V of the main switch Q_swMinimum, on-loss P of main switch Q_{sw_on}As shown in the following formula:

wherein f is_sRepresenting the switching frequency of the main switch Q.

Meanwhile, the loss of the RCD absorption circuit is:

wherein, I_pmaxRepresenting the maximum value of the primary current, V_cmaxDrain terminal voltage V of main switch Q_swAnd a DC input voltage V_INThe difference between them.

Conduction loss P of main switch Q_{sw_on}And the RCD absorption circuit loss, which are used as the switching loss of the flyback converter. From the equations (1) and (2), when the DC input voltage V of the flyback converter is obtained_INThe higher the switching loss of the flyback converter.

Therefore, at present, in order to avoid an excessive switching loss of the flyback converter, the flyback converter dc input voltage V_INIt is usually necessary to be limited so that the maximum switching frequency of the main switch Q is typically limited to within 300 kHz.

In view of the above problem, the present invention provides a switching power supply, wherein a flyback converter of the switching power supply is provided with a first switching circuit, a second switching circuit, a third switching circuit and a fourth switching circuit, the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit can realize zero voltage switching-on under the control of the primary side controller, namely, the full soft switching circuit structure of four switching circuits is adopted to replace the existing flyback converter realized by hard switches, on one hand, the switching loss of the switching circuit can be reduced, and the switching frequency of the switching power supply can be improved, thereby improving the power density of the switching power supply, on the other hand, when the four switching circuits are realized by adopting the gallium nitride devices, the influence of the change rate of the hard switching voltage on the grid reliability of the gallium nitride devices can be thoroughly avoided by adopting a full soft switching scheme.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

The embodiment of the invention provides a switching power supply. The switching power supply comprises a flyback converter and a primary side controller. Wherein the flyback converter includes: the circuit comprises a transformer, a first switch circuit, a second switch circuit, a third switch circuit, a fourth switch circuit and a clamping capacitor. The primary side controller includes: the first switch control signal output end, the second switch control signal output end, the third switch control signal output end, the fourth switch control signal output end, the input voltage detection port and the zero voltage detection port.

the first end of the third switch circuit is connected with the second end of the first switch circuit and the input voltage detection port of the primary side controller; a second end of the third control circuit is connected with a first end of the fourth switch circuit; the control end of the third control circuit is connected with the third switch control signal output end; the third switching circuit is connected with the transformer through the clamping capacitor;

In a specific implementation, the zero voltage turning on means that when the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit are turned on, a voltage difference between two ends of the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit falls within a low voltage range. Normally, the low voltage range is a voltage of less than 1V, which is close to 0V, and each switching circuit is controlled to be turned on in the low voltage range, that is, zero voltage turn-on (ZVS). For example, it may be 0.3V or 0.7V, etc., and may fluctuate slightly depending on the current flowing through the switching circuit. The turn-on loss of each switching circuit turned on in a low voltage range is close to 0.

The first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit can be controlled by the primary side controller to realize the switching-on in a low voltage range, so the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit are soft switches. While soft switching can mitigate abrupt changes in instantaneous voltage or current as the switch turns on or off. Meanwhile, the soft switch can ensure that the switching frequency of the switching power supply is not limited by the switching loss of the switching circuit any more, so that the switching frequency of the switching power supply can still be improved. And the increase of the switching frequency can obviously reduce the volumes of passive devices such as a transformer, a capacitor and the like and improve the power density of the switching power supply.

In an embodiment of the invention, at least one of the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit may be implemented by a MOS transistor or a GaN device. For example, the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit may all be implemented by MOS transistors. For another example, the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit may all be implemented by using GaN devices. For another example, part of the switch circuit is implemented by MOS transistors, and the rest of the switch circuit is implemented by GaN devices.

In specific implementation, the MOS transistor may be an NMOS transistor or a PMOS transistor, and it can be understood that either the NMOS transistor or the PMOS transistor can be used as a switching transistor. By adopting the MOS tube as the switching circuit, higher switching frequency limit, lower switching loss, lower conduction loss and the like can be obtained.

Of course, in specific implementations, other switching devices may be used, and are not limited in particular.

In an embodiment of the invention, one end of the clamping capacitor is connected to the second end of the third switch circuit, and the other end of the clamping capacitor is connected to the first end of the fourth switch circuit.

In another embodiment of the present invention, one end of the clamping capacitor is connected to the first end of the third switch circuit, and the other end is connected to the second end of the first switch circuit.

The clamping capacitor is used as an element for storing and recycling leakage inductance current of the transformer, leakage inductance resonance ringing can be eliminated, stress of a switching device is reduced, energy loss is reduced, and conversion efficiency is improved.

In a specific implementation, the input voltage detection port of the primary side controller is adapted to detect the input voltage of the transformer. And the zero voltage detection port of the primary side controller is suitable for detecting the voltage of the same-name end of the primary side coil of the transformer.

In an embodiment of the present invention, the flyback converter may further include: the current samples the resistance. The primary side controller may further include: a current sampling port. And the second end of the second switching circuit is connected with the current sampling port of the primary side controller and the second end of the fourth switching circuit through a current sampling resistor. Of course, in some embodiments, the current sampling resistor may not be provided, so that the second switch circuit and the fourth switch circuit are directly connected. The current sampling resistor is used as a primary side current detection element of the transformer, so that peak current control of the switching power supply is realized, and overcurrent protection of primary side current can be realized.

In some embodiments, the primary side controller may further comprise: and the output voltage feedback port is used for feeding back the output voltage and the load information of the transformer.

In specific implementation, the flyback converter may be a flyback converter structure with secondary-side feedback, or a flyback converter structure with primary-side feedback. The flyback converter structure with secondary side feedback is characterized in that the secondary side of the transformer feeds back the output voltage of the transformer to the primary side of the transformer through an optical coupler. The flyback converter structure with primary side feedback is characterized in that a primary side controller of a transformer automatically detects the output voltage of the transformer, and an optocoupler is not needed to be arranged on the secondary side of the transformer.

Taking the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit as NMOS transistors as an example, the flyback converter structure with secondary side feedback and the flyback converter structure with primary side feedback are described in detail below:

in an embodiment of the present invention, the flyback converter may be a flyback converter structure with secondary-side feedback.

For example, referring to fig. 3, the first switching circuit in the flyback converter adopts the first NMOS transistor Q₁The second switch circuit adopts a second NMOS tube Q₂The third switch circuit adopts a third NMOS tube Q₃The fourth NMOS tube adopts a fourth NMOS tube Q₄And (5) realizing. In this case, the first terminal of the switch circuit may be a drain terminal of the NMOS transistor. The second end of the switch circuit may also be a source end of the NMOS transistor. The control end of the switch circuit can be the grid end of the NMOS tube.

Wherein, the NMOS transistor can be equivalent to: a full-control switch, a body diode and a junction capacitor. First NMOS transistor Q₁Has a junction capacitance of C₁Second NMOS transistor Q₂Has a junction capacitance of C₂Third NMOS transistor Q₃Has a junction capacitance of C₃Fourth NMOS transistor Q₄Has a junction capacitance of C₄。

And controlling the NMOS tube to realize zero voltage switching-on, namely controlling the voltage drop from the drain end to the source end of the NMOS tube to be smaller than the switching-on voltage of a body diode in the NMOS tube. The voltage drop from the drain end to the source end of the NMOS tube is smaller than the breakover voltage of the body diode in the NMOS tube, so that the body diode in the NMOS tube is cut off, the current flows through the full-control switch, the NMOS tube is in a turn-on state, and the turn-on loss of the NMOS tube is very small at the moment.

The primary side controller U1 includes: a first switch control signal output terminal, a second switch control signal output terminal, a third switch control signal output terminal, a fourth switch control signal output terminal, a zero voltage detection port V_BAnd an input voltage detection port V_A. Wherein the first switch control signal output terminal outputs a first switch control signal GT 1. The second switch control signal output terminal outputs a second switch control signal GT 2. The third switch control signal output terminal outputs a third switch control signal GT 3. The fourth switch control signal output terminal outputs a fourth switch control signal GT 4.

The primary side controller U1 may further be provided with a current sampling port CS, the current sampling port CS of the primary side controller U1, a fourth switching circuit and a current sampling resistor R_CSIs connected so that the voltage V at the second end of the fourth switch circuit can be obtained_CS。

In a specific implementation, the equivalent circuit of the transformer comprises: transformer T1, leakage inductance L_sAnd excitation inductance L_m. The transformer referred to in the embodiments of the present invention is a transformer T1. The turn ratio of the primary coil and the secondary coil of the transformer T1 is n:1, and the refraction voltage of the output voltage of the transformer T1 is n x V_o。

In the embodiment shown in fig. 3, the third NMOS transistor Q₃By means of a clamping capacitor C_cAnd a first NMOS transistor Q₁And (4) connecting. In other embodiments, referring to FIG. 4, the third NMOS transistor Q₃Also can be used forDirectly connected with the first NMOS tube Q₁And (4) connecting. At this time, the clamp capacitor C_cAnd a third NMOS transistor Q₃Series, clamping capacitor C_cAnd the other end thereof is connected to a transformer T1. Regardless of the clamping capacitance C_cHow to connect specifically is to be able to connect the excitation inductance L_mThe voltage of (2) may be clamped.

With continued reference to FIG. 3, the first NMOS transistor Q₁Is connected with the DC input voltage output end and is suitable for being connected with the DC input voltage V_INThe source end is connected with the leakage inductor Ls, and the gate end is connected with a first switch control signal GT 1.

Second NMOS transistor Q₂The drain terminal of the current sampling resistor is connected with the leakage inductor Ls, and the source terminal of the current sampling resistor R_CSAnd a ground connection, the control terminal being adapted to receive a second switch control signal GT 2. In the absence of current sampling resistor R_CSWhile the second NMOS transistor Q₂The source terminal of (2) can be directly connected with the fourth switch circuit Q₄Is connected.

Third NMOS transistor Q₃The drain terminal of the capacitor is clamped by a clamping capacitor C_cConnected with leakage inductor Ls, source end and excitation inductor L_mAnd a fourth NMOS transistor Q₄Is connected and the control terminal is adapted to be switched in the third switch control signal GT 3.

Fourth NMOS transistor Q₄Drain terminal and excitation inductance L_mConnected, source end and current sampling resistor R_CSConnected, the control terminal is adapted to be switched in the fourth switch control signal GT 4.

In a specific implementation, for a flyback converter structure with secondary-side feedback, the flyback converter usually further includes a secondary-side control circuit and a rectifying filter circuit located on the secondary side of the transformer; the rectification filter circuit is connected with the transformer T1, and the secondary side control circuit is connected with the rectification filter circuit. Of course, in some embodiments, the rectifying and filtering circuit may not be provided, and the output voltage of the converter may be directly output to the load R_LThe above.

In an embodiment of the present invention, referring to fig. 3, the rectifying and filtering circuit may include: rectifier diode D₁And a filter capacitor C_o. Rectifier diode D₁Can be arranged atThe dotted terminal of the secondary winding of transformer T1. Filter capacitor C_oOne end of which is connected to the dotted end of the secondary winding of transformer T1 and the other end of which is connected to the dotted end of the secondary winding of transformer T1. The rectifying and filtering circuit can rectify and filter the output signal of the transformer T1 and then output the rectified and filtered output signal to the load RL.

In an embodiment of the invention, to further increase the switching frequency of the flyback converter, the primary side controller may control the rectifier diode D₁Zero current turn-off can be achieved. So-called turn-off in the low current range, i.e. through the rectifier diode D₁Secondary side current I of_dThe low current range is satisfied. The low current range is close to 0, and a rectifier diode D is controlled₁Cut off in a low current range to realize a rectifier diode D₁The zero current turn-off (ZCS) of the switching element can reduce energy loss, i.e., switching loss, and large dv/dt and di/dt, i.e., stress of the switching device, within the diode recovery time, thereby further increasing the switching frequency of the flyback converter.

In a specific implementation, the primary side controller U1 can control the second NMOS transistor Q₂And a third NMOS transistor Q₃To control the secondary side current I_dSo that the current I is at the secondary side_dIn the low current range, the rectifier diode D₁The internal PN junction is cut off by the reverse voltage, thereby causing the rectifying diode D₁And (6) turning off.

In an embodiment of the present invention, referring to fig. 5, the rectifying and filtering circuit may include: synchronous rectifier tube M₁And a filter capacitor C_o. Synchronous rectifier tube M₁May be provided at the synonym terminal of the secondary winding of the transformer T1. Filter capacitor C_oOne end of which is connected to the dotted end of the secondary winding of transformer T1 and the other end of which is connected to the dotted end of the secondary winding of transformer T1. The rectification filter circuit can rectify and filter the output signal of the transformer T1 and then output the rectified and filtered output signal to the load R_LThe above.

In specific implementation, the synchronous rectifier tube M₁The NMOS transistor has a drain terminal connected with the transformer T1 and a source terminal connected with the filter capacitor C_oAnd the grid end is connected with a secondary side controller U2. At this time, the secondary side controller U2 may set the driving port DRV, and the secondary side controller U2 may control the synchronous rectifier M by controlling the output voltage of the driving port DRV₁Whether it is on or not, thereby facilitating the driving of the synchronous rectifier M₁Therefore, the work of the rectifying and filtering circuit is convenient to control.

In an embodiment of the invention, in order to further improve the conversion efficiency of the flyback converter, the rectification filter circuit may also use a secondary side controller to control the synchronous rectifier tube M₁A switch.

In a specific implementation, the secondary side control circuit may include a secondary side controller U2 and a light emitting optocoupler 11. The secondary side controller U2 has a VDD port, an OPTO port, and a CS port. VDD port and capacitor C of secondary side controller U2_oLoad R of_LConnected for obtaining the output voltage V of the flyback converter_oThe CS port of the secondary side controller 15 is used for controlling the current flowing through the resistor R_sIs sampled. The OPTO port of the secondary side controller 15 is connected to the cathode of the diode D1 via a light emitting optocoupler 13.

In specific implementation, the zero voltage detection port V of the primary side controller U1_BIs suitable for detecting the voltage of the connection end of the transformer T1 and the fourth switch circuit, namely a fourth NMOS tube Q₄The source terminal voltage of (1). An output voltage feedback port FB of the primary side controller U1 is connected to a ground line through a light receiving optocoupler 12, and is adapted to feed back the output voltage of the transformer T1. Input voltage detection port V of primary side controller U1_AConnected to the second terminal of the first switching circuit, i.e. a first NMOS transistor Q₁Adapted to detect the input voltage V of said transformer T1_IN。

For convenience of description, the zero voltage is detected at the port V_BThe detected voltage is denoted as V_BInput voltage detection port V_AThe detected voltage is denoted as V_A。V_BIs also the voltage of the same name end of the primary coil of the transformer T1, or is the voltage of the fourth NMOS tube Q₄The drain terminal voltage of. V_AIs also the first NMOS transistor Q₁Is also the first NMOS transistor Q₂The drain terminal voltage of.

The secondary side controller U2 may be based on a rectifier diode D₁Controls the luminescence optocoupler 11 to generate a corresponding light signal to rectify the light signal from the rectifying diode D₁Is transmitted to the light harvesting optocoupler 12. Port V is detected based on zero voltage to former limit controller U1_BAn output voltage feedback port FB and an input voltage detection port V_AAnd a voltage value input from the current sampling port CS, generating a first switch control signal GT1 through a fourth switch control signal GT 4.

In a specific implementation, the rectifying and voltage stabilizing circuit comprises: AC rectifier 14 and voltage-stabilizing capacitor C_BULK. After the commercial power voltage VAC passes through the AC rectifier 14, the obtained direct current input voltage V_IN。

In a specific implementation, the primary side controller U1 may adopt various structures and control methods to implement zero voltage turn-on of the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit, which is not limited specifically.

In an embodiment of the present invention, there is provided a method for controlling a switching power supply, the method including: when the second switch circuit is switched off and the first switch circuit meets a zero-voltage switching-on condition, controlling the first switch circuit to be switched on; when the first switch circuit is turned off and the second switch circuit meets a zero-voltage turn-on condition, controlling the second switch circuit to be turned on; after the fourth switching circuit is switched off and the third switching circuit meets the zero-voltage switching-on condition, controlling the third switching circuit to be switched on; and after the third switch circuit is switched off and the fourth switch circuit meets the zero-voltage switching-on condition, controlling the fourth switch circuit to be switched on.

In an embodiment of the invention, when the second switch circuit and the third switch circuit are both turned on and the first switch circuit and the fourth switch circuit are turned off, the negative current value generated by the excitation inductor is determined based on the input voltage of the flyback converter or the output voltage of the flyback converter.

Referring to fig. 3, taking the NMOS transistor to implement each switching circuit as an example, the input voltage V of the flyback converter_INWhen larger, the first NMOS transistor Q₁The zero voltage is larger in energy required for switching on, so that the first NMOS tube Q is realized₁The negative current required by zero voltage switch-on is larger, and at the moment, the excitation inductance L can be increased_mThe negative current value is generated, thereby raising V_AVoltage value of (2) to ensure the first NMOS transistor Q₁The zero voltage turns on.

Similarly, the flyback converter outputs a voltage V_oWhen smaller, the voltage V of the same name terminal of the primary coil of the transformer T1_BCan supply the first NMOS transistor Q₁The energy for realizing zero voltage turn-on is small, so that the first NMOS tube Q₁The negative current required by zero voltage switch-on is larger, and at the moment, the excitation inductance L can be increased_mThe generated negative current value can also raise V_AVoltage value of (2) to ensure the first NMOS transistor Q₁The zero voltage turns on.

In an embodiment of the invention, after the first switch circuit and the third switch circuit are turned off, the primary side controller may control the second switch circuit and the fourth switch circuit to be turned on until the first switch circuit is turned on.

When each switching circuit is realized by adopting an NMOS tube, the turn-on condition and the turn-off condition of each NMOS tube are shown in table 1:

TABLE 1

In the embodiment of the invention, the first NMOS tube Q₁And a fourth NMOS transistor Q₄The main power tube has the functions of determining whether the transformer is in an excitation or demagnetization stage and controlling energy storage or transmission. And a second NMOS transistor Q₂And a third NMOS transistor Q₃As a clamping tube, can be used for the excitation inductor L_mThe voltage across the terminals is clamped.

Based on first NMOS pipe Q₁At initial operation, corresponding to primary side inductance current I_magOf size of (A) canSo as to divide the working mode of the flyback converter into a critical mode and an intermittent mode. Wherein, the first NMOS transistor Q₁During initial operation, when the primary side inductance current I_magIf < 0, the first NMOS transistor Q1 is not immediately conducted after reaching the set negative value, the flyback converter works in the discontinuous mode, and if the primary side inductive current I_magIf the current reaches the set negative value, the first NMOS transistor Q1 is immediately turned on, and the flyback converter operates in the critical mode. Whether discontinuous or critical mode, I_mag<0 is a necessary condition for realizing ZVS by Q1, and the duration is the main factor of the discrimination mode.

Fig. 6 and 7 are schematic timing diagrams of signals in fig. 3. Fig. 6 is a schematic diagram of a timing relationship of signals of the flyback converter in the discontinuous mode. Fig. 7 is a schematic diagram illustrating a timing relationship of signals of the flyback converter in the critical mode. Referring to fig. 3, 6 and 7, the control process of the primary side controller U1 will be described in detail:

1) the first NMOS transistor Q from time t0 to time t1₁When the voltage drop between the drain terminal and the source terminal meets the zero voltage opening condition, the first NMOS transistor Q₁Zero voltage turn-on, fourth NMOS transistor Q₄If the voltage drop between the drain terminal and the source terminal meets the zero voltage turn-on condition, the fourth NMOS tube Q₄Conducting the second NMOS transistor Q₂And a third NMOS transistor Q₃Off, V_A＝V_INPrimary side inductive current I of transformer T1 excitation_magLinearly rising up to a peak. The secondary side rectifying diode D1 is turned off.

2) time t1 to time t 2: first NMOS transistor Q₁And a second NMOS transistor Q₂And a third NMOS transistor Q₃And a fourth NMOS transistor Q₄All turn-off, primary side inductor current I_magFor the first NMOS tube Q₁Junction capacitance C₁And a second NMOS transistor Q₂Junction capacitor C2 and fourth NMOS transistor Q₄The junction capacitor C4 is charged and discharged, and the first NMOS transistor Q₁Source terminal voltage V_ADown to about 0V to form a second NMOS transistor Q₂Zero voltage turn-on ready condition. Dotted terminal voltage V of primary coil of transformer T1_BUp to n x V_oIs a third NMOS transistor Q₃The zero voltage turns on the ready condition.At this time, the secondary side rectifier diode D₁And (6) cutting off.

3) the second NMOS transistor Q from time t2 to time t3₂And a third NMOS transistor Q₃The voltage drop between the drain terminal and the source terminal meets the zero voltage turn-on condition, and the second NMOS tube Q₂And a third NMOS transistor Q₃Zero voltage turn-on, excitation inductance L_mClamped at-n x V_o. At this time, the transformer T1 begins to demagnetize, and the primary side inductor current I_magLinearly decreasing, but with a secondary current I_dGreater than 0, and secondary side rectifier diode D₁And conducting.

4) time t3 to time t 4: the transformer T1 is demagnetized at time T3, and the secondary side current I _d0, rectifier diode D₁Zero current is turned off. At this time, the third NMOS transistor Q₃Conducting, clamping capacitor C_cVoltage Vc pair L at two ends_mReverse excitation produces a negative current Izvs 1.

Let Tzvs1 be t4-t3, and Tzvs1 be controlled by a primary side controller U1 according to an input voltage V_INAnd an output voltage V_oSelf-adaptive generation to realize the first NMOS transistor Q₁The zero voltage of (2) turns on. For example, when the input voltage V is_INGreater or output voltage V_oWhen the current is low, Tzvs1 is increased, so that the absolute value of negative current Izvs1 can be increased, and the first NMOS transistor Q is driven to be raised₁Source terminal voltage V_AValue, guarantee first NMOS transistor Q₁It can be turned on at zero voltage.

5) time t4 to time t 5: third NMOS transistor Q₃After being shut down, the fourth NMOS tube Q₄Junction capacitance C₄The energy in the second NMOS tube Q₂To excitation inductance L_mAnd (5) transferring. Let Tzvs2 be t5-t4, primary side inductance current I_magGradually decreases to Izvs2, and waits for the voltage V at the same name of the primary coil of the transformer T1_BDown to about 0V, due to the fourth NMOS transistor Q₄The voltage of the drain end is close to 0V, and zero voltage switching-on can be realized, so that the primary side controller can control the primary side inductive current I_magAnd finishing the descending.

6) time t5 to time t 6: referring to fig. 6, the flyback converter operates in the discontinuous mode, and the fourth NMOS transistor Q operates₄The zero voltage is turned on and the zero voltage is,first NMOS transistor Q₁And a third NMOS transistor Q₃Turning off, keeping the negative current Izvs2 unchanged; referring to fig. 7, the flyback converter operates in the critical mode without the negative current holding mode and directly enters the first NMOS transistor Q₁The zero voltage turn-on ready state.

7) time t6 to time t 7: second NMOS transistor Q₂The current is turned off, and the negative current Izvs2 passes through the fourth NMOS tube Q₄For the first NMOS tube Q₁Junction capacitance C₁And a second NMOS transistor Q₂The junction capacitor C2 is charged and discharged, and the first NMOS transistor Q₁Source end voltage V_AStepped up to input voltage V_INIs a first NMOS transistor Q₁Preparing for zero voltage switching-on;

8) time t7 to time t 9: the cycle of the states from the time t0 to the time t2 is repeated.

From steps 1) to 8), the first NMOS transistor Q₁And a second NMOS transistor Q₂And a third NMOS transistor Q₃And a fourth NMOS transistor Q₄Zero-voltage switching-on is realized, and zero-current switching-off is also realized by the secondary rectifier tube D1. By adopting the flyback converter, the switching frequency of the power supply can be increased to more than 1MHz, the size of the transformer and the capacitor is reduced, and the power density of the switching power supply is improved.

In addition, in the flyback converter, the first NMOS transistor Q₁The negative current Izvs2 required by the soft switch is provided by the clamping capacitor C_cThe voltage Vc at two ends is at Tzvs1 to the excitation inductance L_mJunction capacitance C between Izvs1 generated by reverse excitation and Tzvs2₄Electric energy direction excitation inductance L_mMagnetic energy transfer energy is generated together, and the value of the negative current Izvs1 is generated adaptively according to the input voltage and the output voltage of the flyback converter, so that the input voltage and the output voltage of the flyback converter can be wider in range.

Furthermore, in the flyback converter in the prior art, as shown in fig. 2, when the load becomes light, the larger the number of the resonance valleys, and due to the existence of the damping, the larger the number of the valleys, the valley voltage and the resonance center voltage V_INThe closer the switching period is, the switching loss of a single switching period is increased along with the increase of the resonance valley, thereby reducing the conversion efficiency of medium and small load sectionsAnd (4) the ratio.

In the scheme of the invention, the first NMOS tube Q₁And a third NMOS transistor Q₃After the power is turned off, the second NMOS tube Q is controlled₂And a fourth NMOS transistor Q₄Conducting, so that the first NMOS tube Q can be enabled₁The negative current Izvs2 required by the soft switch can pass through the second NMOS transistor Q₂And a fourth NMOS transistor Q₄Is maintained within the transformer T1 so that soft switching can still be achieved in the light load down mode.

Further, in the prior art, gallium nitride (GaN) devices have received much attention from the industry due to excellent high frequency switching characteristics. However, the prior art solutions limit their application range because: firstly, the method comprises the following steps: the existing control technology belongs to a hard switching technology, so that the turn-on loss of a gallium nitride device is large, and the working frequency is limited; secondly, the method comprises the following steps: the reliability of the gallium nitride device can be reduced by the existing control technology, and the change rate (dV/dt) of voltage generated by the hard switch operation can be coupled to the grid electrode of the gallium nitride device, so that the reliability of a grid source electrode is influenced; under the existing control technology, the drain-source electrode voltage of the gallium nitride is the superposition of a stress input voltage, an output reflection voltage and a leakage inductance oscillation voltage, and when power grid fluctuation or lightning stroke occurs, the excessive stress damage of the drain-source electrode of the gallium nitride device is easily caused.

By adopting the scheme of the invention, the first NMOS transistor Q of the main power transistor₁And a fourth NMOS transistor Q₄The maximum voltage stress is input voltage V_INAnd Vcmax (i.e., V)_BMaximum value of (1) and V_INApproximately nVo); clamping tube second NMOS tube Q₂And a third NMOS transistor Q₃The maximum stress is input voltage V_INAnd V_IN+Vcmax。

Compared with the prior art, the first switching circuit to the fourth switching circuit can improve the application reliability of the wide bandgap device gallium nitride when the gallium nitride device is used for implementation, and the full soft switching technology can thoroughly avoid the influence of the change rate (dV/dt) of the voltage generated by the hard switching operation on the grid electrode of the gallium nitride device. Voltage stress of main power tube from input voltage V_IN+ Vcmax is reduced to Vcmax toLower, second NMOS transistor Q₂Has a voltage stress of only V_INThe defect of insufficient avalanche capability of the gallium nitride device can be overcome, and the mass production of the gallium nitride device in the high-voltage industrial field is promoted.

In an embodiment of the present invention, the flyback converter may be a primary-side feedback flyback converter structure.

Referring to fig. 8, unlike the flyback converter structure of the secondary side feedback shown in fig. 3, in fig. 7, the zero voltage detection port V of the primary side controller U1_BAnd an output voltage feedback port FB which is connected with the first end of the fourth switch circuit, namely the fourth NMOS tube Q₄And the drain terminal is connected. Wherein the zero voltage detection port V_BThe output voltage feedback port FB is suitable for detecting the voltage of the connection end of the transformer T1 and the fourth switching circuit and feeding back the output voltage of the transformer T1;

input voltage detection port V of primary side controller U1_AConnected to the second terminal of the first switching circuit, i.e. to the first NMOS transistor Q₁Adapted to detect the input voltage V of said transformer T1_IN。

At this time, the output voltage feedback port FB of the primary side controller U1 is connected to the fourth NMOS transistor Q₄Drain terminal, i.e. fourth NMOS transistor Q₄The drain terminal of the primary side controller U1 is used as an output voltage feedback node, thereby eliminating a set of secondary side feedback control circuitry and a pin of the primary side controller U1.

In FIG. 8, based on the fourth NMOS transistor Q₄The output voltage of the transformer T1 can be obtained by corresponding calculation. When the second NMOS transistor Q₂And the third NMOS transistor Q₃When the fourth NMOS tube Q is simultaneously switched on₄The voltage at the drain terminal is the refraction voltage of the output voltage of the transformer T1, i.e. n Vo, where n is the turn ratio of the primary side and the secondary side of the transformer, V_oIs the output voltage.

As for the specific operation process of the primary-side feedback flyback converter in fig. 8, reference may be made to the description of the specific operation process of the secondary-side feedback flyback converter, which is not described herein again.

It should be noted that, in the specific implementation, no matter the flyback converter with primary side feedback or the flyback converter with secondary side feedback, the input voltage V of the flyback converter is_INWhen the leakage inductance L is larger, the first switch circuit and the transformer_sAt least one voltage dividing circuit may be provided therebetween. One end of the voltage division circuit is connected with the second end of the first switch circuit, and the other end of the voltage division circuit is grounded. At this time, the intermediate voltage of the voltage dividing circuit (for example, when the voltage dividing circuit is a resistor string formed by two resistors connected in series, the intermediate voltage of the voltage dividing circuit may be the voltage at the connection of the two resistors) may be input to the primary controller input voltage detection port. Similarly, in the fourth NMOS transistor Q₄When the drain voltage is higher, the voltage can be applied to the fourth NMOS transistor Q₄And a voltage division circuit is arranged between the drain end and the ground wire, and the intermediate voltage of the voltage division circuit is input to the zero voltage detection port of the primary side controller.

The embodiment of the invention also provides a primary side controller suitable for the flyback converter. The original controller can control the first switch circuit, the second switch circuit, the third switch circuit and the fourth switch circuit to be switched on within a low voltage range.

Specifically, referring to fig. 9, the primary side controller includes: a first signal generating circuit 91 and a second signal generating circuit 92; wherein:

the first signal generating circuit 91 is connected to the output voltage feedback port FB and the current sampling port CS, and is adapted to generate a first switch control signal GT1 and output the first switch control signal GT1 to the first switch control signal output terminal. And generating and outputting a second switch control signal GT2 to the second switch control signal output;

the second signal generating circuit 92 and the zero voltage detecting port V_BAnd an input voltage detection port V_AA connection adapted to generate and output a third switch control signal GT3 to the third switch control signal output; and generates and outputs the fourth switch control signal GT4 to the fourth switch control signal output.

Wherein the first switch control signal GT1 is adapted to control the first switch circuit to be on when the second switch circuit is off; the second switch control signal GT2 adapted to control the second switch circuit to turn on when the first switch circuit is off and the second switch circuit satisfies a zero voltage turn-on condition; the third switch control signal GT3 is adapted to control the third switch circuit to be turned on after the fourth switch circuit is turned off and when the third switch circuit meets a zero-voltage turn-on condition; the fourth switch control signal GT4 is adapted to control the fourth switch circuit to turn on when the third switch circuit is turned off and the fourth switch circuit meets a zero-voltage turn-on condition.

In specific implementation, the first signal generating circuit 91 may be implemented by various structures, and is not limited as long as the first switch control signal GT1 and the second switch control signal GT2 can be generated and satisfy the corresponding timing relationship limitations.

In an embodiment of the present invention, the first signal generating circuit 91 may include: a first comparison circuit 911, a first latch circuit 912, and a first output circuit 913; wherein:

the first comparing circuit 911, having an input end connected to the output voltage feedback port FB and the current sampling port CS and an output end connected to the first latch circuit 912, is adapted to compare the output voltage sampling value V of the transformer_osAnd a voltage value V input by the current sampling port_CSAnd outputs the comparison result to the first latch circuit 912;

the first latch circuit 912 has an input end connected to the first comparator circuit 911 and an output end connected to the first output circuit 913, and is adapted to output a high level signal when the fourth switch circuit is turned on and the voltage-controlled oscillator 912a outputs a high level signal, and otherwise output a low level signal;

the first output circuit 913 is adapted to perform dead band adjustment and driving processing on the output signal of the first latch circuit 912, and output the first switch control signal GT1 and the second switch control signal GT2, where the first switch control signal GT1 and the second switch control signal GT2 have opposite logic values.

In specific implementations, the first comparison circuit 911 can be implemented in various structures, and is not limited in particular.

In an embodiment of the present invention, the first comparing circuit 911 may include: an output voltage receiving sub-circuit 911a, a filter sub-circuit 911b and a first comparator 911 c; wherein:

the output voltage obtaining sub-circuit 911a is connected to the output voltage feedback port FB and the current sampling port CS, and is adapted to obtain a stable output voltage V_oIs sampled by a value V_os；

The filter subcircuit 911b is adapted to obtain the output voltage V_oIs sampled by a value V_osCarrying out low-pass filtering;

the first comparator 911c is adapted to compare the output voltage V_oIs sampled by a value V_osThe voltage value after low-pass filtering and the voltage value V input by the current sampling port_CSAnd comparing to obtain a first comparison result signal.

In specific implementations, the first latch circuit may have various structures, and is not particularly limited.

In an embodiment of the invention, the first latch enable circuit 912 includes: a voltage controlled oscillator 912a, a first and gate G1, and a latch 912 b. Wherein:

the voltage-controlled oscillator 912a is connected with the output end of the filter subcircuit 911 b;

a first input end of the first and circuit G1 is connected to the output end of the voltage-controlled oscillator 912 a; the second input terminal is connected to the second signal generating circuit 92;

in the latch 912b, the setting terminal S is connected to the output terminal of the first and circuit G1, the reset terminal R is connected to the output terminal of the first comparator 911c, and the output terminal is connected to the first output circuit 913.

In one implementation, the voltage-controlled oscillator 912a may generate the output voltage V of the transformer_oThe associated clock signal. The first and gate G1 may be based on the input signal of the fourth driverAnd the clock signal, generating an output signal. Wherein the input signal of the fourth driver is in the same phase as the fourth switch control signal. The first and circuit G1 outputs a high level signal when the input signal of the fourth driver and the clock signal are both high level, and outputs a low level signal otherwise.

In a specific implementation, the latch 912b is an RS latch. When the set terminal S is at a high level, the output terminal is a high level signal. When the reset terminal R is at a high level, the output terminal is a low level signal.

Therefore, when the first and circuit G1 outputs a high level signal, that is, after the periodic on signal arrives and the fourth switch control circuit is turned on, the first switch control circuit is turned on, and at this time, the second switch control circuit is turned off.

In specific implementations, the first output circuit 913 may be implemented by various structures, and is not limited in particular.

In an embodiment of the present invention, the first output circuit 913 may include: a first delayer T1, a second delayer T2, a second and gate circuit G2, a first inverter G3, a third and gate circuit G4, a first driver K1 and a second driver K2; wherein:

the input end of the first delay unit T1 is connected to the latch 912b, and the output end thereof is connected to the first input end of the second and circuit G2;

a second input end of the second and circuit G2 is connected to the latch 912b, and an output end thereof is connected to the first driver K1; an output terminal of the first driver K1 as the first switch control signal output terminal;

the input end of the first inverter G3 is connected to the latch 912b, and the output end thereof is connected to the first input end of the third and circuit G4 and the second delay T2;

the output end of the second delay T2 is connected to the second input end of the third and circuit G4; the output end of the third and-gate circuit G4 is connected with the second driver K2; an output terminal of the second driver K2 is used as the second switch control signal output terminal.

In a specific implementation, the output signal of the latch 912b is delayed by the first delay unit T1 and then anded with the output signal of the latch 912b, so that a dead zone of the output signal of the latch 912b can be adjusted, and energy consumption between control of the first switch control signal GT1 and the second switch control signal GT2 is improved, thereby improving conversion efficiency. The output signal PWM1 of the second and circuit G2 is driven by the first driver K1, and the first switch control signal GT1 with the same phase but higher amplitude can be obtained.

After the output signal of the latch 912b is inverted, the inverted signal is input to the third and circuit G4 through the second delay T2, and is subjected to an and operation with the inverted signal of the output signal of the latch 912b, so as to obtain the signal PWM 2. After passing through the second driver K2, the signal PWM2 can obtain the second switch control signal GT2 with the same phase but higher amplitude.

In an implementation, for a flyback converter with secondary-side feedback, the output voltage obtaining sub-circuit 911a may include a first resistor R_PUThe first resistor R_PUAnd a first reference voltage output terminal V_REF1A connection to set an initial value of the output voltage of the feedback and to provide a pull-up network. V_osAfter low-pass filtering, the voltage value is input to the negative input end of the first comparator 911c, and the voltage value V is input to the current sampling port_csTo the positive input of the first comparator 911 c. When V is_osLess than V_csThe first comparator 911c is turned from a low signal to a high signal.

In a specific implementation, referring to fig. 10, for a primary-side feedback flyback converter, the output voltage obtaining sub-circuit 911a may include: a first scaling module X1, a first switch module S1, a first and gate module G5, a first capacitor C1, and an error amplification module, wherein:

the first scaling module X1 is connected to the output voltage feedback port FB, and the output terminal is connected to one end of the first switching module S1; the output end of the first and gate module G5 is connected with the control end of the first switch module S1; the other end of the first switch module S1 is connected to the first capacitor C1 and the error amplifying module; the error amplification module is connected with the filter sub-circuit.

The first and gate block G5 may perform an and operation on the input signal PWM2 of the second driver and the input signal PWM3 of the third driver, and control the on/off of the first switch block S1 according to the operation result. The input signal PWM2 of the second driver and the second switch control signal GT2 are signals with the same phase and different amplitudes. The input signal PWM3 of the third driver and the third switch control signal GT3 are signals that are in the same phase but different amplitudes.

The first switch module S1, the first and gate module G5, and the first capacitor C1 form a voltage sampling structure, and when the input signal PWM3 of the third driver and the input signal PWM2 of the second driver are both at a high level, the first switch module S1 is turned on, so as to obtain the input voltage of the output voltage feedback port FB after the proportional adjustment, and charge the first capacitor C1. When the first switch module S1 is turned off, the error amplifying module connects the charging voltage of the first capacitor C1 to the first reference voltage input terminal V_REF1The output voltages are compared, so that error adjustment is carried out, and the error adjustment is output to the filtering sub-circuit for filtering. The primary side feedback is realized by integrating the error amplification module into the primary side controller from the secondary side controller.

In an embodiment of the present invention, the second signal generating circuit 92 may include: a second comparison circuit 921, a second latch circuit 922, and a second output circuit 923; wherein:

the second comparator 921, the input terminal thereof and the zero voltage detection port V_BAnd an input voltage detection port V_AConnected to compare the output voltage V of said transformer_oAnd an input voltage V of the transformer_INAnd outputs the comparison result to the second latch circuit 922;

the input end of the second latch circuit 922 is connected to the second comparator 921, and the output end of the second latch circuit is connected to the second output circuit 923, so that the second latch circuit 922 is adapted to output a high level signal when the second switch circuit is turned on or the fourth switch circuit is turned off, and otherwise, output a low level signal;

the second output circuit 923 is adapted to perform dead-band adjustment and driving processing on the output signal of the second latch 922, and output the third switch control signal and the fourth switch control signal, where the logic values of the third switch control signal and the fourth switch control signal are opposite to each other.

In specific implementation, the second comparing circuit 921 may have various circuit structures, and is not limited in particular.

In an embodiment of the present invention, the second comparing circuit 921 may include: the zero voltage detection sub-circuit, the input voltage detection sub-circuit, the second comparator and the reset sub-circuit; wherein:

the zero voltage detection sub-circuit is suitable for acquiring the voltage V of the connection end of the transformer T1 and the fourth switch circuit when the first switch circuit is turned off_BAnd outputs the signal to the second comparator 921 a;

the input voltage detection sub-circuit is suitable for acquiring the input voltage V of the transformer when the first switch circuit is switched on_INAnd outputs the signal to the second comparator 921 a;

the second comparator 921a is adapted to compare the output voltage V of the transformer_oAnd an input voltage V of the transformer_INObtaining a second comparison result signal according to the magnitude of the first comparison result signal;

the reset sub-circuit is connected to the zero voltage detection sub-circuit 921a and the input voltage detection sub-circuit, and is adapted to reset the two input terminals of the second comparator 921 a.

In an embodiment, if the voltage outputted from the voltage detection sub-circuit to the second comparator 921a is less than the voltage V at the connection end of the transformer T1 and the fourth switch circuit_BThe second comparator 921a is flipped from low to high.

In an embodiment of the present invention, the input voltage detection sub-circuit may include: a second scaling module X2, a second switching module S2, a first voltage controlled current source VCCS1, a second capacitor C2, a third switching module S3, and a third capacitor C3; wherein:

the above-mentionedA second scaling module X2 associated with the input voltage detection port V_AConnecting; the second switching module S2 is connected with the second scaling module X2; the first voltage controlled current source VCCS1 is connected to the second switch module S2; the second capacitor C2 is connected to the first voltage-controlled current source VCCS1 and the second switch module S2; the third capacitor C3 is connected in parallel with the third switching module S3, and is connected to the first voltage-controlled current source VCCS1 and the second comparator 921 a.

In an embodiment of the invention, the zero detection sub-circuit may include: a third scaling module X3, a fourth switching module S4, a second voltage controlled current source VCCS2, a fourth capacitor C4, a fifth switching module S5, and a fifth capacitor C5; wherein:

the third scaling module X3 and the zero voltage detection port V_BConnecting; the fourth switching module S4 is connected with the third scaling module X3; the second voltage-controlled current source VCCS2 is connected to the fourth switching module S4; the fourth capacitor C4 is connected with the second voltage-controlled current source VCCS2 and the fourth switching module S4; the fifth switch module S5 is connected in parallel with the fifth capacitor C5, and is connected to the second voltage-controlled current source VCCS2 and the second comparator 921 a.

In a specific implementation, the transconductance coefficients of the first voltage controlled current source VCCS1 and the second voltage controlled current source VCCS2 are the same. The second scaling module X2 and the third scaling module X3 have the same scale, the second capacitor C2 and the fourth capacitor C4 have the same capacitance, and the third capacitor C3 and the fifth capacitor C5 have the same capacitance.

In a specific implementation, the second switch module S2 and the fourth switch module S4 may be switched on and off under the control of the input signal PWM1 of the first driver. Specifically, when the input signal PWM1 of the first driver is high (i.e., the first switch circuit is turned on), V_A＝V_INThe output of the first voltage-controlled current source VCCS1 is equal to V_INThe proportional current charges the third capacitor C3 and then holds.

When the input signal PWM1 of the first driver is low (i.e., the first switch circuit is turned off), V_BVo, a second voltage-controlled current sourceThe VCCS2 outputs a current proportional to Vo to charge the fifth capacitor C5, and when the voltage on the fifth capacitor C5 reaches the voltage held on the third capacitor C3, the output of the second comparator 921a flips from low to high.

Due to the volt-second balance law in the flyback converter, the moment when the second comparator 921a flips, i.e. the moment when the transformer T1 is demagnetized, is also flowing through the rectifier diode D₁Current of (I)_dThe moment of exactly 0.

In an embodiment of the present invention, the reset sub-circuit may include: a second inverter G7, a third delayer T3 and a fourth and gate G8; wherein:

the second inverter G7 is connected with the third delayer T3; a first input end of the fourth and circuit G8 is connected to an input end of the second inverter G7, and a second input end thereof is connected to an output end of the third delay T3; the output end of the fourth and circuit G8 outputs a reset signal, and the third switch module S3 and the fifth switch module S5 are controlled by the reset signal.

In a specific implementation, the second inverter G7, the third delay T3, and the fourth and circuit G8 form a periodic clear reset signal for the third capacitor C3 and the fifth capacitor C5, so that the second comparator can generate a turn-off signal for the third switch circuit every switching period.

In an embodiment of the present invention, the second comparing circuit 921 further includes: a divider, a fourth scaling module X4 and an adder; wherein:

the dividend input end of the divider is connected with the input end of the first voltage-controlled current source VCCS1 and is suitable for being connected with the input voltage V of the first voltage-controlled current source VCCS1_CA. The divisor input end of the divider is connected with the input end of the second voltage-controlled current source VCCS2 and is suitable for being connected with the input voltage V of the second voltage-controlled current source VCCS2_CB. The output of the divider is connected to the fourth scaling module X4. The output end of the fourth scaling module X4 is connected to the first input end of the adder; a second input terminal of the adder is connected to the third capacitor C3;the output terminal of the adder is connected to the second comparator 921 a.

In a specific implementation, the input voltage V of the first voltage controlled current source VCCS1_CAAnd the input voltage V of the second voltage-controlled current source VCCS2_CBConnected to the divider in common, and V_CAIs a dividend, V_CBIs a divisor.

On the basis of the voltage held by the third capacitor C3, the voltage output by the divider through the fourth scaling module X4 is superimposed, so that the turning time of the second comparator 921a can be delayed, that is, the third switching circuit is turned off after the transformer is demagnetized, and a negative inductive current is formed.

When the input voltage V_CAWhen the ZVS is very high, the energy required by the first switch circuit to realize ZVS is large, and the required negative current is large, so that more delay time is required when the third switch circuit is turned off. When the output voltage VCB is very low (i.e. the refracted voltage n × Vo is very low), the voltage at the same name end of the primary winding of the transformer can supply the first switch circuit with less energy to realize ZVS, and the required negative current is also large. Therefore, the temperature of the molten metal is controlled,

negative current value and V are adjusted by a fourth scaling module X4_INOr n V_oThe gain between the first and second switching circuits can change the absolute value of the negative current, so that the first switching circuit can realize zero-voltage switching-on.

In an embodiment of the present invention, the second latch circuit 922 may include: an or gate G9 and a second latch 922 a; wherein:

the input end of the or gate circuit G9 is connected to the first signal generating circuit 91 and the second comparator 921a, and the output end is connected to the reset end of the second latch 922 a;

the setting terminal S of the second latch 922a is connected to the first output circuit 913, and the output terminal is connected to the second output circuit 923.

In one embodiment, the signal generated by the first and circuit G1 is ored with the signal output by the second comparator 921 a. The output signal of or gate G9 is coupled into latch 912b at reset terminal R. The set terminal of the second latch 922a is connected to the input signal PWM2 of the second driver.

When the output signal of the or gate circuit G9 is at a high level, the reset terminal R is at a high level, and the second latch 922a outputs a low level signal. When the input signal PWM2 of the second driver is high, the output terminal is a high signal when the set terminal S is high.

In an embodiment of the present invention, the second output circuit 923 may include: a fourth delay module T4, a fifth and gate G10, a third inverter G11, a sixth and gate G12, a fifth scaling module X5, a third comparator 921a, a third driving module K3, and a fourth driving module K4; wherein:

the input end of the fourth delay module T4 is connected to the output end of the second latch circuit 922; the output end of the fourth delay module T4 is connected to the first input end of the fifth and circuit G10; a second input end of the fifth and circuit G10 is connected to an output end of the second latch circuit 922; the output end of the fifth and-gate circuit G10 is connected to the input end of the third driving module K3, and the output end of the third driving module K3 is used as the output end of the third switch control signal;

an input terminal of the third inverter G11 is connected to an output terminal of the second latch circuit 922; the output end of the third inverter G11 is connected to the first input end of the sixth and circuit G12; an input terminal of the fifth scaling module X5 and the zero voltage detection port V_BConnecting; an output terminal of the fifth scaling module X5 is connected to the third comparator 921 a; the input end of the third comparator 921a is further connected to a second reference voltage output end V_REF2(ii) a The output end of the third comparator 921a is connected to the second input end of the sixth and circuit G12; the output end of the sixth and circuit G12 is connected to the fourth driving module K4; an output terminal of the fourth driving module K4 serves as the fourth switch control signal output terminal.

In a specific implementation, the fifth and circuit G10 performs an and operation on the output signal of the latch 922a and the output signal of the latch 922a output by the fifth and circuit G10 after passing through the fourth delay module T4, so as to adjust the dead zone of the third switch control signal.

At zero voltage detection port V_BThe detected voltage value is less than the second reference voltage output end V_REF2When the output voltage value is greater than the first threshold value, the sixth and circuit G12 outputs a high level signal to control the fourth switch circuit to be turned on, so that zero voltage turning on of the fourth switch circuit can be realized.

After the output signal of the fifth and circuit G10 is driven by the third driving module K3, a third switch control signal with the same phase but an increased amplitude is obtained. The output signal of the sixth and circuit G12 is driven by the fourth driving module K4 to obtain a fourth switch control signal with the same phase but an increased amplitude.

In one embodiment, the first reference voltage output terminal V_REF1And a second reference voltage output terminal V_REF2The reference voltage generated inside the primary side controller U1 may be a constant voltage value.

In the embodiments of the present invention, the connection may be a direct connection or an indirect connection.

As can be seen from the above, in the flyback converter, the control circuit thereof, and the control method thereof in the embodiments of the present invention, the first switch circuit and the second switch circuit are added on the basis of the conventional flyback converter, and the RCD absorption circuit is changed to the active clamp, and by adaptively controlling the switching states of the respective switch circuits, the zero-voltage turn-on (ZVS) of the four switch circuits and the zero-current turn-off (ZCS) of the rectifier diode D1 can be realized under any input voltage and load. Because all power semiconductor devices approximately realize zero switching loss and recover the leakage inductance energy of the transformer, the working frequency of the flyback converter can be increased to more than 1MHz, the volumes of passive devices such as the transformer and a capacitor are obviously reduced, and the power density of the switching power supply is improved.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected by one skilled in the art without departing from the spirit and scope of the invention, as defined in the appended claims.

Claims

1. A switching power supply, comprising: a flyback converter and a primary side controller; wherein the flyback converter includes: the circuit comprises a transformer, a first switch circuit, a second switch circuit, a third switch circuit, a fourth switch circuit and a clamping capacitor; the primary side controller includes: a first switch control signal output end, a second switch control signal output end, a third switch control signal output end, a fourth switch control signal output end, an input voltage detection port and a zero voltage detection port;

2. The switching power supply according to claim 1, wherein one terminal of the clamp capacitor is connected to the second terminal of the third switching circuit, and the other terminal is connected to the first terminal of the fourth switching circuit; or one end of the clamping capacitor is connected with the first end of the third switch circuit, and the other end of the clamping capacitor is connected with the second end of the first switch circuit.

3. The switching power supply of claim 1, further comprising: a current sampling resistor; the primary side controller further comprises: a current sampling port; and the second end of the second switching circuit is connected with the current sampling port of the primary side controller and the second end of the fourth switching circuit through the current sampling resistor.

4. The switching power supply of claim 1, wherein at least one of the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit is an NMOS transistor or a gallium nitride device.

5. The switching power supply of claim 4 wherein when said NMOS transistor is turned on, the voltage drop across the drain and source is less than the turn-on voltage of the body diode in said NMOS transistor.

6. The switching power supply according to any one of claims 1 to 5, wherein the primary side controller further comprises: an output voltage feedback port and a current sampling port; the primary side controller includes: a first signal generating circuit and a second signal generating circuit; wherein:

the first signal generating circuit is connected with the output voltage feedback port and the current sampling port, and is suitable for generating a first switch control signal and outputting the first switch control signal to the first switch control signal output end and generating a second switch control signal and outputting the second switch control signal to the second switch control signal output end;

the second signal generating circuit is connected with the zero voltage detection port and the input voltage detection port, and is suitable for generating a third switch control signal and outputting the third switch control signal to the third switch control signal output end; generating the fourth switch control signal and outputting the fourth switch control signal to a fourth switch control signal output end;

the first switch control signal is suitable for controlling the first switch circuit to be switched on when the second switch circuit is switched off and the first switch circuit meets a zero-voltage switching-on condition; the second switch control signal is suitable for controlling the second switch circuit to be switched on when the first switch circuit is switched off and the second switch circuit meets the zero-voltage switching-on condition; the third switch control signal is suitable for controlling the third switch circuit to be switched on after the fourth switch circuit is switched off and when the third switch circuit meets a zero-voltage switching-on condition; the fourth switch control signal is suitable for controlling the fourth switch circuit to be switched on after the third switch circuit is switched off and when the fourth switch circuit meets the zero-voltage switching-on condition.

7. The switching power supply according to claim 6, wherein the zero voltage detection port and the output voltage feedback port of the primary side controller are connected to the first terminal of the fourth switching circuit.

8. The switching power supply according to claim 6, wherein the zero voltage detection port of the primary side controller is connected to the first terminal of the fourth switching circuit; and an output voltage feedback port of the primary side controller is connected with a ground wire through a light receiving optocoupler.

9. The switching power supply according to claim 8, wherein the second signal generating circuit comprises: the first comparator circuit, the first latch circuit and the first output circuit; wherein:

the input end of the second comparison circuit is connected with the zero voltage detection port and the input voltage detection port of the primary side controller, and the second comparison circuit is suitable for comparing the output voltage of the transformer with the input voltage of the transformer and outputting a comparison result to the second latch circuit;

the input end of the second latch circuit is connected with the second comparison circuit, the output end of the second latch circuit is connected with the second output circuit, and the second latch circuit is suitable for outputting a high level signal when the second switch circuit is switched on or the fourth switch circuit is switched off, otherwise, outputting a low level signal;

the second output circuit is suitable for performing dead zone adjustment and driving processing on the output signal of the second latch circuit and outputting a third switch control signal and a fourth switch control signal, wherein the logic values of the third switch control signal and the fourth switch control signal are opposite.

10. The switching power supply according to claim 9, wherein the second comparison circuit comprises: the zero voltage detection sub-circuit, the input voltage detection sub-circuit, the second comparator and the reset sub-circuit; wherein:

the zero voltage detection sub-circuit is suitable for acquiring the voltage of a connection end of the transformer and the fourth switching circuit when the first switching circuit is switched off and outputting the voltage to the second comparator;

the input voltage detection sub-circuit is suitable for acquiring the input voltage of the transformer when the first switch circuit is switched on and outputting the input voltage to the second comparator;

the second comparator is suitable for comparing the output voltage of the transformer with the input voltage of the transformer to obtain a second comparison result signal;

and the reset sub-circuit is connected with the zero voltage detection sub-circuit and the input voltage detection sub-circuit and is suitable for resetting two input ends of the second comparator.

11. The switching power supply of claim 10, wherein the input voltage detection subcircuit comprises: the second scaling module, the second switch module, the first voltage-controlled current source, the second capacitor, the third switch module and the third capacitor; wherein:

the second scaling module is connected with an input voltage detection port of the primary side controller; the second switch module is connected with the second scaling module; the first voltage-controlled current source is connected with the second switch module; the second capacitor is connected with the first voltage-controlled current source and the second switch module; the third capacitor is connected in parallel with the third switch module and is connected with the first voltage-controlled current source and the second comparator.

12. The switching power supply of claim 11, wherein the zero voltage detection subcircuit comprises: the third scaling module, the fourth switching module, the second voltage-controlled current source, the fourth capacitor, the fifth switching module and the fifth capacitor; wherein:

the third scaling module is connected with a zero voltage detection port of the primary side controller; the fourth switching module is connected with the third scaling module; the second voltage-controlled current source is connected with the fourth switch module; the fourth capacitor is connected with the second voltage-controlled current source and the fourth switch module; and the fifth switch module is connected with a fifth capacitor in parallel and is connected with the second voltage-controlled current source and the second comparator.

13. The switching power supply of claim 12, wherein the second comparison circuit further comprises: the divider, the fourth scaling module and the adder are arranged; wherein:

a dividend input end of the divider is connected with an input end of the first voltage-controlled current source, a divisor input end of the divider is connected with an input end of the second voltage-controlled current source, and an output end of the divider is connected with the fourth scaling module; the output end of the fourth scaling module is connected with the first input end of the adder; a second input end of the adder is connected with the third capacitor; the output end of the adder is connected with the second comparator.

14. The switching power supply of claim 12, wherein the reset sub-circuit comprises: the second inverter, the third delayer and the fourth AND gate circuit; wherein:

the second inverter is connected with the third delayer; a first input end of the fourth and-gate circuit is connected with an input end of the second inverter, and a second input end of the fourth and-gate circuit is connected with an output end of the third delayer; and the output end of the fourth AND gate circuit outputs a reset signal, and the third switch module and the fifth switch module are controlled by the reset signal.

15. The switching power supply according to claim 9, wherein the second latch circuit comprises: an OR gate circuit and a second latch; wherein:

the input end of the OR gate circuit is connected with the first signal generating circuit and the second comparator, and the output end of the OR gate circuit is connected with the reset end of the second latch;

the setting end of the second latch is connected with the first output circuit, and the output end of the second latch is connected with the second output circuit.

16. The switching power supply according to claim 9, wherein the second output circuit comprises: the fourth delay module, a fifth AND gate circuit, a third inverter, a sixth AND gate circuit, a fifth scaling module, a third comparator, a third driving module and a fourth driving module; wherein:

the input end of the fourth delay module is connected with the output end of the second latch circuit; the output end of the fourth delay module is connected with the first input end of the fifth AND gate circuit; a second input end of the fifth and-gate circuit is connected with an output end of the second latch circuit; the output end of the fifth and-gate circuit is connected with the input end of the third driving module, and the output end of the third driving module is used as the output end of the third switch control signal;

the input end of the third inverter is connected with the output end of the second latch circuit; the output end of the third inverter is connected with the first input end of the sixth AND circuit; the input end of the fifth scaling module is connected with the zero voltage detection port; the output end of the fifth scaling module is connected with the third comparator; the input end of the third comparator is also connected with a second reference voltage output end; the output end of the third comparator is connected with the second input end of the sixth AND circuit; the output end of the sixth AND circuit is connected with the fourth driving module; and the output end of the fourth driving module is used as the output end of the fourth switch control signal.

17. A control method of the switching power supply according to any one of claims 1 to 16, comprising:

18. The control method according to claim 17, further comprising: when the second switch circuit and the third switch circuit are both turned on and the first switch circuit and the fourth switch circuit are turned off, the negative current value generated by the excitation inductor is adaptively adjusted and determined based on the input voltage of the flyback converter or the output voltage of the flyback converter, so that the first switch circuit is ensured to meet the zero-voltage turn-on condition.

19. The control method according to claim 17, further comprising: and after the first switch circuit and the third switch circuit are switched off, the second switch circuit and the fourth switch circuit are controlled to be switched on until the first switch circuit is switched on.