CN114463159A - GPU resource sharing method - Google Patents
GPU resource sharing method Download PDFInfo
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- CN114463159A CN114463159A CN202210010700.3A CN202210010700A CN114463159A CN 114463159 A CN114463159 A CN 114463159A CN 202210010700 A CN202210010700 A CN 202210010700A CN 114463159 A CN114463159 A CN 114463159A
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000010187 selection method Methods 0.000 claims abstract description 8
- 238000005516 engineering process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The method comprises the steps of establishing a first information table and a second information table, and determining an optimal kernel group according to the first information table and the second information table through a kernel group selection method, wherein the first information table stores kernel information when kernels are executed independently, the second information table stores kernel information when two kernels are executed together, and the kernels comprise memory intensive kernels and calculation intensive kernels. Compared with the prior art, the method selects the optimal kernel group from the multi-kernel kernels, and further improves the resource utilization rate of the GPU through an efficient resource sharing method among multiple kernels of the GPU.
Description
Technical Field
The invention belongs to the field of resource sharing, and particularly relates to a GPU resource sharing method.
Background
A Graphics processor (abbreviated as GPU), also called a display core, a visual processor, and a display chip, is a microprocessor specially used for image operation on a personal computer, a workstation, a game machine, and some mobile devices (such as a tablet computer and a smart phone). The display control circuit is used for converting and driving display information required by a computer system, providing a line scanning signal for a display and controlling the display of the display correctly, is an important element for connecting the display and a personal computer mainboard, and is also one of important equipment for man-machine conversation.
The GPU is mainly used for carrying out floating point operation and parallel operation, the floating point operation speed and the parallel operation speed of the GPU can be hundreds of times higher than those of a CPU, after the GPU virtualization technology is used, virtual machine instances running on a data center server can share one or more GPU processors to carry out graphic operation, and the safe and efficient desktop access mode is pursued by more and more users. While this strategy increases the overall resource utilization of the physical server, the overall performance may drop dramatically due to the large number of requests from multiple virtual machines.
In order to improve the resource utilization rate of the GPU, a multi-core technology is provided, computing resources are divided into a plurality of cores by the multi-core technology, and the resource utilization rate is improved through efficient GPU resource sharing among the cores. However, with the increase of the number of virtual machines, another challenge is how to select an optimal core group from the multiple cores, in the prior art, most of the memory intensive cores and the computation intensive cores are configured and operated, however, in some cases, the configuration and operation performance of the memory intensive cores and the memory intensive cores or the configuration and operation performance of the computation intensive cores and the computation intensive cores are better than the configuration of the memory demanding cores and the computation demanding cores, and therefore, it is not possible to determine which cores to schedule by the type of the cores to maximally improve the resource utilization rate.
Disclosure of Invention
The invention provides a GPU resource sharing method, and aims to solve the technical problem of low resource utilization rate in the GPU resource sharing process.
In order to achieve the above object, the present invention provides a GPU resource sharing method, comprising the steps of:
a GPU resource sharing method is characterized in that: the method comprises the steps of constructing a first information table and a second information table, determining an optimal kernel group through a kernel group selection method according to the first information table and the second information table, and realizing GPU resource sharing according to the obtained optimal kernel group, wherein the first information table stores kernel information when kernels are independently executed, the second information table stores kernel information when two kernels are executed together, and the kernels comprise memory intensive kernels and calculation intensive kernels.
The first information table includes: ID. IPC _ S, K _ NO, wherein ID is serial number, IPC _ S is instruction number of each cycle corresponding to the kernel, and K _ NO is kernel identification.
The second information table includes: ID. IPC _ G, K _ NO1, K _ NO2 and TPS, wherein ID is a serial number, IPC _ G represents the number of instructions per cycle when two cores are executed together, and TPS is system throughput.
The system throughput TPS is calculated by using the information of the IPC _ S when the kernel in the first information table is executed independently and the IPC _ G when the two kernels in the second information table are executed in parallel.
The system throughput TPS is calculated by the following formula: TPS ═ IPC _ s (i) + IPC _ s (j))/IPC _ G (s, j), where i, j represent two different cores, respectively. The GPU resource sharing method of claim 1, wherein: the kernel group selection method comprises the following steps: when n new kernels wait in the kernel queue, sequentially collecting IPC _ S when the kernels are executed independently and a kernel group IPC _ G of a possible kernel group by using a hardware performance counter, calculating the throughput TPS of the kernel group by using the IPC when the kernels are executed independently and the kernel group IPC of the possible kernel group, and selecting the kernel group with the largest TPS as an optimal kernel group.
The method comprises the steps of establishing a first information table and a second information table, and determining an optimal kernel group according to the first information table and the second information table through a kernel group selection method, wherein the first information table stores kernel information when kernels are executed independently, the second information table stores kernel information when two kernels are executed together, and the kernels comprise memory intensive kernels and calculation intensive kernels. Compared with the prior art, the method selects the optimal kernel group from the multi-kernel kernels, and further improves the resource utilization rate of the GPU through an efficient resource sharing method among multiple cores of the GPU.
Drawings
FIG. 1 is a schematic flow chart of an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
as shown in fig. 1, fig. 1 is a schematic flowchart of a process according to an embodiment of the present invention, and the present invention relates to a GPU resource sharing method, which is characterized in that: the method comprises the steps of constructing a first information table and a second information table, determining an optimal kernel group through a kernel group selection method according to the first information table and the second information table, and realizing GPU resource sharing according to the obtained optimal kernel group, wherein the first information table stores kernel information when kernels are independently executed, the second information table stores kernel information when two kernels are executed together, and the kernels comprise memory intensive kernels and calculation intensive kernels.
The first information table includes: ID. IPC _ S, K _ NO, wherein ID is serial number, IPC _ S is instruction number of each cycle corresponding to the kernel, and K _ NO is kernel identification.
The first information table structure is as follows:
| ID | IPC_S | K_NO |
| 0 | 208 | K0 |
| 1 | 136 | K1 |
| 2 | 693 | K2 |
| …… | …… | …… |
| n | 537 | Kn |
the second information table includes: ID. IPC _ G, K _ NO1, K _ NO2 and TPS, wherein ID is a serial number, IPC _ G represents the number of instructions per cycle when two cores are executed together, and TPS is system throughput.
The second information table structure is as follows:
| ID | IPC_G | K_NO1 | K_NO2 | TPS |
| 0 | 208 | K0 | K_NO2 | 1.3 |
| 1 | 136 | K1 | K_NO2 | 1.2 |
| 2 | 693 | K2 | K_NO2 | 1.7 |
| …… | …… | …… | K_NO2 | …… |
| n | 537 | Kn | K_NO2 | 1.15 |
the system throughput TPS is calculated by using the information of the IPC when the kernel in the first information table is executed independently and the IPC1 and the IPC2 when the two kernels in the second information table are executed in parallel.
Wherein TPS ═ IPC _ s (i) + IPC _ s (j))/IPC _ G (s, j), where i and j respectively represent two different cores, and IPC _ G (s, j) can be obtained by weighted summation or other calculation of IPC information of i and j cores when the two cores are executed simultaneously.
The kernel group selection method comprises the following steps: when n new kernels wait in the kernel queue, sequentially collecting IPC _ S when the kernels are executed independently and a kernel group IPC _ G of a possible kernel group by using a hardware performance counter, calculating the throughput TPS of the kernel group by using the IPC when the kernels are executed independently and the kernel group IPC of the possible kernel group, and selecting the kernel group with the largest TPS as an optimal kernel group.
Finally, it should be noted that the above-mentioned technical solution is only one embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and variations can be easily made based on the application method and principle of the present invention disclosed, and the method is not limited to the above-mentioned specific embodiment of the present invention, so that the above-mentioned embodiment is only preferred, and not restrictive.
Claims (6)
1. A GPU resource sharing method is characterized in that: the method comprises the steps of constructing a first information table and a second information table, determining an optimal kernel group through a kernel group selection method according to the first information table and the second information table, and realizing GPU resource sharing according to the obtained optimal kernel group, wherein the first information table stores kernel information when kernels are independently executed, the second information table stores kernel information when two kernels are executed together, and the kernels comprise memory intensive kernels and calculation intensive kernels.
2. The GPU resource sharing method of claim 1, wherein: the first information table includes: ID. IPC _ S, K _ NO, wherein ID is serial number, IPC _ S is instruction number of each cycle corresponding to the kernel, and K _ NO is kernel identification.
3. The GPU resource sharing method of claim 1, wherein: the second information table includes: ID. IPC _ G, K _ NO1, K _ NO2 and TPS, wherein ID is a serial number, IPC _ G represents the number of instructions per cycle when two cores are executed together, and TPS is system throughput.
4. The GPU resource sharing method of claim 3, wherein: the system throughput TPS is calculated by using the information of the IPC _ S when the kernel in the first information table is executed independently and the IPC _ G when the two kernels in the second information table are executed in parallel.
5. The GPU resource sharing method of claim 4, wherein: the system throughput TPS is calculated by the following formula: TPS ═ IPC _ s (i) + IPC _ s (j))/IPC _ G (s, j), where i, j represent two different cores, respectively.
6. The GPU resource sharing method of claim 1, wherein: the kernel group selection method comprises the following steps: when n new kernels wait in the kernel queue, sequentially collecting IPC _ S when the kernels are executed independently and a kernel group IPC _ G of a possible kernel group by using a hardware performance counter, calculating the throughput TPS of the kernel group by using the IPC when the kernels are executed independently and the kernel group IPC of the possible kernel group, and selecting the kernel group with the largest TPS as an optimal kernel group.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120081373A1 (en) * | 2010-09-30 | 2012-04-05 | Nec Laboratories America, Inc. | Energy-aware task consolidation on graphics processing unit (gpu) |
| CN109857564A (en) * | 2019-03-05 | 2019-06-07 | 上海交通大学 | The GPU of method for managing resource and its application based on fine-grained GPU |
| US20190196853A1 (en) * | 2017-12-21 | 2019-06-27 | International Business Machines Corporation | Runtime gpu/cpu selection |
| CN111045800A (en) * | 2019-11-14 | 2020-04-21 | 武汉纺织大学 | Method and system for optimizing GPU (graphics processing Unit) performance based on short job priority |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120081373A1 (en) * | 2010-09-30 | 2012-04-05 | Nec Laboratories America, Inc. | Energy-aware task consolidation on graphics processing unit (gpu) |
| US20190196853A1 (en) * | 2017-12-21 | 2019-06-27 | International Business Machines Corporation | Runtime gpu/cpu selection |
| CN109857564A (en) * | 2019-03-05 | 2019-06-07 | 上海交通大学 | The GPU of method for managing resource and its application based on fine-grained GPU |
| CN111045800A (en) * | 2019-11-14 | 2020-04-21 | 武汉纺织大学 | Method and system for optimizing GPU (graphics processing Unit) performance based on short job priority |
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