CN114449053A - Internet of things frame structure design method adopting Chirp modulation - Google Patents
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Abstract
The invention relates to a method for designing a frame structure of an Internet of things by using Chirp modulation, and belongs to the field of Internet of things. The method comprises the following steps: forming a lead code, a synchronous code, frame control, a frame interval and a data block into a frame structure; the lead code adopts a BOK modulation mode, the rate is 37.5K, all the lead codes are 1 bits, and the length is variable; BOK is adopted as a synchronous code, the rate is 37.5K, the fixed bit stream is 0000101, the Chirp phase of the last bit 1 is zero, and the Chirp phase is used as the initial reference phase of frame control; BPSK modulation mode is adopted for frame control, 20 bits are counted, and Turbo 1/2 code rate is adopted; the frame interval length is 3 bits, BPSK modulation mode is adopted, and the padding is all 1. The invention provides a power meter reading frame structure adopting a Chirp modulation technology, which comprises a lead code, a synchronous code, a pilot frequency, a frame interval, a frame control and a data block.
Description
Technical Field
The invention belongs to the field of Internet of things, and relates to a method for designing an Internet of things frame structure by using Chirp modulation.
Background
In a mobile communication system, a spectrum resource is a limited wireless resource, in a public mobile communication network, a fixed allocation of wireless resources is used for communication, each large operator has exclusive spectrum resources, and a set of complete allocation and use methods also exist in spectrum resource use. However, in the internet of things system, a spectrum resource sharing mode is often adopted, and spectrum resource management is not needed, so that the frame structure has the unique characteristic of the internet of things. The structure of a conventional internet of things frame is shown in fig. 1.
The conventional internet of things frame structure consists of three parts, namely a frame header, frame control and frame load. During the communication process, the sending end and the receiving end do not need to implement the synchronization state maintenance. The frame header is used for synchronous searching, frequency adjustment and timing adjustment, the frame control carries control information in the transmission process, and the frame load carries data content to be transmitted.
The conventional Internet of things frame structure is sent in a burst mode, a receiving end and a sending end do not need to be in a synchronous state in real time, but the receiving end needs to search whether effective frame burst data exist on designated resources in real time, namely whether the sending end sends effective frame data is detected.
In the communication system of the internet of things, different frame definition formats exist in different communication modes, specifically different modulation modes. And designing a frame structure according to wireless resources, communication requirements and communication networking characteristics used by the Internet of things system.
The Chirp modulation technology (Chirp modulation for short) has the unique advantages in wireless communication due to the strong anti-interference, low power consumption, low time delay, multipath effect resistance and the like, and is widely applied to the Internet of things system.
The Chirp modulation mode is based on Binary Orthogonal Keying (BOK), and provides a Chirp-BOK modulation mode, also called BOK modulation, which utilizes the sweep frequency characteristic of the Chirp signal to carry and process the information of the positive and negative frequency modulation rates of the Chirp signal so as to achieve the purpose of signal modulation and demodulation.
On the basis, in order to provide communication rate, Chirp modulation and other modulation modes are combined to form a plurality of flexible modulation modes. For example, BOK and Binary Phase Shift Keying (BPSK) are combined to form BOK + BSPK; BOK and Quadrature Phase Shift Keying (QPSK) are combined to form BOK + QPSK; the BOK and eight-ary phase shift keying (8 PSK for short) are combined to form BOK + PSK.
Disclosure of Invention
In view of the above, the present invention is directed to a method for designing an internet of things frame structure by using Chirp modulation.
In order to achieve the purpose, the invention provides the following technical scheme:
a method for designing an Internet of things frame structure by using Chirp modulation comprises the following steps:
forming a lead code, a synchronous code, frame control, a frame interval and a data block into a frame structure;
the lead code adopts a BOK modulation mode, the rate is 37.5K, all the lead codes are 1 bits, and the length is variable;
BOK is adopted as a synchronous code, the rate is 37.5K, the fixed bit stream is 0000101, the Chirp phase of the last bit 1 is zero, and the Chirp phase is used as the initial reference phase of frame control;
BPSK modulation mode is adopted for frame control, 20 bits are counted, and Turbo 1/2 code rate is adopted;
the frame interval length is 3 bits, BPSK modulation mode is adopted, and the padding is all 1;
the data block is composed of two parts, one part is a control block, and the other part is a physical block; wherein the length of the control block is 16 subsections; the physical block length supports 16 subsections, 40 subsections, 72 subsections, 137 subsections, 264 subsections and 520 subsections, at most 4 physical blocks are carried, 1 fixed upper Chirp symbol is used as a pilot symbol in front of each physical block, and the modulation mode of the pilot symbol is the same as that of data.
Optionally, in the frame structure in the linear frequency modulation technique, a frame control portion of the frame structure adopts differential coding and Turbo 1/2 code rate; the frame control part consists of a modulation mode, a rate, a code rate, a physical block length indication, a physical block number, a reserved bit, a Hamming code check bit and a parity check; the specific definition is as follows:
modulation mode: the length of 3 bits indicates the modulation mode of the data block, 0 represents BPSK, 1 represents QPSK, 2 represents BOK + BPSK, 3 represents BOK + QPSK, and 4 represents BOK +8 PSK;
rate: the length is 3 bits, the modulation rate of the data block is indicated, 0 corresponds to a spreading factor 3,1 corresponds to a spreading factor 16,2 corresponds to a spreading factor 12,3 corresponds to a spreading factor 24, and 4 corresponds to a spreading factor 48;
code rate: length 2 bits indicating the coding rate of the data block, 0 for 1/2, 1 for 4/5, 2 for 16/18, 3 for 1/3;
physical block length: length 3bit, 0 for PB16, 1 for PB40, 2 for PB72, 3 for PB136, 4 for PB264, 5 for PB 520;
the number of physical blocks, the length of which is 2 bits, indicates the number of the physical blocks and has the value range of 0, 1, 2 and 3;
reserved bits: length 1 bit, fixed set to 1;
the length of the Hamming code check bit is 5 bits, and the first 14 bits of frame control are subjected to error correction coding, namely (19,14) Hamming codes are adopted;
parity check, length 1 bit, parity check 19 bits before frame control.
Optionally, in the frame structure, at the transmitting end in the broadband power meter reading system, the physical layer receives input from the data link layer, and two separate links are used to process control block data and load data respectively; carrying out channel interleaving after the control block data is subjected to Turbo coding; after scrambling, Turbo coding and channel interleaving, the load data and control block data are subjected to multiphase MPSK modulation, the modulated data are added with a preamble symbol and a pilot symbol and then subjected to upper and lower Chirp modulation, a physical layer protocol data unit PPDU signal is formed, sent to a simulation front end and finally sent to a wireless channel; in the Chirp modulation process, the bit '1' is modulated by upper Chirp, and the bit '0' is modulated by lower Chirp;
the preamble module generates a preamble content fixed in a frame structure, a BOK modulation mode is adopted, a fixed spreading factor 3 is adopted, in this embodiment, assuming that a bandwidth of 3.6MHz is used for communication, a rate of the preamble is 37.5K, and the preamble is represented by "1" overall, that is, the preamble is represented by a plurality of upper Chirp symbols; in this embodiment, 8 '1' bits are selected to constitute a preamble sequence '11111111';
the synchronous code module generates fixed synchronous code content in a frame structure, and adopts a BOK modulation mode, wherein the fixed content is 0000101; wherein, the '0' bit adopts lower Chirp modulation, and the '1' bit adopts upper Chirp modulation; the synchronization code is followed by the frame control content; the frame control content adopts a differential coding mode, and the problem of phase ambiguity at a receiving end is mainly solved;
the pilot module generates a first fixed pilot symbol of each physical block; fixing the bit to be 1, adopting Chirp modulation, and fixing the phase to be 0; each physical block data coding adopts differential coding, and defines that one bit of the pilot frequency in front of the data block is fixed as '1' and the phase is 0;
control data, Turbo, BPSK modulation, Chirp modulation and shaping filter constitute control channel, and the link generates control block of data block in frame structure; the Turbo adopts 1/2 coding mode; in practical engineering, two bits of data are modulated, one bit is BPSK modulated, the other bit is Chirp modulated, which is called as BOK + BPSK modulation, and the modulation order is 2, that is, a Chirp symbol represents data content of two bits;
service data, scrambling, Turbo, MPSK modulation, Chirp modulation and shaping filter form a service channel, and the link generates a physical block of a data block in a frame structure; wherein MPSK is multi-phase modulation including BSPK, QPSK, 8 PSK; BPSK is bi-phase modulation with one symbol representing 1-bit information content, QPSK is quadriphase modulation with one symbol representing 2-bit information content; 8PSK is eight-phase modulation, with one symbol representing 3-bit information content.
The invention has the beneficial effects that:
firstly, the method comprises the following steps: the invention provides a power meter reading frame structure adopting a Chirp modulation technology, which comprises a lead code, a synchronous code, a pilot frequency, a frame interval, a frame control and a data block.
Secondly, the method comprises the following steps: the invention designs the frame structure to meet the flexible channel coding requirement and supports Turbo coders with different rates. Wherein the frame control adopts a fixed Turbo 1/2 codec, and the code rate adopted by the data block Turbo codec is indicated in the frame control. The frame structure designed by the invention supports different modulation modes, the frame control adopts a fixed BPSK modulation mode, and the data blocks can be indicated to adopt BPSK, QPSK, BOK + BPSK, BOK + QPSK and BOK +8PSK in the frame control.
Thirdly, the method comprises the following steps: frame intervals are inserted between the frame control and the data blocks, which greatly reduces the speed requirement of the receiving end for parsing the frame control.
Fourthly: the invention designs a frame structure which adopts the same rate (adopts the same spread spectrum factor) from a preamble code, a synchronous code, frame control and frame interval, namely, the fixed spread spectrum factor is selected to be 3. The rate at which the data blocks are to be used is indicated in the frame control. Therefore, the receiving end can be guaranteed to be capable of analyzing correct lead codes, synchronous codes and frame control contents preferentially.
Fifth, the method comprises the following steps: in the frame structure design, the last bit of the synchronization code is "1" and the phase is set to 0. The frame control bit stream is differentially encoded. The last bit phase of the synchronization code is defined as the initial phase of the frame control differential encoding.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter.
Drawings
For the purposes of promoting a better understanding of the objects, aspects and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1 is a conventional Internet of things frame structure;
FIG. 2 is a frame structure of a chirp technique;
FIG. 3 is a frame control component of a frame structure;
fig. 4 is a physical layer structure of broadband power meter reading in a Chirp modulation scheme.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention in a schematic way, and the features in the following embodiments and examples may be combined with each other without conflict.
Wherein the showings are for the purpose of illustrating the invention only and not for the purpose of limiting the same, and in which there is shown by way of illustration only and not in the drawings in which there is no intention to limit the invention thereto; to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar components; in the description of the present invention, it should be understood that if there is an orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "front", "rear", etc., based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of description, but it is not an indication or suggestion that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes, and are not to be construed as limiting the present invention, and the specific meaning of the terms may be understood by those skilled in the art according to specific situations.
The invention provides an Internet of things frame structure for electric meter reading according to the application of a Chirp linear frequency modulation technology in a broadband power carrier communication system.
The frame structure of the present invention is composed of a preamble, a synchronization code, a frame control, a frame interval, and a data block, as shown in fig. 2.
Wherein:
preamble code: and a BOK modulation mode is adopted, the rate is 37.5K, all bits are '1', and the length is variable.
Synchronization code: the initial reference phase of frame control is assumed to be BOK, rate 37.5K, fixed bit stream "0000101", and Chirp phase zero on the last bit "1".
And (3) frame control: BPSK modulation is adopted, 20 bits are totally adopted, and Turbo 1/2 code rate is adopted.
Frame interval: the length is 3 bits, BPSK modulation mode is adopted, and the padding is all 1.
Data block: the data block is composed of two parts, one part is a control block and the other part is a physical block. Wherein the length of the control block is 16 subsections; the physical block length supports 16 subsections, 40 subsections, 72 subsections, 137 subsections, 264 subsections and 520 subsections, 4 physical blocks can be carried at most, 1 fixed upper Chirp symbol is used as a pilot symbol in front of each physical block, and the modulation mode of the symbol is the same as that of data.
The frame control part in the frame structure of the linear frequency modulation technology adopts differential coding and Turbo 1/2 code rate. The method comprises a modulation mode, a rate, a code rate, a physical block length indication, a physical block number, a reserved bit, a Hamming code check bit and a parity check. The specific definition is as follows:
modulation mode: the length of 3 bits indicates the modulation scheme of the data block, 0 indicates BPSK, 1 indicates QPSK, 2 indicates BOK + BPSK, 3 indicates BOK + QPSK, and 4 indicates BOK +8 PSK.
Rate: length 3 bits, indicating the modulation rate of the data block, 0 for spreading factor 3,1 for spreading factor 16,2 for spreading factor 12,3 for spreading factor 24, 4 for spreading factor 48.
Code rate: length 2 bits, indicating the coding rate of the data block, 0 for 1/2, 1 for 4/5, 2 for 16/18, and 3 for 1/3.
Physical block length: length 3bit, 0 for PB16, 1 for PB40, 2 for PB72, 3 for PB136, 4 for PB264, and 5 for PB 520.
The number of physical blocks, length 2 bits, indicates the number of physical blocks, and ranges from 0, 1, 2, and 3.
Reserved bits: length 1 bit, fixed set to 1.
The length of Hamming code check bit is 5 bits, and the first 14 bits of frame control are subjected to error correction coding, namely (19,14) Hamming codes are adopted.
Parity check, length 1 bit, parity check 19 bits before frame control.
In order to clearly illustrate the application of the invention in practical engineering, a Chirp modulation mode is adopted in a broadband power meter reading system for explanation. The physical layer architecture of the system is shown in fig. 4.
At the transmitting end, the physical layer receives input from the data link layer, and two separate links are used to process control block data and payload data, respectively. Carrying out channel interleaving after the control block data is subjected to Turbo coding; after scrambling, Turbo coding and channel interleaving, the load data and control block data are subjected to multiphase MPSK modulation, the modulated data are added with a preamble symbol and a pilot symbol and then subjected to upper and lower Chirp modulation, a physical layer protocol data unit PPDU signal is formed, sent to an analog front end and finally sent to a wireless channel. In the Chirp modulation process, the bit "1" is modulated by the upper Chirp, and the bit "0" is modulated by the lower Chirp.
In this embodiment, the preamble module generates a preamble content fixed in the frame structure, and adopts a BOK modulation scheme and a fixed spreading factor of 3, and in this embodiment, assuming that a bandwidth of 3.6MHz is used for communication, the rate of the preamble is 37.5K, and is represented by "1" overall, that is, the preamble is represented by a plurality of upper Chirp symbols. In this embodiment, 8 "1" bits are selected to constitute the preamble sequence "11111111".
The synchronous code module generates the fixed synchronous code content in the frame structure, and adopts a BOK modulation mode, and the fixed content is '0000101'. The "0" bit is modulated by the lower Chirp, and the "1" bit is modulated by the upper Chirp. In this embodiment, the synchronization code is followed by the frame control content. The frame control content adopts a differential coding mode, and the problem of phase ambiguity at a receiving end is mainly solved.
The pilot module generates a first fixed pilot symbol for each physical block. Fixed to bit "1", with Chirp modulation, fixed phase is 0. Each physical block data coding adopts differential coding, and the pilot frequency is defined to be fixed to 1 by one bit in front of the data block and has 0 phase.
In this embodiment, the control data, Turbo, BPSK modulation, Chirp modulation, and shaping filter constitute a control channel, and the link generates a control block of data blocks in the frame structure. The Turbo adopts 1/2 coding mode. In practical engineering, two bits of data are modulated, one bit is BPSK modulated, the other bit is Chirp modulated, which is called BOK + BPSK modulation, and the modulation order is 2, that is, one Chirp symbol represents the data content of two bits.
In this embodiment, traffic data, scrambling, Turbo, MPSK modulation, Chirp modulation and shaping filters constitute a traffic channel, and the link generates physical blocks of data blocks in a frame structure. Wherein MPSK is multi-phase modulation, including BSPK, QPSK, 8 PSK; BPSK is bi-phase modulation with one symbol representing 1 bit of information content, QPSK is quadrature modulation with one symbol representing 2 bit of information content. 8PSK is eight-phase modulation, with one symbol representing 3-bit information content.
In this embodiment, in order to flexibly support different rate requirements, Chirp modulation may be used in combination with polyphase modulation. For example, combining Chirp and 8PSK to form BOK +8PSK modulation; combining Chirp and BPSK to form BOK + BPSK modulation; chirp and QPSK combine to form a BOK + QPSK modulation. With specific reference to table 1.
TABLE 1 modulation scheme relationship table
In table 1, the support for various bandwidth requirements is given for 0.45MHz, 0.9MHz, 1.8MHz, 3.6 MHz. A 3.6MHz bandwidth is employed in this embodiment. Different physical layer rates can be obtained at different bandwidth configurations and different spreading factors. For example, in table 1, if the number is 1, the bandwidth is 0.45MHz, and the spreading factor is 3, the bit rate supported by the physical layer is 0.45/3 to 0.15 kbit/s. The modulation order is 4, the Turbo code rate is 0.89, so the number is 1, and the supported actual transmission data rate is: 0.15 × 4x0.89 ═ 0.534 mbits per second, i.e., 534 kbits per second.
In a broadband power meter reading system, a receiving end and a sending end are used for leading and frame control to communicate by adopting bilateral known parameters, but the analysis of a data block needs to refer to frame control content.
According to the content of the invention, the frame control adopts a BPSK modulation mode, and the length is 20 bits. The method comprises a modulation mode, a rate, a code rate, a physical block length indication, a physical block number, a reserved bit, a Hamming code check bit and a parity check.
Wherein: modulation mode: the length is 3 bits, 5 modes exist, namely BPSK, QPSK, BOK + BPSK, BOK + QPSK and BOK +8PSK, and the specific coding is shown in Table 2.
TABLE 2 modulation scheme for data blocks
| Encoding | Modulation system |
| 0 | BPSK |
| 1 | QPSK |
| 2 | BOK+BPSK |
| 3 | BOK+QPSK |
| 4 | BOK+8PSK |
Rate: with a length of 3 bits, there are 4 ways to support 1200K, 600K, 300K, 150K and 75K. In this embodiment, a 3.6MHz communication bandwidth is used, as shown in table 1, and the rate specific coding is shown in table 3.
TABLE 3 data Block Rate
| Encoding | Rate of speed | Spreading factor |
| 0 | 1200K | 3 |
| 1 | 600K | 6 |
| 2 | 300K | 12 |
| 3 | 150K | 24 |
| 4 | 75K | 48 |
Code rate: length 2 bits, indicating the coding rate of the data, 0 for 1/2, 1 for 4/5, 2 for 16/18, 3 for 1/3. The code rate is used to indicate specific parameters of Turbo coding. The specific codes are shown in table 4.
TABLE 4 data Block Rate
| Encoding | Code rate |
| 0 | 1/2 |
| 1 | 4/5 |
| 2 | 16/18 |
| 3 | 1/3 |
Physical block length: the length 3bit, 0 represents 16 bytes (PB16), 1 represents 40 bytes (PB40), 2 represents 72 bytes (PB72), 3 represents 136 bytes (PB136), 4 represents 264 bytes (PB264), and 5 represents 520 bytes (PB520), the unit is byte, and each byte has a length of 8 bits. The specific codes are shown in table 5.
TABLE 5 data Block Length
| Coding | Length of | |
| 0 | 16 bytes | PB16 |
| 1 | 40 bytes | PB40 |
| 2 | 72 bytes | PB72 |
| 3 | 136 bytes | PB136 |
| 4 | 264 bytes | PB264 |
| 5 | 520 bytes | PB520 |
The number of physical blocks, the length of which is 2 bits, indicates the number of physical blocks, the value ranges of 0, 1, 2 and 3, and indicates the number of physical blocks of a data block type in a frame structure. According to the present invention, the embodiment can carry 4 physical blocks at most, and needs to carry one physical block at least, and the specific coding is shown in table 6.
TABLE 6 physical Block number
| Encoding | Number of physical blocks |
| 0 | 1 |
| 1 | 2 |
| 2 | 3 |
| 3 | 4 |
The length of Hamming code check bit is 5 bits, and the first 14 bits of frame control are subjected to error correction coding, namely (19,14) Hamming codes are adopted. The hamming code check process will process 14 bits of data and finally output 19 bits, of which 5 are redundant bits.
Parity check, length 1 bit, parity check 19 bits before frame control.
The frame control content in the broadband power meter reading frame structure is mainly introduced above.
In this embodiment, a frame interval of 3 bits length is also inserted in the frame structure design according to the method of the present invention. Frame interval: the length is 3 bits, BPSK modulation mode is adopted, and the padding is all 1.
According to the definition of the frame structure, the data block data in the frame structure received by the receiving end is the content needing frame control, but in the actual engineering realization, the receiving end needs a certain time for analyzing the content of the frame control, so that in the frame structure design, the gap time with the length of 3 bits is needed, and the method is mainly used for the receiving end to analyze the content of the frame control part.
Finally, the above embodiments are only intended to illustrate the technical solutions of the present invention and not to limit the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the claims of the present invention.
Claims (3)
1. A method for designing an Internet of things frame structure by using Chirp modulation is characterized by comprising the following steps: the method comprises the following steps:
forming a lead code, a synchronous code, frame control, a frame interval and a data block into a frame structure;
the lead code adopts a BOK modulation mode, the rate is 37.5K, all the lead codes are 1 bits, and the length is variable;
BOK is adopted as a synchronous code, the rate is 37.5K, the fixed bit stream is 0000101, the Chirp phase of the last bit 1 is zero, and the Chirp phase is used as the initial reference phase of frame control;
BPSK modulation mode is adopted for frame control, 20 bits are counted, and Turbo 1/2 code rate is adopted;
the frame interval length is 3 bits, BPSK modulation mode is adopted, and the padding is all 1;
the data block is composed of two parts, one part is a control block, and the other part is a physical block; wherein the length of the control block is 16 subsections; the physical block length supports 16 subsections, 40 subsections, 72 subsections, 137 subsections, 264 subsections and 520 subsections, at most 4 physical blocks are carried, 1 fixed upper Chirp symbol is used as a pilot symbol in front of each physical block, and the modulation mode of the pilot symbol is the same as that of data.
2. The method for designing the frame structure of the internet of things by using Chirp modulation according to claim 1, wherein the method comprises the following steps: in the frame structure linear frequency modulation technology, a frame control part of the frame structure adopts differential coding and Turbo 1/2 code rate; the frame control part consists of a modulation mode, a rate, a code rate, a physical block length indication, a physical block number, a reserved bit, a Hamming code check bit and a parity check; the specific definition is as follows:
modulation mode: the length of 3 bits indicates the modulation mode of the data block, 0 represents BPSK, 1 represents QPSK, 2 represents BOK + BPSK, 3 represents BOK + QPSK, and 4 represents BOK +8 PSK;
rate: length 3 bits, indicating the modulation rate of the data block, 0 for spreading factor 3,1 for spreading factor 16,2 for spreading factor 12,3 for spreading factor 24, 4 for spreading factor 48;
code rate: length 2 bits indicating the coding rate of the data block, 0 for 1/2, 1 for 4/5, 2 for 16/18, 3 for 1/3;
physical block length: length 3bit, 0 for PB16, 1 for PB40, 2 for PB72, 3 for PB136, 4 for PB264, 5 for PB 520;
the number of physical blocks, the length of which is 2 bits, indicates the number of the physical blocks and has the value range of 0, 1, 2 and 3;
reserved bits: length 1 bit, fixed set to 1;
the length of the Hamming code check bit is 5 bits, and the first 14 bits of frame control are subjected to error correction coding, namely (19,14) Hamming codes are adopted;
parity check, length 1 bit, parity check 19 bits before frame control.
3. The method for designing the frame structure of the internet of things by using Chirp modulation according to claim 1, wherein the method comprises the following steps: in the frame structure, in a broadband power meter reading system, at a transmitting end, a physical layer receives input from a data link layer, and two separate links are adopted to respectively process control block data and load data; carrying out channel interleaving after the control block data is subjected to Turbo coding; after scrambling, Turbo coding and channel interleaving, the load data and control block data are subjected to multiphase MPSK modulation, the modulated data are added with a preamble symbol and a pilot symbol and then subjected to upper and lower Chirp modulation, a physical layer protocol data unit PPDU signal is formed, sent to a simulation front end and finally sent to a wireless channel; in the Chirp modulation process, the bit '1' is modulated by upper Chirp, and the bit '0' is modulated by lower Chirp;
the preamble module generates a preamble content fixed in a frame structure, a BOK modulation mode is adopted, a fixed spreading factor 3 is adopted, in this embodiment, assuming that a bandwidth of 3.6MHz is used for communication, a rate of the preamble is 37.5K, and the preamble is represented by "1" overall, that is, the preamble is represented by a plurality of upper Chirp symbols; in this embodiment, 8 '1' bits are selected to constitute a preamble sequence '11111111';
the synchronous code module generates fixed synchronous code content in a frame structure, and adopts a BOK modulation mode, wherein the fixed content is 0000101; wherein, the '0' bit adopts lower Chirp modulation, and the '1' bit adopts upper Chirp modulation; the synchronization code is followed by the frame control content; the frame control content adopts a differential coding mode, and the problem of phase ambiguity at a receiving end is mainly solved;
the pilot module generates a first fixed pilot symbol of each physical block; fixing the bit to be 1, adopting Chirp modulation, and fixing the phase to be 0; each physical block data coding adopts differential coding, and defines that one bit of the pilot frequency in front of the data block is fixed as '1' and the phase is 0;
control data, Turbo, BPSK modulation, Chirp modulation and shaping filter constitute control channel, and the link generates control block of data block in frame structure; the Turbo adopts 1/2 coding mode; in practical engineering, two bits of data are modulated, one bit is BPSK modulated, the other bit is Chirp modulated, which is called as BOK + BPSK modulation, and the modulation order is 2, that is, a Chirp symbol represents data content of two bits;
service data, scrambling, Turbo, MPSK modulation, Chirp modulation and shaping filter form a service channel, and the link generates a physical block of a data block in a frame structure; wherein MPSK is multi-phase modulation including BSPK, QPSK, 8 PSK; BPSK is bi-phase modulation with one symbol representing 1-bit information content, QPSK is quadriphase modulation with one symbol representing 2-bit information content; 8PSK is eight-phase modulation, with one symbol representing 3-bit information content.
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