CN114448232A

CN114448232A - Switching capacitor type power conversion circuit and conversion control circuit and control method thereof

Info

Publication number: CN114448232A
Application number: CN202011228542.6A
Authority: CN
Inventors: 黄宗伟; 魏鼎宇
Original assignee: Richtek Technology Corp
Current assignee: Richtek Technology Corp
Priority date: 2020-11-06
Filing date: 2020-11-06
Publication date: 2022-05-06

Abstract

A switching capacitor type power conversion circuit, a conversion control circuit and a control method thereof are provided. The switched capacitor power conversion circuit includes: a conversion capacitor; a plurality of conversion transistors; and an output capacitor coupled to the output node. In a switching mode, the switched capacitor power conversion circuit converts the input power in a switched capacitor manner to generate the output power at the output node. Controlling the first conversion transistor to provide a first pre-charge current to pre-charge the conversion capacitor to a predetermined voltage level during a first pre-charge period, and preventing the output capacitor from being charged during the first pre-charge period; during a second precharge period, the second transfer transistor is controlled to provide a second precharge current through the output node to precharge the output capacitor to a predetermined voltage level, and the second precharge current is simultaneously used to supply the load current to the load circuit.

Description

Switching capacitor type power conversion circuit and conversion control circuit and control method thereof

Technical Field

The present invention relates to a switching capacitor type power conversion circuit, and more particularly, to a switching capacitor type power conversion circuit capable of pre-charging to reduce a surge current. The invention also relates to a conversion control circuit and a control method for controlling the switched capacitor type power conversion circuit.

Background

The prior art related to this application is: "RT 9758 Specification, Li Qi science and technology Ltd", "bq 25970 Specification, TI", "NCP 1764 Specification, ON Semiconductor", and "PCA 9488 Specification, NXP".

Fig. 1A and 1B show a prior art switched capacitor power conversion circuit (101A-101B), in which the switched capacitor power conversion circuit 101A-101B switches the electrical connection configuration of a conversion capacitor CF through conversion transistors Q1-Q4 to convert an input power to generate an output power.

The switching capacitor type power conversion circuit in the prior art shown in fig. 1A to fig. 1B has a disadvantage that when the voltage difference between the cross voltage of the conversion capacitor CF and the output capacitor Cout and the voltage in the steady state is large, the direct switching capacitor type power conversion method may cause a large surge current, which may cause the burning of the conversion transistor.

Compared with the prior art shown in fig. 1A-1B, the switched capacitor power conversion circuit of the present invention can pre-charge the conversion capacitor CF and the output capacitor Cout before switching the conversion mode, so as to avoid the above-mentioned surge current, and can support the load circuit to start under a heavy load with a smaller pre-charge current.

Disclosure of Invention

From one aspect, the present invention provides a switched capacitor power conversion circuit, comprising: a conversion capacitor; a plurality of conversion transistors coupled to the conversion capacitor for converting an input power to generate an output power at an output node; and an output capacitor coupled to the output node; in a switching conversion mode, the plurality of conversion transistors switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and a voltage-dividing node of at least one voltage-dividing node, or between a voltage-dividing node of at least one voltage-dividing node and a ground potential, or when a plurality of voltage-dividing nodes are provided, between a pair of the at least one voltage-dividing nodes, so as to convert the input power supply and generate the output power supply, wherein the output node corresponds to one node of the at least one voltage-dividing node, wherein in a steady state, the voltage of the input power supply is k times of the voltage of the output power supply, and the current of the input power supply is 1/k times of the current of the output power supply, wherein k is a natural number greater than 1; in a pre-charge mode, the switched capacitor power conversion circuit performs the following pre-charge operations: controlling a first transfer transistor of the plurality of transfer transistors to provide a first pre-charge current to pre-charge the transfer capacitor to a predetermined voltage level during a first pre-charge period, and to prevent charging of the output capacitor during the first pre-charge period; and during a second precharge period, controlling a second transfer transistor of the plurality of transfer transistors to provide a second precharge current through the output node to precharge the output capacitor to the predetermined voltage level, the second precharge current being used to supply a load current to a load circuit; the first pre-charge current is not greater than a first predetermined current level, the second pre-charge current is not greater than a second predetermined current level, and the load current is not less than a third predetermined current level.

In a preferred embodiment, the toggle mode is operated after the precharge mode.

In a preferred embodiment, the first precharge period is earlier than the second precharge period.

In a preferred embodiment, the switched-capacitor power conversion circuit further controls the first converting transistor and the second converting transistor to balance the voltages of the converting capacitor and the output capacitor to the predetermined voltage level during a balance period.

In a preferred embodiment, the first and second transfer transistors are connected in series, wherein one end of the transfer capacitor, the first transfer transistor and the second transfer transistor is coupled to a switching node, and the output capacitor is coupled to the other end of the second transfer transistor, wherein the first transfer transistor provides at least the second precharge current to the switching node during the second precharge period.

In a preferred embodiment, the first predetermined current level is equal to the second predetermined current level, and the load current is less than the second pre-charge current.

In a preferred embodiment, in the precharge mode, the first converting transistor is configured as a current source or a current clamp circuit for providing the first precharge current.

In a preferred embodiment, the second transfer transistor is configured as a current source or a current clamp circuit for providing the second precharge current during the second precharge period.

In a preferred embodiment, after the first pre-charge period, whether the converting capacitor is short-circuited or leaky is determined according to whether the voltage of the low-voltage end of the converting capacitor exceeds a voltage threshold.

In a preferred embodiment, after the second pre-charge period, it is determined whether the output capacitor is short-circuited or leaky or whether the pre-charge is not completed according to whether the output voltage does not exceed a voltage threshold.

In a preferred embodiment, the switched-capacitor power conversion circuit is configured to: the first converting transistor, the second converting transistor, a third converting transistor and a fourth converting transistor of the plurality of converting transistors are sequentially connected in series between the input power source and the ground potential, wherein the first converting transistor and the second converting transistor are coupled to one end of the converting capacitor, the third converting transistor and the fourth converting transistor are coupled to the other end of the converting capacitor, and the second converting transistor, the third converting transistor and the output capacitor are coupled to the output node; in the switching conversion mode, the first conversion transistor, the second conversion transistor, the third conversion transistor and the fourth conversion transistor are switched in a time-sharing manner, so that the conversion capacitors are electrically connected between the input power supply and the output node in a time-sharing manner and between the output node and the ground potential in a time-sharing manner, the voltage of the input power supply is 2 times of the voltage of the output power supply, and the current of the input power supply is 1/2 times of the current of the output power supply.

In a preferred embodiment, in the switching transition mode: the voltage of the input power supply is a constant voltage, and the voltage of the output power supply is also a constant voltage; or the current of the input power supply is a constant current, and the current of the output power supply is also a constant current.

In another aspect, the present invention also provides a switching control circuit for controlling the operation of a switching capacitor and an output capacitor for switching an input power to generate an output power at an output node, the output capacitor being coupled to the output node; the conversion control circuit includes: a plurality of transfer transistors coupled to the transfer capacitor; a precharge control circuit for controlling the plurality of transfer transistors in a precharge mode; and a switching control circuit for controlling the plurality of switching transistors in a switching mode; in the switching conversion mode, the switching control circuit controls the plurality of conversion transistors to switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and one voltage division node of the at least one voltage division node or between one voltage division node of the at least one voltage division node and the ground potential in a time-sharing and alternate manner, or when there are multiple voltage dividing nodes, the output power is generated by converting the input power by electrically connecting between a pair of the at least one voltage dividing node, wherein the output node corresponds to one of the at least one voltage dividing node, wherein in a steady state, the voltage of the input power supply is k times of the voltage of the output power supply, and the current of the input power supply is 1/k times of the current of the output power supply, wherein k is a natural number greater than 1; wherein in the precharge mode, the precharge control circuit controls the plurality of transfer transistors to perform the following precharge operations: controlling a first transfer transistor of the plurality of transfer transistors to provide a first pre-charge current to pre-charge the transfer capacitor to a predetermined voltage level during a first pre-charge period, and to prevent charging of the output capacitor during the first pre-charge period; and during a second precharge period, controlling a second transfer transistor of the plurality of transfer transistors to provide a second precharge current through the output node to precharge the output capacitor to the predetermined voltage level, the second precharge current being used to supply a load current to a load circuit; the first pre-charge current is not greater than a first predetermined current level, the second pre-charge current is not greater than a second predetermined current level, and the load current is not less than a third predetermined current level.

From another aspect, the present invention also provides a control method for controlling operations of a plurality of converting transistors, a converting capacitor and an output capacitor to convert an input power to generate an output power at an output node, the output capacitor being coupled to the output node; the control method comprises the following steps: in a switching conversion mode, the switching control circuit controls the plurality of conversion transistors to switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and a voltage-dividing node of at least one voltage-dividing node, or between a voltage-dividing node of at least one voltage-dividing node and a ground potential, or when a plurality of voltage-dividing nodes are provided, between a pair of the at least one voltage-dividing nodes, so as to convert the input power supply to generate the output power supply, wherein the output node corresponds to a node of the at least one voltage-dividing node, wherein in a steady state, the voltage of the input power supply is k times the voltage of the output power supply, and the current of the input power supply is 1/k times the current of the output power supply, wherein k is a natural number greater than 1; and in a precharge mode, controlling the plurality of transfer transistors to perform a precharge operation, wherein the precharge operation comprises the steps of: controlling a first transfer transistor of the plurality of transfer transistors to provide a first pre-charge current to pre-charge the transfer capacitor to a predetermined voltage level during a first pre-charge period, and to prevent charging of the output capacitor during the first pre-charge period; and during a second precharge period, controlling a second transfer transistor of the plurality of transfer transistors to provide a second precharge current through the output node to precharge the output capacitor to the predetermined voltage level, the second precharge current being used to supply a load current to a load circuit; the first pre-charge current is not greater than a first predetermined current level, the second pre-charge current is not greater than a second predetermined current level, and the load current is not less than a third predetermined current level.

The purpose, technical content, features and effects of the invention will be more easily understood through the following detailed description of specific embodiments.

Drawings

Fig. 1A and 1B show a capacitive power conversion circuit in the prior art.

Fig. 2 is a block diagram of a switched capacitor power conversion circuit according to an embodiment of the invention.

Fig. 3 is a schematic diagram of a switched capacitor power conversion circuit according to an embodiment of the invention.

Fig. 4 is a waveform diagram illustrating an operation of a switched capacitor power converter circuit according to an embodiment of the invention.

Fig. 5 is a schematic diagram of a switched capacitor power conversion circuit according to an embodiment of the invention.

Fig. 6 is a schematic diagram of an embodiment of a sub-conversion control circuit in the switched capacitor power conversion circuit according to the invention.

Fig. 7 is a schematic diagram of another embodiment of a precharge control circuit in the switched capacitor power converter circuit according to the present invention.

Fig. 8 is a schematic diagram of another embodiment of a switched capacitor power converter circuit according to the present invention.

Description of the symbols in the drawings

101A to 101B, 102 to 103, 105, 108: switched capacitor power conversion circuit

20: conversion control circuit

21, 27: pre-charging control circuit

22: switching control circuit

26: sub-conversion control circuit

271: clamping circuit

30: load circuit

CF: conversion capacitor

CP, CN: switching node

Cout: output capacitor

Icf, IQ 1: electric current

Iin: input current

Ild: load current

Iout: output current

Iref 1: reference current source

k: current amplification factor

L11, L12, L21, L22: voltage level of

Lcf, Lout: current level

Lscf, Lsco: voltage threshold value

Lsw: high potential

Nd 1-Ndx: voltage dividing node

Nout: output node

Q1 to Q4, Qm: switching transistor

Q1C-Q4C: switching control signals

Q1m, Q4 m: current control transistor

S1, S2: selection switch

SEL: mode switching signal

T1, T2: precharge period

Tbal: period of equilibrium

Tdet1, Tdet 2: time period

Vin: input voltage

Vout: output voltage

Detailed Description

The drawings in the present disclosure are schematic and are intended to show the coupling relationship between circuits and the relationship between signal waveforms, and the circuits, signal waveforms and frequencies are not drawn to scale.

Fig. 2 shows a block diagram of a switched-capacitor power conversion circuit (switched-capacitor power conversion circuit 102) according to an embodiment of the invention. In one embodiment, as shown in fig. 2, the switched-capacitor power conversion circuit 102 includes a conversion capacitor CF, a plurality of conversion transistors (e.g., the conversion transistors Q1-Q4 shown in fig. 2), and an output capacitor Cout. As shown in fig. 2, in the present embodiment, the converting transistors Q1-Q4 are sequentially connected in series between the input power source and the ground potential, wherein the converting transistors Q1 and Q2 are coupled to one end of the converting capacitor CF (e.g., the switching node CP shown in fig. 2), the converting transistors Q3 and Q4 are coupled to the other end of the converting capacitor CF (e.g., the switching node CN shown in fig. 2), and the converting transistors Q2, Q3, CF and the output capacitor Cout are coupled to the output node Nout. The switching control signals Q1C-Q4C are used to control the switching transistors Q1-Q4, respectively.

In one embodiment, as shown in fig. 2, the switched-capacitor power conversion circuit 102 has two operation modes: the switching transistors (e.g., Q1-Q4 shown in fig. 2) in the switched capacitor type power conversion circuit 102 can be controlled by the precharge control circuit 21 and the switching control circuit 22 respectively in the precharge mode and the switched conversion mode to realize the precharge operation and the switched power conversion operation. The mode switching signal SEL is used to control the selection switches S1 and S2 to determine how the transfer transistors operate.

Referring to fig. 2, in the switching conversion mode, according to the present invention, the electrical connection configuration of the conversion capacitor CF is switched by a plurality of conversion transistors (e.g., the conversion transistors Q1-Q4) to convert the input power to generate the output power. In detail, in the switching conversion mode, the conversion transistor Q1, the conversion transistor Q2, the conversion transistor Q3 and the conversion transistor Q4 are switched in time division, so that the conversion capacitor CF is alternately electrically connected between the input power and the output node Nout in time division and between the output node Nout and the ground potential in time division to convert the input power to generate the output power. The input power source has an input voltage Vin and an input current Iin, and the output power source has an output voltage Vout and an output current Iout. Specifically, in the present embodiment, through the above-mentioned operation of switching power supply conversion, the input voltage Vin is 2 times the output voltage Vout, and the current of the input power supply is 1/2 times the current of the output power supply.

Referring to fig. 2, fig. 3 and fig. 4, fig. 3 shows a schematic diagram of a switched-capacitor power conversion circuit (switched-capacitor power conversion circuit 103) according to an embodiment of the present invention, and fig. 4 shows an operation waveform diagram corresponding to an embodiment of the switched-capacitor power conversion circuit according to the present invention. In one embodiment, as shown in fig. 3, in the pre-charge mode, the conversion transistor Q1 of the switched-capacitor power conversion circuit 103 may be configured as a current mirror circuit for providing a first pre-charge current to pre-charge the conversion capacitor CF to a predetermined voltage level during a first pre-charge period (e.g., T1 of fig. 4), and for avoiding charging the output capacitor Cout during the first pre-charge period T1. Specifically, in the present embodiment, the first pre-charge current corresponds to the current Icf in the first pre-charge period T1 in fig. 4, and the predetermined voltage level corresponds to CP pre-charged to Vin/2 in the first pre-charge period T1 in fig. 4, for example.

In one embodiment, during the first precharge period T1, the transfer transistor Q2 is controlled to be non-conductive, as shown in fig. 4, Q2C is controlled to be low to be non-conductive, so as to avoid charging the output capacitor Cout.

Then, in a second pre-charge period (e.g., T2 of fig. 4), the converting transistor Q2 is controlled to provide a second pre-charge current through the output node Nout to pre-charge the output capacitor Cout to the predetermined voltage level Vin/2, and the second pre-charge current is simultaneously used to supply the load current Ild to the load circuit 30. In detail, in the present embodiment, the second precharge current corresponds to Iout in the second precharge period T2 shown in fig. 4, wherein the second precharge current simultaneously provides the current Icout for charging the output capacitor Cout and also simultaneously supplies the load current Ild to the load circuit 30. In addition, as shown in fig. 4, the positive terminal of the output capacitor Cout (corresponding to the switching node CP) is precharged to Vin/2 within the second precharge period T2.

Specifically, as shown in fig. 3, in the precharge mode, the current control transistor Q1m generates the switching control signal Q1C (e.g., the voltage level L11 between T1 in fig. 4) according to the reference current source Iref1 to control the switching transistor Q1 to generate the aforementioned first precharge current (e.g., the current Iin or Icf between T1 in fig. 4). In addition, the conversion control signal Q2C may also control the conversion transistor Q2 in a current mirror circuit manner during the precharge mode to generate the aforementioned second precharge current (e.g., the current Iout between T2 in fig. 4). Specifically, as shown in fig. 3, in the present embodiment, during the second precharge period T2, the transfer control signal Q2C (e.g., the voltage level L21 between T2 in fig. 4) comes from another current mirror circuit to control the transfer transistor Q2, so as to generate the aforementioned first precharge current (e.g., the current Iout between T2 in fig. 4). It should be noted that, for simplicity of explanation, the aforementioned selection switch is omitted in the embodiment of fig. 3 to illustrate that the switching transistor is controlled by the precharge control circuit 21.

In one embodiment, the current flowing out terminal of the conversion capacitor CF can be limited simultaneously when the conversion capacitor CF is precharged, and specifically, as shown in fig. 3, in one embodiment, in the precharge mode, the current control transistor Q4m generates the conversion control signal Q4C according to the reference current source to control the conversion transistor Q4 to generate a current with the same level as the first precharge current, for example.

According to the above-described operation divided into two pre-charge periods of the present invention, in the first pre-charge period T1, since the conversion capacitor CF is only pre-charged to the predetermined voltage level, the output capacitor Cout is prevented from being charged, and at the same time, in the first pre-charge period T1, since the output voltage Vout is still at the low potential, the load circuit 30 does not draw a current, in other words, in the first pre-charge period T1, the first pre-charge current provided by the conversion transistor Q1 is fully used to pre-charge the conversion capacitor CF, and in the second pre-charge period T2, the output capacitor Cout is simultaneously pre-charged, and at the same time, the load current Ild is supplied to the load circuit 30.

Specifically, in one embodiment, the first pre-charge current is not greater than a first predetermined current level, which in one embodiment is related to an upper current limit of the transfer transistor Q1 in the pre-charge mode to avoid the transfer transistor Q1 from being too hot or burning out.

In one embodiment, the second pre-charge current is not greater than a second predetermined current level, which in one embodiment is related to the upper current limit of the transfer transistor Q2 in the pre-charge mode to avoid the transfer transistor Q2 from being too hot or burning out.

In one embodiment, the load current Ild is not less than a third predetermined current level, which is related to the current requirement of the load circuit 30 during heavy boot.

In one embodiment, the sum of the first precharge period T1 and the second precharge period T2 is less than the precharge time limit, i.e., the precharge is completed within the precharge time limit.

It should be noted that, due to the aforementioned technical features of the present invention, only the output capacitor Cout of the conversion capacitor CF is precharged in the first precharge period T1, and the output capacitor Cout is prevented from being precharged, so that the load current Ild is not supplied to the load circuit 30 in the first precharge period T1, therefore, compared with other prior art in which the conversion capacitor CF and the output capacitor Cout are precharged simultaneously during the precharge, and the load current Ild is supplied to the load circuit 30 simultaneously, the present invention can complete the precharge within the precharge time limit under the limited precharge current limit, and can also meet the requirement of the load circuit 30 for heavy boot.

In one embodiment, the first predetermined current level (e.g., Lcf of fig. 4) is equal to the second predetermined current level (e.g., Lout of fig. 4). In one embodiment, the load current Ild is smaller than the second pre-charge current, so that the second pre-charge current can pre-charge the output capacitor Cout to the predetermined voltage level during the pre-charge time period in addition to supplying the load current Ild.

In addition, the first pre-charge current and the second pre-charge current are also respectively larger than the corresponding current lower limit level so as to satisfy the limit of the pre-charge time limit.

Referring to fig. 4, in the present embodiment, after the precharge is completed, the switched capacitor type power conversion circuit (e.g. 103) is set to the switched conversion mode, and the switching conversion transistors (e.g. Q1-Q4) are switched to convert the input power in the switched conversion mode to generate the output power, and for example, as shown in fig. 4, the conversion control signals Q1C and Q2C are switched between the low potential and the high potential (Lsw) in the switched conversion mode to control the switching conversion transistors Q1 and Q2 to perform the switched capacitor type power conversion.

In one embodiment, as shown in fig. 4, the switching capacitor type power conversion circuit (e.g., 103) further controls the conversion transistor Q1 and the conversion transistor Q2 to balance the voltages of the conversion capacitor CF and the output capacitor Cout to a predetermined voltage level (e.g., Vin/2) during the balance period Tbal, and in one embodiment, for example, controls the second conversion transistor Q2 to have the aforementioned second predetermined current level during the balance period Tbal to balance the voltages of the conversion capacitor CF and the output capacitor Cout. Specifically referring to fig. 4 for example, during the balance period Tbal, the voltage level of the transition control signal Q2C is controlled to be L22, in one embodiment, L22 is equal to L21.

Referring to fig. 2 and 4, in the present embodiment, the conversion transistor Q1 and the conversion transistor Q2 are connected in series, and the conversion transistor Q1 also provides at least a second precharge current to the switching node (CP) during the second precharge period T2, so that the conversion transistor Q2 can provide the second precharge current at the output node Nout. Specifically, referring to fig. 4 for example, during the second precharge period T2, the voltage level of the transition control signal Q1C is controlled to L12, in one embodiment, L12 is equal to L11.

Referring to fig. 4, in an embodiment, after the first precharge period T1, it is determined whether the conversion capacitor CF is shorted or has leakage according to whether the voltage of the low voltage terminal (the switching node CN) of the conversion capacitor CF exceeds the voltage threshold Lscf. As shown in fig. 4, in the present embodiment, the voltage of the switching node CN does not exceed the voltage threshold Lscf in the time period Tdet1, so that it is determined that the converting capacitor CF does not short-circuit or leak, and the operation is continued smoothly. On the other hand, if the voltage of the switching node CN does not exceed the voltage threshold Lscf within the time period Tdet1, the system or the user may be powered off or notified.

Referring to fig. 4, in an embodiment, after the second precharge period T2, it is determined whether the output capacitor Cout is shorted or leaked or whether the precharge is not completed according to whether the output voltage Vout does not exceed the voltage threshold Lsco. As shown in fig. 4, in the present embodiment, the output voltage Vout exceeds the voltage threshold Lsco in the time period Tdet2, so that it is determined that the output capacitor Cout is not short-circuited or leaked, and it is determined that the precharge is completed and the operation is continued smoothly. On the other hand, if the output voltage Vout does not exceed the voltage threshold Lscf within the time period Tdet2, the system or the user may be powered off or notified.

Referring to fig. 2, in one embodiment, the plurality of transfer transistors (e.g., Q1-Q4), the precharge control circuit 21, the switching control circuit 22 and the selection switches S1 and S2 may be integrated into an integrated circuit (i.e., the transfer control circuit 20 shown in fig. 2). In one embodiment, the output node Ncout corresponds to the output pin of the switching control circuit 20, the switching nodes CP and CN correspond to the switching positive terminal pin and the switching negative terminal pin of the switching control circuit 20, respectively, and the input power (Vin) corresponds to the power input pin of the switching control circuit 20.

Fig. 5 shows a schematic diagram of a switched-capacitor power conversion circuit (the switched-capacitor power conversion circuit 105) according to an embodiment of the present invention, which is different from the aforementioned embodiments shown in fig. 2 and 3, and the spirit of the present invention can be expanded. The switched-capacitor power converter 105 includes at least one conversion capacitor CF, a plurality of conversion transistors (e.g., the conversion transistors Q1 Qm shown in fig. 5, where m is a positive integer greater than 1), and an output capacitor Cout. In the present embodiment, in the switching conversion mode, the conversion transistors Q1-Qm are periodically switched in a time-sharing manner, such that the conversion capacitor CF is periodically and alternately electrically connected between the input power source and any one of the voltage dividing nodes (Nd 1-Ndx), between one pair of the voltage dividing nodes Nd 1-Ndx (in the embodiment with a plurality of voltage dividing nodes), or between any one of the voltage dividing nodes Nd 1-Ndx and the ground potential, so as to convert the input power source and generate the output power source at the output node Nout. Wherein the output node corresponds to one of at least one voltage division node (Nd 1-Ndx), and x is greater than or equal to 1. In this embodiment, through the above-mentioned switching power conversion operation, in a steady state, the input voltage Vin is k times the output voltage Vout, and the current of the input power is 1/k times the current of the output power, where k is a real number greater than 1.

In one embodiment, the number of the conversion capacitors is not limited to 1, and a plurality of conversion capacitors may be included, for example, in an interleaving manner to perform the above-mentioned capacitive power conversion. In this case, the pre-charging of the plurality of conversion capacitors may be performed sequentially or simultaneously, and may be selected according to practical application conditions.

Referring back to fig. 2, in one aspect, the switched-capacitor power conversion circuit 102 is a specific example of the switched-capacitor power conversion circuit 105, wherein the switched-capacitor power conversion circuit 102 has a voltage dividing node corresponding to the output node Nout, and a current amplification factor k of the switched-capacitor power conversion circuit 102 is equal to 2.

In addition, in one embodiment, the predetermined voltage level of the pre-charge stage is related to the output voltage Vout and the real number k.

Fig. 6 shows a schematic diagram of an embodiment of a sub-conversion control circuit (sub-conversion control circuit 26) in the switched capacitor power conversion circuit of the present invention, and in an embodiment, the pre-charge control circuit 21, the switching control circuit 22 and the selection switches S1, S2 may be integrated into an integrated circuit (i.e., the sub-conversion control circuit 26 shown in fig. 6). In one embodiment, the sub-conversion control circuit 26 is configured to generate the conversion control signals Q1C-QmC to control the conversion transistors Q1-Qm, respectively.

Fig. 7 shows another embodiment of the precharge control circuit in the switched capacitor power converter circuit of the present invention (the precharge control circuit 27). in one embodiment, as shown in fig. 7, the precharge control circuit 27 includes a clamp circuit 271 for generating a conversion control signal Q1C (e.g., voltage level L11 or L12 in fig. 4) according to a current IQ1 flowing through a conversion transistor Q1 to control the conversion transistor Q1 to generate the aforementioned precharge current (e.g., current Iin or Icf in fig. 4). Other transfer transistors (e.g., Q2) can also control the current through the transfer transistor in the clamp control manner (e.g., L21 or L22 in FIG. 4).

Fig. 8 shows another embodiment of the switched capacitor power converter circuit (the switched capacitor power converter circuit 108) according to the present invention, in an embodiment, in a switched mode, as shown in fig. 8, the input power supplies power to the switched capacitor power converter circuit 108 in a constant current mode (i in fig. 8), in which case, in the switched mode, the input current Iin is a fixed current and the output current Iout is also a fixed current, but in the foregoing, the output current Iout is k times (corresponding to 2 times in the embodiment) of the input current Iin. In this embodiment, the load circuit 30 may correspond to a rechargeable battery, for example.

The present invention has been described with respect to the preferred embodiments, but the above description is only for the purpose of making the content of the present invention easy to understand for those skilled in the art, and is not intended to limit the scope of the present invention. The embodiments described are not limited to single use, but may be used in combination, for example, two or more embodiments may be combined, and some components in one embodiment may be substituted for corresponding components in another embodiment. Further, equivalent variations and combinations are contemplated by those skilled in the art within the spirit of the present invention, and the term "processing or computing or generating an output result based on a signal" is not limited to the signal itself, and includes, if necessary, performing voltage-to-current conversion, current-to-voltage conversion, and/or scaling on the signal, and then processing or computing the converted signal to generate an output result. It is understood that equivalent variations and combinations, not necessarily all illustrated, will occur to those of skill in the art, which combinations are not necessarily intended to be limiting. Accordingly, the scope of the present invention should be determined to encompass all such equivalent variations as described above.

Claims

1. A switched capacitor power conversion circuit, comprising:

a conversion capacitor;

a plurality of conversion transistors coupled to the conversion capacitor for converting an input power to generate an output power at an output node; and

an output capacitor coupled to the output node;

in a switching conversion mode, the plurality of conversion transistors switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and a voltage-dividing node of at least one voltage-dividing node, or between a voltage-dividing node of at least one voltage-dividing node and a ground potential, or when a plurality of voltage-dividing nodes are provided, between a pair of the at least one voltage-dividing nodes, so as to convert the input power supply and generate the output power supply, wherein the output node corresponds to one node of the at least one voltage-dividing node, wherein in a steady state, the voltage of the input power supply is k times of the voltage of the output power supply, and the current of the input power supply is 1/k times of the current of the output power supply, wherein k is a natural number greater than 1;

in a pre-charge mode, the switched capacitor power conversion circuit performs the following pre-charge operations:

controlling a first transfer transistor of the plurality of transfer transistors to provide a first pre-charge current to pre-charge the transfer capacitor to a predetermined voltage level during a first pre-charge period, and to prevent charging of the output capacitor during the first pre-charge period; and

controlling a second transfer transistor of the plurality of transfer transistors to provide a second pre-charge current through the output node to pre-charge the output capacitor to the predetermined voltage level during a second pre-charge period, the second pre-charge current simultaneously serving to supply a load current to a load circuit;

the first pre-charge current is not greater than a first predetermined current level, the second pre-charge current is not greater than a second predetermined current level, and the load current is not less than a third predetermined current level.

2. The switched-capacitor power conversion circuit of claim 1, wherein the switched-mode conversion mode is operated after the pre-charge mode.

3. The switched-capacitor power conversion circuit as claimed in claim 1, wherein the first pre-charge period is earlier than the second pre-charge period.

4. The switched-capacitor power conversion circuit of claim 1, wherein the switched-capacitor power conversion circuit further controls the first and second transfer transistors to balance the voltages of the transfer capacitor and the output capacitor to the predetermined voltage level during a balance period.

5. The switched-capacitor power conversion circuit of claim 1, wherein the first and second transfer transistors are connected in series, wherein one end of the transfer capacitor, the first transfer transistor and the second transfer transistor is coupled to a switching node, and the output capacitor is coupled to the other end of the second transfer transistor, wherein the first transfer transistor provides at least the second pre-charge current to the switching node during the second pre-charge period.

6. The switched-capacitor power conversion circuit of claim 1, wherein the first predetermined current level is equal to the second predetermined current level, and the load current is less than the second pre-charge current.

7. The switched-capacitor power conversion circuit of claim 1, wherein in the precharge mode, the first conversion transistor is configured as a current source or a current clamp circuit for providing the first precharge current.

8. The switched-capacitor power converter circuit of claim 1, wherein during the second pre-charge period, the second converting transistor is configured as a current source or a current clamp for providing the second pre-charge current.

9. The switched-capacitor power conversion circuit of claim 1, wherein after the first pre-charge period, it is determined whether the switching capacitor is shorted or leaky according to whether the voltage of the low-voltage terminal of the switching capacitor exceeds a voltage threshold.

10. The switched-capacitor power conversion circuit as claimed in claim 1, wherein after the second pre-charge period, determining whether the output capacitor is shorted or leaky or whether the pre-charge is not completed is based on whether the output voltage does not exceed a voltage threshold.

11. The switched-capacitor power conversion circuit of claim 1, configured to:

the first converting transistor, the second converting transistor, a third converting transistor and a fourth converting transistor of the plurality of converting transistors are sequentially connected in series between the input power source and the ground potential, wherein the first converting transistor and the second converting transistor are coupled to one end of the converting capacitor, the third converting transistor and the fourth converting transistor are coupled to the other end of the converting capacitor, and the second converting transistor, the third converting transistor and the output capacitor are coupled to the output node;

in the switching conversion mode, the first conversion transistor, the second conversion transistor, the third conversion transistor and the fourth conversion transistor are switched in a time-sharing manner, so that the conversion capacitors are electrically connected between the input power supply and the output node in a time-sharing manner and between the output node and the ground potential in a time-sharing manner, the voltage of the input power supply is 2 times of the voltage of the output power supply, and the current of the input power supply is 1/2 times of the current of the output power supply.

12. The switched-capacitor power conversion circuit of claim 1, wherein in the switched conversion mode:

the voltage of the input power supply is a constant voltage, and the voltage of the output power supply is also a constant voltage; or

The current of the input power supply is a constant current, and the current of the output power supply is also a constant current.

13. A conversion control circuit is used for controlling the operation of a conversion capacitor and an output capacitor, so as to convert an input power source and generate an output power source at an output node, wherein the output capacitor is coupled with the output node; the conversion control circuit includes:

a plurality of transfer transistors coupled to the transfer capacitor;

a precharge control circuit for controlling the plurality of transfer transistors in a precharge mode; and

a switching control circuit for controlling the plurality of switching transistors in a switching mode;

in the switching conversion mode, the switching control circuit controls the plurality of conversion transistors to switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and one voltage division node of the at least one voltage division node or between one voltage division node of the at least one voltage division node and the ground potential in a time-sharing and alternate manner, or when there are multiple voltage dividing nodes, the output power is generated by converting the input power by electrically connecting between a pair of the at least one voltage dividing node, wherein the output node corresponds to one of the at least one voltage dividing node, wherein in a steady state, the voltage of the input power supply is k times of the voltage of the output power supply, and the current of the input power supply is 1/k times of the current of the output power supply, wherein k is a natural number greater than 1;

wherein in the precharge mode, the precharge control circuit controls the plurality of transfer transistors to perform the following precharge operations:

14. The transition control circuit of claim 13, wherein the switched transition mode is operated after the precharge mode.

15. The conversion control circuit of claim 13, wherein the first precharge period is earlier than the second precharge period.

16. The conversion control circuit of claim 13, wherein the switched-capacitor power conversion circuit further controls the first conversion transistor and the second conversion transistor to balance the voltages of the conversion capacitor and the output capacitor to the predetermined voltage level during a balance period.

17. The conversion control circuit of claim 13, wherein the first conversion transistor and the second conversion transistor are connected in series, wherein one end of the conversion capacitor, the first conversion transistor and the second conversion transistor is coupled to a switching node, and the output capacitor is coupled to the other end of the second conversion transistor, wherein the first conversion transistor provides at least the second precharge current to the switching node during the second precharge period.

18. The transition control circuit of claim 13, wherein the first predetermined current level is equal to the second predetermined current level, and the load current is less than the second pre-charge current.

19. The transition control circuit of claim 13, wherein in the precharge mode, the first transition transistor is configured as a current source or a current clamp circuit for providing the first precharge current.

20. The slew control circuit of claim 13, where in the second precharge period the second slew transistor is configured as a current source or a current clamp to provide the second precharge current.

21. The conversion control circuit of claim 13, wherein after the first pre-charge period, determining whether the conversion capacitor is shorted or leaky according to whether the voltage of the low-voltage terminal of the conversion capacitor exceeds a voltage threshold.

22. The conversion control circuit of claim 13, wherein after the second pre-charge period, determining whether the output capacitor is shorted or leaky or whether pre-charge is not completed is based on whether the output voltage does not exceed a voltage threshold.

23. The conversion control circuit of claim 13, configured to:

24. The transition control circuit of claim 13, wherein in the switching transition mode:

25. A control method is used for controlling the operation of a plurality of conversion transistors, a conversion capacitor and an output capacitor, so as to convert an input power source and generate an output power source at an output node, wherein the output capacitor is coupled with the output node; the control method comprises the following steps:

in a switching conversion mode, the switching control circuit controls the plurality of conversion transistors to switch the electrical connection relationship of the conversion capacitor in a time-sharing and alternate manner, so that the conversion capacitor is periodically and alternately electrically connected between the input power supply and a voltage-dividing node of at least one voltage-dividing node, or between a voltage-dividing node of at least one voltage-dividing node and a ground potential, or when a plurality of voltage-dividing nodes are provided, between a pair of the at least one voltage-dividing nodes, so as to convert the input power supply to generate the output power supply, wherein the output node corresponds to a node of the at least one voltage-dividing node, wherein in a steady state, the voltage of the input power supply is k times the voltage of the output power supply, and the current of the input power supply is 1/k times the current of the output power supply, wherein k is a natural number greater than 1; and

in a precharge mode, controlling the plurality of transfer transistors to perform a precharge operation, wherein the precharge operation comprises the steps of:

26. The control method of claim 25 wherein the switched transition mode is operated after the precharge mode.

27. The control method as claimed in claim 25, wherein the first precharge period is earlier than the second precharge period.

28. The control method as set forth in claim 25, wherein the precharge operation further comprises the steps of: and controlling the first converting transistor and the second converting transistor to balance the voltages of the converting capacitor and the output capacitor to the preset voltage level in a balance time interval.

29. The method of claim 25, wherein the first predetermined current level is equal to the second predetermined current level, and the load current is less than the second pre-charge current.

30. The control method as set forth in claim 25, wherein the precharge operation further comprises the steps of: after the first pre-charging period, whether the conversion capacitor is short-circuited or leaks is judged according to whether the voltage of the low-voltage end of the conversion capacitor exceeds a voltage threshold value.

31. The control method as set forth in claim 25, wherein the precharge operation further comprises the steps of: after the second pre-charging period, according to whether the output voltage does not exceed a voltage threshold, whether the output capacitor is short-circuited or leaked or whether the pre-charging operation cannot be completed is judged.