CN114447095A - Composite silicon carbide substrate and preparation method thereof - Google Patents
Composite silicon carbide substrate and preparation method thereof Download PDFInfo
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 198
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 192
- 239000000758 substrate Substances 0.000 title claims abstract description 58
- 239000002131 composite material Substances 0.000 title claims abstract description 32
- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000013078 crystal Substances 0.000 claims abstract description 125
- 239000000919 ceramic Substances 0.000 claims abstract description 44
- 238000000034 method Methods 0.000 claims abstract description 35
- 239000002245 particle Substances 0.000 claims abstract description 29
- 239000000203 mixture Substances 0.000 claims abstract description 4
- 239000000843 powder Substances 0.000 claims description 27
- 230000006698 induction Effects 0.000 claims description 16
- 229910021431 alpha silicon carbide Inorganic materials 0.000 claims description 15
- 238000000227 grinding Methods 0.000 claims description 10
- 238000005498 polishing Methods 0.000 claims description 8
- 238000002425 crystallisation Methods 0.000 claims description 6
- 230000008025 crystallization Effects 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 229910052593 corundum Inorganic materials 0.000 claims description 5
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 4
- 238000010899 nucleation Methods 0.000 claims description 4
- 230000006911 nucleation Effects 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- 230000009467 reduction Effects 0.000 claims description 3
- 238000005245 sintering Methods 0.000 claims description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 1
- 229910052799 carbon Inorganic materials 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 21
- 230000007547 defect Effects 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 104
- 239000004065 semiconductor Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000000407 epitaxy Methods 0.000 description 3
- 238000005336 cracking Methods 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 125000004433 nitrogen atom Chemical group N* 0.000 description 2
- 125000004437 phosphorous atom Chemical group 0.000 description 2
- 238000004321 preservation Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000007847 structural defect Effects 0.000 description 1
- 230000008093 supporting effect Effects 0.000 description 1
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Abstract
The invention provides a composite silicon carbide substrate, which comprises a silicon carbide single crystal layer, a silicon carbide polycrystal layer and a silicon carbide ceramic layer positioned between the silicon carbide single crystal layer and the silicon carbide polycrystal layer; the silicon carbide single crystal layer crystals are in a hexagonal phase 4H type, and the silicon carbide polycrystal layer crystal particles are in a cubic phase 3C type; the silicon carbide ceramic layer crystal particles are a mixture of a hexagonal phase 4H type and a cubic phase 3C type; the silicon carbide ceramic layer is close to one side of the silicon carbide single crystal layer, and the average size of hexagonal phase 4H type crystal particles of the silicon carbide ceramic layer is larger than that of 4H type crystal particles at other positions in the ceramic layer; the silicon carbide ceramic layer is close to one side of the silicon carbide polycrystal layer, and the average size of cubic phase 3C type crystal grains of the silicon carbide ceramic layer is larger than that of 3C type crystal grains at other positions in the ceramic layer. The method solves the problems of interface gaps and defects existing in the silicon carbide single crystal and polycrystalline composite substrate, can effectively keep the stable performance of the substrate and the compatibility with the subsequent vertical device process, and lays a foundation for the preparation of high-performance and low-cost silicon carbide-based devices.
Description
Technical Field
The invention relates to the field of semiconductor materials, in particular to a composite silicon carbide substrate and a preparation method thereof.
Background
Silicon carbide (SiC) has excellent physical properties, such as high forbidden band width (corresponding to high breakdown electric field and high power density), high electrical conductivity, high thermal conductivity, and the like. The silicon carbide wafer is used as a semiconductor substrate material, can be made into a silicon carbide-based power device and a microwave radio frequency device through links such as epitaxial growth, device manufacturing and the like, and is an important basic material for the development of the third-generation semiconductor industry. Commercial silicon carbide substrates are typically 350um or more thick, taking into account warpage during processing of the silicon carbide substrate, stresses introduced during epitaxy, and clamping issues during device processing. From the process of the existing silicon carbide power device, taking a vertical MOSFET as an example, in order to improve the longitudinal thermal conductance of the device and reduce the on-resistance of a vertical channel, after performing planar processes such as epitaxy 02 and pattern 05 on a 350um thick silicon carbide single crystal substrate 01, a thinning process needs to be performed on the silicon carbide single crystal substrate, and then a metal ohmic contact electrode is formed on the back surface of the thinned substrate 03 to serve as a drain electrode of the MOSFET. The thinning process removes the 200-300um thick single crystal substrate 04 as shown in fig. 1. It can be seen that most of the single crystal substrates only serve as sacrificial sheets to play a role in structural support, and after the sacrificial sheets are removed at the later stage of the process, the sacrificial sheets are not effectively utilized as final device function layers, so that the silicon carbide single crystal materials are greatly wasted.
Patent No. cn201780044382.x discloses a semiconductor substrate characterized by being composed of a single crystal SiC substrate and a polycrystalline SiC substrate, and an interface layer doped with nitrogen atoms or phosphorus atoms at a high concentration. The method reduces the resistance of the interfacial layer by doping defects. Patent CN201480038163.7 discloses a method for manufacturing a semiconductor substrate, which combines a single crystal of silicon carbide with a polycrystalline silicon of silicon carbide by bonding after the preparation treatment of surface doping, and grinding and polishing to obtain a substrate comprising a single crystal layer and a polycrystalline layer.
The above disclosed method partially solves the problem of loss of silicon carbide single crystal material. Patent No. cn201780044382.x, although the resistance of the interface layer is reduced by doping with nitrogen atoms or phosphorus atoms, these high concentrations of doping cause a large number of structural defects in the interface layer. In the single crystal polycrystalline composite substrate prepared by the patent CN201480038163.7 through the bonding process, a small gap 13, such as a gap with an equivalent diameter of about 10um and a height of about 5nm, remains at the interface between the silicon carbide single crystal layer 11 and the silicon carbide polycrystalline layer 12 inevitably during the bonding process, as shown in fig. 2. Whether doping defects or bonding gaps exist, the bonding force between the single crystal layer and the polycrystalline layer and the tensile strength in the direction perpendicular to the plane are seriously reduced, and the risks of cracking and failure exist in subsequent high-temperature processes for manufacturing devices, such as high-temperature CVD epitaxy, high-temperature ion implantation, high-temperature annealing and other processes.
Disclosure of Invention
The invention provides a composite silicon carbide substrate and a preparation method thereof, aiming at solving the problem of interface combination of a silicon carbide single crystal and a silicon carbide polycrystal composite substrate, effectively keeping the stability of the application performance of the substrate, ensuring the compatibility with the subsequent vertical device process and laying a foundation for the preparation of a high-performance low-cost silicon carbide-based device. Therefore, the invention adopts the following technical scheme:
a composite silicon carbide substrate, as shown in fig. 3, comprising a silicon carbide single crystal layer 1, a silicon carbide polycrystal layer 2, and a silicon carbide ceramic layer 3 located between the silicon carbide single crystal layer 1 and the silicon carbide polycrystal layer 2; the crystal of the silicon carbide single crystal layer 1 is hexagonal phase 4H type, and the crystal particle of the silicon carbide polycrystal layer 2 is cubic phase 3C type; the crystal particles of the silicon carbide ceramic layer 3 are a mixture of a hexagonal phase 4H type and a cubic phase 3C type;
wherein, the silicon carbide ceramic layer 3 is close to one side interface of the silicon carbide single crystal layer 1, and the average size of hexagonal phase 4H type crystal particles is larger than that of 4H type crystal particles at other positions in the ceramic layer; the silicon carbide ceramic layer 3 is close to one side interface of the silicon carbide polycrystal layer 2, and the average size of cubic phase 3C type crystal grains is larger than that of 3C type crystal grains at other positions in the ceramic layer.
Wherein the substrate has a tensile strength in a direction perpendicular to an in-plane direction of greater than 150 MPa.
Wherein the thickness of the silicon carbide ceramic layer is less than that of the silicon carbide single crystal layer; the thickness of the silicon carbide single crystal layer is smaller than that of the silicon carbide polycrystalline layer.
Wherein, the thickness of the substrate is 300-450um, preferably 330-370 um; the thickness of the silicon carbide ceramic layer is 1-30um, preferably 5 um; the thickness of the silicon carbide single crystal layer is 30-150um, preferably 80-90 um; the thickness of the silicon carbide polycrystalline layer is 100-400um, preferably 260-270 um.
The invention also provides a preparation method of the composite silicon carbide substrate, as shown in fig. 4, comprising the following steps:
1) placing a silicon carbide powder layer containing hexagonal phase alpha-SiC and cubic phase beta-SiC between a hexagonal phase 4H type silicon carbide single crystal layer and a cubic phase 3C type silicon carbide polycrystal layer for stacking;
2) applying pressure in the stacking direction and heating to a first target temperature, namely the crystallization temperature of the hexagonal phase 4H type crystals, and keeping for a certain time, so that after part of the hexagonal phase alpha-SiC powder close to one side of the silicon carbide single crystal layer grows into hexagonal phase 4H type crystal particles under the nucleation induction of the hexagonal phase single crystals, the alpha-SiC powder at other positions has no nucleation induction and the size is kept unchanged;
3) keeping pressure applied in the stacking direction, carrying out uniform temperature reduction, reducing the temperature to a second target temperature, namely the crystallization temperature of the cubic phase 3C type crystal, and keeping for a certain time to ensure that part of cubic phase beta-SiC powder close to one side of the silicon carbide cubic phase polycrystalline layer grows into cubic phase 3C type crystal particles under the induction of cubic phase polycrystalline crystal nuclei, while beta-SiC powder at other positions is not subjected to crystal nucleus induction and keeps the size unchanged;
4) releasing the pressure, and sintering the silicon carbide powder layer to form a silicon carbide ceramic layer to obtain a wafer with the silicon carbide single crystal layer and the silicon carbide polycrystalline layer combined together;
5) and grinding and polishing the surface of the wafer to obtain the composite silicon carbide substrate.
Wherein, the surface average roughness of the silicon carbide single crystal layer or the silicon carbide polycrystal layer provided with the silicon carbide powder layer is 0.1um-2 um.
Wherein the mass ratio of the hexagonal phase alpha-SiC to the cubic phase beta-SiC in the silicon carbide powder is 1: 1; the silicon carbide ceramic powder also contains Al2O3And Y2O3Powder; al (Al)2O3The mass ratio of the powder is less than 6 percent; y is2O3The mass ratio of the powder is less than 4 percent;
wherein the hexagonal phase alpha-SiC, the cubic phase beta-SiC and Al2O3And Y2O3Is less than 1 um.
Wherein the first target temperature is 1800-2100 ℃, preferably 1900 ℃, and the holding time is 1-5 hours; the second target is 1300-1500 ℃, preferably 1400 ℃, and the holding time is 1-5 hours; the uniform cooling speed of the first target temperature to the second target temperature is more than 20 ℃/min.
Wherein the applied pressure is greater than 10-20MPa, preferably 15 MPa.
The warpage of the composite silicon carbide substrate obtained by the method is less than 50 um; the average roughness of the surface of the silicon carbide single crystal layer is less than 1nm, and the average roughness of the surface of the silicon carbide polycrystalline layer is less than 100 nm; the composite substrate is circular, with a diameter of 50mm to 200mm, preferably 50mm, 100mm, 150mm, and 200 mm.
The polishing and grinding, including the conventional processes of rough grinding, fine grinding, Chemical Mechanical Polishing (CMP), and the like, can be implemented by those skilled in the art by using corresponding equipment.
According to the technical scheme, hexagonal phase alpha-SiC and cubic phase beta-SiC powder are placed between the hexagonal phase 4H type silicon carbide single crystal layer and the cubic phase 3C type silicon carbide polycrystalline layer and sintered at high temperature to form the silicon carbide ceramic layer, and the silicon carbide single crystal layer and the silicon carbide polycrystalline layer are combined together through the silicon carbide ceramic layer to form the composite silicon carbide substrate. At a first target temperature, namely the crystallization temperature of the hexagonal phase 4H type crystals, during heat preservation, on one side close to the silicon carbide hexagonal phase single crystal layer, under the induction of crystal nuclei of the hexagonal phase single crystals, part of the hexagonal phase alpha-SiC powder grows into hexagonal phase 4H type crystal particles, while alpha-SiC powder at other positions is not subjected to crystal nucleus induction, crystal grains cannot grow, and the silicon carbide ceramic layer on the one side forms strong bonding with the silicon carbide single crystal layer of the hexagonal phase 4H type; at a second target temperature, namely the crystallization temperature of the cubic phase 3C type crystal, during heat preservation, on one side close to the silicon carbide cubic phase polycrystalline layer, under the crystal nucleus induction of the cubic phase polycrystalline, part of cubic phase beta-SiC powder grows into cubic phase 3C type crystal particles, while beta-SiC powder at other positions has no crystal nucleus induction and cannot grow, so that the silicon carbide ceramic layer on the side can form strong combination with the cubic phase silicon carbide polycrystalline layer, and the problems of gaps, impurity defects and the like at the interface of the silicon carbide polycrystalline layer and the silicon carbide single crystal layer in the traditional process are effectively solved. The stability of the application performance of the substrate can be effectively kept, and the compatibility with the subsequent vertical device process is ensured. When the substrate is applied, the silicon carbide single crystal layer is used as a functional layer of a device, the silicon carbide polycrystalline layer and the silicon carbide ceramic layer are only used in the process middle process, a structural supporting effect is achieved, and after the plane process on one side of the silicon carbide single crystal layer is completed, the silicon carbide polycrystalline layer and the ceramic layer are completely removed. The total thickness of the composite substrate prepared by the method can be controlled between 300-450um, and the method is compatible with the existing semiconductor plane process and equipment. The silicon carbide single crystal layer and the silicon carbide polycrystal layer have strong bonding force, so that the composite substrate can bear a 1750 ℃ high-temperature process without cracking at an interface in subsequent application. The composite substrate provided by the invention can greatly improve the utilization rate of the silicon carbide single crystal, greatly reduce the manufacturing cost of the silicon carbide substrate, and is suitable for silicon carbide devices with vertical structures, such as silicon carbide MOSFETs and the like.
Drawings
FIG. 1 is a schematic view of a process for thinning a silicon carbide single crystal substrate in the prior art.
FIG. 2 is a schematic view showing a phenomenon in which voids exist at an interface between a silicon carbide single crystal and a silicon carbide polycrystalline composite substrate in the prior art.
FIG. 3 is a schematic structural view of a composite silicon carbide substrate according to the present invention.
FIG. 4 is a schematic view of a process for preparing a composite silicon carbide substrate according to the present invention.
Detailed Description
In order that the objects, features and advantages of the invention will be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings, which are illustrated in detail in order to provide a thorough understanding of the invention, but which may be carried out in other ways than those described. Accordingly, the invention is not limited by the specific implementations disclosed below.
According to the composite silicon carbide substrate and the preparation method thereof, the concrete implementation is described as follows:
a composite silicon carbide substrate, as shown in fig. 3, comprising a silicon carbide single crystal layer 1, a silicon carbide polycrystal layer 2, and a silicon carbide ceramic layer 3 located between the silicon carbide single crystal layer 1 and the silicon carbide polycrystal layer 2; the crystal particles of the silicon carbide single crystal layer 1 are hexagonal phase 4H type, and the crystal particles of the silicon carbide polycrystal layer 2 are cubic phase 3C type; the crystal particles of the silicon carbide ceramic layer 3 are a mixture of a hexagonal phase 4H type and a cubic phase 3C type;
wherein, the silicon carbide ceramic layer 3 is close to one side of the silicon carbide single crystal layer 1, and the average size of hexagonal phase 4H type crystal particles is larger than that of 4H type crystal particles at other positions in the ceramic layer; the silicon carbide ceramic layer 3 is close to one side of the silicon carbide polycrystalline layer 2, and the average size of cubic phase 3C type crystal grains of the silicon carbide ceramic layer is larger than that of 3C type crystal grains at other positions in the ceramic layer.
Wherein the substrate has a tensile strength of 160MPa in a direction perpendicular to the in-plane direction.
Wherein the thickness of the silicon carbide ceramic layer is less than that of the silicon carbide single crystal layer; the thickness of the silicon carbide single crystal layer is smaller than that of the silicon carbide polycrystalline layer.
Wherein the thickness of the substrate is 350 um; the thickness of the silicon carbide ceramic layer is 5 um; the thickness of the silicon carbide single crystal layer is 85 um; the thickness of the silicon carbide polycrystalline layer is 260 um.
A method for preparing a composite silicon carbide substrate, as shown in fig. 4, comprises the following steps:
1) placing a silicon carbide powder layer containing hexagonal phase alpha-SiC and cubic phase beta-SiC between a hexagonal phase 4H type silicon carbide single crystal layer and a cubic phase 3C type silicon carbide polycrystal layer for stacking;
2) applying pressure in the stacking direction and heating to a first target temperature for a certain time to grow a part of the hexagonal phase α -SiC powder close to one side of the silicon carbide single crystal layer into hexagonal phase 4H type crystal particles under the nuclear induction of the hexagonal phase single crystal, and then forming α -SiC powder at other positions with the average size of the hexagonal phase 4H type crystal particles at the interface larger than that of the hexagonal phase 4H type crystal particles at other positions without the nuclear induction;
3) keeping pressure applied in the stacking direction, carrying out uniform temperature reduction, reducing the temperature to a second target temperature, keeping the temperature for a certain time, and enabling part of cubic phase beta-SiC powder close to one side of the silicon carbide cubic phase polycrystalline layer to grow into cubic phase 3C type crystal particles under the induction of cubic phase polycrystalline crystal nuclei, wherein beta-SiC powder at other positions is kept unchanged without the induction of crystal nuclei, so that the average size of the cubic phase 3C type crystal particles at the interface is larger than that of the 3C type crystal particles at other positions;
4) releasing the pressure, and sintering the silicon carbide powder layer to form a silicon carbide ceramic layer to obtain a wafer with the silicon carbide single crystal layer and the silicon carbide polycrystalline layer combined together;
5) and grinding and polishing the surface of the wafer to obtain the composite silicon carbide substrate.
Wherein, the surface average roughness of the silicon carbide single crystal layer or the silicon carbide polycrystal layer provided with the silicon carbide powder layer is 1.5 um.
Wherein the mass ratio of the hexagonal phase alpha-SiC to the cubic phase beta-SiC in the silicon carbide powder is 1: 1; the silicon carbide powder also contains Al2O3And Y2O3Powder; al (Al)2O3The mass ratio of the powder is less than 6 percent; y is2O3The mass ratio of the powder is less than 4 percent;
wherein the hexagonal phase alpha-SiC, the cubic phase beta-SiC and Al2O3And Y2O3Is less than 1 um.
Wherein the first target temperature is 2000 ℃ and the holding time is 3 hours; the second target was 1400 ℃ with a holding time of 3 hours; the uniform cooling speed for cooling the first target temperature to the second target temperature is 25 ℃/min.
Wherein the applied pressure is 15 MPa.
The warpage of the composite silicon carbide substrate obtained by the method is less than 40 um; the average roughness of the surface of the silicon carbide single crystal layer is 1nm, and the average roughness of the surface of the silicon carbide polycrystalline layer is less than 100 nm; the composite silicon carbide substrate is circular, and has a diameter of 50mm to 200mm, preferably 50mm, 100mm, 150mm, and 200 mm.
The polishing and grinding, including the conventional processes of rough grinding, fine grinding, Chemical Mechanical Polishing (CMP), and the like, can be implemented by those skilled in the art by using corresponding equipment.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A composite silicon carbide substrate is characterized in that the substrate comprises a silicon carbide single crystal layer, a silicon carbide polycrystal layer and a silicon carbide ceramic layer positioned between the silicon carbide single crystal layer and the silicon carbide polycrystal layer; the silicon carbide single crystal layer crystals are in a hexagonal phase 4H type, and the silicon carbide polycrystal layer crystal particles are in a cubic phase 3C type; the silicon carbide ceramic layer crystal particles are a mixture of a hexagonal phase 4H type and a cubic phase 3C type;
wherein, the silicon carbide ceramic layer is close to one side interface of the silicon carbide single crystal layer, and the average size of hexagonal phase 4H type crystal particles is larger than that of 4H type crystal particles at other positions in the ceramic layer; the silicon carbide ceramic layer is close to one side interface of the silicon carbide polycrystal layer, and the average size of cubic phase 3C type crystal grains of the silicon carbide ceramic layer is larger than that of 3C type crystal grains at other positions in the ceramic layer.
2. A composite silicon carbide substrate according to claim 1 wherein: the substrate has a tensile strength in a direction perpendicular to the in-plane direction of greater than 150 MPa.
3. A composite silicon carbide substrate according to claim 1 wherein: the thickness of the silicon carbide ceramic layer is smaller than that of the silicon carbide single crystal layer; the thickness of the silicon carbide single crystal layer is smaller than that of the silicon carbide polycrystalline layer.
4. A composite silicon carbide substrate according to claim 1 or 3 wherein: the thickness of the substrate is 300-450 um; the thickness of the silicon carbide ceramic layer is 1-30 um; the thickness of the silicon carbide single crystal layer is 30-150 um; the thickness of the silicon carbide polycrystalline layer is 100-400 mu m.
5. A preparation method of a composite silicon carbide substrate is characterized by comprising the following steps:
1) placing a silicon carbide powder layer containing hexagonal phase alpha-SiC and cubic phase beta-SiC between a hexagonal phase 4H type silicon carbide single crystal layer and a cubic phase 3C type silicon carbide polycrystal layer for stacking;
2) applying pressure in the stacking direction and heating to a first target temperature, namely the crystallization temperature of the hexagonal phase 4H type crystals, and keeping for a certain time, so that after part of the hexagonal phase alpha-SiC powder close to one side of the silicon carbide single crystal layer grows into hexagonal phase 4H type crystal particles under the nucleation induction of the hexagonal phase single crystals, the alpha-SiC powder at other positions has no nucleation induction and the size is kept unchanged;
3) keeping pressure applied in the stacking direction, carrying out uniform temperature reduction, reducing the temperature to a second target temperature, namely the crystallization temperature of the cubic phase 3C type crystal, and keeping for a certain time to ensure that part of cubic phase beta-SiC powder close to one side of the silicon carbide cubic phase polycrystalline layer grows into cubic phase 3C type crystal particles under the induction of cubic phase polycrystalline crystal nuclei, while beta-SiC powder at other positions is not subjected to crystal nucleus induction and keeps the size unchanged;
4) releasing the pressure, and sintering the silicon carbide powder layer to form a silicon carbide ceramic layer to obtain a wafer with the silicon carbide single crystal layer and the silicon carbide polycrystalline layer combined together;
5) and grinding and polishing the surface of the wafer to obtain the composite silicon carbide substrate.
6. The method of claim 5, wherein the surface average roughness of the silicon carbide single crystal layer or the silicon carbide polycrystalline layer on which the silicon carbide powder layer is provided is 0.1um to 2 um.
7. The method of claim 5, wherein the silicon carbide powder comprises six carbon atomsThe mass ratio of the square phase alpha-SiC to the cubic phase beta-SiC is 1: 1; the silicon carbide powder also contains Al2O3And Y2O3Powder; al (Al)2O3The mass ratio of the powder is less than 6 percent; y is2O3The mass ratio of the powder is less than 4%.
8. The method of claim 7, wherein the hexagonal phase α -SiC, cubic phase β -SiC, Al are2O3And Y2O3Is less than 1 um.
9. The method as claimed in claim 5, wherein the first target temperature is 1800-; the second target is 1300-1500 ℃, and the holding time is 1-5 hours; the uniform cooling speed of the first target temperature to the second target temperature is more than 20 ℃/min.
10. The method of claim 5, wherein the applied pressure is greater than 10 MPa to 20 MPa.
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