CN114417250B - FPGA structure-oriented efficient capon calculation method - Google Patents

FPGA structure-oriented efficient capon calculation method Download PDF

Info

Publication number
CN114417250B
CN114417250B CN202210078680.3A CN202210078680A CN114417250B CN 114417250 B CN114417250 B CN 114417250B CN 202210078680 A CN202210078680 A CN 202210078680A CN 114417250 B CN114417250 B CN 114417250B
Authority
CN
China
Prior art keywords
module
matrix
value
complex
calculation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210078680.3A
Other languages
Chinese (zh)
Other versions
CN114417250A (en
Inventor
樊春晓
李心平
戴岚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei University of Technology
Original Assignee
Hefei University of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei University of Technology filed Critical Hefei University of Technology
Priority to CN202210078680.3A priority Critical patent/CN114417250B/en
Publication of CN114417250A publication Critical patent/CN114417250A/en
Application granted granted Critical
Publication of CN114417250B publication Critical patent/CN114417250B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7871Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Computer Hardware Design (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)

Abstract

The invention relates to the technical field of FPGA structure design, and discloses an efficient capon calculation method for an FPGA structure, which comprises the following steps: taking an FPGA frame with 5 array elements, 32768 snapshots and Shan Xin sources as examples, the FPGA frame is designed to complete the algorithm, and the FPGA frame mainly relates to four modules of covariance matrix calculation, five-order matrix inversion calculation, angle power calculation and spectrum peak search; the method starts from the basic principle of block matrix inversion, reasonably divides the high-order matrix into a plurality of low-order submatrices, and then performs certain deformation processing on a block matrix inversion algorithm, thereby avoiding the process of inverting the submatrices in the algorithm. Then, realizing multi-order matrix inversion operation efficiently by constructing a submatrix operation module; the angular power solving part is deformed into the reciprocal of the angular power, so that the calculation does not contain a division part, and the accuracy of the calculation result is improved; the spectral peak searching module correspondingly changes into pseudo spectral peak searching, namely searching the minimum value of the output angle power.

Description

FPGA structure-oriented efficient capon calculation method
Technical Field
The invention relates to the technical field of FPGA structure design, in particular to an efficient capon computing method for an FPGA structure.
Background
The multi-order matrix inversion part of the capon implementation algorithm facing the FPGA structure adopts the method that algebraic remainder is directly calculated on the whole matrix and determinant value is then calculated to finally obtain the matrix inversion, or the non-deformed block matrix inversion principle is utilized to calculate the multi-order matrix inversion, so that the calculation complexity of the module can be obviously improved. The angular power solving module calculates the final power according to the angular power definition in the basic principle, which involves division operation, so that the accuracy of the calculation result is reduced.
Disclosure of Invention
(one) solving the technical problems
Aiming at the defects of the prior art, the invention provides a high-efficiency capon computing method facing an FPGA structure, which solves the problems in the background art.
(II) technical scheme
In order to achieve the above purpose, the present invention provides the following technical solutions: an efficient capon computing method facing an FPGA structure comprises the following steps: taking an FPGA frame with 5 array elements, 32768 snapshots and Shan Xin sources as examples, the FPGA frame is designed to complete the algorithm, and the FPGA frame mainly relates to four modules of covariance matrix calculation, five-order matrix inversion calculation, angle power calculation and spectrum peak search;
the four modules are sequentially operated according to the sequence, firstly, a covariance matrix calculation module processes signals received by array elements to obtain a covariance matrix, then a five-order matrix inversion module performs inversion operation on the covariance matrix, an angle-solving power module multiplies the fed five-order matrix subjected to inversion with the numerical value of a corresponding angle to obtain power of the corresponding angle, and finally, the power corresponding to each angle is fed into a spectral peak search module to calculate the final information source angle;
covariance matrix calculation module: the covariance matrix calculation process is to multiply the signal values received by two array elements by corresponding bits and accumulate and divide by the snapshot number, so the key of covariance matrix calculation is multiplication accumulation operation, namely, each element value in the covariance matrix is calculated by using a multiplier and an accumulator, the signal values received by 32768 array elements are sequentially read from two ROM IP cores, then multiplied and then self accumulation operation is carried out, the 15-bit right shift of the final result is equivalent to division by 32768, thus completing the calculation of one value of the covariance matrix, controlling the sequential reading of data and the output of the final result by a counter, and the method can be concretely divided into a control module, a data reading module, a calculation module and an output selection module, the main function of the control module is to control the data reading and calculating module to finish the calculation of covariance matrix data, firstly control the read-in data to enable and address, read out the data and send the data into the calculating module in sequence, then control the calculating module to operate the data, finally control the output selecting module to output the data, the main function of the data reading module is to orderly read the stored data through the increase of address bits, the main function of the calculating module is to multiply and accumulate the numerical value sent by the data reading module, further calculate the numerical value of the element in the covariance matrix, and the main function of the output selecting module is to sequentially control and output the covariance matrix numerical value finally calculated;
a fifth-order matrix inversion module: according to the basic principle of matrix block inversion, a five-order matrix can be divided into A 11 、A 12 、A 21 And A 22 The four sub-matrix blocks, when the inverse of the five-order matrix is expanded or reduced by a certain multiple, the power obtained by the angle power solving module is also expanded or reduced in the same ratio, which has no influence on the final spectrum peak search, so that the algorithm for solving the high-order matrix inverse of the above-mentioned block matrix can be further improved to reduce the calculation complexity, and the block matrix inversion algorithm is multiplied by the wholeAccording to the operation process, the five-order matrix inversion overall is divided into four parts, namely a data reading module, a data storage module, a calculation module and an output module, wherein the data reading module mainly reads five values of a covariance matrix five times each time to complete the initial value input of the five-order matrix inversion, the data storage module is responsible for storing the read values and intermediate variables in the calculation process in an RAM IP core, taking out the data from the RAM IP core when needed, specifically adopting a pseudo-dual-port RAM in a dual-port RAM, the calculation module is responsible for completing the operation process of the algorithm, and comprises a second-order matrix inversion, a third-order matrix inversion, two third-order matrix multiplication, two third-order matrix subtraction and a third-order matrix multiplication with a fixed value, and the output module is used for controlling the ordered output of data, outputting the data after five inversions after the rising edge of a clock is output, and completely outputting the matrix values after five clock cycles;
and the angle power calculating module is used for: according to the angular power solving formulaIt can be seen that the final spectral peak search process is to find P θ Maximum value of (i.e.)>Thus changing the main calculation process into a solution delta (θ) in this module H R -1 Delta (theta) is only required to be changed into the minimum value output by the searching angle power solving module in the spectrum peak searching module, at the moment, the calculation process is changed into matrix multiplication after column vector transposition of corresponding angle values and five-order matrix inversion are needed to be completed, the column vector of the corresponding angle values is multiplied, the value to be solved can be obtained, at the moment, the obtained value is a complex number, the power comparison is inconvenient, and therefore, the square of the modulus of the complex number is solved finally, the final angle power is represented, and the calculation can be divided into complex number multiplication, complex number addition and square of complex modulus according to the analysis, and the method specifically comprises the following steps: first, delta (theta) H And R is R -1 Multiplying the complex numbers, multiplying the complex numbers with the corresponding position of delta (theta), accumulating the complex numbers to obtain a numerical result, sending the complex numbers to a square computing part of complex numbers modulus to obtain a real number, and expressing the real number as the power of an angle;
and a spectral peak searching module: the module needs to compare the power corresponding to each angle, only needs to traverse all angle powers according to the calculation principle of the angle power solving module and the information source number set by the experiment, selects the minimum value of the angle powers, and the angle corresponding to the power minimum value is the final direction finding angle, and according to the analysis, the module calculation part needs a size comparison module and an angle selection module, and the module comprises the following specific steps: firstly, sending power corresponding to each angle to be detected into a power magnitude comparison module, selecting the minimum angle power from the power, sending the power into an angle selection module, positioning the angle value corresponding to the power, and finally outputting the angle as a direction finding angle.
Preferably, the third-order matrix determinant module is mainly applied to a complex multiplier, a complex adder and a complex subtracter, wherein the complex multiplier, the complex adder and the complex subtracter are used for multiplying and accumulating the diagonal elements firstly, then multiplying and accumulating the diagonal elements reversely, and finally subtracting the diagonal element multiplying and accumulating sum from the diagonal element multiplying and accumulating sum to obtain a determinant value of the third-order matrix; because the diagonal has three values, the result after the multiplication of two values needs to be multiplied by the third value again, the result after the multiplication of the three values is fed into the adder, the result output by the adder is the accumulated sum after the multiplication of the three values, the subtracter completes the subtraction of the two last accumulated values, and the output value after the subtraction is the value of the third-order matrix determinant.
Preferably, the second-order matrix determinant value module uses a complex multiplier and a complex adder, and the main operation process is that the value multiplication of the main diagonal elements minus the value multiplication of the auxiliary diagonal elements; the second-order matrix value is first sent to complex multiplier to complete the multiplication of the main diagonal and the auxiliary diagonal elements, and then the multiplied value is sent to complex subtracter, and finally the result of subtraction is the required determinant value.
Preferably, the third-order matrix adjoint calculating module calculates the adjoint of the matrix by using algebraic remainder principle, firstly, all the remainder of the matrix are calculated, then the corresponding algebraic remainder is calculated, finally, the adjoint of the matrix can be obtained, and the operation process mainly comprises a complex multiplication module, a complex subtraction module and a negation module; according to the principle of solving the remainder, the divided values of the second-order submatrix are sent to a complex multiplication module to complete multiplication of diagonal elements, then the multiplied results are sent to a complex subtraction operation part, so that the remainder value at the corresponding position can be obtained, finally, according to the principle of solving the remainder to algebraic remainder, the values needing to perform inverse operation on the remainder are sent to a complex inversion part, and finally, the algebraic remainder output is obtained, namely the accompaniment of the third-order matrix is obtained.
Preferably, the second-order matrix companion module mainly uses a mathematical principle that main diagonal elements are mutually exchanged and auxiliary diagonal elements are inverted, the calculation process is simpler, and an element exchange module and a complex inversion module are used; the main diagonal elements of the second-order matrix are sent to an element exchange part to complete the exchange of two values, the auxiliary diagonal elements are sent to a complex inversion operation part to perform inversion operation on the values, and the final output result is the accompanying matrix of the second-order matrix.
Preferably, the two third-order matrix multiplication modules are mainly applied to complex multipliers and complex adders, the row vectors of the first third-order matrix and the column vectors of the second third-order matrix are multiplied by corresponding numerical values and then accumulated, the numerical values in the third-order matrix are output, and the module is also applied to the multiplication operation of the matrix with the size of 3 multiplied by 3, and can finish the multiplication operation of the two matrices only by performing zero padding operation; and sequentially feeding the row vector and column vector values corresponding to the two third-order matrixes into a complex multiplication operation part, and accumulating the multiplied results to obtain a corresponding value in the third-order matrix to be output.
Preferably, the operation process of the two third-order matrix subtraction modules is simpler, and only the numerical value of the corresponding bit is required to be subtracted, so that the operation only needs to be performed by a complex subtraction part; the corresponding bit data of the two matrixes are only required to be fed into a complex subtraction module, the output result after subtraction is the corresponding value of the matrix to be output, and the module can be applied to the subtraction operation of two matrixes below 3 multiplied by 3, and the missing value bits are only required to be subjected to zero padding operation.
Preferably, the operation part of the third-order matrix multiplied by the fixed value module uses a complex multiplication part, the numerical value of the matrix and a fixed numerical value are sequentially fed into the complex multiplication operation part, and the obtained multiplication result is the numerical value in the third-order matrix to be output; the fixed value is always sent to the complex multiplication part in the operation process, the matrix value is multiplied with the fixed value in sequence, the matrix value to be output can be obtained, the module can be still applied to the calculation of multiplying the matrix with the value of 3 multiplied by the fixed value, and the module can be used for carrying out zero padding operation on the missing bits.
(III) beneficial effects
The invention provides an FPGA structure-oriented efficient capon calculation method, which has the following beneficial effects:
the method starts from the basic principle of block matrix inversion, reasonably divides the high-order matrix into a plurality of low-order submatrices, and then performs certain deformation processing on a block matrix inversion algorithm, thereby avoiding the process of inverting the submatrices in the algorithm. Then, realizing multi-order matrix inversion operation efficiently by constructing a submatrix operation module; the angular power solving part is deformed into the reciprocal of the angular power, so that the calculation does not contain a division part, and the accuracy of the calculation result is improved; the spectrum peak searching module correspondingly changes into pseudo spectrum peak searching, namely searching the minimum value of the output angle power, and the accuracy of the experimental result is not affected. The invention has lower calculation complexity, reduces the time needed by calculation in the same ratio and improves the calculation accuracy.
Drawings
FIG. 1 is a schematic view of the overall structure of the present invention;
FIG. 2 is a schematic diagram of a multiplication and accumulation operation structure of covariance matrix calculation in the present invention;
FIG. 3 is a diagram showing the overall structure of covariance matrix calculation according to the present invention;
FIG. 4 is a schematic diagram of the matrix partitioning principle in the present invention;
FIG. 5 is a schematic diagram of the block matrix inversion principle in the present invention;
FIG. 6 is a block diagram of a fifth order matrix according to the present invention;
FIG. 7 is a schematic diagram of a block matrix inversion operation after a certain multiple expansion in the invention;
FIG. 8 is a diagram of the overall structure of the five-order matrix inversion of the present invention;
FIG. 9 is a schematic diagram of a calculation module in the fifth-order matrix inversion module according to the present invention;
FIG. 10 is a schematic diagram of a third-order matrix determinant in accordance with the present invention;
FIG. 11 is a schematic diagram of a second order matrix determinant value structure in accordance with the present invention;
FIG. 12 is a schematic diagram of a third-order matrix adjoint structure according to the present invention;
FIG. 13 is a schematic diagram of a second order matrix solution according to the present invention;
FIG. 14 is a schematic diagram of a multiplication structure of two third-order matrices in the present invention;
FIG. 15 is a schematic diagram of a subtraction operation structure of two third-order matrices according to the present invention;
FIG. 16 is a schematic diagram of a third order matrix multiplied by a fixed value operation structure in the present invention;
FIG. 17 is a schematic diagram of the operation structure of the angle-finding power module in the present invention;
FIG. 18 is a schematic diagram showing the structure of the spectral peak search operation in the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention provides a technical scheme that: an efficient capon computing method facing an FPGA structure comprises the following steps: taking an FPGA frame with 5 array elements, 32768 snapshots and Shan Xin sources as examples, the FPGA frame is designed to complete the algorithm, and the FPGA frame mainly relates to four modules of covariance matrix calculation, five-order matrix inversion calculation, angle power calculation and spectrum peak search;
the four modules are sequentially executed and calculated, firstly, a covariance matrix calculation module processes signals received by array elements to obtain a covariance matrix, then a five-order matrix inversion module performs inversion operation on the covariance matrix, an angle power module multiplies the fed five-order matrix subjected to inversion with the numerical value of a corresponding angle to obtain power of the corresponding angle, and finally, the power corresponding to each angle is fed into a spectral peak search module to calculate a final information source angle, as shown in fig. 1;
covariance matrix calculation module: the covariance matrix is calculated by multiplying the signal values received by two array elements by corresponding bits and then accumulating the signal values and dividing the result by the snapshot number, so that the key of the covariance matrix calculation is multiplication accumulation operation, namely, each element value in the covariance matrix is calculated by using a multiplier and an accumulator respectively, as shown in figure 2, the signal values received by 32768 array elements are sequentially read from two ROM IP cores, then multiplied and then self-accumulation operation is performed, the final result is shifted to the right by 15 bits to be equivalent to division by 32768, the calculation of one value of the covariance matrix is completed, the sequential reading of data and the output of the final result are controlled by a counter, and the covariance matrix calculation method can be particularly divided into a control module, a data reading module, a calculation module and an output selection module, as shown in fig. 3, the main function of the control module is to control the data reading and calculating module to complete the calculation of covariance matrix data, firstly control the reading-in data enable and address, read out the data and send the data into the calculating module in sequence, then control the calculating module to operate the data, finally control the output selecting module to output the data, the main function of the data reading module is to orderly read the stored data through the increase of address bits, the main function of the calculating module is to multiply and accumulate the numerical values sent by the data reading module, further calculate the numerical values of elements in the covariance matrix, and the main function of the output selecting module is to sequentially control and output the covariance matrix numerical values finally calculated;
a fifth-order matrix inversion module: the specific matrix blocking and the principle of matrix inversion by blocking are shown in fig. 4 and 5, and the five-order matrix can be divided into A according to the basic principle of matrix blocking inversion 11 、A 12 、A 21 And A 22 The four sub-matrix blocks are specifically divided into blocks as shown in FIG. 6, wherein the upper left corner 2X 2 of the five-order matrix is divided into A 11 Sub-matrix, upper right corner 2 x 3 number divided into A 12 Sub-matrix, lower left corner 3 x 2 number divided into A 21 The submatrix, lower right 3 x 3 numerical division into a 22 The submatrix can be used for conveniently obtaining the inverse of the fifth-order matrix according to the submatrix dividing mode, and when the inverse of the fifth-order matrix is integrally expanded or reduced by a certain multiple, the power obtained by the angle power solving module is also expanded or reduced in the same ratio, and the power obtained by the angle power solving module is the final powerThe spectrum peak search has no influence, so the algorithm for solving the high-order matrix inversion of the block matrix can be further improved to reduce the complexity of calculation, and the integral of the block matrix inversion algorithm is multiplied byThe deformation after multiplication is shown in fig. 7, according to the operation process, the five-order matrix inversion overall is divided into four parts, namely a data reading module, a data storage module, a calculation module and an output module, as shown in fig. 8, wherein the data reading module mainly realizes that the covariance matrix is read in five times for reading five values each time to finish the initial numerical value input of the five-order matrix inversion, the data storage module is responsible for storing the read-in number and an intermediate variable in the calculation process in a RAM IP core, taking out the data from the RAM IP core when required, particularly adopts a pseudo-dual-port RAM in a dual-port RAM, the calculation module is responsible for completing the operation process of the algorithm, particularly comprises a second-order matrix inversion, a third-order matrix inversion, two third-order matrix multiplication, two third-order matrix subtraction and a third-order matrix multiplication, and a fixed numerical value, according to the required calculation process can obtain the specific structure of the calculation module, as shown in fig. 9, the output module is used for controlling the orderly output of the data, and outputting the five-order data after the five-order inversion is completely output after the clock is subjected to the clock inversion;
the third-order matrix determinant module mainly applies to a complex multiplier, a complex adder and a complex subtracter, firstly multiplies and accumulates the diagonal elements, then multiplies and accumulates the diagonal elements, and finally subtracts the diagonal element multiplication and accumulation sum from the diagonal element multiplication and accumulation sum to obtain a determinant value of the third-order matrix, and the operation structure is shown in figure 10; because the diagonal has three values, the result after the multiplication of two values needs to be multiplied by the third value again, the result after the multiplication of the three values is fed into the adder, the result output by the adder is the accumulated sum after the multiplication of the three values, the subtracter completes the subtraction of the two last accumulated values, and the output value after the subtraction is the value of the third-order matrix determinant.
The second-order matrix determinant value module uses a complex multiplier and a complex adder, the main operation process is that the value multiplied by the main diagonal element minus the value multiplied by the auxiliary diagonal element, and the specific operation structure is shown in figure 11; the second-order matrix value is first sent to complex multiplier to complete the multiplication of the main diagonal and the auxiliary diagonal elements, and then the multiplied value is sent to complex subtracter, and finally the result of subtraction is the required determinant value.
The third-order matrix adjoint calculating module calculates the adjoint of the matrix by using algebraic remainder sub-principle, firstly, all the remainder of the matrix are calculated, then the corresponding algebraic remainder is calculated, finally, the adjoint of the matrix can be obtained, the operation process mainly comprises a complex multiplication module, a complex subtraction module and a negation module, and the specific operation structure is shown in figure 12; according to the principle of solving the remainder, the divided values of the second-order submatrix are sent to a complex multiplication module to complete multiplication of diagonal elements, then the multiplied results are sent to a complex subtraction operation part, so that the remainder value at the corresponding position can be obtained, finally, according to the principle of solving the remainder to algebraic remainder, the values needing to perform inverse operation on the remainder are sent to a complex inversion part, and finally, the algebraic remainder output is obtained, namely the accompaniment of the third-order matrix is obtained.
The second-order matrix solving accompanying module mainly uses the mathematical principle that the main diagonal elements are mutually exchanged and the auxiliary diagonal elements are inverted, the calculation process is simpler, the element exchanging module and the complex inversion module are used, and the specific operation structure is shown in figure 13; the main diagonal elements of the second-order matrix are sent to an element exchange part to complete the exchange of two values, the auxiliary diagonal elements are sent to a complex inversion operation part to perform inversion operation on the values, and the final output result is the accompanying matrix of the second-order matrix.
The two third-order matrix multiplication modules are mainly applied to complex multipliers and complex adders, the row vectors of the first third-order matrix and the column vectors of the second third-order matrix are multiplied by corresponding numerical values and then accumulated, the numerical values in the output third-order matrix are obtained, the module is also applied to multiplication operation of the matrix below 3 multiplied by 3, the multiplication operation of the two matrices can be completed only by zero padding operation, and the specific operation structure is shown in fig. 14; and sequentially feeding the row vector and column vector values corresponding to the two third-order matrixes into a complex multiplication operation part, and accumulating the multiplied results to obtain a corresponding value in the third-order matrix to be output.
The operation process of the two third-order matrix subtraction modules is simpler, and only the numerical value of the corresponding bit is needed to be subtracted, so that the operation only needs to be performed by a complex subtraction part, and the specific operation structure is shown in fig. 15; the corresponding bit data of the two matrixes are only required to be fed into a complex subtraction module, the output result after subtraction is the corresponding value of the matrix to be output, and the module can be applied to the subtraction operation of two matrixes below 3 multiplied by 3, and the missing value bits are only required to be subjected to zero padding operation.
The operation part of the third-order matrix multiplied by the fixed value module uses a complex multiplication part, the numerical value of the matrix and a fixed numerical value are sequentially fed into the complex multiplication operation part, the obtained multiplication result is the numerical value in the third-order matrix to be output, and the specific operation structure is shown in figure 16; the fixed value is always sent to the complex multiplication part in the operation process, the matrix value is multiplied with the fixed value in sequence, the matrix value to be output can be obtained, the module can be still applied to the calculation of multiplying the matrix with the value of 3 multiplied by the fixed value, and the module can be used for carrying out zero padding operation on the missing bits.
And the angle power calculating module is used for: according to the angular power solving formulaIt can be seen that the final spectral peak search process is to find P θ Maximum value of (i.e.)>Thus changing the main calculation process into a solution delta (θ) in this module H R -1 Delta (theta) is only needed in the spectrumThe peak search module is changed into the minimum value output by the search angle power solving module, at this moment, the calculation process is changed into matrix multiplication after column vector transposition of corresponding angle values and five-order matrix inversion are needed, then the matrix multiplication of corresponding angle values is multiplied, the value to be solved can be obtained, at this moment, the obtained value is a complex number, the power comparison is inconvenient, therefore, the square of the complex number is solved finally, the final angle power is represented by the square of the complex number, and according to the analysis, the calculation can be divided into the steps of complex number multiplication, complex number addition and complex number module square, and the specific calculation structure is shown in fig. 17, and the concrete calculation structure is as follows: first, delta (theta) H And R is R -1 Multiplying the complex numbers, multiplying the complex numbers with the corresponding position of delta (theta), accumulating the complex numbers to obtain a numerical result, sending the complex numbers to a square computing part of complex numbers modulus to obtain a real number, and expressing the real number as the power of an angle;
and a spectral peak searching module: the module needs to compare the power corresponding to each angle, only needs to traverse all angle powers according to the calculation principle of the angle power solving module and the information source number set by the experiment, selects the minimum value of the angle powers, and the angle corresponding to the power minimum value is the final direction finding angle, and according to the analysis, the module operation part needs a size comparison module and an angle selection module, and the specific operation structure is shown in fig. 18, and is specifically as follows: firstly, sending power corresponding to each angle to be detected into a power magnitude comparison module, selecting the minimum angle power from the power, sending the power into an angle selection module, positioning the angle value corresponding to the power, and finally outputting the angle as a direction finding angle.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (8)

1. An efficient capon computing method for an FPGA structure is characterized in that: the method comprises the following steps: taking an FPGA frame with 5 array elements, 32768 snapshots and Shan Xin sources as examples, the FPGA frame is designed to complete the algorithm, and the FPGA frame mainly relates to four modules of covariance matrix calculation, five-order matrix inversion calculation, angle power calculation and spectrum peak search;
the four modules are sequentially operated according to the sequence, firstly, a covariance matrix calculation module processes signals received by array elements to obtain a covariance matrix, then a five-order matrix inversion module performs inversion operation on the covariance matrix, an angle power module multiplies the fed five-order matrix subjected to inversion with the numerical value of a corresponding angle to obtain power of the corresponding angle, and finally, the power corresponding to each angle is fed into a spectral peak search module to calculate the final information source angle;
covariance matrix calculation module: the covariance matrix calculation process is to multiply the signal values received by two array elements by corresponding bits and accumulate and divide by the snapshot number, so the key of covariance matrix calculation is multiplication accumulation operation, namely, each element value in the covariance matrix is calculated by using a multiplier and an accumulator, the signal values received by 32768 array elements are sequentially read from two ROM IP cores, then multiplied and then self accumulation operation is carried out, the 15-bit right shift of the final result is equivalent to division by 32768, thus completing the calculation of one value of the covariance matrix, controlling the sequential reading of data and the output of the final result by a counter, and the method can be concretely divided into a control module, a data reading module, a calculation module and an output selection module, the main function of the control module is to control the data reading and calculating module to finish the calculation of covariance matrix data, firstly control the read-in data to enable and address, read out the data and send the data into the calculating module in sequence, then control the calculating module to operate the data, finally control the output selecting module to output the data, the main function of the data reading module is to orderly read the stored data through the increase of address bits, the main function of the calculating module is to multiply and accumulate the numerical value sent by the data reading module, further calculate the numerical value of the element in the covariance matrix, and the main function of the output selecting module is to sequentially control and output the covariance matrix numerical value finally calculated;
a fifth-order matrix inversion module: according to the basic principle of matrix block inversion, a five-order matrix can be divided into A 11 、A 12 、A 21 And A 22 The four sub-matrix blocks, when the inverse of the five-order matrix is expanded or reduced by a certain multiple, the power obtained by the angle power solving module is also expanded or reduced in the same ratio, which has no influence on the final spectrum peak search, so that the algorithm for solving the high-order matrix inverse of the above-mentioned block matrix can be further improved to reduce the calculation complexity, and the block matrix inversion algorithm is multiplied by the wholeAccording to the above operation process, the five-order matrix inversion overall is divided into four parts, which are respectively a data reading module, a data storage module, a calculation module and an output module, wherein the data reading module mainly reads five values of the covariance matrix five times each time to complete the initial value input of the five-order matrix inversion, the data storage module is responsible for storing the read values and intermediate variables in the calculation process in a RAM IP core, taking the data out of the RAM IP core when needed, and particularly adopts a pseudo-dual-port RAM in a dual-port RAM, and the calculation module is responsible for completing the operation process of the algorithm, and particularly comprises a second-order matrixThe output module is used for controlling the orderly output of data, outputting five inverted data at the rising edge of a clock, and completely outputting the inverted matrix value after five clock cycles;
and the angle power calculating module is used for: according to the angular power solving formulaIt can be seen that the final spectral peak search process is to find P θ Maximum value of (i.e.)>Thus changing the main calculation process into a solution delta (θ) in this module H R -1 Delta (theta) is only required to be changed into the minimum value output by the searching angle power solving module in the spectrum peak searching module, at the moment, the calculation process is changed into matrix multiplication after column vector transposition of corresponding angle values and five-order matrix inversion are needed to be completed, the column vector of the corresponding angle values is multiplied, the value to be solved can be obtained, at the moment, the obtained value is a complex number, the power comparison is inconvenient, and therefore, the square of the modulus of the complex number is solved finally, the final angle power is represented, and the calculation can be divided into complex number multiplication, complex number addition and square of complex modulus according to the analysis, and the method specifically comprises the following steps: first, delta (theta) H And R is R -1 Multiplying the complex numbers, multiplying the complex numbers with the corresponding position of delta (theta), accumulating the complex numbers to obtain a numerical result, sending the complex numbers to a square computing part of complex numbers modulus to obtain a real number, and expressing the real number as the power of an angle;
and a spectral peak searching module: the module needs to compare the power corresponding to each angle, only needs to traverse all angle powers according to the calculation principle of the angle power solving module and the information source number set by the experiment, selects the minimum value of the angle powers, and the angle corresponding to the power minimum value is the final direction finding angle, and according to the analysis, the module calculation part needs a size comparison module and an angle selection module, and the module comprises the following specific steps: firstly, sending power corresponding to each angle to be detected into a power magnitude comparison module, selecting the minimum angle power from the power, sending the power into an angle selection module, positioning the angle value corresponding to the power, and finally outputting the angle as a direction finding angle.
2. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the third-order matrix determinant module is mainly applied to a complex multiplier, a complex adder and a complex subtracter, firstly multiplies and accumulates the diagonal elements, then multiplies and accumulates the diagonal elements, and finally subtracts the diagonal element multiplication accumulation sum from the diagonal element multiplication accumulation sum to obtain a determinant value of the third-order matrix; because the diagonal has three values, the result after the multiplication of two values needs to be multiplied by the third value again, the result after the multiplication of the three values is fed into the adder, the result output by the adder is the accumulated sum after the multiplication of the three values, the subtracter completes the subtraction of the two last accumulated values, and the output value after the subtraction is the value of the third-order matrix determinant.
3. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the second-order matrix determinant value solving module uses a complex multiplier and a complex adder, and the main operation process is to multiply the value of the main diagonal element by subtracting the value multiplied by the auxiliary diagonal element; the second-order matrix value is first sent to complex multiplier to complete the multiplication of the main diagonal and the auxiliary diagonal elements, and then the multiplied value is sent to complex subtracter, and finally the result of subtraction is the required determinant value.
4. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the third-order matrix adjoint calculating module calculates the adjoint of the matrix by applying algebraic remainder principle, firstly, all the remainder of the matrix are calculated, then the corresponding algebraic remainder is calculated, finally, the adjoint of the matrix can be obtained, and the operation process mainly comprises a complex multiplication module, a complex subtraction module and an inverse calculation module; according to the principle of solving the remainder, the divided values of the second-order submatrix are sent to a complex multiplication module to complete multiplication of diagonal elements, then the multiplied results are sent to a complex subtraction operation part, so that the remainder value at the corresponding position can be obtained, finally, according to the principle of solving the remainder to algebraic remainder, the values needing to perform inverse operation on the remainder are sent to a complex inversion part, and finally, the algebraic remainder output is obtained, namely the accompaniment of the third-order matrix is obtained.
5. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the second-order matrix companion solving module mainly uses a mathematical principle that main diagonal elements are mutually exchanged and auxiliary diagonal elements are inverted, and the calculating process is simpler, and an element exchanging module and a complex inverting module are used; the main diagonal elements of the second-order matrix are sent to an element exchange part to complete the exchange of two values, the auxiliary diagonal elements are sent to a complex inversion operation part to perform inversion operation on the values, and the final output result is the accompanying matrix of the second-order matrix.
6. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the two third-order matrix multiplication modules are mainly applied to complex multipliers and complex adders, the row vectors of the first third-order matrix and the column vectors of the second third-order matrix are multiplied by corresponding numerical values and then accumulated, the numerical values in the output third-order matrix are obtained, and the module is also applied to multiplication operation of the matrix below 3 multiplied by 3, and can finish the multiplication operation of the two matrices only by carrying out zero padding operation; and sequentially feeding the row vector and column vector values corresponding to the two third-order matrixes into a complex multiplication operation part, and accumulating the multiplied results to obtain a corresponding value in the third-order matrix to be output.
7. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the operation process of the two third-order matrix subtraction modules is simpler, and only the numerical value of the corresponding bit is required to be subtracted, so that the operation only needs to be performed by a complex subtraction part; the corresponding bit data of the two matrixes are only required to be fed into a complex subtraction module, the output result after subtraction is the corresponding value of the matrix to be output, and the module can be applied to the subtraction operation of two matrixes below 3 multiplied by 3, and the missing value bits are only required to be subjected to zero padding operation.
8. The method for efficiently calculating capon for an FPGA architecture according to claim 1, wherein: the operation part of the third-order matrix multiplied by the fixed value module uses a complex multiplication part, the numerical value of the matrix and a fixed numerical value are sequentially fed into the complex multiplication operation part, and the obtained multiplication result is the numerical value in the third-order matrix to be output; the fixed value is always sent to the complex multiplication part in the operation process, the matrix value is multiplied with the fixed value in sequence, the matrix value to be output can be obtained, the module can be still applied to the calculation of multiplying the matrix with the value of 3 multiplied by the fixed value, and the module can be used for carrying out zero padding operation on the missing bits.
CN202210078680.3A 2022-01-24 2022-01-24 FPGA structure-oriented efficient capon calculation method Active CN114417250B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210078680.3A CN114417250B (en) 2022-01-24 2022-01-24 FPGA structure-oriented efficient capon calculation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210078680.3A CN114417250B (en) 2022-01-24 2022-01-24 FPGA structure-oriented efficient capon calculation method

Publications (2)

Publication Number Publication Date
CN114417250A CN114417250A (en) 2022-04-29
CN114417250B true CN114417250B (en) 2024-03-08

Family

ID=81277711

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210078680.3A Active CN114417250B (en) 2022-01-24 2022-01-24 FPGA structure-oriented efficient capon calculation method

Country Status (1)

Country Link
CN (1) CN114417250B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040053435A (en) * 2002-12-14 2004-06-24 한국전자통신연구원 V-BLAST system having the structure for simple inverse-matrix operation
CN101349742A (en) * 2008-08-29 2009-01-21 西安电子科技大学 Method for optimizing space between broad band phased array elements and measuring frequency and direction of frequency domain multiple targets
CN102184161A (en) * 2011-05-24 2011-09-14 电子科技大学 Matrix inversion device and method based on residue number system
CA2968209A1 (en) * 2014-12-02 2016-06-09 Thales Solutions Asia Pte Ltd. Methods and systems for spectral analysis of sonar data

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040053435A (en) * 2002-12-14 2004-06-24 한국전자통신연구원 V-BLAST system having the structure for simple inverse-matrix operation
CN101349742A (en) * 2008-08-29 2009-01-21 西安电子科技大学 Method for optimizing space between broad band phased array elements and measuring frequency and direction of frequency domain multiple targets
CN102184161A (en) * 2011-05-24 2011-09-14 电子科技大学 Matrix inversion device and method based on residue number system
CA2968209A1 (en) * 2014-12-02 2016-06-09 Thales Solutions Asia Pte Ltd. Methods and systems for spectral analysis of sonar data

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
基于FPGA的复数矩阵求逆设计;周金强;凤继锋;;现代计算机;20200525(第15期);全文 *
基于半实值Capon的高效波达方向估计算法;闫锋刚;王军;沈毅;金铭;;电子与信息学报;20150415(第04期);全文 *

Also Published As

Publication number Publication date
CN114417250A (en) 2022-04-29

Similar Documents

Publication Publication Date Title
US9363068B2 (en) Vector processor having instruction set with sliding window non-linear convolutional function
JPS63182773A (en) Circuit for calculating discrete cosine conversion of sample vector
US8051124B2 (en) High speed and efficient matrix multiplication hardware module
US9128790B2 (en) Digital signal processor having instruction set with an exponential function using reduced look-up table
US11194887B2 (en) Data processing device and method, and digital signal processing device
US5331582A (en) Digital signal processor using a coefficient value corrected according to the shift of input data
US9170776B2 (en) Digital signal processor having instruction set with a logarithm function using reduced look-up table
CN113947200B (en) Acceleration calculation method of neural network, accelerator and computer-readable storage medium
US11341400B1 (en) Systems and methods for high-throughput computations in a deep neural network
Watanabe et al. Numerical verifications of solutions for nonlinear elliptic equations
CN114417250B (en) FPGA structure-oriented efficient capon calculation method
US20130191431A1 (en) Efficient fir filters
EP1650869A1 (en) A device for implementing a sum of products expression
US7945061B1 (en) Scalable architecture for subspace signal tracking
Brust et al. Large-scale optimization with linear equality constraints using reduced compact representation
KR102153167B1 (en) Matrix operator and matrix operation method for artificial neural network
CN108897524B (en) Division function processing circuit, method, chip and system
CN114417249B (en) Method for realizing multi-order matrix rapid inversion hardware structure
CN115659880A (en) Hardware circuit and method of principal component analysis algorithm based on singular value decomposition
JP2009181293A (en) Matrix operation co-processor
US9612800B2 (en) Implementing a square root operation in a computer system
CN113110822A (en) Configurable matrix multiplication device and algorithm
US11580191B1 (en) Method and system for convolution
JP7456205B2 (en) Arithmetic unit
Kumar et al. Implementation and Performance Analysis of Reconfigurable Montgomery Modular Multiplier

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant