CN114415948A - Data storage method, system, equipment and medium for realizing power failure retention - Google Patents
Data storage method, system, equipment and medium for realizing power failure retention Download PDFInfo
- Publication number
- CN114415948A CN114415948A CN202111639818.4A CN202111639818A CN114415948A CN 114415948 A CN114415948 A CN 114415948A CN 202111639818 A CN202111639818 A CN 202111639818A CN 114415948 A CN114415948 A CN 114415948A
- Authority
- CN
- China
- Prior art keywords
- data
- data area
- writing
- area
- valid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1448—Management of the data involved in backup or backup restore
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention relates to a data storage method, a system, equipment and a medium for realizing power failure retention, wherein the method comprises the following steps: when writing data, firstly writing the data into the A data area through the control head, and then synchronizing the data into the B data area; determining A, B whether the written data of the data area is valid by the control header: if the written data in the A, B data area are all valid, the data in the A data area is taken for storage after power failure; if only one of the written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure. By applying the scheme of the invention, when the application program loads the hardware memory data, whether the data is effective or not can be automatically detected without manual intervention; even if the memory data is abnormal due to power failure during writing, effective data can be obtained; when the memory data is abnormal due to power failure, the memory does not need to be formatted manually, and can be automatically controlled by an application program; the scheme of the invention does not need the support of a standby power supply, has higher cost performance than the prior art, and has larger popularization significance.
Description
Technical Field
The present invention relates to the field of data storage technologies, and in particular, to a data storage method, system, device, and medium for implementing power-down retention.
Background
When an application program writes data into hardware equipment, if sudden power failure occurs, memory data are often abnormal, such as missing, out-of-order and the like. After the program is restarted, various problems are caused by loading abnormal data, so that the running logic is disordered if the abnormal data is loaded, and the program is jammed or even crashed if the abnormal data is loaded. Therefore, how to ensure the correctness of the data in the hardware memory which is powered down during writing has important significance.
At present, two main processing means for power failure retention are available: one is that the application program adds a log file, and analyzes whether the data is successfully written in the power failure through the log file; and the other method is to add a standby power supply, and when the main power supply module is powered off, the standby power supply supplies power temporarily to ensure that the data writing operation is carried out. However, the prior art has the following defects: the detection conditions are harsh, automation cannot be realized, and the operation is inconvenient; the data is not recoverable and there is no guarantee that the application will always be able to obtain valid data.
Disclosure of Invention
Technical problem to be solved
In view of the above disadvantages and shortcomings of the prior art, the present invention provides a data storage method, system, device and medium for implementing power down retention, which solves the problems of the prior art that the detection conditions are harsh, automation cannot be implemented, and operation is inconvenient; and the technical problems that the data is not recoverable and the application program can not be ensured to always obtain effective data are solved.
(II) technical scheme
In order to achieve the purpose, the invention adopts the main technical scheme that:
in a first aspect, an embodiment of the present invention provides a data storage method for implementing power failure retention, including:
when data are written into a memory of hardware equipment, the data are written into a data area A through a control head, and then the data are synchronized to a data area B through the control head;
determining A, B whether the written data of the data area is valid by the control header:
if the written data in the A, B data area are all valid, the data in the A data area is taken for storage after power failure;
if only one piece of written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure;
the hardware device memory comprises a control head, a data area A and a data area B.
Optionally, the control head stores: A. capacity of B data area, actual effective data length, and write flag bit.
Optionally, the capacities of the a data area and the B data area are the same.
Optionally, when writing data into the memory of the hardware device, the data is written into the data area a through the control head, including:
when data are written into the memory of the hardware equipment, firstly setting a writing mark of a data area A in the control head, and writing the data into the data area A;
and resetting the writing mark of the data area A after the writing operation is finished, and updating the actual effective data length of the data area A in the control head.
Optionally, the synchronizing data to the B data area by the control header further includes:
setting a writing mark of a data area B in the control head, and synchronously writing data of the data area A into the data area B;
and resetting the writing mark of the B data area after the writing operation is finished, and updating the effective data length of the B data area.
Optionally, the determining A, B whether the written data of the data area is valid by the control header comprises:
reading a writing mark of an A data area in the control head;
if the reading result is false, which indicates that the last writing operation of the data area A is finished, judging that the data in the data area A is valid;
if the reading result is true, the last time that the writing operation of the data area A is interrupted by power failure is indicated, the data in the data area A is judged to be invalid, and the writing mark of the data area B in the control head is read;
and when the reading result of the writing mark in the B data area is false, judging that the data in the B data area is valid.
Optionally, each time a write operation is completed, the write flag of the a data area/B data area in the control head is reset, and the actual effective length of the a data area/B data area is updated.
In a second aspect, an embodiment of the present invention provides a data storage system for implementing power-down retention, including:
the data writing module is used for firstly writing data into the data area A through the control head and then synchronizing the data into the data area B through the control head when the data are written into the memory of the hardware equipment;
a validity judging module, configured to judge A, B whether the written data in the data area is valid through the control header:
the power-down taking module is used for taking and storing the data in the data area A after power failure when the written data in the data area A, B are all valid; when only one piece of written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure;
the hardware device memory comprises a control head, a data area A and a data area B.
In a third aspect, an embodiment of the present invention provides a data storage device for implementing power-down retention, including:
at least one application database;
and a hardware device memory communicatively coupled to the at least one application database;
wherein the application database stores instructions executable by the at least one hardware device memory, and the instructions are executed by the at least one hardware device memory to enable the at least one hardware device memory to execute a data storage method for implementing power-down retention as described above.
In a fourth aspect, embodiments of the present invention provide a computer-readable medium having stored thereon computer-executable instructions, which when executed by a processor, implement a data storage method for implementing power-down retention as described above.
(III) advantageous effects
The invention has the beneficial effects that: by applying the scheme of the invention, when the application program loads the hardware memory data, whether the data is effective or not can be automatically detected without manual intervention; even if the memory data is abnormal due to power failure during writing, the application program can be ensured to obtain effective data; when the memory data is abnormal due to power failure, the memory does not need to be formatted manually, and can be automatically controlled by an application program; the scheme of the invention does not need the support of a standby power supply, saves the additional cost brought by the standby power supply, has higher cost performance than the prior art, and has greater popularization significance.
Drawings
Fig. 1 is a schematic flowchart of a data storage method for implementing power-down retention according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a composition of a hardware device memory of a data storage method for implementing power-down retention according to an embodiment of the present invention;
fig. 3 is a partial detailed flowchart of a step S1 of a data storage method for implementing power down retention according to an embodiment of the present invention;
fig. 4 is another partial detailed flowchart of step S1 of a data storage method for implementing power down retention according to an embodiment of the present invention;
fig. 5 is a schematic specific flowchart of step S2 of a data storage method for implementing power down retention according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a data writing process of a data storage method for implementing power down retention according to an embodiment of the present invention;
FIG. 7 is a schematic diagram illustrating components of a data storage system implementing power down retention according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a computer system implementing a data storage device with power-down retention according to an embodiment of the present invention.
[ description of reference ]
100: a data storage system for realizing power-down retention; 110: a data writing module; 120: a validity judgment module; 130: a power-down taking module;
200: a computer system; 201: a CPU; 202: a ROM; 203: a RAM; 202: a first bus; 205: an I/O interface; 206: an input section; 207: an output section; 208: a storage section; 209: a communication section; 210: a driver; 211: a removable media.
Detailed Description
For the purpose of better explaining the present invention and to facilitate understanding, the present invention will be described in detail by way of specific embodiments with reference to the accompanying drawings.
As shown in fig. 1, a data storage method for implementing power down retention according to an embodiment of the present invention includes: firstly, when data are written into a memory of hardware equipment, the data are written into a data area A through a control head, and then the data are synchronized to a data area B through the control head; secondly, it is determined A, B whether the written data of the data area is valid by the control header: if the written data in the A, B data area are all valid, the data in the A data area is taken for storage after power failure; if only one piece of written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure; as shown in fig. 2, the memory of the hardware device is divided into three regions: the control head records A, B the capacity of data area, the actual effective data length, the writing flag bit and other information, A, B is two equal data storage areas, and the two data storage areas are structurally redundant.
Thus, the invention achieves the following advantages: by applying the scheme of the invention, when the application program loads the hardware memory data, whether the data is effective or not can be automatically detected without manual intervention; even if the memory data is abnormal due to power failure during writing, the application program can be ensured to obtain effective data; when the memory data is abnormal due to power failure, the memory does not need to be formatted manually, and can be automatically controlled by an application program; the scheme of the invention does not need the support of a standby power supply, saves the additional cost brought by the standby power supply, has higher cost performance than the prior art, and has greater popularization significance.
For a better understanding of the above-described technical solutions, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Specifically, the present invention provides a data storage method for implementing power down retention, which includes:
and S1, when writing data into the memory of the hardware equipment, firstly writing the data into the A data area through the control head, and then synchronizing the data into the B data area through the control head.
As shown in fig. 3 and 4, step S1 includes:
and S11, when writing data into the memory of the hardware equipment, firstly setting the writing mark of the A data area in the control head and writing the data into the A data area.
And S12, resetting the writing mark of the A data area after the writing operation is finished, and updating the actual effective data length of the A data area in the control head.
And S13, setting the writing flag of the B data area in the control head, and synchronously writing the data of the A data area into the B data area.
And S14, resetting the writing mark of the B data area after the writing operation is finished, and updating the effective data length of the B data area.
S2, the control head determines A, B whether the written data in the data area is valid.
As shown in fig. 5, step S2 includes:
s21, reading a writing mark of the A data area in the control head;
s22a, if the reading result is false, which indicates that the last writing operation of the A data area is completed, determining that the data in the A data area is valid;
S22B, if the reading result is true, which indicates that the last writing operation of the A data area is interrupted by power failure, judging that the data in the A data area is invalid, and reading the writing mark of the B data area in the control head;
s23, when the reading result of the writing flag in the B data area is false, the data in the B data area is determined to be valid.
And S3a, if the written data in the A, B data area are all valid, storing the data in the A data area after power failure.
And S3b, if only one piece of written data in the A, B data area is valid, storing the data in the valid data area after power failure.
As shown in fig. 6, in the specific embodiment, when writing data, the application program sets the write flag in the data area a in the header first, and after the data is written, resets the write flag to update the actual effective data length in the data area a, then sets the write flag in the data area B, and after the data is written, resets the write flag to update the effective data length in the data area B. When the application program loads data, firstly reading a writing mark of a data area A in a control head, if the writing mark is false, indicating that the last writing operation is finished, the data in the data area A is valid, the program uses the data in the data area A, if the writing mark of the data area A is true, indicating that the last writing operation is interrupted by power failure, the data in the data area A is invalid, and because the writing value operation of the data area B is logically positioned behind the writing value of the data area A, the data in the data area B is not written and is original data, the data is still valid, and the application program uses the data in the data area B, so that the application program can be ensured to always obtain valid data from a memory of hardware equipment.
Preferably, each time the write operation is completed, the write flag of the a data area/B data area in the control head is reset, and the actual effective length of the a data area/B data area is updated. And the application program copies the data in the effective area to the invalid data area to realize data synchronization, resets the writing mark in the control head, updates the information such as the effective length and the like and prepares for the next value writing.
The hardware device memory comprises a control head, a data area A and a data area B. The control head stores: A. capacity of B data area, actual effective data length, and write flag bit. The capacity of the data area A is consistent with that of the data area B, and the data type, size, offset, structure, correlation and continuity of the data area A and the data area B are consistent.
As shown in fig. 7, a data storage system 100 for implementing power down retention provided by the present invention includes:
the data writing module 110 is configured to, when writing data into the memory of the hardware device, write the data into the data area a through the control head, and then synchronize the data with the data area B through the control head.
A validity judging module 120, configured to judge A, B whether the written data in the data area is valid through the control header.
The power-down taking module 130 is used for taking and storing the data in the data area A after power failure when the written data in the data area A, B are all valid; when only one of the written data in the data area is valid at A, B, the data in the valid data area is saved after power failure.
Since the system/apparatus described in the above embodiments of the present invention is a system/apparatus used for implementing the method of the above embodiments of the present invention, a person skilled in the art can understand the specific structure and modification of the system/apparatus based on the method described in the above embodiments of the present invention, and thus the detailed description is omitted here. All systems/devices adopted by the methods of the above embodiments of the present invention are within the intended scope of the present invention.
In addition, an embodiment of the present invention further provides a data storage device for implementing power down retention, including: at least one application database; and a hardware device memory communicatively coupled to the at least one application database; the application program database stores instructions executable by the at least one hardware device memory, and the instructions are executed by the at least one hardware device memory, so that the at least one hardware device memory can execute the data storage method for realizing power-down retention.
Fig. 8 is a schematic structural diagram of a computer system implementing a data storage device with power down retention according to an embodiment of the present invention, and referring to fig. 8, a schematic structural diagram of a computer system 200 implementing a data storage device with power down retention according to an embodiment of the present application is shown. The data storage device implementing power down retention shown in fig. 8 is only an example, and should not bring any limitation to the function and the scope of use of the embodiments of the present application.
As shown in fig. 8, the computer system 200 includes a Central Processing Unit (CPU)201 that can perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)202 or a program loaded from a storage section 208 into a Random Access Memory (RAM) 203. In the RAM 203, various programs and data necessary for the operation of the computer system 200 are also stored. The CPU 201, ROM 202, and RAM 203 are connected to each other via a bus 204. An input/output interface (I/O interface) 205 is also connected to the bus 204.
The following components are connected to the I/O interface 205: an input portion 206 including a keyboard, a mouse, and the like; an output section 207 including a display such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage section 208 including a hard disk and the like; and a communication section 209 including a network interface card such as a LAN card, a modem, or the like. The communication section 209 performs communication processing via a network such as the internet. A drive 210 is also connected to the I/O interface 205 as needed. A removable medium 211 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 210 as necessary, so that a computer program read out therefrom is mounted into the storage section 208 as necessary.
In particular, according to an embodiment of the present invention, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the invention include a computer program product comprising a computer program embodied on a computer-readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication section 209 and/or installed from the removable medium 211. The above-described functions defined in the system of the present application are executed when the computer program is executed by the Central Processing Unit (CPU) 201.
Also, the present invention provides a computer-readable medium that may be contained in the device described in the above embodiments; or may be separate and not incorporated into the device. The computer readable medium carries one or more programs which, when executed by a device, cause the device to include the method steps of:
and S1, when writing data into the memory of the hardware equipment, firstly writing the data into the A data area through the control head, and then synchronizing the data into the B data area through the control head.
S2, the control head determines A, B whether the written data in the data area is valid.
And S3, if the written data in the A, B data area are all valid, storing the data in the A data area after power failure.
And S4, if only one piece of written data in the A, B data area is valid, storing the data in the valid data area after power failure.
In a specific application industrial scene, the PID algorithm is used in the controller to adjust the field device, the PID algorithm needs to properly adjust P, I, D three input values according to the feedback value of the field data, and the device tends to be stable and achieves a control effect after repeated calculation and accumulation. If the field device is suddenly powered off, the intermediate process data of the PID algorithm is discarded, the PID algorithm restarts calculation, the feedback value of the field device is slowly accumulated to recheck the PID data, and the calculation is stable again after a sufficient period. Therefore, after the data storage method for power failure maintenance is applied to the field, if the equipment is suddenly powered off, the intermediate data can still be maintained, and the controller can quickly stabilize the field equipment.
In summary, the present invention provides a data storage method, system, device and medium for implementing power-down retention, in which a memory of a hardware device is divided into three storage areas in advance, that is, a control header and an A, B data area with the same size, and the control header includes information such as the current data size and validity of the A, B data area. When an application program writes certain data, the control head is used for modifying the information of the control head, then the data is written into the A data area, and then the control head is modified to synchronize the data into the B data area. The application program can judge A, B whether the data area data is legal by the control header: A. and if the data areas B are all valid, the data in the data area A is taken, and if only one data in the data area A, B is valid, the data in the valid data area is taken, so that the abnormal time sequence data file caused by power failure is prevented.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions.
It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the terms first, second, third and the like are for convenience only and do not denote any order. These words are to be understood as part of the name of the component.
Furthermore, it should be noted that in the description of the present specification, the description of the term "one embodiment", "some embodiments", "examples", "specific examples" or "some examples", etc., means that a specific feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, the claims should be construed to include preferred embodiments and all changes and modifications that fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention should also include such modifications and variations.
Claims (10)
1. A data storage method for realizing power failure retention is characterized by comprising the following steps:
when data are written into a memory of hardware equipment, the data are written into a data area A through a control head, and then the data are synchronized to a data area B through the control head;
determining A, B whether the written data of the data area is valid by the control header:
if the written data in the A, B data area are all valid, the data in the A data area is taken for storage after power failure;
if only one piece of written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure;
the hardware device memory comprises a control head, a data area A and a data area B.
2. The data storage method for implementing power-down retention according to claim 1, wherein the control head stores: A. capacity of B data area, actual effective data length, and write flag bit.
3. The data storage method for realizing power-down retention according to claim 2, wherein the capacities of the data area a and the data area B are consistent.
4. The data storage method for realizing power-down retention according to claim 2, wherein when writing data into the memory of the hardware device, the data is written into the a data area through the control head, and the method comprises:
when data are written into the memory of the hardware equipment, firstly setting a writing mark of a data area A in the control head, and writing the data into the data area A;
and resetting the writing mark of the data area A after the writing operation is finished, and updating the actual effective data length of the data area A in the control head.
5. The data storage method for realizing power-down retention according to claim 2, wherein the step of synchronizing the data to the B data area through the control header further comprises:
setting a writing mark of a data area B in the control head, and synchronously writing data of the data area A into the data area B;
and resetting the writing mark of the B data area after the writing operation is finished, and updating the effective data length of the B data area.
6. The data storage method for realizing power-down retention according to claim 2, wherein the determining A, B whether the write data of the data area is valid through the control header comprises:
reading a writing mark of an A data area in the control head;
if the reading result is false, which indicates that the last writing operation of the data area A is finished, judging that the data in the data area A is valid;
if the reading result is true, the last time that the writing operation of the data area A is interrupted by power failure is indicated, the data in the data area A is judged to be invalid, and the writing mark of the data area B in the control head is read;
and when the reading result of the writing mark in the B data area is false, judging that the data in the B data area is valid.
7. The data storage method for realizing power-down retention according to any one of claims 2 to 6, wherein each time a write operation is completed, the write flag of the A data area/the B data area in the control head is reset, and the actual effective length of the A data area/the B data area is updated.
8. A data storage system for implementing power down retention, comprising:
the data writing module is used for firstly writing data into the data area A through the control head and then synchronizing the data into the data area B through the control head when the data are written into the memory of the hardware equipment;
a validity judging module, configured to judge A, B whether the written data in the data area is valid through the control header:
the power-down taking module is used for taking and storing the data in the data area A after power failure when the written data in the data area A, B are all valid; when only one piece of written data in the A, B data area is valid, the data in the valid data area is taken for storage after power failure;
the hardware device memory comprises a control head, a data area A and a data area B.
9. A data storage device for implementing power down retention, comprising:
at least one application database;
and a hardware device memory communicatively coupled to the at least one application database;
wherein the application database stores instructions executable by the at least one hardware device memory to enable the at least one hardware device memory to perform a data storage method for implementing power down retention as claimed in any one of claims 1 to 7.
10. A computer-readable medium having stored thereon computer-executable instructions that, when executed by a processor, implement a data storage method for implementing power down retention as claimed in any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111639818.4A CN114415948A (en) | 2021-12-29 | 2021-12-29 | Data storage method, system, equipment and medium for realizing power failure retention |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111639818.4A CN114415948A (en) | 2021-12-29 | 2021-12-29 | Data storage method, system, equipment and medium for realizing power failure retention |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114415948A true CN114415948A (en) | 2022-04-29 |
Family
ID=81269824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111639818.4A Pending CN114415948A (en) | 2021-12-29 | 2021-12-29 | Data storage method, system, equipment and medium for realizing power failure retention |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114415948A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116701041A (en) * | 2023-07-27 | 2023-09-05 | 飞腾信息技术有限公司 | Memory data retention method, retention device and related equipment |
-
2021
- 2021-12-29 CN CN202111639818.4A patent/CN114415948A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116701041A (en) * | 2023-07-27 | 2023-09-05 | 飞腾信息技术有限公司 | Memory data retention method, retention device and related equipment |
| CN116701041B (en) * | 2023-07-27 | 2023-11-10 | 飞腾信息技术有限公司 | Memory data retention method, retention device and related equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109388677B (en) | Method, device and equipment for synchronizing data among clusters and storage medium thereof | |
| CN114466027B (en) | Cloud primary database service providing method, system, equipment and medium | |
| CN108614876B (en) | Redis database-based system and data processing method | |
| CN109086425B (en) | Data processing method and device for database | |
| CN114415948A (en) | Data storage method, system, equipment and medium for realizing power failure retention | |
| CN111666266A (en) | Data migration method and related equipment | |
| CN115481127A (en) | Data storage method, storage medium and equipment of database | |
| CN111367924A (en) | Data synchronization method and device, electronic equipment and storage medium | |
| CN110321590B (en) | Automatic generation method and device of refrigerating system design drawing and storage medium | |
| CN112860376B (en) | Snapshot chain manufacturing method and device, electronic equipment and storage medium | |
| CN115827322A (en) | Cloud storage data full-scale disaster recovery method and system | |
| CN109582330B (en) | Data model upgrading method, device, equipment and readable storage medium | |
| CN112732370B (en) | Business process adjustment method and device | |
| CN111026810B (en) | Data synchronization method, device and storage medium | |
| CN110377381B (en) | List refreshing method and device for information system | |
| CN113886352B (en) | Metadata recovery method, device, equipment and medium of distributed file system | |
| CN111930550A (en) | Client repairing method, device, equipment and medium | |
| CN116450739A (en) | Multi-station data synchronization method, system, device and medium | |
| JPH05324439A (en) | Data base control journal output system | |
| CN117251510A (en) | Data synchronization method and device | |
| CN116166195A (en) | Data processing method, system, equipment and storage medium | |
| CN114721871A (en) | Data backup method and device and electronic equipment | |
| CN115203329A (en) | Data synchronization method, data synchronization device, and computer-readable storage medium | |
| CN114610816A (en) | Database capacity expansion method, device and system | |
| CN116501543A (en) | Physical backup method, storage medium and equipment for database cluster |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |