CN114401238B - Switch management control method, system, computer equipment and data processing terminal - Google Patents
Switch management control method, system, computer equipment and data processing terminal Download PDFInfo
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- H—ELECTRICITY
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- H—ELECTRICITY
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Abstract
The invention belongs to the technical field of data exchange control, and discloses a switch management control method, a system, computer equipment and a data processing terminal. After receiving the control frame through the interface of the control channel, the receiving control module analyzes the control frame, judges the frame head of the control frame to be correct, and sends the specific control content to the data processing module of the control frame of the type after obtaining the type of the control frame, the processed information for configuring the switch is provided for the switch, and the sending control module sends the feedback frame to the upper computer after the switch obtains the relevant configuration. The invention improves the processing rate of each channel, and meanwhile, when the switch is managed and controlled, the forwarding of the data frame is not affected.
Description
Technical Field
The invention belongs to the technical field of data exchange control, and particularly relates to a switch management control method, a system, computer equipment and a data processing terminal.
Background
At present, in order to configure a switch, the simplest way of a forwarding table according to data forwarding is to load an initialization file into an instantiated soft core, and the problem is that once the requirement of forwarding is to be modified, the initialization file in the soft core needs to be reloaded, a bit stream is regenerated, and the bit stream is downloaded into a development board. For the switched engineering, the step of regenerating the bit stream is time and resource consuming and even waits for several hours, which is a very inflexible way of configuration. Secondly, the switch enters the flow classification and grouping processing module together with the data frame to carry out frame analysis after receiving the control frame at the present stage, then processes the content of the control frame, and the feedback frame is fed to the corresponding port after passing through the queue management module.
Through the above analysis, the problems and defects existing in the prior art are as follows: the method can not reduce the waste of resources on the basis of flexibly managing and controlling the switch, can influence the performance of processing data frames in the switch, and increases the processing burden in the switch.
The difficulty of solving the problems and the defects is as follows: the control frame should reduce the influence on the normal processing of the data frame, and the extra requirements on the switch flow classification packet processing and queue management are reduced as much as possible.
The meaning of solving the problems and the defects is as follows: the forwarding table of the switch can be flexibly configured according to actual conditions, so that flexible forwarding of data is realized. The internal state of the switch can be queried in real time, the normal forwarding of the data frame is not affected, and the requirements on each module in the switch are not increased.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a switch management control method, a system, computer equipment and a data processing terminal.
The invention is realized in such a way, and the switch management control method adopts the control frame of the switch to independently set a channel, separates a data channel from the control channel, and manages and controls the switch in a way of separating the transmission and the reception of the control frame; after receiving a control frame through an interface of a control channel, analyzing the control frame by receiving, judging the frame head of the control frame correctly, after obtaining the type of the control frame, transmitting specific control content to the control frame of the type to process data, providing the processed information for configuring the switch to the switch, and after obtaining relevant configuration by the switch, transmitting a feedback frame to an upper computer.
Further, the switch management control method specifically includes:
the first step, a data channel and a control channel are separated, a control frame sent by an upper computer is received and sent to a feedback frame of the upper computer, and the mutual influence on the processing of the data frame and the control frame is ensured;
the second step, after the control channel interface receives the control frame, judging which type of frame belongs to according to the type field of the control frame, and directly sending a request signal for inquiring the control frame; unicast, register, control frame mapping inquiry sends out request to process corresponding type frame, and removes control frame header information, and writes effective processing content into buffer memory. The processing speed can be improved by dividing the processing part of the receiving and control frames, and the receiving module can analyze the next control frame when the control frame is processed. Meanwhile, the processing modules of the various types of control frames are independent, so that the processing of each type of control frame is ensured not to influence the processing flow of other types of control frames;
and thirdly, after receiving the request signal, reading the cache to obtain the effective content of the control frame, performing table allocation, table reading or register allocation, register reading or MAC address (media access control or physical address) inquiring operation, and then sending out a feedback frame request signal. Ensuring that a feedback frame can be sent out in time after the processing of each control frame is finished;
fourth, after receiving the feedback frame request signal, framing the feedback header and the feedback content corresponding to the type of frame to the feedback frame transmission channel, and separating the control frame processing module from the transmission channel, so as to ensure that the processing of the next control frame is not affected when the feedback frame of the last control frame is transmitted.
Further, the processing performed after the control channel interface receives the control frame includes:
step one, extracting a control frame synchronization head, judging whether the control frame is correct or not by the equipment type and the equipment number, and if so, jumping to the step two; if the error occurs, the current control frame is not processed any more, and the next control frame is ready to be received;
extracting a control frame type and a sequence number key field;
judging whether the content to be processed is correct or not according to different frame types; if the control frame is correct, jumping to the fourth step, if the control frame is incorrect, not processing the current control frame, preparing to receive the next control frame, and sending a control module request signal;
writing the effective content of the control frame into a buffer memory of a corresponding type frame, and sending a frame type and a sequence number key field to a corresponding frame processing module;
and step five, ending the receiving control of the current control frame and preparing to receive the next control frame.
Further, the processing of the corresponding type frame includes unicast processing, register processing, mapping inquiry processing, and performing different control frame processing procedures.
Further, the unicast processing includes, as a result,
step one, after receiving a control request, registering the control frame type, the sequence number, the read-write start address and the number of read-write list items; if the unicast write request is the unicast write request, reading the unicast write cache, and if the unicast read request is the unicast read request, reading the unicast read cache;
step two, if the unicast allocation table frame is adopted, reading the unicast write cache data, then giving the data to a unicast table of a corresponding address, and if the unicast write cache data is adopted as the unicast read table frame, reading unicast table content of the corresponding address according to the address data of the unicast read cache and writing the unicast table content into a sent unicast data cache;
step three, if the unicast allocation table frame is used, after the unicast table is written, a control initiation request signal is sent to the server, the type and the sequence number are provided, and the starting address and the number of the table items are read and written; for the read operation, after all read address related contents are written into the cache, a request signal is initiated to the sending control, and the type and the sequence number are provided;
ending the processing of the current unicast control frame and preparing for the processing of the next unicast control frame;
the process of the register processing specifically includes,
step one, after receiving the control request, registering the control frame type, sequence number, number of registers read or written; if the register read request is the register write request, reading the register write cache, and if the register read request is the register read request, reading the register read cache;
step two, if a frame is configured for the register, reading out the register write cache data, and then giving the data to the register with the corresponding address, if the frame is read for the register, reading the register content with the corresponding address according to the register read cache address data, and writing the register content with the corresponding address into the transmitted register data cache;
step three, if the frame is written for the register, after the register configuration is completed, a control initiation request signal is sent to the register, the type and the sequence number are provided, and the number of the registers is written; for a register read frame, after all read address related contents are written into a cache, a request signal is initiated to a sending control, the type and the sequence number are provided, and the number of the registers is read;
ending the processing of the current register control frame and preparing for the processing of the next register control frame;
the specific processing procedure of the MAC query processing is that,
step one, after receiving the control request, registering the frame type and sequence number of the inquiry frame;
traversing the self-learning table entries, and writing the effective table entry contents into a transmission mapping address cache;
step three, after all the read effective address related contents are written into the cache, a request signal is initiated to the sending control, and the type and the sequence number are provided;
and step four, ending the processing of the current MAC inquiry frame and preparing for the processing of the next MAC inquiry frame.
Further, the switch management control method includes, in the process of transmission control,
step one, preparing to send a feedback frame of a corresponding type according to a signal requesting the feedback frame;
step two, for the feedback frame with write operation and error of the control frame, only the fields of the sequence number are needed to generate a frame header according to the type, and the frame header is added with a fixed frame content field to be output to a feedback frame sending channel;
step three, for the control frame being read operation, firstly generating a frame head according to key fields such as frame type, sequence number and the like, reading a transmission buffer of a processing module to obtain specific data content to be fed back, splicing the specific data content into a feedback frame, and outputting the feedback frame to a feedback frame transmission channel;
and step four, ending the processing of the feedback frame and preparing the transmission of the next feedback frame.
It is a further object of the present invention to provide a computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of the switch management control method.
Another object of the present invention is to provide an information data processing terminal for implementing the switch management control method.
Another object of the present invention is to provide a switch management control system implementing the switch management control method, the switch management control system comprising:
the receiving control module judges which type of frame belongs to according to the type field of the control frame, and for the state inquiry control frame, the receiving control module directly sends a request signal to the sending control module;
the processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing the operations of table allocation, table reading or register allocation, register reading or MAC address inquiry, and sending a feedback frame request signal to the sending control module;
and the sending control module is used for framing and outputting the feedback head corresponding to the type of frame and the feedback content to the feedback frame sending channel after receiving the feedback frame request signal.
Further, the processing module includes:
the unicast processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing table allocation and table reading, and then sending a feedback frame request signal to the sending control module;
the register processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, configuring the register and reading the register;
and the MAC query processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing the operation of MAC address query, and sending a feedback frame request signal to the sending control module.
By combining all the technical schemes, the invention has the advantages and positive effects that: the invention separates the data channel from the control channel, ensures that the processing of the data frame and the control frame are not affected, can simultaneously improve the processing speed of the data frame and the control frame, and can not affect the normal forwarding of the data frame when the relevant configuration in the switch is to be changed.
The design of the management control module separates the request and response channels of the control frames, and when one control frame is received, the transmission processing of the feedback frame of the other control frame can be simultaneously carried out, so that the processing speed of the control frame is improved, and the two control modules, namely the transmission and the reception, carry out integral scheduling, thereby being convenient for management and maintenance.
The invention supports flexible configuration of the switch forwarding table, can modify table information at any time, and forwards data to any set port; once the inquiry frame is received, the existing state of the switch can be uploaded in time, including the content of a forwarding table, the mapping relation of ports, the number of the receiving and transmitting frames of each port and the data rate of receiving and transmitting. The control center can make adjustment in time according to the existing conditions.
The invention has stronger expansibility and more stable management and control framework, and can realize more switch-related control functions based on the framework by only adding corresponding branches to the receiving control module and the sending control module and adding a new control frame processing module independently.
Drawings
Fig. 1 is a flowchart of a switch management control method according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a switch management control system according to an embodiment of the present invention;
in fig. 2: 1. a receiving control module; 2. a processing module; 2-1, a unicast processing module; 2-2, a register processing module; 2-3, a mac query processing module; 3. and a sending control module.
Fig. 3 is a simulation diagram of a unicast write frame received by an accept control module according to the embodiment of the present invention.
Fig. 4 is a simulation diagram of a receiving control module receiving a unicast read frame according to the embodiment of the present invention.
Fig. 5 is a simulation diagram of a receiving control module receiving a register write frame according to an embodiment of the present invention.
Fig. 6 is a simulation diagram of a receiving control module receiving a register read frame according to an embodiment of the present invention.
Fig. 7 is a simulation diagram of a receiving control module receiving a map address query frame according to an embodiment of the present invention.
Fig. 8 is a simulation diagram of a unicast frame processing module to unicast write frame provided by the implementation of the present invention.
FIG. 9 is a diagram illustrating a register write frame for a register frame processing module according to an embodiment of the present invention.
Fig. 10 is a schematic diagram of a MAC query processing module according to the embodiment of the present invention receiving a query frame.
Fig. 11 is a simulation diagram of a transmission control module transmitting a mapping address query frame according to an embodiment of the present invention.
Fig. 12 is a data forwarding diagram completed by the switch after unicast configuration of the switch based on the present invention.
Detailed Description
The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Aiming at the problems existing in the prior art, the invention provides a switch management control method, a system, a computer device and a data processing terminal, and the invention is described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the switch management control method provided by the invention includes the following steps:
s101: receiving a control frame sent by an upper computer by adopting a mode of separating a data channel from a control channel, and sending the control frame to a feedback frame of the upper computer;
s102: after the control channel interface receives the control frame, judging which type of frame belongs to according to the type field of the control frame, and directly sending a request signal for inquiring the control frame; unicast, register, control frame mapping inquiry sends request to processing module of corresponding type frame, and removes control frame head information, and writes actual effective processing content into buffer memory;
s103: after receiving the request signal, reading the cache to obtain the effective content of the control frame, performing the operations of table allocation, table reading or register allocation, register reading or MAC address inquiry, and then sending out a feedback frame request signal;
s104: and after receiving the feedback frame request signal, framing and outputting the feedback head corresponding to the type of frame and the feedback content to a feedback frame sending channel.
Other steps may be performed by those skilled in the art of the switch management control method provided by the present invention, and the switch management control method provided by the present invention in fig. 1 is merely a specific embodiment.
As shown in fig. 2, the switch management control system provided by the present invention includes:
the receiving control module 1 judges which type of frame belongs to according to the type field of the control frame, and for the state inquiry control frame, the receiving control module 1 directly sends a request signal to the sending control module 3;
the processing module 2 reads the cache after receiving the request signal to obtain the effective content of the control frame, performs the operations of table allocation, table reading or register allocation, register reading or MAC address inquiry, and then sends a feedback frame request signal to the sending control module 3;
and the sending control module 3 is used for framing and outputting the feedback head corresponding to the type of frame and the feedback content to the feedback frame sending channel after receiving the feedback frame request signal.
The processing module 2 includes:
the unicast processing module 2-1 is configured to receive the request signal, read the buffer memory to obtain the effective content of the control frame, perform table allocation and table reading, and send a feedback frame request signal to the sending control module 3.
And the register processing module 2-2 is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, so as to configure the register and read the register.
And the MAC query processing module 2-3 is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing the operation of MAC address query, and then sending a feedback frame request signal to the sending control module 3.
The technical scheme of the invention is further described below with reference to specific embodiments.
Example 1:
the switch management control method provided by the invention specifically comprises the following steps:
(1) Receiving a control frame sent by an upper computer by adopting a mode of separating a data channel from a control channel, and sending the control frame to a feedback frame of the upper computer;
(2) After the control channel interface receives the control frame, the receiving control module 1 judges which type of frame belongs to according to the type field of the control frame, and for the state inquiry control frame, the receiving control module 1 directly sends a request signal to the sending control module 3; unicast, register, control frame mapping inquiry sends request to processing module 2 of corresponding type frame, and removes control frame head information, and writes effective processing content into buffer memory;
after receiving the request signal, the processing module 1 reads the cache to obtain the effective content of the control frame, performs the operations of table allocation, table reading or register allocation, register reading or MAC address inquiry, and then sends a feedback frame request signal to the sending control module 3;
after receiving the feedback frame request signal, the sending control module 3 performs framing on the feedback header and the feedback content corresponding to the type of frame and outputs the frame to the feedback frame sending channel.
Example 2:
the management control method of the present invention performs processing performed by receiving a control frame at the reception control module 2, including:
step one, extracting a control frame synchronization head, judging whether the control frame is correct or not by the equipment type and the equipment number, and if so, jumping to the step two; if the error occurs, the current control frame is not processed any more, and the next control frame is ready to be received;
step two, extracting key fields such as control frame types, sequence numbers and the like;
judging whether the content to be processed is correct or not according to different frame types; if the control frame is correct, jumping to the fourth step, if the control frame is incorrect, not processing the current control frame, preparing to receive the next control frame, and sending a control module request signal;
writing the effective content of the control frame into a buffer memory of a corresponding type frame, and sending key fields such as frame type, sequence number and the like to a corresponding frame processing module;
and step five, ending the receiving control of the current control frame and preparing to receive the next control frame.
Example 3:
in the frame processing, the switch management control method of the invention comprises three parallel sub-processing modules: unicast processing, register processing, mapping inquiry processing, and executing different control frame processing procedures. For unicast processing modules:
step one: after receiving the request of the receiving control module 2, registering the control frame type, the sequence number, the read-write start address and the number of read-write list items; if the unicast write request is the unicast write request, reading the unicast write cache, and if the unicast read request is the unicast read request, reading the unicast read cache;
step two: if the unicast list allocation frame is adopted, reading the unicast write cache data, then giving the data to a unicast list of a corresponding address, and if the unicast write cache data is adopted as the unicast list reading frame, reading unicast list content of the corresponding address according to the unicast read cache address data and writing the unicast list content into a sent unicast data cache;
step three: if the unicast list frame is the unicast list frame, a request signal is initiated to the sending control module 2 after the unicast list is written in, the type and the sequence number are provided, and the starting address and the number of the list items are read and written; for the reading operation, after all read address related contents are written into the cache, a request signal is initiated to the sending control module 2, and the type and the sequence number are provided;
step four: and ending the processing of the current unicast control frame and preparing for the processing of the next unicast control frame.
Example 4:
the processing procedure of the register processing module of the invention specifically comprises:
step one: after receiving the request of the receiving control module 2, registering the control frame type, sequence number, and the number of registers to be read or written; if the register read request is the register write request, reading the register write cache, and if the register read request is the register read request, reading the register read cache;
step two: if the frame is configured for the register, reading the register write cache data, and then giving the data to the register with the corresponding address, if the frame is read for the register, reading the register content with the corresponding address according to the register read cache address data, and writing the register content into the transmitted register data cache;
step three: if the frame is written for the register, a request signal is initiated to the sending control module 2 after the register configuration is completed, the type and the sequence number are provided, and the number of the registers is written; for a register read frame, after all read address related contents are written into a cache, a request signal is initiated to a transmission control module 2, the type and the sequence number are provided, and the number of the registers is read;
step four: the processing of the current register control frame is ended, and the next register control frame is prepared for processing.
Example 5:
the specific processing procedure of the MAC inquiry processing module provided by the invention is as follows:
step one: after receiving the request of the receiving control module 2, registering the frame type and sequence number of the query frame;
step two: traversing the self-learning table entries, and writing the effective table entry contents into a transmission mapping address cache;
step three: after all the read effective address related contents are written into the cache, a request signal is initiated to the sending control module 2 to provide types and serial numbers;
step four: and ending the processing of the current MAC inquiry frame and preparing for the processing of the next MAC inquiry frame.
Example 6:
the switch management control method of the invention comprises the following steps in the process of a transmission control module:
step one: preparing to send a feedback frame of a corresponding type according to a signal requesting the feedback frame;
step two: for the feedback frame with write operation and error of the control frame, only the fields of the sequence number are needed to generate a frame header according to the type, and the frame header is added with a fixed frame content field and output to a feedback frame sending channel;
step three: for the control frame, firstly generating a frame head according to key fields such as frame type, sequence number and the like, reading a sending buffer of a processing module to obtain specific data content to be fed back, splicing the specific data content into a feedback frame, and outputting the feedback frame to a feedback frame sending channel;
step four: the processing of this feedback frame is ended, and the next feedback frame is prepared for transmission.
It should be noted that the embodiments of the present invention can be realized in hardware, software, or a combination of software and hardware. The hardware portion may be implemented using dedicated logic; the software portions may be stored in a memory and executed by a suitable instruction execution system, such as a microprocessor or special purpose design hardware. Those of ordinary skill in the art will appreciate that the apparatus and methods described above may be implemented using computer executable instructions and/or embodied in processor control code, such as provided on a carrier medium such as a magnetic disk, CD or DVD-ROM, a programmable memory such as read only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The device of the present invention and its modules may be implemented by hardware circuitry, such as very large scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., as well as software executed by various types of processors, or by a combination of the above hardware circuitry and software, such as firmware.
The foregoing is merely illustrative of specific embodiments of the present invention, and the scope of the invention is not limited thereto, but any modifications, equivalents, improvements and alternatives falling within the spirit and principles of the present invention will be apparent to those skilled in the art within the scope of the present invention.
Claims (4)
1. The switch management control method is characterized by specifically comprising the following steps:
the first step, a data channel and a control channel are separated, a control frame sent by an upper computer is received, and the control frame is sent to a feedback frame of the upper computer;
the second step, after the receiving control module receives the control frame, judging which type of frame belongs to according to the type field of the control frame, and directly sending a request signal to the sending control module for inquiring the control frame; for unicast, register and mapping inquiry control frames, sending a request to a processing module of a corresponding type frame, removing the head information of the control frame, and writing actual effective processing content into a cache;
thirdly, after receiving the request signal, the processing module reads the cache to obtain the effective content of the control frame, performs the operations of table allocation, table reading, register allocation, register reading or MAC address inquiry, and then sends out a feedback frame request signal;
fourth, after receiving the feedback frame request signal, the sending control module carries out framing on the feedback head corresponding to the type of frame and the feedback content and outputs the framing to the feedback frame sending channel;
the processing performed after the receiving control module receives the control frame comprises the following steps:
step one, extracting a control frame synchronization head, a device type and a device number, judging whether the control frame is correct, and if so, jumping to the step two; if the error occurs, the current control frame is not processed any more, and the next control frame is ready to be received;
step two, extracting the control frame type and sequence number;
judging whether the content to be processed is correct or not according to different frame types; if the control frame is correct, jumping to the fourth step, if the control frame is incorrect, not processing the current control frame, preparing to receive the next control frame, and sending a control module request signal;
writing the effective content of the control frame into a buffer memory of a corresponding type frame, and sending the frame type and sequence number to a processing module of the corresponding type frame;
step five, the receiving control of the current control frame is finished, and the next control frame is ready to be received;
the processing module of the corresponding type frame comprises: the system comprises a unicast processing module, a register processing module and a MAC inquiry processing module, wherein the unicast processing module, the register processing module and the MAC inquiry processing module are used for executing different control frame processing procedures;
the unicast processing module comprises a data processing module and a data processing module,
step one, after receiving a request sent by a receiving control module, registering the control frame type, the sequence number, the read-write starting address and the number of read-write table items; if the unicast write request is the unicast write request, reading the unicast write cache, and if the unicast read request is the unicast read request, reading the unicast read cache;
step two, if the unicast allocation table frame is adopted, reading the unicast write cache data, then giving the data to a unicast table of a corresponding address, and if the unicast write cache data is adopted as the unicast read table frame, reading unicast table content of the corresponding address according to the address data of the unicast read cache and writing the unicast table content into a sent unicast data cache;
step three, if the unicast list frame is the unicast list frame, a request signal is initiated to a sending control module after the unicast list is written in, and the type, the sequence number, the read-write starting address and the number of the read-write list items are provided; for the reading operation, after all read address related contents are written into the cache, a request signal is initiated to the sending control module, and the type and the sequence number are provided;
ending the processing of the current unicast control frame and preparing for the processing of the next unicast control frame;
the register processing module process specifically comprises,
step one, after receiving a request sent by a receiving control module, registering the control frame type, the sequence number and the number of read or write registers; if the register read request is the register write request, reading the register write cache, and if the register read request is the register read request, reading the register read cache;
step two, if a frame is configured for the register, reading out the register write cache data, and then giving the data to the register with the corresponding address, if the frame is read for the register, reading the register content with the corresponding address according to the register read cache address data, and writing the register content with the corresponding address into the transmitted register data cache;
step three, if the frame is written for the register, a request signal is initiated to a sending control module after the register configuration is completed, and the type, the sequence number and the number of the written registers are provided; for a register read frame, after all read address related contents are written into a cache, a request signal is initiated to a sending control module, and the type, the sequence number and the number of read registers are provided;
ending the processing of the current register control frame and preparing for the processing of the next register control frame;
the specific processing procedure of the MAC inquiry processing module is that,
step one, after receiving a request sent by a receiving control module, registering the frame type and the sequence number of the query frame;
traversing the self-learning table entries, and writing the effective table entry contents into a transmission mapping address cache;
step three, after all the read effective address related contents are written into the cache, a request signal is initiated to a sending control module, and the type and the serial number are provided;
ending the processing of the current MAC inquiry frame and preparing for the processing of the next MAC inquiry frame;
the processing of the switch management control method in the transmission control module comprises,
step one, preparing to send a feedback frame of a corresponding type according to a feedback frame request signal;
step two, for the feedback frame with write operation and error of the control frame, only a frame header is generated according to the fields of the type and the sequence number, and a fixed frame content field is added to output to a feedback frame sending channel;
step three, for a feedback frame of which the control frame is a read operation, firstly generating a frame header according to the frame type and the sequence number, reading a sending buffer of a processing module to obtain specific data content to be fed back, splicing the specific data content into a feedback frame, and outputting the feedback frame to a feedback frame sending channel;
and step four, ending the processing of the feedback frame and preparing the transmission of the next feedback frame.
2. A computer device comprising a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the switch management control method of claim 1.
3. A switch management control system that implements the switch management control method of claim 1, the switch management control system comprising:
the receiving control module judges which type of frame belongs to according to the type field of the control frame, and for the state inquiry control frame, the receiving control module directly sends a request signal to the sending control module;
the processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing the operations of table allocation, table reading or register allocation, register reading or MAC address inquiry, and sending a feedback frame request signal to the sending control module;
and the sending control module is used for framing and outputting the feedback head corresponding to the type of frame and the feedback content to the feedback frame sending channel after receiving the feedback frame request signal.
4. The switch management control system of claim 3 wherein the processing module comprises:
the unicast processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing table allocation and table reading, and then sending a feedback frame request signal to the sending control module;
the register processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, configuring the register and reading the register;
and the MAC query processing module is used for reading the cache after receiving the request signal to obtain the effective content of the control frame, performing the operation of MAC address query, and sending a feedback frame request signal to the sending control module.
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