CN114401076A - Method and device for reducing Ethernet data transmission shaking - Google Patents
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Abstract
The invention provides a method and a device for reducing Ethernet data transmission shaking, wherein the method comprises the following steps: a receiving end acquires absolute time of a sampling starting point in a data frame; determining activation time according to the delay configuration value and the absolute time; and comparing the activation time with a local clock count value, and reading the data frame according to a comparison result. The frequency and time of the sending end and the receiving end are synchronous, the accumulated deviation of a clock is eliminated, the synchronous state can keep and record the absolute time count value of the acquisition starting point of data acquisition for a long time, and the acquisition time of a data frame can be restored after the receiving end receives the data frame, so that the time shake caused by delay is eliminated; meanwhile, the multi-buffer pool mechanism can solve the problems of delay and interleaving of data frames and interleaving of arrival time of the data frames of different sampling channels.
Description
Technical Field
The present invention relates to the field of network data transmission technologies, and in particular, to a method and an apparatus for reducing shaking of ethernet data transmission.
Background
In the operation process of the network motion control system, all control devices are connected in a network form, so that the remote speed regulation, the setting of control parameters and the like can be realized. The field bus connects a plurality of devices into a network, and realizes the communication and control between the devices on the network and the computer according to the open and standard communication protocol, and can conveniently establish a multi-node distributed network control system.
For example, field buses such as CAN, RS232, MODBUS, etc. have strict definition constraints on network topology and underlying communication protocols, and the network is preconfigured through a protocol with precise specifications. In these networks, data transmission delay mainly comes from propagation delay of a physical cable and processing delay of an interface device, delay variation caused by an exchange forwarding process is avoided, instantaneity and certainty of transmission of key control information can be guaranteed, and shaking is small.
But in ethernet the network structure is more complex. Data frames (e.g., ethernet data frames) are transmitted from one node to another, and many nodes, such as from an endpoint to a switch (e.g., a bridge), may be forwarded from the switch to another switch, and finally to another endpoint. The architecture is largely self-configuring. The switch receives the data frame completely before forwarding the data frame. However, this causes a number of problems: if the number of frames accumulated in a certain port buffer of the switch is too many, the newly received frames can be discarded; the delay time of the Ethernet frame at the switching routing equipment is related to the length of the Ethernet frame, so that delay jitter can be caused; additional delay may result because the destination port may have other data frames being transmitted.
Therefore, the switching routing mechanism as an important characteristic of the ethernet in the prior art cannot provide a delay guarantee, that is, data may generate a large jitter when being transmitted in a complex network such as the ethernet, and the jitter may cause data frames to be discarded during transmission, thereby making the ethernet difficult to be applied to motion control/closed loop control.
To solve the above technical problems, the industry has developed various real-time industrial ethernet solutions to improve the reliability, real-time performance and certainty of complex networks such as ethernet. Several methods are typical:
PROFINET: the protocol may provide two solutions with different capabilities. PROFINET RT (real time communication) is a factory automation solution with a cycle time of up to 1 ms. RT is based directly on standard ethernet, with real-time/non-real-time traffic prioritized by some extension mechanism of the ethernet standard, e.g., quality of service (QoS). However, the QoS is based on a software method, and the improvement degree is very limited, and the resource and delay problems cannot be completely solved. For hard real time, PROFINET provides an extension to synchronous real time (IRT). In this case, part of the ethernet bandwidth is reserved exclusively for IRT traffic by means of an extension of the standard ethernet hardware. This can be achieved by a precise synchronization of the clocks in the IRT nodes. Thus, normal flow in the channel (red phase) can be prevented at each cycle. Only IRT frames in the red phase arrive at the network. Furthermore, the network participants transmit the IRT frames exactly at the pre-calculated time, thereby maximizing the efficiency in the red phase. IRT frames pass through the network with almost no cycle slip.
EtherCAT (ethernet fieldbus) is an improved mechanism that currently achieves the best real-time performance under the ethernet framework, but EtherCAT not only optimizes fieldbus applications and high-throughput applications at layer 2, but also makes significant modifications even at the ethernet physical layer (i.e., layer 1), much like a fieldbus in fact. Different from the common Ethernet, each device sends a separate frame, and exchange and mutual transmission are realized through a switch or a router; EtherCAT does not have a classical ethernet bridge, but rather transmits a total string frame every cycle throughout the network, which contains all the data for the addressed device. When the EtherCAT global string frame is forwarded via a device, the data for that particular device is inserted into and extracted from the frame in real time. In this way, extremely short cycle times can be achieved and certain transmission delays and extremely small delay jitter can be provided, thus achieving some success in the fields of motion control and the like. Due to the large number of modifications to the physical and link layers of ethernet by EtherCAT, which do not conform to the specifications of standard ethernet, there are many compatibility and interconnectivity limitations.
In industrial motion control applications, as the requirements of users on service quality are continuously increased, the requirements on the real-time performance of the information acquisition and control transmission process are increasingly stringent, and a control algorithm must acquire input information and generate a control result at a certain moment. If the sampling information has large time deviation, the calculation of the control algorithm is wrong, and the control precision is reduced.
Therefore, there is a need for a method and apparatus for reducing data jitter generated during data transmission in a complex network such as ethernet.
Disclosure of Invention
In order to solve the above problems, the present invention designs a processing method for reducing the shaking of ethernet data transmission, which specifically comprises the following steps:
the invention discloses a method for reducing data transmission shaking in a network, which comprises the following steps:
a receiving end acquires absolute time of a sampling starting point in a data frame;
determining activation time according to the delay configuration value and the absolute time;
and comparing the activation time with a local clock count value, and reading the data frame according to a comparison result.
Further, wherein,
and adding the delay configuration value and the absolute time information to obtain the activation time.
Further, wherein,
and acquiring mark information in the data frame, and determining delay configuration information according to the mark information.
Further, wherein,
the marking information is network layer port information or application layer information.
Further, wherein,
writing the activation time and the data frame into a selected buffer pool;
the activation time information plus the expected read-out duration of the frame data is used as the allowed activation time of the subsequent written data frame of the buffer pool.
Further, wherein,
the activation time of the data frame subsequently written into the buffer pool is larger than the allowable activation time.
Further, wherein,
and comparing the activation time of the subsequent data frame with the allowable activation time of all the buffer pools, and selecting a proper buffer pool by combining the residual capacity of the buffer pools.
Further, the comparing the activation time with a local clock count value and reading the data frame according to a comparison result specifically includes:
and prefetching the activation time of the data frame at the top in each buffer pool, comparing the activation time with the local real-time running clock count value, and reading all the data frames from the buffer pools and outputting the data frames from the corresponding sampling channel data ports when the comparison result shows that the time is equal.
Further, wherein,
and the sampling starting point absolute time is a corresponding current clock count value when the data is sampled.
Further, wherein obtaining the absolute time of the sample start point in the data frame comprises:
the transmitting end and the receiving end carry out frequency synchronization, determine the transmission delay between the transmitting end and the receiving end and carry out correction.
Correspondingly, the invention provides a device for reducing data transmission shaking in a network, which comprises:
an extraction section for acquiring a sampling start point absolute time in a data frame;
an activation time determination section for determining an activation time based on the delay profile and the absolute time;
and the buffer activation processing part is used for comparing the activation time with a local clock counting value and reading the data frame according to a comparison result.
Further, wherein,
the activation time is obtained by adding the delay configuration value and the absolute time.
Further, the apparatus further comprises a delay arrangement section, wherein,
and the delay configuration part is used for acquiring the mark information in the data frame and determining a delay configuration value according to the mark information.
Further, the device also comprises a buffer queue scheduling part which is used for,
writing the activation time and the data frame into a selected buffer pool;
the activation time information plus the expected read-out duration of the frame data is used as the allowed activation time of the subsequent written data frame of the buffer pool.
Further, wherein,
the activation time of the data frame subsequently written into the buffer pool is larger than the allowable activation time.
Further, wherein,
and comparing the activation time of the subsequent data frame with the allowable activation time of all the buffer pools, and selecting a proper buffer pool by combining the residual capacity of the buffer pools.
Further, the comparing the activation time with a local clock count value and reading the data frame according to a comparison result specifically includes:
and prefetching the activation time of the data frame at the top in each buffer pool, comparing the activation time with the local real-time running clock count value, and reading all the data frames from the buffer pools and outputting the data frames from the corresponding sampling channel data ports when the comparison result shows that the time is equal.
Further, the device further comprises a synchronization and interface logic, wherein the synchronization and interface logic performs frequency synchronization with the sending end before acquiring the absolute time of the sampling starting point in the data frame, determines the transmission delay between the sending end and the device, and performs correction.
According to the processing system and the processing method for reducing the Ethernet data transmission shaking, the frequency and the time of the sending end and the receiving end are synchronous, the accumulated deviation of a clock is eliminated, the synchronous state can keep and record the absolute time counting value of the acquisition starting point of data acquisition for a long time, the acquisition time of a data frame can be restored after the receiving end receives the data frame, and therefore the time shaking caused by delay is eliminated; meanwhile, the multi-buffer pool mechanism can solve the problems of delay and interleaving of data frames and interleaving of arrival time of the data frames of different sampling channels.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a diagram illustrating a network connection structure of a network control system according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating collector-side data processing logic according to an embodiment of the present invention;
FIG. 3 shows a diagram of controller-side processing logic, according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a diagram illustrating a network connection structure of a network control system according to an embodiment of the present invention. It should be noted that the present invention is exemplified by the structure shown in fig. 1, but is not limited to this network structure.
As shown in fig. 1, the collector as the transmitting end may sample data according to a fixed or non-fixed period or based on an external signal trigger and form collected data information. And after the data information is collected, the data information is sent to a transmission network through a sending logic and finally sent to a controller serving as a receiving end.
In the transmission process of the data information in the transmission network, due to the processes of storage and forwarding and the like existing in the transmission network process, the information of the data information actually received by the controller serving as the receiving end can greatly shake at any moment.
After the controller receives the data information, the data information is processed according to a method for reducing network data transmission shaking arranged in the controller, so that shaking of the data information reaching the controller at the reaching moment is reduced or even avoided, and influence on delay in a network data transmission process is eliminated.
It should be noted that, in the embodiment of the present invention, an example is described in which a collector is used as a data sending end and a controller is used as a data receiving end, but the present invention is not limited to a collector and a controller, and any device that sends data information in a network may be used as a sending end and any device that receives data information in a network may be used as a receiving end; when the device sends the data frame, the device is used as a sending end; when the device receives the data frame, the device is used as a receiving end.
The method for reducing the data transmission shaking of the embodiment of the invention generally comprises the following steps:
step 1: the frequency synchronization of the collector and the controller is realized through the synchronization of the collector and the controller and the interface logic.
The collector sends the data collected by sampling and other modes to the synchronization and interface logic through the sending logic, uses the determined working frequency as the sending carrier frequency of the communication link, loads the data information such as data frames formed by the data on the sending carrier frequency, and sends the data information to the controller through the transmission network;
after the controller receives the data information sent from the transmission network through the synchronization and interface logic, the data sending carrier frequency of the collector end is recovered from the communication link by using the CDR clock data recovery technology, and the working frequency in the controller is further generated. The mode of the embodiment of the invention can enable the controller to follow the frequency of the collector by means of the communication link. Using the same principle, it is also possible to configure the collector to follow the frequency of the controller. In other words, in the embodiment of the present invention, frequency synchronization between the collector and the controller may be implemented by one party following the other party, or frequency synchronization between the collector and the controller may be implemented by both parties following a third party, as long as frequency synchronization between the collector and the controller is implemented.
When the frequencies of the collector and the controller are synchronized, the time counting pace of the collector and the controller is consistent, so that the accumulated error of the time counting between the collector and the controller is eliminated.
Step 2: the transmission delay between the collector and the controller is measured and calculated by using a time synchronization protocol, such as a PTPv2(IEEE-1588) network synchronization protocol, and the transmission delay is corrected in advance so that the absolute values of the time counts of the collector and the controller are consistent.
In the embodiment of the invention, because both sides have reached frequency synchronization and accumulated errors of time counting can not be generated, the synchronization process of the time counting value does not need to be frequently carried out and only needs to be carried out once every second or every few seconds so as to eliminate slow drift of transmission path delay.
Through the steps 1 and 2, the collectors and the controller respectively build a continuously running local time counter, and the collectors and the controller have the same counting beat and starting time. The collector and controller logic can obtain the current count value of the counter at any time, i.e., the current time.
And step 3: when the collector as the sending end samples the signal each time, it records the absolute time counting value of the sampling starting point, and packs the data with the sampled data as the data content of the data frame.
Fig. 2 shows a data processing logic structure diagram of the collector side according to an embodiment of the present invention. As shown in fig. 2, the collector serving as the sending end captures a count value of a current clock based on a sampling start signal to form an absolute time count value of the current sampling data; meanwhile, a plurality of sampling data are generated based on the sampling start signal sampling.
The data frame forming part acquires the formed absolute time count value and the sampling data, the absolute time count value is used as a part of the frame head, the sampling data is used as a data part of the data frame, and the complete sending data frame is generated. The data frame is stored in a network transmit buffer for transmission by the collector to the controller via the transport network.
In the embodiment of the present invention, there may be a plurality of independent sampling channels on the collector side to generate a plurality of sets of sampling data, and the sampling data is not limited to only one sampling channel in fig. 2.
The data frames generated in the collector are transmitted to the controller through the transmission network. It should be noted that, in the embodiment of the present invention, a plurality of collectors or controllers may be provided in the entire network, data may be transmitted between these devices through the IP network, data of a single adopted channel of one collector may be sent to a plurality of controllers, and one controller may also receive data of a plurality of sampling channels.
FIG. 3 shows a diagram of controller-side processing logic, according to an embodiment of the invention. As shown in fig. 3, the network of the controller receives the sample data transmitted by the buffer memory from the plurality of collectors in the transmission network, or the network of the controller receives the plurality of sample data transmitted by the buffer memory from one collector in the transmission network. Due to the difference between the transmission buffering delay and the network transmission delay, the time when the sampled data from the plurality of collectors are received by the network buffer of the controller may be in disorder, that is, the data sampled by the collector may arrive at the network receiving buffer first, and the data sampled by the collector may arrive at the network receiving buffer first.
The data frame analyzing unit of the controller reads out the data frame from the receiving buffer, and extracts the flag information (for example, multi-component information such as IP, MAC, port, or type of the network layer, and/or the collector number, sampling channel number, or sampling frame number of the application layer) and the sampling start point absolute time information, that is, the absolute time count value in the data frame.
The delay configuration unit of the controller acquires a corresponding delay configuration value from the delay configuration table by using a preset matching policy based on the extracted flag information. The matching strategy and the delay configuration table in the embodiment of the invention can be dynamically updated and reconstructed.
The extraction section of the controller extracts sampling start point absolute time information in the data frame.
And an activation time determining part of the controller receives the delay configuration value sent by the delay configuration part and the absolute time information extracted by the extracting part, and adds the delay configuration value and the absolute time information to obtain activation time information corresponding to the sampling data.
A buffer queue scheduling unit of the controller writes the activation time information and the data frame into the selected buffer pool based on the flag information, and uses the activation time plus the expected read duration of the frame data as an activation permission time for a subsequent written data frame of the buffer pool. The activation time of the data frame subsequently written into the buffer pool must be greater than the allowable activation time, which ensures that the activation time of the next data frame in the buffer pool is not reached after the buffer pool is activated and a frame of data is read out.
It should be noted that, in the embodiment of the present invention, there are multiple buffer pools, for example, buffer pool 1 and buffer pool 2 … buffer pool n as shown in fig. 3.
A buffer scheduling unit of the controller compares the activation time of the subsequent data frame with the allowable activation times of all the buffer pools, and selects a buffer pool suitable for the subsequent frame in accordance with the remaining capacity of the buffer pool.
In the embodiment of the invention, the time sequencing can be carried out on a plurality of collectors or sampling channels by scheduling a plurality of buffer pools, and the disorder of network frames can be eliminated.
The buffer activation processing part of the controller prefetches the activation time of the data frame at the top in each buffer pool and compares the activation time with the local real-time running clock count value, and when the comparison result shows that the time is equal, the data frame is started to be read out from the buffer pool and output from the corresponding sampling channel data port.
In an embodiment of the invention, delay variations in the data transfer process are eliminated by buffering and delaying the activation of the read process. The control logic strictly ensures that the sampling time is added with the set delay value when acquiring the data, and the method of the embodiment of the invention only needs to consider the influence of the fixed and determined delay and does not need to consider the time shaking of the sampling data.
Compared with the techniques of IEEE 1588, deterministic Ethernet, TSN and the like, the processing method of the invention has the following advantages:
the existing technologies such as TSN and DetNet improve the determinacy of ethernet through a set of protocols and mechanisms, such as network slicing, explicit routing, resource reservation, clock/frequency synchronization, periodic mapping, gated priority queue scheduling, frame preemption, traffic filtering and shaping, and multiple-transmission selective reception, to respectively guarantee QoS indexes such as deterministic bandwidth, low latency, low jitter, and high reliability. The methods are all focused on the network transmission level, and the method of the invention focuses on the data processing mode at the receiving end, and the two are mutually complementary. The prior art is mainly improved on the network transmission level, which only can try to improve the transmission delay and the shaking thereof, and the method of the invention can completely ensure that the time when the final algorithm acquires the sampling information is strictly fixed.
In the method provided by the invention, the synchronization and interface logic of the collector and the controller can adopt IEEE 1588-2019HA specification or WhiteRabbit technology, and the time synchronization can reach a level better than nanosecond, namely, the frequency resonance and the phase of the two parties can be ensured to be locked, and the time counting can be aligned to a single clock period.
The configured fixed delay value should cover the maximum delay that may be generated in the network transmission, and various mechanisms proposed by the TSN can reduce the maximum transmission delay of the network, which helps to reduce the configured fixed delay value required by the method.
Finally, it is further noted that, herein, relational terms such as one and the other, and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (18)
1. A method of reducing data transmission jitter in a network, the method comprising:
a receiving end acquires absolute time of a sampling starting point in a data frame;
determining activation time according to the delay configuration value and the absolute time;
and comparing the activation time with a local clock count value, and reading the data frame according to a comparison result.
2. The method of claim 1, wherein,
and adding the delay configuration value and the absolute time information to obtain the activation time.
3. The method of claim 1, wherein,
and acquiring mark information in the data frame, and determining delay configuration information according to the mark information.
4. The method of claim 3, wherein,
the marking information is network layer port information or application layer information.
5. The method of claim 1, wherein,
writing the activation time and the data frame into a selected buffer pool;
the activation time information plus the expected read-out duration of the frame data is used as the allowed activation time of the subsequent written data frame of the buffer pool.
6. The method of claim 5, wherein,
the activation time of the data frame subsequently written into the buffer pool is larger than the allowable activation time.
7. The method of claim 5 or 6,
and comparing the activation time of the subsequent data frame with the allowable activation time of all the buffer pools, and selecting a proper buffer pool by combining the residual capacity of the buffer pools.
8. The method according to claim 1, wherein the comparing the activation time with a local clock count value and reading the data frame according to a comparison result specifically includes:
and prefetching the activation time of the data frame at the top in each buffer pool, comparing the activation time with the local real-time running clock count value, and reading all the data frames from the buffer pools and outputting the data frames from the corresponding sampling channel data ports when the comparison result shows that the time is equal.
9. The method of claim 1, wherein,
and the sampling starting point absolute time is a corresponding current clock count value when the data is sampled.
10. The method of claim 1, wherein prior to acquiring the sample start point absolute time in the data frame comprises:
the transmitting end and the receiving end carry out frequency synchronization, determine the transmission delay between the transmitting end and the receiving end and carry out correction.
11. An apparatus for reducing data transmission jitter in a network, the apparatus comprising:
an extraction section for acquiring a sampling start point absolute time in a data frame;
an activation time determination section for determining an activation time based on the delay profile and the absolute time;
and the buffer activation processing part is used for comparing the activation time with a local clock counting value and reading the data frame according to a comparison result.
12. The apparatus of claim 11, wherein,
the activation time is obtained by adding the delay configuration value and the absolute time.
13. The apparatus of claim 11, further comprising a delay arrangement, wherein,
and the delay configuration part is used for acquiring the mark information in the data frame and determining a delay configuration value according to the mark information.
14. The apparatus according to claim 11, further comprising a buffer queuing scheduler for,
writing the activation time and the data frame into a selected buffer pool;
the activation time information plus the expected read-out duration of the frame data is used as the allowed activation time of the subsequent written data frame of the buffer pool.
15. The apparatus of claim 14, wherein,
the activation time of the data frame subsequently written into the buffer pool is larger than the allowable activation time.
16. The apparatus of claim 14 or 15,
and comparing the activation time of the subsequent data frame with the allowable activation time of all the buffer pools, and selecting a proper buffer pool by combining the residual capacity of the buffer pools.
17. The apparatus according to claim 11, wherein the comparing the activation time with a local clock count value, and reading the data frame according to a comparison result specifically includes:
and prefetching the activation time of the data frame at the top in each buffer pool, comparing the activation time with the local real-time running clock count value, and reading all the data frames from the buffer pools and outputting the data frames from the corresponding sampling channel data ports when the comparison result shows that the time is equal.
18. The apparatus of claim 11, further comprising synchronization and interface logic to frequency synchronize with the transmit end, determine and correct transmission delays between the transmit end and the apparatus before acquiring absolute time of a start of sample in a data frame.
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| CN115334008A (en) * | 2022-10-18 | 2022-11-11 | 中国电子科技集团公司第三十研究所 | Method, system, equipment and medium for processing 1588 message jitter of PTN network |
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