CN114389740A - Anti-jamming device and system - Google Patents
Anti-jamming device and system Download PDFInfo
- Publication number
- CN114389740A CN114389740A CN202011109202.1A CN202011109202A CN114389740A CN 114389740 A CN114389740 A CN 114389740A CN 202011109202 A CN202011109202 A CN 202011109202A CN 114389740 A CN114389740 A CN 114389740A
- Authority
- CN
- China
- Prior art keywords
- conversion
- circuit
- module
- beidou
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K3/00—Jamming of communication; Counter-measures
- H04K3/20—Countermeasures against jamming
- H04K3/25—Countermeasures against jamming based on characteristics of target signal or of transmission, e.g. using direct sequence spread spectrum or fast frequency hopping
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K3/00—Jamming of communication; Counter-measures
- H04K3/80—Jamming or countermeasure characterized by its function
- H04K3/90—Jamming or countermeasure characterized by its function related to allowing or preventing navigation or positioning, e.g. GPS
Landscapes
- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
Abstract
The invention relates to an anti-interference device and an anti-interference system. The anti-interference device comprises: a B3/S down-conversion channel and a B3/S up-conversion channel; the B3/S down-conversion channel comprises a potentiometer, a voltage-controlled attenuator and a down-conversion mixing circuit connected with the Beidou anti-interference module; the potentiometer is connected with the voltage-controlled attenuator; the voltage-controlled attenuator is connected with the down-conversion mixing circuit and is connected with the receiving antenna; the potentiometer adjusts the attenuation coefficient of the voltage-controlled attenuator; the voltage-controlled attenuator receives the radio-frequency signal and adjusts the amplitude of the radio-frequency signal according to the attenuation coefficient to obtain the attenuated radio-frequency signal; the down-conversion mixing circuit performs down-conversion processing on the attenuated radio-frequency signal and transmits the obtained intermediate-frequency signal to the Beidou anti-interference module; and the B3/S up-conversion channel receives the processed intermediate frequency signal transmitted by the Beidou anti-interference module, performs up-conversion processing on the processed intermediate frequency signal, and transmits the obtained up-conversion signal to the Beidou branch and branch circuit module. The present application can simultaneously improve producibility and reduce circuit complexity.
Description
Technical Field
The invention relates to the technical field of satellite communication navigation, in particular to an anti-interference device and an anti-interference system.
Background
With the increasing of communication modes and communication devices and the improvement of frequency spectrum utilization, anti-interference means and methods have become hot spots in the current communication field, and miniaturization, low cost and high performance are important factors to be considered in future research and development. In order to improve the anti-interference performance, a multi-channel design idea can be adopted at present, and the phase consistency and the amplitude consistency of the radio frequency front end of each channel are ensured to become basic requirements and important indexes.
In order to ensure the amplitude consistency of all down-conversion receiving channels in the anti-interference channel, a pi decay network is generally added in the down-conversion receiving channels or a control chip is additionally arranged in the traditional technology, so that the producibility and the circuit complexity of the anti-interference device cannot be considered at the same time.
Disclosure of Invention
In view of the above, there is a need for an apparatus and system that is robust against interference while maintaining both manufacturability and circuit complexity.
An interference rejection apparatus comprising:
the receiving module comprises a B3/S down-conversion channel and a B3/S up-conversion channel; the B3/S up-conversion channel is used for respectively connecting the Beidou split-combination circuit module and the Beidou anti-interference module; the B3/S down-conversion channel comprises a potentiometer, a voltage-controlled attenuator and a down-conversion mixing circuit used for connecting the Beidou anti-interference module; the potentiometer is connected with the voltage-controlled attenuator; the voltage-controlled attenuator is connected with the down-conversion mixing circuit and is used for connecting a receiving antenna;
the potentiometer is used for adjusting the attenuation coefficient of the voltage-controlled attenuator; the voltage-controlled attenuator is used for receiving the radio-frequency signal and adjusting the amplitude of the radio-frequency signal according to the attenuation coefficient to obtain the attenuated radio-frequency signal; the down-conversion mixing circuit is used for performing down-conversion processing on the attenuated radio-frequency signal and transmitting the obtained intermediate-frequency signal to the Beidou anti-interference module;
and the B3/S up-conversion channel is used for receiving the processed intermediate frequency signal transmitted by the Beidou anti-interference module, carrying out up-conversion processing on the processed intermediate frequency signal and transmitting the obtained up-conversion signal to the Beidou branch and branch circuit module.
In one embodiment, the anti-jamming device further comprises a transmitting module; the transmitting module comprises a transmitting channel;
the transmitting channel comprises a first amplifying circuit, an isolating circuit and a dielectric filter which are connected in sequence; the first amplifying circuit is used for connecting the Beidou switching-dividing-combining circuit module; the dielectric filter is used for connecting the transmitting antenna.
In one embodiment, the first amplifying circuit comprises a driving amplifying circuit, a first electric bridge, a final-stage power amplifier and a second electric bridge which are connected in sequence; the second bridge is connected with the isolation circuit; the drive amplification circuit is used for connecting the Beidou branch and integration circuit module.
In one embodiment, the B3/S down-conversion channel further comprises a clipping circuit, a first acoustic surface filter and a second amplifying circuit which are connected between the receiving antenna and the voltage-controlled attenuator in sequence.
In one embodiment, the B3/S down-conversion channel further comprises a filter amplifying circuit connected between the down-conversion mixing circuit and the Beidou anti-jamming module; the down-conversion mixing circuit comprises a mixer and a second acoustic surface filter;
the second acoustic surface filter is respectively connected with the voltage-controlled attenuator and the mixer; the mixer is connected with the filtering and amplifying circuit.
In one embodiment, the anti-interference device further comprises a local oscillation module; the local oscillation module comprises a B3/S local oscillation circuit; the B3/S local oscillation circuit comprises a clock source, a controller, a phase-locked loop chip and a first combiner;
the clock source is connected with the phase-locked loop chip; the phase-locked loop chip is respectively connected with the controller and the first combiner; the first combiner is respectively connected with the B3/S up-conversion channel and the down-conversion mixer circuit.
In one embodiment, the B3/S local oscillator circuit further includes a second splitter, and two or more phase adjusting circuits;
the second combiner divider is respectively connected with the first combiner divider and each phase adjusting circuit; the phase adjusting circuit is connected with the down-conversion mixing circuit.
In one embodiment, the number of B3/S down-conversion channels is two or more;
the down-conversion mixing circuits of the B3/S down-conversion channels are connected with the phase adjusting circuits in a one-to-one correspondence mode, and the radio frequency lines between the down-conversion mixing circuits and the phase adjusting circuits are equal in length.
In one embodiment, the B3/S up-conversion channel comprises a band-pass filter, a third amplifying circuit, a low-pass filter, an up-conversion mixing circuit and a third acoustic surface filter which are connected in sequence;
the band-pass filter is used for connecting the Beidou anti-interference module; and the third acoustic surface filter is used for connecting the Beidou branch and integration circuit module.
In one embodiment, the anti-interference device further comprises a B1/L1 receiving channel; any B3/S up-conversion channel further comprises a third splitting and combining circuit connected between the third acoustic surface filter and the Beidou splitting and combining circuit module;
the third splitter is connected to the B1/L1 receive channel.
In one embodiment, the number of B3/S down-conversion channels is 8; the number of B3/S up-conversion channels is 8;
any 4B 3/S down-conversion channels are down-conversion channels of a B3 frequency band; the other 4B 3/S down-conversion channels are S-band down-conversion channels; any 4B 3/S up-conversion channels are B3 frequency band up-conversion channels; the other 4B 3/S up-conversion channels are S-band up-conversion channels.
An anti-interference system comprises a Beidou anti-interference module, a Beidou branch and branch circuit module and the anti-interference device;
the anti-interference device is respectively connected with the Beidou anti-interference module and the Beidou switch-on/off circuit module.
In the anti-jamming device and the system, the receiving module comprises a B3/S down-conversion channel and a B3/S up-conversion channel; the B3/S up-conversion channel is used for respectively connecting the Beidou split-combination circuit module and the Beidou anti-interference module; the B3/S down-conversion channel comprises a potentiometer, a voltage-controlled attenuator and a down-conversion mixing circuit used for connecting the Beidou anti-interference module; the potentiometer is connected with the voltage-controlled attenuator; the voltage-controlled attenuator is connected with the down-conversion mixing circuit and is used for connecting a receiving antenna; the potentiometer is used for adjusting the attenuation coefficient of the voltage-controlled attenuator; the voltage-controlled attenuator is used for receiving the radio-frequency signal and adjusting the amplitude of the radio-frequency signal according to the attenuation coefficient to obtain the attenuated radio-frequency signal; the down-conversion mixing circuit is used for performing down-conversion processing on the attenuated radio-frequency signal and transmitting the obtained intermediate-frequency signal to the Beidou anti-interference module; and the B3/S up-conversion channel is used for receiving the processed intermediate frequency signal transmitted by the Beidou anti-interference module, carrying out up-conversion processing on the processed intermediate frequency signal and transmitting the obtained up-conversion signal to the Beidou branch and branch circuit module. Therefore, the purpose of adjusting the voltage-controlled voltage can be achieved by adjusting the resistance value of the potentiometer, so that the attenuation coefficient of the voltage-controlled attenuator can be adjusted, the problem of amplitude consistency of all channels is solved, the realization is simple, and the producibility can be improved and the complexity of a circuit can be reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a first schematic block diagram of a tamper-resistant apparatus according to an embodiment;
FIG. 2 is a block diagram of a schematic structure of a transmit channel in one embodiment;
FIG. 3 is a block diagram illustrating an exemplary B3/S downconversion channel in one embodiment;
fig. 4 is a schematic block diagram of a B3/S local oscillation circuit in an embodiment;
FIG. 5 is a block diagram illustrating the schematic structure of the B3/S upconversion channel and the B1/L1 receive channel in one embodiment;
FIG. 6 is a second schematic block diagram of a tamper resistant device in an exemplary embodiment.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. The first resistance and the second resistance are both resistances, but they are not the same resistance.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.
As described in the background, conventional tamper resistant devices suffer from a lack of compatibility between the producibility of the tamper resistant device and the circuit complexity. The inventor researches and finds that the reason for the problem is that the traditional technology generally selects the following two methods to realize the problem: (1) although the pi decay network is added in the down-conversion receiving channel, the realization is simple, the amplitude consistency can be realized only by adjusting the parameters of the pi decay network when the gain consistency of each B3/S down-conversion channel has deviation because the gain consistency of different radio frequency channels has deviation, and the producibility is poor. (2) The voltage-controlled attenuator 114 or the numerical-controlled attenuator is controlled by the control chip, which improves the producibility, but the complexity of the circuit is increased due to the need of additional control chip.
Meanwhile, the conventional anti-jamming device is usually provided with a receiving channel or a transmitting channel separately for separate processing of transceiving, and can support an RDSS (Radio Determination Satellite System) L frequency band, an RNSS (Radio Navigation Satellite System) B1 frequency band, and a GPS (Global Positioning System) L1 frequency band, while in order to avoid the RDSS L transmitting channel and the RNSS B1/GPS (L1 receiving channel being simultaneously opened to cause self-excitation, a cavity filter is connected after the power amplifier of the transmitting channel to enhance transceiving isolation.
In addition, in order to meet the isolation between the anti-interference 4-channel B3 down-conversion channel and the 4-channel S down-conversion channel in the prior art, the design of single printed board and single cavity of each channel is adopted, and the cavity division processing is performed, namely only one down-conversion channel is arranged on one printed board, so that an anti-interference device is divided into a plurality of printed boards and the size is overlarge, the difficulty of power supply and control is increased, and the design complexity and the production difficulty are increased.
Similarly, in order to achieve phase consistency, a conventional anti-interference device adds a phase shifter to a channel. But the phase shifter will additionally increase the channel attenuation, and when 8 channels are realized, 8 phase shifters are needed at the same time, which greatly increases the cost and increases the design difficulty.
For the above reasons, the present application provides an anti-jamming device and system that can simultaneously compromise producibility and circuit complexity. In some embodiments, the anti-jamming device of the present application improves the consistency of devices as much as possible to ensure the phase consistency of each channel, while sufficiently ensuring the consistency of the channel radio frequency link.
In one embodiment, as shown in fig. 1, there is provided a tamper resistant apparatus comprising:
a receiving module 110 comprising a B3/S down-conversion channel and a B3/S up-conversion channel 130; the B3/S up-conversion channel 130 is used for respectively connecting the Beidou split-combined path module and the Beidou anti-interference module; the B3/S down-conversion channel comprises a potentiometer 112, a voltage-controlled attenuator 114 and a down-conversion mixing circuit 116 for connecting a Beidou anti-jamming module; the potentiometer 112 is connected with a voltage-controlled attenuator 114; the voltage-controlled attenuator 114 is connected with the down-conversion mixer circuit 116 and is used for connecting with a receiving antenna;
the potentiometer 112 is used for adjusting the attenuation coefficient of the voltage-controlled attenuator 114; the voltage-controlled attenuator 114 is configured to receive the radio frequency signal, and adjust an amplitude of the radio frequency signal according to the attenuation coefficient to obtain an attenuated radio frequency signal; the down-conversion mixing circuit 116 is used for performing down-conversion processing on the attenuated radio-frequency signal and transmitting the obtained intermediate-frequency signal to the Beidou anti-interference module;
and the B3/S up-conversion channel 130 is used for receiving the processed intermediate frequency signal transmitted by the Beidou anti-interference module, carrying out up-conversion processing on the processed intermediate frequency signal, and transmitting the obtained up-conversion signal to the Beidou branch and branch circuit module.
Specifically, the anti jamming unit of this application can use in big dipper satellite navigation field, also can use in the anti-jamming field of satellite communication. The B3/S down-conversion channel is a channel for down-converting a radio frequency signal in a B3 band and/or a radio frequency signal in an S band, and the B3/S up-conversion channel 130 is a channel for up-converting a corresponding intermediate frequency signal to obtain a radio frequency signal in a B3 band and/or a radio frequency signal in an S band. The beidou combining and splitting module may be a device, a module or a circuit for processing beidou baseband signals, and may be, for example, an FPGA (Field Programmable Gate Array) chip or a DSP (Digital Signal processing) chip configured with a beidou baseband processing algorithm. The big dipper anti-jamming module can be a device, a module or a circuit for carrying out anti-jamming processing on big dipper signals, for example, an FPGA or a DSP chip configured with a big dipper anti-jamming algorithm, and the like.
Specifically, the receiving module 110 may include one or more B3/S down-conversion channels and one or more B3/S up-conversion channels 130, and the number of B3/S down-conversion channels may correspond to the number of B3/S up-conversion channels 130, for example, the number of B3/S down-conversion channels may be equal to the number of B3/S up-conversion channels 130, or within a certain range of the number of B3/S up-conversion channels 130.
Each B3/S down-conversion channel includes a potentiometer 112, a voltage-controlled attenuator 114, and a down-conversion mixer circuit 116, the potentiometer 112 is connected to the voltage-controlled attenuator 114, the voltage-controlled attenuator 114 is connected to the down-conversion mixer circuit 116 and is used for connecting to a receiving antenna, which may be, but not limited to, a beidou B3 antenna or a beidou S antenna. The down-conversion mixing circuit 116 is used for connecting the Beidou satellite switching and combining circuit module. The potentiometer 112 is a device with adjustable resistance, and may be similar to a sliding rheostat. The voltage-controlled attenuator 114 is a device that adjusts an attenuation coefficient according to an input voltage-controlled voltage.
The potentiometer 112 may be connected to a power supply device that may be located within the tamper resistant device or separate from the tamper resistant device. Furthermore, the anti-jamming device may further include a power conversion circuit, where the power conversion circuit is configured to provide an operating voltage to the anti-jamming device, for example, to supply power to a low-noise amplification circuit, an amplification circuit, and the like in the anti-jamming device. The potentiometer 112 may be electrically connected to a power conversion circuit, so that the voltage-controlled voltage of the voltage-controlled attenuator 114 may be provided by using the supply voltage of the B3/S down-conversion channel, thereby reducing the cost of the anti-jamming device, improving the producibility, and optimizing the control manner.
The potentiometer 112 outputs a corresponding voltage-controlled voltage to the voltage-controlled attenuator 114 according to the magnitude of the resistance value, so as to adjust the attenuation coefficient of the voltage-controlled attenuator 114. When the number of the B3/S down-conversion channels is multiple, if the amplitudes of the B3/S down-conversion channels are not consistent, the resistance of the potentiometer 112 in each B3/S down-conversion channel can be correspondingly adjusted to solve the problem of amplitude consistency. Further, the potentiometer 112 can be manually adjusted to adjust the actually connected resistance and the voltage-controlled voltage outputted to the voltage-controlled attenuator 114, thereby achieving the purpose of changing the attenuation. And simplifies the implementation of amplitude consistency.
The voltage-controlled attenuator 114 determines an attenuation coefficient according to the input voltage-controlled voltage, determines an attenuation amount of the radio frequency signal, and adjusts the amplitude of the radio frequency signal based on the attenuation amount to obtain the attenuated radio frequency signal. Down frequency conversion mixing circuit 116 can carry out down conversion to the radio frequency signal after the decay and handle, obtains intermediate frequency signal to with intermediate frequency signal transmission to big dipper anti-interference module, in order to carry out anti-interference processing to intermediate frequency signal through big dipper anti-interference module.
B3S up-conversion channel 130 can receive the output of big dipper anti-jamming module, the intermediate frequency signal after anti-jamming processing to carry out the up-conversion to the intermediate frequency signal after handling, realize the frequency spectrum through the mode of mixing and move, and obtain up-conversion signal, and with up-conversion signal transmission to big dipper branch and shut way module, further, big dipper branch and shut way module can give big dipper baseband processing module with up-conversion signal output.
In the anti-interference device, the purpose of adjusting the voltage-controlled voltage is obtained by adjusting the resistance value of the potentiometer 112, so that the adjustment of the attenuation coefficient of the voltage-controlled attenuator 114 can be realized, the problem of amplitude consistency of each channel is solved, further, a control circuit added due to the voltage-controlled voltage can be omitted, the constant adjustment is simple, the control is accurate, the amplitude consistency of different anti-interference channels is solved, the realization is simple, the producibility can be improved, and the complexity of the circuit is reduced.
In one embodiment, as shown in fig. 2, the anti-jamming device may further include a transmitting module, where the transmitting module includes one or more transmitting channels, where each transmitting channel may support any one or any combination of RDSS and RNSS transmitting frequency bands, and in one example, the number of transmitting channels may be 1, and the transmitting channels are RDSS L-band transmitting channels. Specifically, the transmitting channel includes a first amplifying circuit 212, an isolating circuit 214 and a dielectric filter, the first amplifying circuit 212 is connected to the isolating circuit 214 and used for connecting the beidou splitting and combining circuit module, the isolating circuit 214 is connected to the dielectric filter, and the dielectric filter is used for connecting the transmitting antenna. The transmitting channel receives the intermediate frequency signals transmitted by the Beidou splitter/combiner, amplifies, isolates and filters the intermediate frequency signals in sequence to obtain filtered transmitting signals, and transmits the filtered transmitting signals through the transmitting antenna. In the embodiment, the dielectric filter with low insertion loss and high out-of-band rejection is adopted, so that the size and the cost are greatly reduced under the condition of satisfying the out-of-band rejection. Meanwhile, the isolation between the transmitting channel and the receiving channel (such as a B1/L1 receiving channel) can be increased, self-excitation is avoided, and further the output power of the transmitting channel is larger than 39dBm (decibel-milliwatt).
In one embodiment, referring to fig. 2, the first amplifying circuit 212 may include a driving amplifying circuit, a first bridge, a final power amplifier and a second bridge, the driving amplifying circuit is connected to the first bridge and is used for connecting to the beidou splitting and combining module, the first bridge is connected to the final power amplifier, the final power amplifier is connected to the second bridge, the second bridge is connected to the isolating circuit 214, the isolating circuit 214 is connected to the dielectric filter 216, and the dielectric filter 216 is used for connecting to the transmitting antenna. Further, the transmit channel may also include an acoustic surface filter 1 and an acoustic surface filter 2.
The transmission channel is illustrated by way of example as an RDSS L-band signal. As shown in fig. 2, the RDSS L band signal input to the transmission channel is first filtered by the sound meter filter 1, and then amplified by the driving amplifier circuit, so as to meet the power requirement of the final power amplifier. The output signal of the driving amplifying circuit is processed by the acoustic meter filter 2, the first bridge, the final power amplifier and the second bridge in sequence, and the processed signal is isolated and filtered by the isolating circuit 214 and the dielectric filter 216 and then transmitted.
So, the accessible adopts two power amplifiers to close the way of putting of closing, all sets up the electric bridge (like 90 electric bridges) of the good standing wave of low insertion loss at the input of power amplifier and output to and adopt the isolator of low insertion loss, thereby can reduce the insertion loss of useful signal as far as possible, increase reverse isolation simultaneously, and then can improve the stability of transmitting channel, and reduce anti jamming unit's cost and volume.
In one embodiment, referring to fig. 3, the B3/S down-conversion channel further includes a limiting circuit 118, a first acoustic surface filter 120 and a second amplifying circuit 122 sequentially connected between the receiving antenna and the voltage controlled attenuator 114, that is, the limiting circuit 118 is connected to the first acoustic surface filter 120 and is used for connecting to the receiving antenna, the first acoustic surface filter 120 is connected to the second amplifying circuit 122, and the second amplifying circuit 122 is connected to the voltage controlled attenuator 114. The amplitude limiting circuit 118 suppresses the amplitude of the rf signal transmitted by the receiving antenna, so that the suppressed rf signal can be received and processed normally. The limited rf signal enters the first acoustic surface filter 120, and is subjected to filter processing and then signal amplification by the second amplifying circuit 122.
Further, the amplitude limiting circuit 118 may include a dielectric filter, an amplitude limiter and a low noise amplifying circuit, the dielectric filter is connected to the amplitude limiter and is used for connecting to the receiving antenna, the amplitude limiter is connected to the low noise amplifying circuit, and the low noise amplifying circuit is connected to the first acoustic surface filter 120. Wherein, the limiter can be a limiter with low insertion loss characteristic,
in one embodiment, referring to fig. 3, the down-conversion mixer circuit 116 includes a mixer and a second SAW filter, the second SAW filter is connected to the voltage-controlled attenuator 114 and the mixer, respectively, and the mixer is connected to the filter amplifier circuit 124. The filtering and amplifying circuit 124 is used for connecting the Beidou anti-interference module. So, the accessible second sound table filter filtering mixer keeps apart the not enough spurious that arouses to amplify back output to big dipper anti-interference module through filtering amplifier circuit 124, thereby can reduce intermediate frequency signal's interference.
Further, as shown in fig. 3, the filtering and amplifying circuit 124 may include a low pass filter, a fourth amplifying circuit, and a band pass filter, which are connected in sequence. The low pass filter is connected with the frequency mixer, and the band pass filter is used for connecting the Beidou anti-interference module. Therefore, after the second acoustic surface filter filters the stray signals, the obtained signals can be amplified through the amplifying circuit and then output after being filtered by the band-pass filter. Furthermore, the band-pass filter adopts a multi-order LC filter mode, and the out-of-band rejection requirement is high.
In one embodiment, the anti-interference device further includes a local oscillation module, and the local oscillation module includes one or more B3/S local oscillation circuits. Referring to fig. 4, the B3/S local oscillation circuit includes a clock source, a controller, a phase-locked loop chip and a first splitter, the clock source, the phase-locked loop chip and the first splitter are sequentially connected, the first splitter is respectively connected to the B3/S up-conversion channel 130 and the down-conversion mixer circuit 116, and respectively provides local oscillation signals for the B3/S up-conversion channel 130 and the down-conversion mixer circuit 116. The B3/S up-conversion channel 130 may up-convert the processed intermediate frequency signal input by the beidou anti-interference module and the corresponding local oscillator signal to obtain a B3 frequency band/S frequency band radio frequency signal. The down-conversion mixing circuit 116 mixes the received B3 frequency band/S frequency band radio frequency signal with a corresponding local oscillation signal to obtain an intermediate frequency signal. In one example, the clock source may be a 10MHz (megahertz) clock source.
The controller is connected to the pll chip and outputs a Serial Peripheral Interface (SPI) control signal to the pll chip, so that the pll chip can output a local oscillation signal required for mixing. Further, the controller may adopt any form of control device or processing device, and only needs to control the phase-locked loop chip to output the corresponding local oscillation signal. In one example, the controller may be a single chip.
In addition, the local oscillator module can also output clock signals to the Beidou anti-interference module, and the local oscillator signals output by the phase-locked loop chip can sequentially pass through the clock filter circuit and the clock amplification circuit and are output to the Beidou anti-interference module. In this embodiment, the local oscillation module includes a clock source, a controller, a phase-locked loop chip and a first combiner, so as to provide local oscillation signals with corresponding frequencies for the B3/S up-conversion channel 130 and the down-conversion mixing circuit 116, respectively.
In one embodiment, as shown in fig. 4, the B3/S local oscillator circuit further includes a second splitter, and two or more phase adjusting circuits, the number of which may be according to the number of the B3/S up-conversion channels 130 and/or the B3/S down-conversion channels. Further, the number of phase adjustment circuits may be equal to the number of B3/S down-conversion channels, and each phase adjustment circuit is connected in one-to-one correspondence with the down-conversion mixing circuit 116 of each B3/S down-conversion channel.
The first combiner divides the local oscillator signals output by the phase-locked loop chip, the divided signal part is used as an up-conversion local oscillator signal and is output to the B3/S up-conversion channel 130, and the rest part is used as a down-conversion local oscillator signal and is output to the B3/S down-conversion channel. The second combiner is used for splitting the down-conversion local oscillation signals output by the first combiner to obtain corresponding number of down-conversion local oscillation signals, so that a down-conversion local oscillation signal can be provided for each B3/S down-conversion channel, and the normal work of each B3/S down-conversion channel can be supported.
Further, as shown in fig. 4, the local oscillation module may further include a plurality of acoustic meter filters and two amplifying circuits, the clock source, the phase-locked loop chip, the acoustic meter filters, any one of the amplifying circuits, the first combiner, the other amplifying circuit, and the second combiner are sequentially connected, the second combiner is respectively connected to each phase adjusting circuit, and each phase adjusting circuit outputs the local oscillation signal after phase adjustment to the down-conversion mixing circuit 116 through one acoustic meter filter. Therefore, the requirements on the phase consistency of the multiple B3/S down-conversion channels in the anti-interference mode can be met. In order to further improve the phase consistency among the B3/S down-conversion channels, the length of each B3/S down-conversion channel from the antenna port of the receiving antenna to the radio frequency line before the down-conversion mixer circuit 116 is equal; for each B3/S down-conversion channel, the RF lines from the down-conversion mixer circuit 116 to the IF output should be equal in length; for each B3/S down-conversion channel, the rf lines between the output of the pll chip and the down-conversion mixer 116 should be equal in length.
In one embodiment, as shown in fig. 5, the B3/S up-conversion channel 130 includes a band-pass filter, a third amplifying circuit, a low-pass filter, an up-conversion mixing circuit and a third sound table filter, the band-pass filter is connected to the third amplifying circuit and is used for being connected to the beidou anti-jamming module, the third amplifying circuit is connected to the low-pass filter, the low-pass filter is connected to the up-conversion mixing circuit, the up-conversion mixing circuit is connected to the third sound table filter, and the third sound table filter is used for being connected to the beidou splitting and combining module.
The processed intermediate frequency signal output by the Beidou anti-interference module is firstly filtered by a band-pass filter, amplified by a third amplifying circuit and mixed with an up-conversion local oscillator signal in an up-conversion mixing circuit to obtain a B3 frequency band/S frequency band radio frequency signal, and the third sound meter filter can filter out some intermediate frequency signal and local oscillator signal which are coupled due to insufficient isolation in the B3 frequency band/S frequency band radio frequency signal and output the filtered B3 frequency band/S frequency band radio frequency signal to the Beidou split-and-combine circuit module. Therefore, interference signals in the B3 frequency band/S frequency band radio frequency signals can be reduced, and communication reliability is improved.
In one embodiment, the anti-jamming device further comprises a B1/L1 receiving channel used for connecting a Beidou B1/L1 antenna, and the B1/L1 receiving channel and the B3/S up-conversion channel 130 can be combined. Specifically, the B3/S up-conversion channel 130 may further include a third splitter, which is connected between the third acoustic surface filter and the beidou splitter module. The signals output by the B1/L1 receiving channel and the signals output by the B3/S up-conversion channel 130 can be output by being combined by the third division combiner. Therefore, the number of the output ports of the anti-interference device can be reduced, and the Beidou anti-interference module can be conveniently connected. It should be noted that, according to the number of B1/L1 receiving channels, a third division combiner may be disposed in a part of the B3/S upconversion channels 130, so that each B1/L1 receiving channel is connected to each B3/S upconversion channel 130 provided with the third division combiner in a one-to-one correspondence manner, and the remaining B3/S upconversion channels 130 may not be provided with the third division combiner.
In one example, the B1/L1 receiving channel may be as shown in fig. 5, in which a dielectric filter, a limiter, a low noise amplifier circuit, any one of the acoustic surface filters, an amplifier circuit, a pi-decay circuit and another acoustic surface filter are connected in sequence, the dielectric filter is used for connecting the Beidou B1/L1 antenna, and the another acoustic surface filter is connected with the third branching and combining device.
In one embodiment, the number of B3/S down-conversion channels is 8; the number of B3/S upconversion channels 130 is 8; any 4B 3/S down-conversion channels are down-conversion channels of a B3 frequency band; the other 4B 3/S down-conversion channels are S-band down-conversion channels; any 4B 3/S up-conversion channels 130 are B3 frequency band up-conversion channels; the other 4B 3/S upconversion channels 130 are S band upconversion channels.
To facilitate understanding of the aspects of the present application, a specific example will be described below. As shown in fig. 6, an anti-interference apparatus is provided, which includes 4 channels of B3 down-conversion channels, 1 channel of B3 up-conversion channels, 4 channels of S down-conversion channels, 1 channel of S up-conversion channels, 1 channel of B1/L1 receiving channels, 1 channel of RDSS L transmitting channels, 2 local oscillation circuits, and a power conversion circuit.
Each path of B3 down-conversion channel and each path of S down-conversion channel can be as shown in fig. 3, the signal coming from the receiving antenna is processed by out-of-band filtering through a dielectric filter, the amplitude limiter suppresses the large signal coming from the antenna to a receivable amplitude, the amplitude limiter has a low insertion loss characteristic, the signal is amplified through a low noise amplifier and then enters a sound meter filter, and the signal is amplified through an amplifying circuit after being filtered. In order to improve the producibility and optimize the control mode, the voltage-controlled voltage of the voltage-controlled attenuator 114 can be derived from the power supply voltage of the channel B3 or S, and the resistance value of the actual access circuit of the potentiometer 112 can be changed by the manual potentiometer 112, so that the magnitude of the voltage-controlled voltage can be adjusted to achieve the purpose of attenuation. Therefore, a control circuit added due to voltage-controlled voltage can be omitted, a single chip microcomputer or other control chips are not required to be arranged to output the voltage-controlled voltage through a DAC (digital-to-analog converter), the implementation mode is simple, and the circuit complexity is low.
The sound meter filter in the B3 down-conversion channel or the S down-conversion channel is used for filtering stray caused by insufficient isolation of the mixing circuit, the stray is amplified by the amplifying circuit and then output by the band-pass filter, and the band-pass filter adopts a multi-order LC filter mode and has high requirements on out-of-band suppression.
The B3 upconversion channel, the S upconversion channel, and the B1/L1 receive channel may be as shown in FIG. 5. Taking the B3 up-conversion channel as an example for explanation, the B3 up-conversion intermediate frequency signal is firstly filtered by the band-pass filter, then amplified by the amplifying circuit, and after the amplified signal and the local oscillator signal are mixed, the intermediate frequency and the local oscillator signal which are not coupled enough for isolation are filtered by the acoustic meter filter 1. The general principle of the B1/L1 receiving channel is the same as that of the B3 and S front-end circuit, and the two signals are combined and output by a third splitter. The S upconversion path is substantially identical to the B3 upconversion path.
The RDSS L transmission channel can be as shown in fig. 2, and an externally input RDSS L signal is filtered by a sound meter filter and then passes through a driver amplifier to meet the power requirement required by a final-stage power amplifier. In order to reduce the cost and the volume, the RDSS L transmitting channel adopts a mode of combining and outputting two power amplifiers, the input end and the output end of each power amplifier adopt a 90-degree electric bridge with low insertion loss and good standing waves, and an isolator with low insertion loss is adopted, so that the insertion loss of useful signals is reduced as much as possible, meanwhile, reverse isolation is increased, and the stability of the transmitting channel is facilitated.
In the application of the anti-interference device, all transmitting channels and all receiving channels need to be combined, and if the isolation between RDSS L transmitting channels and B1/L1 channels is insufficient, self-excitation is easily caused, so that the medium filter can realize low insertion loss and out-of-band rejection, and the output power of the transmitting channels is more than 39 dBm.
The 2 local oscillation circuits can be as shown in fig. 6, a 10MHz clock source provides clock signals for the B3 phase-locked loop chip and the S phase-locked loop chip after filtering and amplifying, the single chip microcomputer 1 provides control signals for the B3 phase-locked loop chip register, and the single chip microcomputer 2 provides control signals for the S phase-locked loop chip register. The phase-locked loop chip outputs the required local oscillation signal, and after the local oscillation signal is filtered by the acoustic meter filter and amplified by the amplifying circuit, the local oscillation signal is divided into 4 local oscillation signals by the branching and branching device.
In the down-conversion channel, the down-conversion mixer circuit 116 mixes the received B3 or S signal with the corresponding local oscillator signal to obtain the respective required intermediate frequency signal. In an up-conversion channel, an up-conversion mixing circuit performs mixing on an intermediate-frequency signal input by a Beidou anti-interference module and a local oscillator signal corresponding to the intermediate-frequency signal input by the Beidou anti-interference module to obtain B3 and S radio-frequency signals.
Because the requirement on the phase consistency of the 4-path radio frequency module is very high in the anti-interference mode, the local oscillation signal enters the frequency mixing circuit after passing through the phase adjusting circuit and the acoustic meter filter by arranging the phase adjusting circuit behind the second combiner. Further, in order to better ensure the phase consistency of each rf module, each path B3 and S should have equal length processing from the antenna port to the rf line before the mixer circuit, the rf line after mixing to the intermediate frequency output, and the rf line between the pll output and the mixer. Meanwhile, the local oscillator module can also provide a clock signal to the north-fighting anti-interference module.
Furthermore, in order to improve producibility and reduce design difficulty, the anti-interference device can adopt an implementation mode of an upper printed board and a lower printed board, the upper printed board is connected with an antenna and comprises 4 paths of B3 down-conversion channels, 4 paths of S down-conversion channels and 1 path of Beidou B1/L1 receiving channels, and other circuits are arranged on the lower printed board.
In order to reduce the isolation between the receiving channels in the upper printed board, the B3 down-conversion channels and the S down-conversion channels are staggered, and the intersection of the structures of the B3 down-conversion channels and the S down-conversion channels indicates that a redundancy mode can be adopted to increase the isolation and avoid crosstalk between the channels.
The lower printed board comprises up-conversion channels, emission channels, local oscillation circuit and power conversion circuit,
the power supply conversion circuit can realize the maximum 32V input, the supply current can reach 10A, and the RDSS S, the RNSS B3, the B1/L1 and the emission channel power supply can be independently controlled, so that the diameter of the whole device is not more than 180mm, the height is not more than 18mm, and the miniaturization is fully realized.
Meanwhile, the unique design mode is adopted, and the problems of amplitude consistency and phase consistency of different anti-interference channels are well solved. The radio frequency front end integrated design is adopted, the isolation requirement is met through the structural redundancy design, and the design complexity and the production difficulty are reduced.
In one embodiment, an anti-interference system is provided, which comprises a Beidou anti-interference module, a Beidou branch and branch circuit module and the anti-interference device;
the anti-interference device is respectively connected with the Beidou anti-interference module and the Beidou switch-on/off circuit module.
In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (12)
1. An interference rejection device, comprising:
the receiving module comprises a B3/S down-conversion channel and a B3/S up-conversion channel; the B3/S up-conversion channel is used for being respectively connected with the Beidou split-combination circuit module and the Beidou anti-interference module; the B3/S down-conversion channel comprises a potentiometer, a voltage-controlled attenuator and a down-conversion mixing circuit which is used for being connected with the Beidou anti-jamming module; the potentiometer is connected with the voltage-controlled attenuator; the voltage-controlled attenuator is connected with the down-conversion mixing circuit and is used for connecting a receiving antenna;
the potentiometer is used for adjusting the attenuation coefficient of the voltage-controlled attenuator; the voltage-controlled attenuator is used for receiving a radio frequency signal and adjusting the amplitude of the radio frequency signal according to the attenuation coefficient to obtain an attenuated radio frequency signal; the down-conversion mixing circuit is used for performing down-conversion processing on the attenuated radio frequency signal and transmitting the obtained intermediate frequency signal to the Beidou anti-interference module;
and the B3/S up-conversion channel is used for receiving the processed intermediate frequency signal transmitted by the Beidou anti-interference module, carrying out up-conversion processing on the processed intermediate frequency signal and transmitting the obtained up-conversion signal to the Beidou branch and branch circuit module.
2. The tamper-resistant device of claim 1, further comprising a transmitting module; the transmitting module comprises a transmitting channel;
the transmitting channel comprises a first amplifying circuit, an isolating circuit and a dielectric filter which are connected in sequence; the first amplifying circuit is used for being connected with the Beidou switch-on/off circuit module; the dielectric filter is used for connecting a transmitting antenna.
3. The antijam apparatus of claim 2, wherein said first amplifier circuit includes a driver amplifier circuit, a first bridge, a final amplifier and a second bridge connected in series; the second bridge is connected with the isolation circuit; the drive amplification circuit is used for connecting the Beidou branch and integration circuit module.
4. The antijam apparatus of claim 1, wherein said B3/S down-conversion channel further includes a limiting circuit, a first acoustic surface filter, and a second amplifying circuit connected in sequence between said receive antenna and said voltage controlled attenuator.
5. The jammer rejection device of claim 1, wherein said B3/S down conversion channel further comprises a filter amplifier circuit connected between said down conversion mixer circuit and said beidou jammer rejection module; the down-conversion mixing circuit comprises a mixer and a second acoustic surface filter;
the second acoustic surface filter is respectively connected with the voltage-controlled attenuator and the mixer; the mixer is connected with the filtering and amplifying circuit.
6. The interference rejection device according to claim 1, wherein said interference rejection device further comprises a local oscillation module; the local oscillation module comprises a B3/S local oscillation circuit; the B3/S local oscillation circuit comprises a clock source, a controller, a phase-locked loop chip and a first combiner;
the clock source is connected with the phase-locked loop chip; the phase-locked loop chip is respectively connected with the controller and the first combiner; the first combiner is respectively connected with the B3/S up-conversion channel and the down-conversion mixer circuit.
7. The jammer avoidance device of claim 6, wherein the B3/S local oscillator circuit further comprises a second splitter and two or more phase adjusting circuits;
the second combiner divider is respectively connected with the first combiner divider and each phase adjusting circuit; the phase adjusting circuit is connected with the down-conversion mixing circuit.
8. The immunity device according to claim 7, wherein the number of B3/S down-conversion channels is two or more;
the down-conversion mixing circuits of the B3/S down-conversion channels are connected with the phase adjusting circuits in a one-to-one correspondence mode, and radio frequency lines between the down-conversion mixing circuits and the phase adjusting circuits are equal in length.
9. The antijam apparatus of any one of claims 1 to 8, wherein said B3/S up-conversion channel includes a band-pass filter, a third amplifying circuit, a low-pass filter, an up-conversion mixer circuit, and a third acoustic surface filter connected in series;
the band-pass filter is used for connecting the Beidou anti-interference module; and the third acoustic surface filter is used for connecting the Beidou branch and integration module.
10. The tamper-resistant apparatus of claim 9, further comprising a B1/L1 receive channel; any B3/S up-conversion channel further comprises a third division combiner connected between the third acoustic surface filter and the Beidou splitting and combining module;
the third branch combiner is connected with the B1/L1 receiving channel.
11. The immunity device according to any one of claims 1 to 8, wherein the number of B3/S down-conversion channels is 8; the number of the B3/S up-conversion channels is 8;
any 4B 3/S down-conversion channels are B3 frequency band down-conversion channels; the other 4B 3/S down-conversion channels are S-band down-conversion channels; any 4B 3/S up-conversion channels are B3 frequency band up-conversion channels; and the other 4B 3/S up-conversion channels are S-band up-conversion channels.
12. An anti-jamming system, characterized by comprising a Beidou anti-jamming module, a Beidou branch and branch circuit module and the anti-jamming device according to any one of claims 1 to 11;
the anti-interference device is respectively connected with the Beidou anti-interference module and the Beidou switching-on/off module.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011109202.1A CN114389740A (en) | 2020-10-16 | 2020-10-16 | Anti-jamming device and system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011109202.1A CN114389740A (en) | 2020-10-16 | 2020-10-16 | Anti-jamming device and system |
Publications (1)
Publication Number | Publication Date |
---|---|
CN114389740A true CN114389740A (en) | 2022-04-22 |
Family
ID=81193281
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011109202.1A Pending CN114389740A (en) | 2020-10-16 | 2020-10-16 | Anti-jamming device and system |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114389740A (en) |
-
2020
- 2020-10-16 CN CN202011109202.1A patent/CN114389740A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7231189B2 (en) | Transmit and/or receive channel communication system with switchably coupled multiple filtering components | |
US8655301B2 (en) | Frequency agile duplex filter | |
US10333578B2 (en) | Device including a switching unit and applications thereof | |
CN102076120B (en) | Multimode multiband radio-frequency onboard micro-micro cellular communication system based on software defined radio | |
MXPA03006245A (en) | Local oscillator leakage control in direct conversion processes. | |
JPH09261106A (en) | Mobile radio equipment operated for plural frequency bands | |
EP1569353A2 (en) | High frequency circuit device | |
CN213521865U (en) | Frequency conversion receiving system | |
CN210958360U (en) | Signal processing circuit and antenna device | |
US6272329B1 (en) | Bidirectional frequency translator and full duplex transceiver system employing same | |
US20100291875A1 (en) | Radioelectric transmission and reception module mainly intended for broad-band radiocommunications | |
CN112615633A (en) | Radio frequency front-end circuit of broadband multi-channel direction finder | |
US5933770A (en) | Low distortion tuner-receiver with bridge-type diplexer | |
JP2004537907A (en) | Programmable IF bandwidth using fixed bandwidth filter | |
CN102668389B (en) | Receiver | |
US6628960B1 (en) | Multi-mode radio receiver | |
CN201919158U (en) | Multi-mode multi-band radio frequency onboard pico cellular communication system based on software radio | |
CN116317959A (en) | Up converter and control method thereof | |
CN114389740A (en) | Anti-jamming device and system | |
CN108768500B (en) | Communication satellite transponder | |
CN216794989U (en) | Multi-mode multi-channel radio frequency transceiver | |
CN213484821U (en) | Frequency conversion assembly for electronic warfare and surveillance equipment | |
CN110708126B (en) | Broadband integrated vector signal modulation device and method | |
CN108616283A (en) | The anti-interference radio frequency unit of Ka frequency ranges of jump and amplitude limiting processing is solved based on Ka | |
CN100571343C (en) | Tuner |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |