CN114386349A

CN114386349A - Wiring method and device for system-level digital circuit, equipment and storage medium

Info

Publication number: CN114386349A
Application number: CN202210284920.5A
Authority: CN
Inventors: 石润明; 邹鹏; 林智锋; 鲁振楷; 陈建利
Original assignee: Shanghai Lixin Software Technology Co ltd
Current assignee: Shanghai Lixin Software Technology Co ltd
Priority date: 2022-03-23
Filing date: 2022-03-23
Publication date: 2022-04-22

Abstract

The disclosure relates to the technical field of circuit automation, and provides a wiring method, a wiring device, wiring equipment and a wiring storage medium for a system-level digital circuit. In an embodiment of the present disclosure, a method for routing a system-level digital circuit may include: routing wires for each net in a system-level digital circuit to obtain a first routing result for each net, wherein the first routing result comprises an edge of each net; determining the TDM ratio of each network edge according to a predetermined TDM constraint relationship; outputting a second routing result including the edges of each net and the TDM ratio of the edges. It has been verified that the present disclosure can achieve optimal run time and TDM rate while satisfying all TDM constraints, is efficient, scalable, and can be implemented by multiplexing hardware.

Description

Wiring method and device for system-level digital circuit, equipment and storage medium

Technical Field

The present disclosure relates to the field of circuit automation technologies, and in particular, to a method and an apparatus for wiring a system-level digital circuit, a device, and a storage medium.

Background

Routing (Route) refers to a process of reasonably and correctly connecting each element by using various connection resources inside a digital circuit according to a topological structure of layout. The digital circuit has a relatively complex structure, and in order to obtain better implementation results, especially to ensure that timing conditions of a design can be met, a timing-driven engine is generally used for layout and wiring, so that layout and wiring results obtained for different design inputs, especially different timing constraints, generally have large differences.

In general, a user can specify an optimization criterion for laying out and routing by setting parameters, and in general, the optimization goal has two main aspects, namely area and speed. Time Division Multiplexing (TDM) is widely used to deal with the problem of wiring channel insufficiency so that multiple signals can be transmitted over the same channel at different times.

The TDM technology improves resource utilization by transmitting a plurality of signals through the same wiring channel. Fig. 1 is a schematic diagram of TDM technology. Referring to fig. 1, a circuit suitable for TDM technology may include a parallel/serial converter, an I/O pin on a source digital circuit, a serial/parallel converter, and an I/O pin on a sink digital circuit, as well as wires between them. Where the converter is triggered by a TDM clock that runs much faster than the system clock, multiple signals can be transmitted to the target device in one system clock cycle. TDM techniques effectively enhance signal transmission capabilities in digital circuit prototype systems.

At present, with the sharp increase of signals among digital circuits, only crossed digital circuit networks with the same direction and TDM ratio can be distributed to the same wire in a digital circuit analysis framework aiming at optimizing the TDM ratio, and the framework does not relate to the case that the TDM ratio is even, obviously, the digital circuit analysis framework is not practical for practical multiplexing hardware implementation. Therefore, there is a need for a new wiring scheme for a suitable system-level digital circuit platform that can efficiently optimize the TDM ratio.

Disclosure of Invention

In view of the above, the embodiments of the present disclosure provide a method and apparatus for routing system-level digital circuits, a device, and a storage medium.

The embodiment of the application provides the following technical scheme:

a first aspect of the present application provides a method of routing a system-level digital circuit, the method comprising:

routing wires for each net in a system-level digital circuit to obtain a first routing result for each net, wherein the first routing result comprises an edge of each net, and the edge represents a wiring between logic blocks in the net;

determining a time division multiplexing, TDM, ratio of edges of each network according to a predetermined TDM constraint relationship, including: allocating TDM ratios to the edges, performing TDM ratio reallocation to average the TDM ratios of different network groups, and refining the TDM ratios of the edges by adopting a contraction algorithm;

outputting a second routing result including the edges of each net and the TDM ratio of the edges.

Preferably, the routing for each net in the system level digital circuit comprises:

acquiring an undirected graph of the network, wherein vertexes in the undirected graph represent logic blocks in the network, and edges in the undirected graph represent wiring among the logic blocks;

weighting edges in the undirected graph in a linearly increasing manner to determine a linear contribution of the edges to an overall TDM ratio of the network;

constructing a Steiner Minimum Tree (SMT) problem representing routing settings of the net, solving the SMT problem based on the weighted results to obtain a first routing result for the net, edges in the first routing result representing wires routed between logic blocks in the net.

Preferably, the weighting the edges in the undirected graph in a linear growth manner includes:

determining the weight of the edge in the undirected graph in a linearly increasing manner according to the following formula:

wherein the content of the first and second substances,

x represents the number of wiring signals routed through the edge e,

indicating the optimum TDM ratio.

Preferably, the predetermined TDM constraint relationship is expressed as:

wherein the content of the first and second substances,

is the number of signals using a TDM ratio m, m giving

The maximum value of the TDM ratio used at the time, m is an even number, and k represents the upper limit of i;

wherein the TDM ratio is defined as:

wherein the content of the first and second substances,

the requirement of the edge e is represented by,

the capacity of the edge e is represented by,

represents the TDM ratio of edge e.

Preferably, the allocating the TDM ratio to the edge includes:

the TDM ratio is allocated for the edge while minimizing the maximum TDM ratio of the network group according to:

where P is a set of network groups,

p denotes a network group, E denotes the set of edges,

，

representing the TDM rate assigned to edge e in the wiring path of network n,

represents the TDM constraint relationship and minmax represents minimizing the maximum TDM ratio.

Preferably, the performing TDM ratio reallocation averages TDM ratios of different network groups, including:

the TDM ratio is reallocated for the edge as follows:

；

；

；

；

；

represents the TDM ratio of e after the reallocation,

expressed as a weight assigned to the network n,

representing the total TDM ratio of network group p.

Preferably, the refining the TDM ratio of the edge by using a contraction algorithm includes:

iteratively updating the TDM ratio of the edge according to the following formula until there is no change between the TDM ratios before and after the update:

wherein the content of the first and second substances,

is the total TDM ratio of the maximum network group p to which the network n belongs, h is a target value, which is a preset value,

represents the TDM ratio of e after the update,

indicating the TDM ratio of the update front edge e.

A second aspect of the present application provides a wiring arrangement for a system-level digital circuit, the arrangement comprising:

a routing module, configured to route wires for each net in a system-level digital circuit to obtain a first routing result for each net, where the first routing result includes an edge of each net, and the edge represents a connection between logic blocks in the net;

a TDM ratio determining module, configured to determine a TDM ratio of time division multiplexing of an edge of each network according to a predetermined TDM constraint relationship, including: allocating TDM ratios to the edges, performing TDM ratio reallocation to average the TDM ratios of different network groups, and refining the TDM ratios of the edges by adopting a contraction algorithm;

an output module to output a second routing result including an edge of each net and a TDM ratio of the edge.

A third aspect of the present application provides a computing device comprising: one or more processors; and a memory storing a computer program which, when executed by the processor, causes the processor to execute the wiring method of the system-level digital circuit.

A fourth aspect of the present application provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, causes the processor to execute the wiring method of the above-described system-level digital circuit.

A fifth aspect of the application provides a computer program product comprising a computer program which, when run by a processor, causes the processor to carry out the method of wiring of the above-mentioned system-level digital circuit.

Compared with the prior art, the beneficial effects that at least one technical scheme adopted by the embodiment of the application can achieve at least comprise:

according to the technical scheme of the embodiment of the application, after each network is wired, the maximum TDM ratio is minimized while key ratio constraint is considered, TDM of different network groups is averaged through TDM ratio redistribution, and finally the TDM ratio is further refined through a contraction algorithm.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a TDM technique;

fig. 2 is a schematic flowchart of a wiring method of a system-level digital circuit according to an embodiment of the present disclosure;

FIG. 3 is a diagram illustrating an exemplary implementation of an SMT algorithm according to an embodiment of the present application;

FIG. 4 is an exemplary diagram of network wiring in an embodiment of the present application;

FIG. 5 is a diagram illustrating an exemplary implementation of a puncturing algorithm in an embodiment of the present application;

fig. 6 is a schematic structural diagram of a wiring device of a system-level digital circuit provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of an electronic device provided in an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

The features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.

As described above, the digital circuit analysis framework aiming at optimizing the TDM ratio in the related art cannot be implemented in multiplexing hardware. In view of this, the embodiments of the present application provide a method and an apparatus, a device, and a storage medium for routing a system-level digital circuit, which can effectively optimize a TDM ratio and can be implemented by multiplexing hardware.

The basic idea of the embodiments of the present application is to provide a system-level digital circuit wiring method, and apparatus, device, and storage medium, after each network is wired, while considering a key ratio constraint (for example, formula (3) below), minimize a maximum TDM ratio, average TDM of different network groups by TDM ratio redistribution, and finally further refine the TDM ratio by using a puncturing algorithm, thereby effectively handling imbalance between network groups, reducing differences between image and network information, and verifying that the technical solution of the embodiments of the present application realizes an optimal runtime and TDM ratio under the condition of satisfying all TDM constraints, and is efficient and scalable, and convenient to implement by multiplexing hardware.

The technical solutions provided by the embodiments of the present application are described below with reference to the accompanying drawings.

A system-level mathematical circuit platform is given, namely, a group of networks P and a group of networks N are given. A set of network groups may be represented as

，

Represents a network group, i =1, 2, …, s beingAn integer greater than or equal to 1. A set of networks can be represented as

，

Denotes a network, i =1, 2, …, t being an integer greater than or equal to 1. Each network group p comprises networks n with similar attributes or the same power consumption, the same network n may belong to multiple network groups p simultaneously, i.e. different network groups may contain the same network. A network n comprises a plurality of logic blocks, the connection relation of the plurality of logic blocks is known, and the logic blocks in the network n can be recorded through the netlist.

In the embodiment of the present application, "Logic block" refers to a basic unit of a network n in a system-level digital circuit platform, and the Logic block may be, but is not limited to, an FPGA, a Complex Programmable Logic Device (CPLD), and other elements.

Referring to fig. 2, a method for routing a system-level digital circuit according to an embodiment of the present disclosure may include:

step S210, wiring is conducted on each network in the system-level digital circuit to obtain a first wiring result of each network, wherein the first wiring result comprises an edge of each network, and the edge represents wiring between logic blocks in the network;

step S220, determining the TDM ratio of the time division multiplexing of the edge of each network according to the predetermined TDM constraint relationship, includes: TDM ratios are distributed for the edges, TDM ratio redistribution is carried out to average the TDM ratios of different network groups, and a contraction algorithm is adopted to refine the TDM ratios of the edges;

step S230, a second routing result is output, the second routing result including the sides of each net and the TDM ratio of the sides.

In some embodiments, step S210 may include steps a 1-a 3:

step a1, obtaining an undirected graph of the network, wherein the vertexes of the undirected graph represent logic blocks in the network, and the edges of the undirected graph represent the connection lines between the logic blocks;

undirected graph

Wiring design capable of representing one net in system-level digital circuit and undirected graph

The set of vertices V of (a) may be represented as:

，

representing the logical blocks in the network, i =1, 2, …, q.

Undirected graph

The set of edges E of (a) may be represented as:

and E represents a set of edges of the network,

representing edges of the network, the edges representing connections between logic blocks in the network, j =1, 2, …, r being an integer greater than 2.

A step a2 of weighting the edges in the undirected graph in a linearly increasing manner to determine the linear contribution of the edges to the overall TDM ratio of the network;

step a3, constructing a Steiner Minimum Tree (SMT) problem representing the routing settings of the net, solving the SMT problem based on the weighted results to obtain a first routing result for the net, wherein edges in the first routing result represent the wires routed between logic blocks in the net.

First, the edges are weighted in a linearly increasing manner and the join task is represented as SMT while the cost of the edges is updated. Consider the case where there is only one network group and all networks are in a given network list. The task of connection of the optimal TDM ratio r (x) can be calculated by the following method, and the task of connection includes connecting the respective elements:

(1)

wherein x is the number of wiring signals passing through the edge e

And (4) showing. When x is from

Become into

When, as shown in formula (2), when

When even, the TDM ratio of edge e increases

When is coming into contact with

For odd numbers, the TDM ratio for edge e is increased by 2

。

（2）

Whether or not

Even or odd, the contribution of the edges increases in a linear fashion, while the overall TDM ratio follows

And (5) secondary growth. Based on the linear contribution of the graph edges to the total TDM ratio in equation (5), the cost of the connections between digital circuits is kept more linear while routing the nets in turnAnd (5) new. Note that each edge is assigned an initial value of 1, and once the edge is routed through the network, its corresponding weight will be increased by 2.

Network wiring is reset after the wiring edges are weighted, and the problem is expressed as SMT: given an undirected weighted graph

Wherein any side

Weight of (2)

And the vertex is

Is to find a subgraph of G

The subgraph is to

Point of middle and minimum weight

Are connected with each other, wherein

And

are respectively subgraph

The edge and the weight of. Since the edge weights are positive, the optimal subgraph

It is inevitable that

A tree with leaves in it, so that the wiring has no loops, corresponding to a tree.

Here, linear contribution refers to a contribution that increases in a linear manner, and the contribution may be, but is not limited to, a fractional ratio. The cost is the sum of the weights of certain distribution lines, for example, if the wiring connects logic blocks t1 and t2 and passes through lines l1, l2 and l3, the cost is w1+ w2+ w 3.

FIG. 3 shows the execution of a Prim-based SMT algorithm by which network routing can be achieved. Referring to FIG. 3, as shown in lines 1-2, a collection is first constructed

The collection

From

Begins with an arbitrary vertex whose complement is

. Then, in lines 3-5, the minimum heap Q and the array D are implemented to maintain the shortest distance across vertices in the algorithm. As shown in lines 6-10, for each cycle, backtracking is performed

To

The vertex with the shortest distance in the middle, and updating the set

And

. In line 12, array D is modified by the Bellman-Ford algorithm and queue optimization. When each Stainer vertex is connected and

the algorithm is terminated. Thus, the undirected weighted graph is completed

The SMT problem of (1) is solved, and network wiring is completed.

Fig. 4 is a diagram of net routing as an SMT problem illustrating the routing of the first four nets on a system with 9 digital circuits. In fig. 4, "1", "3", and "5" correspond to the weights of the edges, respectively. In fig. 4, a connection line of the target point is selected, the weight of the connected line is increased by 2, and in the diagrams of the network 1 to the network 4 in fig. 4, the optimal connection mode obtained by reconnecting the current diagram after the target point is connected to the previous diagram is sequentially provided.

In some embodiments, the nets are routed in order of the largest net group to which they belong in step S110, taking into account the potential impact of the routing order on the final TDM result.

The SMT problem is effectively solved by using a combination method of time sequence driving. When the network size is small, a time complexity of

The precise SMT algorithm is used for solving the optimal solution, and an approximate algorithm with low complexity is used for solving large-scale network wiring.

In some embodiments, the TDM ratio of edge e is defined as shown in equation (3) below:

(3)

wherein the content of the first and second substances,

representing the requirement of the edge e as a known quantity;

the capacity representing the edge e, typically with the edge capacity fixed to 1, is used for multiplexing hardware implementation,

represents the TDM ratio of edge e.

In the embodiment of the present application, the total TDM ratio of a single network n can be represented by the sum of TDM ratios along its edges, and one can be represented by the sum of the total TDM ratios of its networks, that is, the total TDM ratio of the network group p can be represented by the following formula (4):

（4）

wherein the content of the first and second substances,

represents the TDM ratio assigned to edge e in the wiring path of network n, n represents the network, p represents the network group,

representing the total TDM ratio of network group p.

In the embodiment of the present application, the predetermined TDM constraint relationship is expressed as the following formula (5):

（5）

wherein the content of the first and second substances,

is the number of signals using a TDM ratio m, m giving

The maximum value of the TDM ratio used at the time, m is an even number, k represents the upper limit of i, and k can be obtained by analysis calculation.

In some embodiments, in step S220, the TDM ratio may be allocated for the edge according to the following equations (6) to (7), while minimizing the maximum TDM ratio and the running time of the network group:

(6)

(7)

where P is a set of network groups, P represents a network group, E represents a set of edges,

the TDM ratio of the edge e is represented,

representing the TDM constraint relationship.

If it is not

For even numbers, the distribution ratio is distributed for each network

. When in use

When it is odd, it is

Signal distribution ratio of individual wiring

Distribution ratio of

To the rest

A network. Thus, the above embodiment can uniformly distribute the TDM ratio to the wiring signals.

By the above embodiment, the maximum TDM ratio can be optimized and the operation time can be reduced while the TDM ratio is allocated to the edge.

In some embodiments, performing TDM ratio reallocation in step S220 to average the TDM ratios of different network groups may include: the TDM ratios are reallocated for the sides according to the following equations (8) to (11):

（8）

（9）

（10）

（11）

wherein the content of the first and second substances,

represents the TDM ratio of e after the reallocation,

expressed as a weight assigned to the network n,

representing the total TDM ratio of network group p.

The effective reallocation can be realized through the embodiment, so that the total TDM ratio of different network groups tends to be consistent. Further, each edge satisfies the following expression (12), and it can be seen that the TDM ratio of the reallocated edge e obtained by the expression (8) satisfies the constraint of the foregoing expression (7).

（12）

In some embodiments, the step S120 of refining the TDM ratio of the edge by using a shrinking algorithm may include: the TDM ratio of the edge is iteratively updated according to the following equation (13) until there is no change between the TDM ratios before and after the update:

（13）

wherein the content of the first and second substances,

is the total TDM ratio of the maximum network group p to which the network n belongs, h is a target value, the target value is a preset value,

represents the TDM ratio of e after the update,

indicating the TDM ratio of the update front edge e.

In the above embodiment, by adjusting the TDM ratio of each edge, the difference between the target TDM ratio and the total TDM ratio of each network group can be significantly reduced, and the purpose of refining the TDM ratio can be achieved.

Fig. 5 shows an exemplary implementation of the puncturing algorithm. Referring to lines 1-4, for each network, the TDM ratio of the edge of the network is refined by equation (13) based on the network group having the largest associated TDM ratio. In lines 5-8, if the TDM ratio of e after reallocation satisfies the TDM constraint, an iterative scheme is used to refine and update a ' for e, i.e. a is assigned to a ', a represents the initially allocated TDM ratio, and a ' represents the optimized TDM ratio, so as to reduce the ratio difference between the total TDM ratio of the network group and the target value h until no improvement can be achieved. Here, the target value h may not be constant because of a difference between a pattern simulating an actual net and actual wiring of the net, layout of elements, and the like.

The method of the embodiment of the application can achieve the following beneficial effects:

(1) proved by verification, the method of the embodiment of the application has a provable good performance limit

Wherein

Is the number of leaves in the optimal SMT;

(2) the method of the embodiment of the application can allocate and optimize the TDM ratio aiming at the unbalanced network group, and can further improve the wiring performance, wherein the wiring performance comprises the wiring cost, the wiring time and the appropriate degree of the TDM ratio allocation result;

(3) tests show that the method of the embodiment of the application can simultaneously realize the optimal estimation ratio and the CPU time;

(4) compared with the 3 winner before the 2019 ICCAD competition based on competition benchmark, experimental results show that the method provided by the embodiment of the application can achieve the optimal running time and TDM ratio under the condition of meeting all TDM constraints.

Based on the same inventive concept, the embodiment of the specification provides a wiring device of a system-level digital circuit. Referring to fig. 6, a wiring device of a system-level digital circuit provided in an embodiment of the present application may include:

a routing module 61, configured to route wires for each net in the system-level digital circuit to obtain a first routing result for each net, where the first routing result includes an edge of each net, and the edge represents a connection between logic blocks in the net;

a TDM ratio determining module 62, configured to determine a TDM ratio of time division multiplexing of an edge of each network according to a predetermined TDM constraint relationship, includes: allocating TDM ratios to the edges, performing TDM ratio reallocation to average the TDM ratios of different network groups, and refining the TDM ratios of the edges by adopting a contraction algorithm;

an output module 63 for outputting a second routing result comprising the edges of each net and the TDM ratio of the edges.

In some embodiments, the wiring module 61 may be specifically configured to: acquiring an undirected graph of the network, wherein vertexes in the undirected graph represent logic blocks in the network, and edges in the undirected graph represent wiring among the logic blocks; weighting edges in the undirected graph in a linearly increasing manner to determine a linear contribution of the edges to an overall TDM ratio of the network; constructing a Steiner Minimum Tree (SMT) problem representing routing settings of the net, solving the SMT problem based on the weighted results to obtain a first routing result for the net, edges in the first routing result representing wires routed between logic blocks in the net.

In some embodiments, the routing module 61 is specifically configured to weight the edges in the undirected graph in a linearly increasing manner to determine the linear contribution of the edges to the overall TDM ratio of the network, including: and determining the weight of the edge in the undirected graph in a linear increasing mode according to the formulas (1) to (2).

In some embodiments, the TDM ratio determining module 62 is configured to allocate a TDM ratio for the edge, and includes: the TDM ratio is allocated for the sides according to equations (6) to (7) while minimizing the maximum TDM ratio of the network group.

In some embodiments, the TDM ratio determining module 62 for performing TDM ratio reallocation to average the TDM ratios of different network groups includes: the TDM ratio is reallocated for the edge according to the formula (4) and the formulas (8) to (11).

In some embodiments, the TDM ratio determining module 62 is configured to refine the TDM ratio of the edge by using a puncturing algorithm, and includes: the TDM ratio of the edge is iteratively updated according to equation (13) until there is no change between the TDM ratios before and after the update.

In a specific application, the wiring device of the system-level digital circuit can be realized by software, hardware or a combination of the two. For example, the timing driving layout apparatus may be implemented by the electronic device 70 described below, and may also be implemented as software running in the electronic device 70.

The embodiment of the application also provides an electronic device 70. As shown in fig. 7, the electronic device may include one or more processors 71 and memory 72.

The processor 71 may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

The memory 72 may include one or more computer programs that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, Random Access Memory (RAM), cache memory (cache), and/or the like. The non-volatile memory may include, for example, Read Only Memory (ROM), hard disk, flash memory, etc. One or more computer programs may be stored on the computer-readable storage medium and executed by processor 81 to implement the wiring method of the system-level digital circuits described above and/or other desired functions.

In addition, the electronic device 70 may include any other suitable components, such as a bus, input/output interfaces, and so forth, depending on the particular application.

In addition to the above-described methods and apparatus, embodiments of the present disclosure may also be a computer program product comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps of the above-described method of wiring of system-level digital circuits.

The computer program product may be written with program code for performing the operations of embodiments of the present application in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server.

Furthermore, embodiments of the present disclosure may also be a computer-readable storage medium having stored thereon computer program instructions, which, when executed by a processor, cause the processor to perform the steps in the above described method of wiring of a system-level digital circuit.

The computer-readable storage medium may take any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the method embodiments described later, since they correspond to the system, the description is simple, and for the relevant points, reference may be made to the partial description of the system embodiments.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method of routing a system-level digital circuit, the method comprising:

2. The method of routing of a system level digital circuit according to claim 1, wherein said routing for each net in the system level digital circuit comprises:

3. The method of routing of a system level digital circuit according to claim 2, wherein said weighting edges in said undirected graph in a linearly increasing manner comprises:

wherein the content of the first and second substances,

x represents the number of wiring signals routed through the edge e,

indicating the optimum TDM ratio.

4. The method of routing of system-level digital circuits according to claim 1, wherein said predetermined TDM constraint relationship is expressed as:

wherein the content of the first and second substances,

is the number of signals using a TDM ratio m, m giving

wherein the TDM ratio is defined as:

wherein the content of the first and second substances,

the requirement of the edge e is represented by,

the capacity of the edge e is represented by,

represents the TDM ratio of edge e.

5. The method of routing of system level digital circuits according to claim 4, wherein said assigning a TDM ratio to said edge comprises:

where P is a set of network groups,

p denotes a network group, E denotes the set of edges,

，

representing the TDM rate assigned to edge e in the wiring path of network n,

6. The method of routing of system level digital circuits according to claim 5, wherein said performing TDM ratio reallocation averages the TDM ratios of different net groups, comprising:

the TDM ratio is reallocated for the edge as follows:

；

；

；

；

；

represents the TDM ratio of e after the reallocation,

expressed as a weight assigned to the network n,

representing the total TDM ratio of network group p.

7. The method of routing of a system level digital circuit according to claim 6, wherein said refining the TDM ratio of said edges using a puncturing algorithm comprises:

wherein the content of the first and second substances,

represents the TDM ratio of e after the update,

indicating the TDM ratio of the update front edge e.

8. A wiring arrangement for system-level digital circuitry, the arrangement comprising:

9. A computing device, comprising:

one or more processors; and

memory storing a computer program which, when executed by the processor, causes the processor to perform the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, having stored thereon a computer program which, when executed by a processor, causes the processor to carry out the method of any one of claims 1 to 7.