CN114385530A - USB-based input/output data processing device and method - Google Patents
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Abstract
The application discloses a data processing device and method based on input and output of USB, wherein the data processing device based on input and output of USB comprises: the USB input interface is used for inputting images to be processed; the FPGA chip is connected with the USB input interface and is used for processing the image input by the USB input interface; the USB output interface is connected with the FPGA chip and used for outputting the image data processed by the FPGA chip; and the picture output interface is connected with the FPGA chip and used for outputting the image processed by the FPGA chip. By the method, the input, output and processing modes of the image data are improved, the visual understanding and analysis application of the image data processing technology are facilitated, and the development process of image processing products is accelerated.
Description
Technical Field
The present invention relates to the field of image data processing and analysis technologies, and in particular, to a USB-based input/output data processing apparatus and method.
Background
The image data processing technology is used in the process of developing image module products, most of the common image processing module schemes are that image data are obtained through a camera, coded and decoded through a processor chip, and finally output to a display screen through interfaces such as VGA, DVI, HDMI and DP. In the process, the processes of hardware testing, code writing and debugging, functional testing and the like are required.
However, in most cases, the captured display of the image is directly realized, and the extraction analysis of the processed data therein or other operations using the processed data are rarely performed.
Disclosure of Invention
The technical problem mainly solved by the present application is to provide a data processing apparatus and method based on USB input/output, which solves the problems of operation processing and extraction analysis for image data.
In order to solve the technical problem, the application adopts a technical scheme that: there is provided a USB based input output data processing apparatus, comprising: the USB input interface is used for inputting images to be processed; the FPGA chip is connected with the USB input interface and is used for processing the image input by the USB input interface; the USB output interface is connected with the FPGA chip and used for outputting the image data processed by the FPGA chip; and the picture output interface is connected with the FPGA chip and used for outputting the image processed by the FPGA chip.
Optionally, the data processing apparatus further includes a JTAG interface, and the JTAG interface is connected to the FPGA chip and is used for online debugging and writing of the code.
Optionally, the data processing apparatus further includes a level conversion module, where the level conversion module is connected to the FPGA chip, the USB input interface and the JTAG interface, and is configured to convert a voltage carried by data input through the USB input interface and/or the JTAG interface to a voltage that can be borne by the FPGA chip.
Optionally, the USB input interface may issue an instruction to the FPGA chip for switching the data processing function option and the operation processing algorithm of the data processing apparatus.
Optionally, when the USB input interface obtains the image data by using the USB device, the USB input interface may be directly connected to a device having a USB function, such as a USB disk, and the drive integrated in the FPGA chip may automatically switch the master/slave mode of the USB input interface.
Optionally, the USB input interface may input the pixel data of the image processed by the FPGA chip output by the USB output interface into the data processing device again for processing again.
Optionally, the data processing apparatus further includes a power module, the power module is connected to the processing apparatus, located at a bottom layer of the data processing apparatus, and configured to supply a voltage required by the processing apparatus;
optionally, the power module includes a power input interface, a power supply, and a power output interface; the power input interface comprises a first power input interface and a second power input interface, the first power input interface divides power paths with different voltage values required by various data processing devices through the power chip, and the second power input interface directly inputs the different voltage values required by the data processing devices through external supply in a double-row patch contact pin mode; the power supply comprises an FPGA power supply and a peripheral interface power supply, the FPGA power supply is connected with the first power supply input interface and used for supplying voltage required by the FPGA chip, and the peripheral interface power supply is connected with the second power supply input interface and used for supplying voltage required by peripheral interface devices such as a USB input interface, a USB output interface, a JTAG interface, an HDMI interface and the like; the power output supply interface comprises an FPGA power output interface and a peripheral interface power output interface, is connected with the FPGA chip and the peripheral interface and is used for outputting the voltage required by the FPGA chip and the peripheral interface device.
In order to solve the above technical problem, another technical solution adopted by the present application is: a data processing method based on input and output of a USB is provided, and comprises the following steps: inputting image data to be processed into the FPGA chip through the USB input interface for real-time processing; and then outputting the image data processed by the FPGA chip to a display through the HDMI interface, and/or extracting pixel point data of the image processed by the FPGA chip through the USB output interface for analysis and comparison.
Optionally, the pixel point data of the image processed by the FPGA chip output by the USB output interface is input into the data processing device again through the USB input interface for processing again.
The beneficial effect of this application is: different from the prior art, the data processing device based on USB input and output comprises: the USB input interface is used for inputting images to be processed; the FPGA chip is connected with the USB input interface and is used for processing the image input by the USB input interface; the USB output interface is connected with the FPGA chip and used for outputting the image data processed by the FPGA chip; and the picture output interface is connected with the FPGA chip and used for outputting the image processed by the FPGA chip. By the method, the input, output and processing modes of the image data are improved, the visual understanding and analysis application of the image data processing technology are facilitated, and the development process of image processing products is accelerated.
Drawings
FIG. 1 is a schematic structural diagram of a processing module located at a top layer of a USB input/output-based data processing apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a processing module located at the top layer of the device according to another embodiment of the data processing device based on USB input/output of the present application;
FIG. 3 is a schematic diagram of a power module located at the bottom of the device in the embodiment of the USB-based input/output data processing device in FIGS. 1 and 2;
FIG. 4 is a flowchart illustrating an embodiment of a data processing method based on USB input/output according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1 to 3, the USB input/output-based data processing apparatus according to the embodiment of the present invention may include a processing module located at a top layer of the apparatus and a power supply module located at a bottom layer of the apparatus. The power supply module is connected with the processing module and is used for supplying voltage required by the whole processing device.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a processing module at a top layer of a module according to an embodiment of the present application. Specifically, the processing module 1 may include: USB input interface 11, FPGA chip 13, USB output interface 14, picture output interface 15 and JTAG interface 12.
The USB input interface 11 inputs an image to be processed to the FPGA chip 13 for processing, the USB output interface 14 and the picture output interface 15 are connected with the FPGA chip 13 to output the image processed by the FPGA chip 13, and the JTAG interface 12 is used for realizing online debugging and coding codes.
Specifically, the image is input to the FPGA chip 13 through the USB input interface 11 for operation processing, after the image is processed by the FPGA chip 13, the processed image is output through the image output interface 15, and the processed image data is output through the USB output interface 14; the JTAG interface 12 is used for debugging the programming code on line, so that a program developer can easily perform development operations such as program writing and debugging on the module.
The input image may include a picture, image data, and the like, the image data output via the USB output interface 14 may include processed image data, pixel point data of the image, and the like, and the picture output interface 15 may include VGA, DVI, HDMI, and the like.
Optionally, the picture output interface 15 and the USB output interface 14 are arranged in a manner perpendicular to each other to avoid crosstalk between data signals generated by parallel placement and to avoid blocking of the other interface when any one is connected to an external device.
In one embodiment, the picture output interface 15 is connected to a display, and the image processed by the FPGA chip 13 is output to the display through the picture output interface 15, so that the effect of the processed image is finally observed on the display in real time.
In a specific embodiment, the USB output interface 14 is connected to a PC computer, and the USB output interface 14 outputs pixel data of an image to the PC computer, and then performs operations such as analysis and processing on the acquired pixel data of the image at an upper computer.
Optionally, the image pixel data analyzed and processed by the PC computer may be input into the processing module again through the USB input interface 11 for processing.
Optionally, in an embodiment, when the USB input interface 11 obtains the image data by using a USB device, the USB device is directly accessed to the USB input interface 11. The driver integrated inside the FPGA chip 13 will automatically switch the master/slave mode of the USB input interface 11 when the device is accessed. The USB device may include a USB-enabled device such as a USB disk.
Optionally, in a specific embodiment, the USB input interface 11 issues an instruction to the FPGA chip 13 to switch the data processing function option and the operation processing algorithm of the data processing apparatus. The data processing function options can include image superposition, image segmentation, image splicing and the like.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a processing module at a top layer of the USB input/output-based data processing apparatus according to another embodiment of the present application. Specifically, the processing module 1X may include: the USB input interface 11X, FPGA chip 13X, USB includes a level shift module 16X in addition to the output interface 14X, the picture output interface 15X, and the JTAG interface 12X.
The level conversion module 16X is connected to the USB input interface 11X, JTAG interface 12X and the FPGA chip 13X, and is configured to convert a voltage carried by input data of the USB input interface 11X and/or the JTAG interface 12X into a voltage that can be borne by the FPGA chip 13X.
Specifically, after the image is input to the device through the USB input interface 11X, the voltage carried by the image data is converted to the voltage that can be borne by the FPGA chip 13X by the level conversion module 16X, and the voltage is input to the FPGA chip 13X for operation processing. After the image is processed by the FPGA chip 13X, the processed image is output through the image output interface 15X, and the processed image data is output through the USB output interface 14X; the JTAG interface 12X is used for debugging a programming code on line, which is convenient for a program developer to perform development operations such as program writing and debugging on the module.
The picture output interface 15X and the USB output interface 14X are arranged in a manner perpendicular to each other to avoid crosstalk between data signals generated by parallel placement and to avoid blocking of the other interface when any one of the interfaces is connected to an external device.
The input image may include a picture, image data, and the like, the image data output via the USB output interface 14X may include processed image data, pixel point data of the image, and the like, and the picture output interface 15X may include VGA, DVI, HDMI, and the like.
In one embodiment, the picture output interface 15X is connected to a display, and the image processed by the FPGA chip 13X is output to the display through the picture output interface 15X, so that the processed image effect is finally observed on the display in real time.
In one embodiment, the USB output interface 14X is connected to a PC computer, and the USB output interface 14X outputs pixel data of an image to the PC computer, and then performs operations such as analysis and processing on the acquired pixel data of the image at an upper computer.
Optionally, the image pixel data analyzed and processed by the PC computer may be input into the processing module again through the USB input interface 11X for processing.
Optionally, in an embodiment, when the USB input interface 11X acquires image data by using a USB device, the USB device is directly accessed to the USB input interface 11X. The driver integrated inside the FPGA chip 13X automatically switches the master/slave mode of the USB input interface 11X when the device is accessed. The USB device may include a USB-enabled device such as a USB disk.
Optionally, in a specific embodiment, an instruction is issued to the FPGA chip 13X through the USB input interface 11X for switching a data processing function option and an operation processing algorithm of the data processing apparatus. The data processing function options can include image superposition, image segmentation, image splicing and the like.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a power module located at a bottom layer of the USB-based input/output data processing apparatus in fig. 1 and 2. Specifically, the power module 2 may include a power input interface 21, a power chip 22, and a power output interface 23, which are disposed on the bottom layer of the device to reduce digital signal interference on the top layer module.
The power input interface comprises a first power input interface 211 and a second power input interface 212, the power chip comprises an FPGA power chip 221 and a peripheral interface power chip 222, and the power output interface comprises an FPGA power output interface 231 and a peripheral interface power output interface 232.
Specifically, after the voltage supplied from the outside is input into the device through the first power input interface 211 located on the left side of the bottom layer of the device, power paths with different voltage values required by the processing module are separated through the FPGA power chip 221 and the peripheral interface power chip 222, and finally, the voltages required by the FPGA chip 13X and the peripheral interface device are output through the FPGA power output interface 231 and the peripheral interface power output interface 232 connected to the FPGA chip 13X and the peripheral interface device.
The peripheral interface devices may include a USB input interface 11X, USB output interface 14X, JTAG interface 12X, a picture output interface 15X, a level conversion module 16X, and the like.
Specifically, the second power input interface 212 is located on the right side of the bottom layer of the device, and different voltage values required by the data processing device are directly input through external supply by means of a double row of patch pins. For example, in one embodiment, the second power input interface 212 is arranged with 8 voltage input interfaces, such as 1.00V, 1.20V, 1.35V, 1.50V, 1.80V, 2.50V, 3.30V, and 5.00V.
Different from the prior art, the data processing device based on USB input and output comprises: the USB input interface is used for inputting images to be processed; the FPGA chip is connected with the USB input interface and is used for processing the image input by the USB input interface; the USB output interface is connected with the FPGA chip and used for outputting the image data processed by the FPGA chip; and the picture output interface is connected with the FPGA chip and used for outputting the image processed by the FPGA chip. By the method, the input, output and processing modes of the image data are improved, the visual understanding and analysis application of the image data processing technology are facilitated, and the development process of image processing products is accelerated.
Referring to fig. 4, fig. 4 is a schematic flowchart illustrating an embodiment of a data processing method based on USB input/output according to the present application. The embodiment provides a data processing method based on USB input and output, and specifically, the method may include the following steps:
s101: and inputting the image data to be processed into the FPGA chip through the USB input interface for real-time processing.
Specifically, after the image data is input to the device through the USB input interface, the voltage carried by the image data is converted to the voltage that can be borne by the FPGA chip through the level conversion module, and then the image data is input to the FPGA chip for real-time operation processing.
Optionally, in a specific embodiment, when the USB input interface acquires the image data by using the USB device, the USB device is directly connected to the USB input interface. And the driver integrated in the FPGA chip automatically switches the master/slave mode of the USB input interface when the equipment is accessed. The USB device may include a USB-enabled device such as a USB disk.
Optionally, in a specific embodiment, an instruction is issued to the FPGA chip through the USB input interface to switch the data processing function option and the operation processing algorithm of the data processing apparatus. The data processing function options can include image superposition, image segmentation, image splicing and the like.
S102: and outputting the image data processed by the FPGA chip to a display through a picture output interface, and/or extracting pixel point data of the image processed by the FPGA chip through a USB output interface for analysis and comparison.
In a specific embodiment, the picture output interface is connected with the display, after the FPGA chip processes the image data, the processed image data is output to the external display connected with the picture output interface through the picture output interface, and finally, the processed image effect is observed on the display in real time.
The picture output interface may include VGA, DVI, HDMI, etc.
In one embodiment, the USB output interface is connected to a PC, and the USB output interface outputs pixel data of the image to the PC, and then performs operations such as analysis and processing on the acquired pixel data of the image at the upper computer.
S103: and inputting the pixel data of the image processed by the FPGA chip output by the USB output interface into the data processing device again through the USB input interface for processing again.
Specifically, after the USB output interface outputs the pixel point data of the image to the PC for processing, the USB input interface may input the pixel point data of the image analyzed and processed by the PC again into the processing module for processing.
According to the scheme, image data to be processed is input to the FPGA chip through the USB input interface to be processed in real time, the image data processed by the FPGA chip is output to the display through the HDMI interface, and/or pixel point data of the image processed by the FPGA chip is extracted through the USB output interface to be analyzed and compared, and finally the pixel point data of the image processed by the FPGA chip and output by the USB output interface can be input into the data processing device through the USB input interface again to be processed again. By the scheme, the input, output and processing modes of the image data are improved, visual understanding and analysis application of the image data processing technology are facilitated, and the development process of image processing products is accelerated.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a module or a unit is merely one type of logical division, and an actual implementation may have another division, for example, a unit or a component may be combined or integrated with another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some interfaces, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on network elements. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like) or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are intended to be included within the scope of the present application.
Claims (10)
1. A data processing apparatus based on input and output of a USB, the data processing apparatus comprising:
the USB input interface is used for inputting images to be processed;
the FPGA chip is connected with the USB input interface and is used for processing the image input by the USB input interface;
the USB output interface is connected with the FPGA chip and used for outputting the image data processed by the FPGA chip;
and the picture output interface is connected with the FPGA chip and used for outputting the image processed by the FPGA chip.
2. The USB based input-output data processing apparatus according to claim 1, further comprising a JTAG interface connected to the FPGA chip for debugging and writing code online.
3. The USB based input/output data processing apparatus according to any of claims 1-2, further comprising a level shift module, connected to the FPGA chip, the USB input interface and the JTAG interface, for shifting a voltage carried by the USB input interface and/or the JTAG interface input data to a voltage that can be withstood by the FPGA chip.
4. The USB-based input/output data processing device according to claim 1, wherein an instruction is issued to the FPGA chip through the USB input interface for switching data processing function options and arithmetic processing algorithms of the data processing device.
5. The USB-based input/output data processing apparatus according to claim 1, wherein when the USB input interface obtains image data by using a USB device, the USB device is directly connected to the USB input interface, and the driver integrated inside the FPGA chip automatically switches the USB input interface master/slave mode.
6. The USB-based input/output data processing device according to claim 1, wherein the USB input interface re-inputs the pixel data of the image processed by the FPGA chip and output by the USB output interface into the data processing device for re-processing.
7. The USB-based input/output data processing apparatus according to claim 1, further comprising a power module, connected to the processing apparatus, located at a bottom layer of the data processing apparatus, for supplying a voltage required by the processing apparatus.
8. The USB based input/output data processing apparatus according to claim 7, wherein the power supply module includes a power input interface, a power supply, and a power output interface;
the power input interface comprises a first power input interface and a second power input interface, the first power input interface divides power paths with different voltage values required by the data processing device through a power chip, and the second power input interface directly inputs the different voltage values required by the data processing device through external supply in a double-row patch contact pin mode;
the power supply comprises an FPGA power supply and a peripheral interface power supply, the FPGA power supply is connected with the first power supply input interface and used for supplying voltage required by the FPGA chip, and the peripheral interface power supply is connected with the second power supply input interface and used for supplying voltage required by peripheral interface devices such as a USB input interface, a USB output interface, a JTAG interface, an HDMI interface and the like;
the power output supply interface comprises an FPGA power output interface and a peripheral interface power output interface, is connected with the FPGA chip and the peripheral interface and is used for outputting the voltage required by the FPGA chip and the peripheral interface device.
9. A data processing method based on input and output of a USB is characterized by comprising the following steps:
inputting image data to be processed into the FPGA chip through the USB input interface for real-time processing;
and outputting the image data processed by the FPGA chip to a display through a picture output interface, and/or extracting pixel point data of the image processed by the FPGA chip through a USB output interface for analysis and comparison.
10. The USB based input/output data processing method according to claim 9, wherein the data processing method further comprises: and inputting the pixel data of the image processed by the FPGA chip output by the USB output interface into the data processing device again through the USB input interface for processing again.
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| CN110524583A (en) * | 2019-09-16 | 2019-12-03 | 西安中科光电精密工程有限公司 | Weld seam based on embedded platform seeks position tracking 3D visual sensor and tracking |
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| CN115098415A (en) * | 2022-05-06 | 2022-09-23 | 贸联电子(昆山)有限公司 | Port expansion device and image display system |
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