CN114374395B - Decoding redundancy system, decoding method, and computer-readable storage medium - Google Patents
Decoding redundancy system, decoding method, and computer-readable storage medium Download PDFInfo
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- CN114374395B CN114374395B CN202111673842.XA CN202111673842A CN114374395B CN 114374395 B CN114374395 B CN 114374395B CN 202111673842 A CN202111673842 A CN 202111673842A CN 114374395 B CN114374395 B CN 114374395B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
- H02P29/02—Providing protection against overload without automatic interruption of supply
- H02P29/024—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
- H02P29/028—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load the motor continuing operation despite the fault condition, e.g. eliminating, compensating for or remedying the fault
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- Safety Devices In Control Systems (AREA)
Abstract
The application provides a decoding redundancy system which is applied to a motor controller, wherein the decoding redundancy system comprises a microprocessor, a conversion unit and a sensor, and the microprocessor is electrically connected with the sensor through a second conditioning circuit; the microprocessor is used for generating an excitation signal; the sensor is used for receiving an excitation signal generated by the microprocessor and outputting a feedback signal; the conversion unit is used for converting the feedback signal output by the sensor into digital quantity; the microprocessor decodes the feedback signal output by the sensor according to the digital quantity converted by the conversion unit. The application also provides a decoding method which is applied to the decoding redundancy system. The application also proposes a computer readable storage medium comprising a computer program, when the computer program is executing the decoding method in a decoding redundancy system.
Description
Technical Field
The present application relates to the field of software decoding technologies, and in particular, to a decoding redundancy system, a decoding method, and a computer readable storage medium.
Background
In the field of motor control, the angle signal of the rotor of the motor is an important input parameter for motor control. The sensor has the advantages of low environmental requirements, strong anti-interference capability of input signals and the like, so that the sensor is widely applied, and is particularly applied to the field of new energy traffic. In order to obtain the angle signal of the sensor, a special hardware chip is used for decoding. In the use process, various environmental factors can cause damage and failure of the hardware chip, and the safety of the system is affected.
Disclosure of Invention
The application provides a decoding redundancy system which is applied to a motor controller, wherein the decoding redundancy system comprises a microprocessor, a conversion unit and a sensor, and the microprocessor is electrically connected with the sensor through a second conditioning circuit; the microprocessor is used for generating an excitation signal; the sensor is used for receiving an excitation signal generated by the microprocessor and outputting a feedback signal; the conversion unit is used for converting the feedback signal output by the sensor into digital quantity; the microprocessor decodes the feedback signal output by the sensor according to the digital quantity converted by the conversion unit.
The decoding redundancy system further comprises a decoding chip, and the decoding chip is electrically connected with the sensor through a first conditioning circuit; the decoding chip generates an excitation signal for the sensor; the sensor receives the excitation signal generated by the decoding chip and outputs a feedback signal; the decoding chip decodes the feedback signal output by the sensor.
The decoding redundancy system also comprises a multi-way switch which is respectively and electrically connected with the microprocessor and the sensor; the multi-way switch is used for selecting an excitation signal generated by the microprocessor or the decoding chip and transmitting the selected excitation signal to the sensor; when the microprocessor and the decoding chip work normally, the multi-way switch selects the excitation signal generated by the decoding chip; when the decoding chip is abnormal, the multi-way switch selects the excitation signal generated by the microprocessor.
The decoding redundancy system provided by the application can be used for decoding through a decoding chip or a microprocessor. When the decoding redundant system is in a normal state, the decoding chip decodes the data. When the decoding redundant system is in an abnormal state, the multi-way switch converts the generation source of the excitation signal from the decoding chip to the microprocessor, and then the microprocessor decodes the excitation signal. The decoding redundancy system combines the two decoding modes, so that the stability of the system is effectively improved, and the accuracy of motor control is improved.
The microprocessor is electrically connected with the multi-way switch through a fourth conditioning circuit; the microprocessor generates a second exciting signal and transmits the second exciting signal to the fourth conditioning circuit for processing; the second exciting signal is processed by the fourth conditioning circuit and then transmitted to the sensor through the multi-way switch.
The decoding chip is electrically connected with the multi-way switch through a third conditioning circuit; the decoding chip generates a first path of excitation signals and transmits the first path of excitation signals to the third conditioning circuit for processing; the first exciting signal is processed by the third conditioning circuit and then transmitted to the sensor through the multi-way switch.
The sensor receives the first path of excitation signal and then outputs a feedback signal, or the sensor receives the second path of excitation signal and then outputs a feedback signal, and the sensor inputs the feedback signal into the second conditioning circuit for processing; and after being processed by the second conditioning circuit, the feedback signal is transmitted to the conversion unit for conversion.
After the feedback signal is processed by the second conditioning circuit, the feedback signal is input into the conversion unit for conversion, so that a first group of digital quantity and a second group of digital quantity are obtained; the first group of digital quantity and the second group of digital quantity are decoded by the microprocessor to obtain a second angle signal, and then the microprocessor operates according to the second angle signal.
The sensor receives the first path of excitation signal and then outputs a feedback signal, or the sensor receives the second path of excitation signal and then outputs a feedback signal, and the sensor inputs the feedback signal into the first conditioning circuit for processing; and after being processed by the first conditioning circuit, the feedback signal is transmitted to a decoding chip for decoding.
The decoding chip is electrically connected with the microprocessor; after being processed in the first conditioning circuit, the feedback signal is input into the decoding chip for decoding, so that a first angle signal is generated, and the microprocessor receives the first angle signal generated by the decoding chip and then operates according to the first angle signal.
The microprocessor comprises a first conversion module, a second conversion module, a third conversion module, a first subtracter, a second subtracter, an angle tracking regulator and a low-pass filter; the input ends of the first conversion module and the second conversion module receive a first signal and a second signal, wherein the first signal is a digital difference calculated by a first group of digital quantities, and the second signal is a digital difference calculated by a second group of digital quantities; the first conversion module is electrically connected with the second conversion module and the first subtracter respectively; the signal output by the first conversion module is input to a first subtracter for processing; the low-pass filter is respectively and electrically connected with the second conversion module and the third conversion module; the signal output by the second conversion module is input to a low-pass filter for processing; the signal output by the low-pass filter is input to a first subtracter for processing and a third conversion module for processing; the second subtracter is electrically connected with the angle tracking regulator and the first subtracter respectively; the signal output by the first subtracter is input to the second subtracter for processing; the signal output by the third conversion module is input to a second subtracter for processing; the signal output by the second subtracter is input to the angle tracking regulator for processing, and a second angle signal is generated.
The application also provides a decoding method which is applied to the decoding redundant system and comprises the following steps: when the decoding redundancy system is in a normal state, decoding is carried out by a decoding chip to generate a first angle signal, the microprocessor operates according to the first angle signal, and the motor controller outputs a motor control signal according to the first angle signal; when the decoding redundant system is in an abnormal state, the microprocessor sends out a switch control signal and transmits the switch control signal to the multiple switches, and then the multiple switches convert the generation source of the excitation signal from the decoding chip to the microprocessor; and then decoding by the microprocessor to generate a second angle signal, and then the microprocessor operates according to the first angle signal, and the motor controller outputs a motor control signal according to the second angle signal.
The microprocessor receives a first angle signal in a wired or wireless communication mode, and when a fault sign occurs in a signal frame of the communication, the microprocessor sends out a switch control signal and transmits the switch control signal to the multi-way switch, so that the multi-way switch is converted into an excitation signal generated by the microprocessor.
The application also proposes a computer readable storage medium comprising a computer program, when the computer program performs a decoding method in a decoding redundancy system.
The decoding redundancy system provided by the application decodes through the microprocessor, effectively avoids the loss caused by decoding by adopting only a hardware chip, improves the stability of the system, and improves the accuracy of motor control.
Drawings
FIG. 1 is a block diagram of a decoding redundancy system of an embodiment of the present application;
FIG. 2 is a block diagram of two decoding modes of a decoding redundancy system according to an embodiment of the present application;
FIG. 3 is a block diagram of the internal software decoding of a microprocessor of an embodiment of the application;
FIG. 4 is a flow chart of a method for decoding internal software of a microprocessor according to an embodiment of the application;
FIG. 5 is a block diagram of a low pass filter employing a third order angle observer calculation method in accordance with an embodiment of the present application; fig. 6 is a block diagram of a decoding redundancy system of an embodiment of the present application.
Description of the main reference signs
Motor controller 1
Decoding redundancy system 100
Microprocessor 10
Conversion unit 11
Decoding chip 20
First conditioning circuit 31
Second conditioning circuit 32
Third conditioning circuit 33
Fourth conditioning circuit 34
Multi-way switch 40
Sensor 50
First transformation module 61
Second transformation module 62
Third transformation module 63
First subtractor 64
Second subtracter 65
First multiplier 66
Second multiplier 67
Angle tracking adjuster 70
Low pass filter 80
First integrator 91
Second integrator 92
Third integrator 93
First adder 94
Second adder 95
Third multiplier 96
Fourth multiplier 97
Fifth multiplier 98
First excitation signal EXE +
Second excitation signal EXE-
Third excitation signal EXE1+
Fourth excitation signal EXE1-
Fifth excitation signal EXE2+
Sixth excitation signal EXE2-
Feedback signal FB
First signal DeltaSin
Second signal ΔCos
Third signal Vd1+
Fourth signal vq1+
Fifth signal Vd2-
Sixth signal Vq2-
Seventh signal Vd3-
Eighth signal Vq3-
Ninth signal Vqdc
Tenth signal Vaqc
Eleventh signal V1
Twelfth signal V2
First angle theta
Second angle theta 1
Third angle theta 2
Fourth angle theta 3
First coefficient K1
Second coefficient K2
Third coefficient K3
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the present application.
The present application proposes a decoding redundancy system 100, wherein the decoding redundancy system 100 can be used in a motor controller 1, and the motor controller 1 is used for controlling a motor. Since the angle signal of the rotor of the motor is an important input parameter of the motor controller 1, the sensor 50 is a necessary device for acquiring the angle signal in the motor controller 1, and the sensor 50 needs to use a special decoding chip in order to acquire the angle signal.
As shown in fig. 1, the decode redundancy system 100 includes a microprocessor 10, a second conditioning circuit 32, a fourth conditioning circuit 34, a multiplexing switch 40, and a sensor 50.
The microprocessor 10 is electrically connected with the multi-way switch 40 through the fourth conditioning circuit 34; the microprocessor 10 is electrically connected to the sensor 50 through the second conditioning circuit 32. The multi-way switch 40 is electrically connected to the microprocessor 10 and the sensor 50, respectively.
In some embodiments, the microprocessor 10 is a master control chip of the motor controller 1. The microprocessor 10 may be a digital signal processing (Digital Signal Processing, DSP) chip. The microprocessor 10 comprises a conversion unit 11, which may be an analog-to-digital conversion (Analog to digital converter, ADC) sampling unit.
As shown in fig. 1, the decoding redundancy system 100 further includes a decoding chip 20, a first conditioning circuit 31, and a third conditioning circuit 33. In some embodiments, the decoding chip 20 may be an AD2S1205 model, and other commonly used decoding chips may be used.
The microprocessor 10 is electrically connected with the decoding chip; the decoding chip 20 is electrically connected with the sensor 50 through the first conditioning circuit 31; the decoding chip 20 is electrically connected to the multi-way switch 40 through the third conditioning circuit 33.
In some embodiments, the primary function of the first conditioning circuit 31, the second conditioning circuit 32, the third conditioning circuit 33, and the fourth conditioning circuit 34 is to filter and shape the passing signal.
Fig. 2 is a block diagram of two decoding methods of a decoding redundancy system according to an embodiment of the present application. The sensor 50 receives excitation signals, wherein the excitation signals comprise a first excitation signal EXE+ and a second excitation signal EXE-, the excitation signals have two paths of sources, and the first path of excitation signals comprise a third excitation signal EXE1+ and a fourth excitation signal EXE1-, and the first path of excitation signals are generated by the decoding chip 20; the second excitation signal includes a fifth excitation signal exe2+ and a sixth excitation signal exe2-, which are generated by the microprocessor 10.
The sensor 50 outputs a feedback signal FB, which may be generated by the sensor 50 receiving a first excitation signal or may be generated by the sensor 50 receiving a second excitation signal. The feedback signal FB is a sine signal and a cosine signal.
The first decoding method of the decoding redundancy system 100 is performed by the decoding chip 20. The sensor 50 receives the first excitation signal and outputs a feedback signal FB, and the feedback signal FB is input to the first conditioning circuit 31 for processing. The feedback signal FB is processed by the first conditioning circuit 31 and then transmitted to the decoding chip 20 for decoding.
The decoding chip 20 generates a first path of excitation signal, and sends the first path of excitation signal to the third conditioning circuit 33 for processing. The first excitation signal is a sine wave, and is processed by the third conditioning circuit 33 and then transmitted to the sensor 50 through the multi-way switch 40. The source of the excitation signal received by the multiplexer 40 is the decoding chip 20.
After being processed by the first conditioning circuit 31, the feedback signal FB is input to the decoding chip 20 for decoding, so as to generate a first angle signal, the first angle signal is sent to the microprocessor 10 through a serial peripheral interface (Serial Peripheral Interface, SPI) communication mode, so that the microprocessor 10 operates according to the first angle signal, and the motor controller 1 outputs a motor control signal according to the first angle signal.
The second way of decoding the sensor decoding redundancy system 100 is performed by the microprocessor 10. The sensor 50 receives the second excitation signal and outputs a feedback signal FB, which is input to the second conditioning circuit 32 for processing. The feedback signal FB is processed by the second conditioning circuit 32 and then transmitted to the conversion unit 11 for conversion.
The microprocessor 10 generates a second excitation signal and sends the second excitation signal to the fourth conditioning circuit 34 for processing. The second excitation signal is processed by the fourth conditioning circuit 34 and then transmitted to the sensor 50 through the multi-way switch 40. The source of the excitation signal received by the multiple switch 40 is the microprocessor 10.
In some embodiments, the second excitation signal generated by the microprocessor 10 is a square wave, and the fourth conditioning circuit 34 further converts the second excitation signal into a sine wave and transmits the sine wave to the sensor 50.
After the feedback signal FB is processed by the second conditioning circuit 32, the feedback signal FB is input to the conversion unit 11 for conversion, so as to obtain a first set of digital values and a second set of digital values. The first group of digital values and the second group of digital values are decoded by the internal software of the microprocessor 10 to obtain a second angle signal, so that the microprocessor 10 operates according to the second angle signal, and the motor controller 1 outputs a motor control signal according to the second angle signal.
In some embodiments, when the decoding redundancy system 100 is in a normal state (e.g., no failure occurs), the decoding redundancy system 100 decodes in a first decoding manner, and a first angle signal is generated by the decoding chip 20. When the decoding redundancy system 100 is in an abnormal state, the decoding redundancy system 100 adopts a second decoding mode to decode, and the microprocessor generates a second angle signal. The abnormal state may include simultaneous occurrence of signal degradation (Degradation of Signal, DOS) and Loss of Tracking (LOT) fault flags in a communication frame of the decoding chip 20 (i.e., a signal frame of the SPI communication).
When DOS and LOT fault marks occur in the signal frame of the SPI communication at the same time, the decoding mode is changed to the second decoding mode, and then the second angle signal is obtained after decoding by the internal software of the microprocessor 10. And the microprocessor 10 sends out a switch control signal and transmits the switch control signal to the multiple switches 40, so that the multiple switches 40 convert the generation source of the excitation signal from the decoding chip 20 to the microprocessor 10.
As shown in fig. 3, a block diagram is decoded by the internal software of the microprocessor 10. The microprocessor 10 includes a first transform module 61, a second transform module 62, a third transform module 63, a first subtractor 64, a second subtractor 65, a first multiplier 66, a second multiplier 67, an angle tracking adjuster 70, and a low pass filter 80. The low pass filter 80 may be a first order low pass filter.
The inputs of the first transformation module 61 and the second transformation module 62 receive a first signal Δsin and a second signal Δcos, wherein in some embodiments, the first signal Δsin is a digital difference calculated from a first set of digital quantities and the second signal Δcos is a digital difference calculated from a second set of digital quantities. The first signal Δsin is a sine signal, and the second signal Δcos is a cosine signal.
The signal output from the first conversion module 61 is input to the first subtractor 64 for processing. The signal output by the second conversion module 62 is input to a low pass filter 80 for processing. The signal output from the low-pass filter 80 is input to the first subtractor 64 and the third conversion block 63 for processing.
The signal output from the first subtractor 64 is input to the second subtractor 65 for processing. The signal output from the third conversion module 63 is input to the second subtractor 65 for processing. The signal output by the second subtractor 65 is input to the angle tracking adjuster 70 for processing, and then the decoding of the internal software is completed, so as to generate a second angle signal.
In some embodiments, the first Transformation module 61 and the second Transformation module 62 perform Park Transformation (Park's Transformation) on the received first signal Δsin and the second signal Δcos, respectively. The third transform module 63 performs inverse pi-gram transform on the received signal output through the low pass filter 80.
As shown in fig. 4, a flowchart of a method for decoding internal software of the microprocessor 10 is shown, and the method includes:
s401: the feedback signal FB after passing through the second conditioning circuit 32 is sent to the conversion unit 11 for conversion, and the first signal Δsin and the second signal Δcos are obtained through calculation.
The feedback signal FB is processed by the second conditioning circuit 32 and then transmitted to the conversion unit 11 for conversion, so as to obtain a first set of digital values and a second set of digital values. The difference between the first set of digital values and the second set of digital values are calculated. The first set of digital quantities calculates a digital difference as a first signal Δsin and the second set of digital quantities calculates a digital difference as a second signal Δcos. The first signal Δsin and the second signal Δcos are then sent to the first conversion module 61 and the second conversion module 62 for processing, and S402 is further executed.
S402: the first signal Δsin and the second signal Δcos are sent to the first conversion module 61 and the second conversion module 62 for processing, so as to obtain a third signal vd1+, a fourth signal vq1+, a fifth signal Vd 2-and a sixth signal Vq2-. And then S403 is performed.
After the first signal Δsin and the second signal Δcos are calculated by the first conversion module 61, the third signal vd1+ and the fourth signal vq1+ are obtained respectively. The third signal Vd1+ is a direct voltage forward component and the fourth signal Vq1+ is a quadrature voltage forward component.
In some embodiments, the third angle signal used in the calculation by the first transformation module 61 is the output first angle θ of the angle tracking adjuster 70. The first transformation module 61 is calculated as follows:
Vd1+＝ΔCos×cosθ+ΔSin×sinθ
Vq1+＝ΔSin×cosθ-ΔCos×sinθ
the first signal Δsin and the second signal Δcos are calculated by the second conversion module 62 to obtain a fifth signal Vd 2-and a sixth signal Vq2-, respectively. The fifth signal Vd 2-is a positive-axis voltage negative component, and the sixth signal Vq 2-is a negative-axis voltage component.
In some embodiments, the fourth angle signal used in the calculation by the second transformation module 62 is the second angle θ1 calculated by multiplying the output angle θ of the angle tracking adjuster 70 by-1 input to the first multiplier 66. The second transformation module 62 is calculated as follows;
Vd2-＝ΔCos×cosθ1+ΔSin×sinθ1
Vq2-＝ΔSin×cosθ1-ΔCos×sinθ1
s403: the fifth signal Vd 2-and the sixth signal Vq 2-are supplied to the low-pass filter 80 for processing, thereby obtaining a seventh signal Vd3-, an eighth signal Vq3-, a ninth signal Vqdc and a tenth signal Vaqc. And then S404 is performed.
The fifth signal Vd 2-and the sixth signal Vq 2-are supplied to the low pass filter 80, and the low pass filter 80 outputs the seventh signal Vd 3-and the eighth signal Vq3-, and the eighth signal Vq 3-is also the ninth signal Vqdc. The seventh signal Vd 3-is a negative component of the quadrature voltage, the eighth signal Vq 3-is a negative component of the quadrature voltage, and the ninth signal Vqdc is a direct component of the quadrature voltage.
The seventh signal Vd 3-and the eighth signal Vq 3-are input to the third conversion module 63 for calculation processing to obtain a tenth signal Vaqc. The tenth signal Vaqc is an ac component of the quadrature axis voltage. The fifth angle signal used in the calculation by the third conversion module 63 is the third angle θ2 calculated by multiplying the output angle θ of the angle tracking adjuster 70 by-2 and input to the second multiplier 67.
In some embodiments, the third transformation module 63 is calculated as follows:
Vqac＝(Vq3-)×cosθ2+(Vd3-)×sinθ2
s404: the fourth signal vq1+, the ninth signal Vqdc, and the tenth signal Vqac are input to the first subtractor 64 and the second subtractor 65, respectively, and the calculation result is input to the angle tracking adjuster 70, and further the second angle signal is output.
The fourth signal vq1+ and the ninth signal Vqdc are input to the first subtractor 64 to calculate a tenth signal V1, and the eleventh signal V1 and the tenth signal Vqac are input to the second subtractor 65 to calculate a twelfth signal V2, and the twelfth signal V2 is used as an input signal of the angle tracking adjuster 70. The angle tracking adjuster calculates the twelfth signal V2 and outputs a fourth angle θ3. The fourth angle θ3 is a second angle signal decoded by the second decoding method of the redundancy system 100, and the fourth angle θ3 is similar to the angle decoded by the first decoding method. The fourth angle θ3 is an angle required by the motor controller 1 to control the motor, and the fourth angle θ3 can be used for software calculation for controlling the motor.
In some embodiments, the angle tracking adjuster 70 employs a third-order angle observer calculation method. Referring to fig. 5, for a block diagram of the low pass filter 80 employing a third order angle observer calculation method, the third order angle observer calculation method is as follows:
the twelfth signal V2 is input to the angle tracking adjuster 70 as an input signal to the angle tracking adjuster 70, and the twelfth signal V2 is input to the third multiplier 96, multiplied by the first coefficient K1 to obtain a first input value, and input to the first integrator 91.
The twelfth signal V2 is input to the fourth multiplier 97, multiplied by the second coefficient K2 to obtain a second input value, and the first input value and the second input value are input to the first adder 94 to calculate a third input value. The third input value is input to the second integrator 92.
The twelfth signal V2 is input to the fifth multiplier 98, multiplied by the third coefficient K3 to obtain a fourth input value, and the third input value and the fourth input value are input to the second adder 95 to obtain a fifth input value. The fifth input value is input to the third integrator 93. And the third integrator 93 calculates and outputs a fourth angle θ3.
Referring to fig. 6, a block diagram of a decoding redundancy system 100 in accordance with an embodiment of the present application is shown. In one embodiment, the decode redundancy system 100 includes a memory 101 and at least one processor 102. It should be appreciated by those skilled in the art that the configuration of the decoding redundancy system 100 shown in fig. 6 is not limiting of the embodiments of the present application, and that the decoding redundancy system 100 may also include more or less other hardware or software than illustrated, or a different arrangement of components.
In some embodiments, the decode redundancy system 100 comprises a terminal capable of automatically performing numerical calculations and/or information processing according to pre-set or stored instructions, the hardware of which includes, but is not limited to, microprocessors, application specific integrated circuits, programmable gate arrays, digital processors, embedded devices, and the like. In some embodiments, memory 101 is used to store program codes and various data. The Memory 101 may include Read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), programmable Read-Only Memory (Programmable Read-Only Memory, PROM), erasable programmable Read-Only Memory (EPROM), one-time programmable Read-Only Memory (OTPROM), electrically erasable rewritable Read-Only Memory (EEPROM), compact disc Read-Only Memory (Compact Disc Read-Only Memory, CD-ROM) or other optical disc Memory, magnetic disk Memory, tape Memory, or any other medium that can be used for computer-readable storage or carrying data.
In some embodiments, the at least one processor 102 may comprise an integrated circuit, such as an integrated circuit that may comprise a single package, or may comprise a plurality of integrated circuits packaged with the same or different functionality, including microprocessors, digital processing chips, graphics processors, combinations of various control chips, and the like. At least one processor 102 is a Control Unit of the controller that performs various functions and processes of the decoding redundancy system 100, such as issuing switch Control signals, performing internal software decoding, by running or executing programs or modules stored in the memory 101, and invoking data stored in the memory 101.
The integrated units implemented in the form of software functional modules described above may be stored in a computer readable storage medium. The software functional modules described above are stored in a storage medium and include instructions for causing a computer device (which may be a personal computer, a terminal, or a network device, etc.) or processor (processor) to perform the method portions of the various embodiments of the application.
The memory 101 has program code stored therein, and the at least one processor 102 may invoke the program code stored in the memory 101 to perform related functions. In one embodiment of the application, memory 101 stores a plurality of instructions that are executed by at least one processor 102 to implement a decoding method of decoding redundancy system 100. Specifically, the specific implementation method of the above instruction by the at least one processor 102 may refer to the descriptions related to the corresponding embodiments of fig. 1, 2, 3 and 4, which are not repeated herein.
The present application proposes a decoding redundancy system 100, which includes two decoding modes, one is executed by the decoding chip 20 and the other is executed by the microprocessor 10. When the decoding redundancy system 100 is in a normal state, decoding is performed by the decoding chip 20. When the decoding redundancy system 100 is in an abnormal state, the multi-way switch 40 converts the source of the excitation signal from the decoding chip 20 to the microprocessor 10, and then the microprocessor 10 decodes the excitation signal. The decoding redundancy system 100 adopts a software decoding mode to decode, so that the loss caused by decoding by only adopting a hardware chip is effectively avoided, the stability of the system is improved, and the accuracy of motor control is improved.
It will be appreciated by persons skilled in the art that the above embodiments have been provided for the purpose of illustration only and not for the purpose of limitation, and that the appropriate modifications and variations of the above embodiments should be within the scope of the application as claimed.
Claims (11)
1. The decoding redundancy system is applied to a motor controller and is characterized by comprising a microprocessor, a conversion unit and a sensor, wherein the microprocessor is electrically connected with the sensor through a second conditioning circuit;
the microprocessor is used for generating an excitation signal;
the sensor is used for receiving the excitation signal generated by the microprocessor and outputting a feedback signal;
the conversion unit is used for converting the feedback signal output by the sensor into digital quantity;
the microprocessor decodes the feedback signal output by the sensor according to the digital quantity converted by the conversion unit;
the decoding redundancy system further comprises a decoding chip and a multi-way switch, wherein the decoding chip is electrically connected with the sensor through a first conditioning circuit, and the multi-way switch is electrically connected with the microprocessor and the sensor respectively;
the decoding chip generates an excitation signal for the sensor;
the sensor receives the excitation signal generated by the decoding chip and outputs a feedback signal;
the decoding chip decodes the feedback signal output by the sensor;
the multi-way switch is used for selecting an excitation signal generated by the microprocessor or the decoding chip and transmitting the selected excitation signal to the sensor;
when the microprocessor and the decoding chip work normally, the multi-way switch selects an excitation signal generated by the decoding chip;
when the decoding chip is abnormal, the multi-way switch selects the excitation signal generated by the microprocessor.
2. The decode and redundancy system of claim 1, wherein said microprocessor is electrically connected to said multi-way switch by a fourth conditioning circuit;
the microprocessor generates a second path of excitation signals and transmits the second path of excitation signals to the fourth conditioning circuit for processing;
and the second exciting signal is transmitted to the sensor through a multi-way switch after being processed by the fourth conditioning circuit.
3. The decode and redundancy system of claim 2, wherein said decode chip is electrically connected to said multi-way switch by a third conditioning circuit;
the decoding chip generates a first path of excitation signals and transmits the first path of excitation signals to the third conditioning circuit for processing;
and the first exciting signal is transmitted to the sensor through the multi-way switch after being processed by the third conditioning circuit.
4. The decode and redundancy system according to claim 3, wherein said sensor receives said first excitation signal and outputs a feedback signal, or said sensor receives said second excitation signal and outputs a feedback signal, and said sensor inputs said feedback signal into said second conditioning circuit for processing;
and the feedback signal is transmitted to the conversion unit for conversion after being processed by the second conditioning circuit.
5. The decoding redundancy system of claim 4, wherein the feedback signal is processed by the second conditioning circuit and then input to the conversion unit for conversion to obtain a first set of digital values and a second set of digital values;
the first group of digital quantities and the second group of digital quantities are decoded by the microprocessor to obtain a second angle signal, and then the microprocessor operates according to the second angle signal.
6. The decode and redundancy system according to claim 3, wherein said sensor receives said first excitation signal and outputs a feedback signal, or said sensor receives said second excitation signal and outputs a feedback signal, and said sensor inputs said feedback signal into said first conditioning circuit for processing;
and the feedback signal is transmitted to the decoding chip for decoding after being processed by the first conditioning circuit.
7. The decode and redundancy system of claim 6, wherein said decode chip is electrically connected to said microprocessor;
after being processed in the first conditioning circuit, the feedback signal is input into the decoding chip for decoding, so that a first angle signal is generated, and the microprocessor receives the first angle signal generated by the decoding chip, so that the microprocessor operates according to the first angle signal.
8. The decoding redundancy system of claim 5, wherein the microprocessor comprises a first transform module, a second transform module, a third transform module, a first subtractor, a second subtractor, an angle tracking adjuster, and a low pass filter;
the input ends of the first conversion module and the second conversion module receive a first signal and a second signal, wherein the first signal is a digital difference calculated by the first group of digital quantities, and the second signal is a digital difference calculated by the second group of digital quantities;
the first conversion module is electrically connected with the second conversion module and the first subtracter respectively; the signal output by the first conversion module is input to the first subtracter for processing;
the low-pass filter is respectively and electrically connected with the second conversion module and the third conversion module; the signal output by the second conversion module is input to the low-pass filter for processing; the signal output by the low-pass filter is input to the first subtracter for processing and the third conversion module for processing;
the second subtracter is respectively and electrically connected with the angle tracking regulator and the first subtracter; the signal output by the first subtracter is input to the second subtracter for processing; the signal output by the third conversion module is input to the second subtracter for processing; and the signal output by the second subtracter is input to the angle tracking regulator for processing, so as to generate a second angle signal.
9. A decoding method applied to the decoding redundancy system of any one of claims 1 to 8, the decoding method comprising:
when the decoding redundancy system is in a normal state, decoding is carried out by a decoding chip to generate a first angle signal, the microprocessor further operates according to the first angle signal, and a motor controller outputs a motor control signal according to the first angle signal;
when the decoding redundant system is in an abnormal state, the microprocessor sends out a switch control signal and transmits the switch control signal to a multi-way switch, and then the multi-way switch converts a generation source of an excitation signal from the decoding chip to the microprocessor; and then decoding by the microprocessor to generate a second angle signal, and then the microprocessor operates according to the first angle signal, and the motor controller outputs a motor control signal according to the second angle signal.
10. The decoding method according to claim 9, wherein the microprocessor receives the first angle signal through wired or wireless communication, and when a fault flag occurs in a signal frame of the communication, the microprocessor sends a switch control signal to the multi-way switch, and the multi-way switch is further converted to receive an excitation signal generated by the microprocessor.
11. A computer readable storage medium, characterized in that the computer readable storage medium comprises a computer program, when the computer program performs the decoding method according to any of claims 9 to 10 in a decoding redundancy system.
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| CN107332565A (en) * | 2017-08-10 | 2017-11-07 | 上海金脉电子科技有限公司 | Rotation based on DSADC becomes software decoding system and method |
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| WO2021073139A1 (en) * | 2019-10-14 | 2021-04-22 | 中车永济电机有限公司 | Self-detection system for connection lines of rotary transformer |
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| CN102854814A (en) * | 2012-04-28 | 2013-01-02 | 中国航天科技集团公司烽火机械厂 | Digital steering engine controller |
| CN107332565A (en) * | 2017-08-10 | 2017-11-07 | 上海金脉电子科技有限公司 | Rotation based on DSADC becomes software decoding system and method |
| CN111181559A (en) * | 2019-10-10 | 2020-05-19 | 中国第一汽车股份有限公司 | Rotary soft decoding method, device, equipment and storage medium |
| WO2021073139A1 (en) * | 2019-10-14 | 2021-04-22 | 中车永济电机有限公司 | Self-detection system for connection lines of rotary transformer |
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