CN114362720A - Single-ended to differential circuit structure - Google Patents
Single-ended to differential circuit structure Download PDFInfo
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- CN114362720A CN114362720A CN202111513633.9A CN202111513633A CN114362720A CN 114362720 A CN114362720 A CN 114362720A CN 202111513633 A CN202111513633 A CN 202111513633A CN 114362720 A CN114362720 A CN 114362720A
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Abstract
The application relates to a space detection load technical field specifically, relates to a single-ended to differential circuit structure, including signal input end, first reference input end, second reference input end, first operational amplifier circuit and second operational amplifier circuit, wherein: the input end of the first operational amplifier circuit is respectively connected with the signal input end and the first reference input end; the input end of the second operational amplifier circuit is respectively connected with the second reference input end and the output end of the first operational amplifier circuit. The differential circuit has the advantages that the function of converting a single end into a differential is realized by adopting the low-noise and zero-drift chopping operational amplifier and the precise reference voltage source, the structure is simple, the development period is short, the application of devices is mature, the reliability is high, the stable function of converting the single end into the differential can be realized only by ensuring the stable input of reference voltage, in addition, the operational amplifier adopted in the differential circuit has lower 1/f noise, the reference voltage also has the performances of ultralow temperature drift, low noise and the like, and the differential signal with low noise and low temperature drift can be generated.
Description
Technical Field
The application relates to the technical field of space detection loads, in particular to a single-ended-to-differential circuit structure.
Background
Compared with a single-ended signal, the differential signal has strong anti-interference capability, can effectively inhibit external electromagnetic interference, and has accurate time sequence positioning, so that differential transmission is required to be used in signal transmission with higher performance requirements, and an ADC (analog to digital converter) driving circuit uses differential signal transmission in a microgravity measurement system.
In the microgravity measurement system, a capacitance displacement signal of a sensor is amplified, filtered, phase-sensitive demodulated and the like by a front-stage circuit and transmitted to a rear-stage capacitance displacement acquisition circuit, and the acquired capacitance displacement signal is calculated and processed by an ADC (analog-to-digital converter) acquisition circuit. In order to ensure a large dynamic range in the microgravity measurement system, a certain 24-bit ADC manufactured by ADI corporation is used as a capacitance displacement acquisition chip, and the 24-bit ADC is a fully differential input drive type ADC. Therefore, it is necessary to convert the single-ended form of the capacitance displacement detection signal into a differential signal that can be used by the ADC chip.
The space microgravity measurement system mainly measures extremely low-frequency space disturbance, so the low-frequency performance requirement of the measurement system is high, and the noise of the measurement system is required to be 10E-5The system noise in the range of Hz-0.01 Hz is lower than 10uV/Hz1/2. Therefore, in the design of the space microgravity measurement system, the suppression of the low-frequency noise of the circuit needs to be considered particularly, on one hand, some low-frequency noise suppression technologies can be applied to suppress the low-frequency noise of the circuit, on the other hand, some devices with excellent low-frequency noise performance can be adopted, and in the invention, the single-ended-to-differential conversion circuit is designed mainly by using a chopped operational amplifier with low-frequency noise.
In addition, the existing space microgravity measurement system is a key load measurement system of a certain spacecraft, in the civil field at present, a single-ended-to-differential chip is mostly adopted to convert a single-ended signal into a differential signal, in the development of aerospace products, the application of multiple chips can bring huge cost for the development of the products, and the reliability cannot be guaranteed.
Disclosure of Invention
The present application is directed to a single-ended to differential circuit structure, which uses a high-level chopping operational amplifier and a precision reference voltage source used in an existing space microgravity measurement system to implement a function of single-ended to differential conversion.
In order to achieve the above object, the present application provides a single-ended to differential circuit structure, which includes a signal input terminal, a first reference input terminal, a second reference input terminal, a first operational amplifier circuit, and a second operational amplifier circuit, wherein: the input end of the first operational amplifier circuit is respectively connected with the signal input end and the first reference input end; the input end of the second operational amplifier circuit is respectively connected with the second reference input end and the output end of the first operational amplifier circuit.
Further, the first operational amplifier circuit includes a first operational amplifier, a resistor R1, a resistor R2, a capacitor C2, and a resistor R3, wherein: the signal input end is connected with the input end of the resistor R1; the inverting input end of the first operational amplifier is connected with the resistor R1, and the non-inverting input end of the first operational amplifier is connected with the first reference input end; the input end of the resistor R2 is connected with the input end of the capacitor C2 and is connected with the inverting input end of the first operational amplifier, and the output end of the resistor R2 is connected with the output end of the resistor R3; the input end of the capacitor C2 is connected with the inverting input end of the first operational amplifier, the output end of the capacitor C2 is connected with the output end of the first operational amplifier, and the input end of the resistor R3 is connected; the output of the resistor R3 is connected on the one hand to the input of the resistor R4 and on the other hand is used to output a negative output signal of the differential signal.
Further, the second operational amplifier circuit includes a second operational amplifier, a resistor R4, a resistor R5, a capacitor C3, and a resistor R6, wherein: the output end of the first operational amplifier circuit is connected with the input end of the resistor R4; the inverting input end of the second operational amplifier is connected with the resistor R4, and the non-inverting input end of the second operational amplifier is connected with the second reference input end; the input end of the resistor R5 is connected with the input end of the capacitor C3 and the inverting input end of the second operational amplifier, and the output end of the resistor R5 is connected with the output end of the resistor R6; the input end of the capacitor C3 is connected with the inverting input end of the second operational amplifier, and the output end of the capacitor C3 is connected with the output end of the second operational amplifier and the input end of the resistor R6; the output terminal of the resistor R6 is used to output a positive output signal of the differential signal.
Furthermore, the circuit also comprises a capacitor C1, wherein one end of the capacitor C1 is connected with the first reference input end, and the other end is grounded.
Furthermore, the circuit also comprises a capacitor C4, wherein one end of the capacitor C4 is connected with the second reference input end, and the other end is grounded.
Further, the first reference input end and the second reference input end are both reference voltages obtained by dividing voltage of the reference voltage source through resistors.
Furthermore, the first operational amplifier and the second operational amplifier are a double operational amplifier single chip.
Furthermore, the power supply of the double operational amplifier single chip adopts single-ended power supply.
The single-ended-to-differential circuit structure provided by the invention has the following beneficial effects:
the differential function of single-end conversion is realized by using low noise, zero drift chopping operational amplifier and a precise reference voltage source in the existing space microgravity measuring system, the structure is simple, the development period is short, the device is mature in application and high in reliability, the stable differential function of single-end conversion can be realized only by ensuring stable reference voltage input, in addition, the operational amplifier adopted in the invention has lower 1/f noise, the reference voltage also has the performances of ultralow temperature drift, low noise and the like, and the differential signal with low noise and low temperature drift can be generated.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, serve to provide a further understanding of the application and to enable other features, objects, and advantages of the application to be more apparent. The drawings and their description illustrate the embodiments of the invention and do not limit it. In the drawings:
fig. 1 is a schematic diagram of a single-ended to differential circuit structure provided in accordance with an embodiment of the present application;
FIG. 2 is a circuit schematic of a reference voltage provided according to an embodiment of the present application;
in the figure: 1-signal input, 2-first reference input, 3-second reference input, 4-first operational amplifier, 5-second operational amplifier, positive output signal of 6-differential signal, negative output signal of 7-differential signal.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1, the present application provides a single-ended to differential circuit structure, which includes a signal input terminal 1, a first reference input terminal 2, a second reference input terminal 3, a first operational amplifier circuit, and a second operational amplifier circuit, wherein: the input end of the first operational amplifier circuit is respectively connected with the signal input end 1 and the first reference input end 2; the input end of the second operational amplifier circuit is respectively connected with the second reference input end 3 and the output end of the first operational amplifier circuit.
Specifically, in the single-ended to differential circuit structure provided in the embodiment of the present application, 2 self-stabilizing zero-chopper type operational amplifiers are used as a main chip to convert an input single-ended signal into two paths of output differential signals, where a negative input signal of a differential analog input of an ADC chip is generated by feedback amplification of a first operational amplifier circuit and is used as an input signal of a second operational amplifier circuit, and a positive input signal of the differential analog input of the ADC chip is generated by feedback amplification of the second operational amplifier circuit. The non-inverting input end of the two-stage operational amplifier is input by using reference voltage, the reference voltage is generated by dividing low-temperature drift and low-noise precision reference voltage by resistors, two capacitors are connected to the non-inverting end in a grounding mode, the grounding capacitor of the non-inverting end can filter noise of a divider network resistor, and the anti-interference capability of a single-end-to-differential circuit is enhanced. Meanwhile, the operational amplifiers adopted in the circuit are all chopped mode operational amplifiers, so that the feedback rings of the two operational amplifiers adopt resistors and capacitors to perform phase margin compensation, and the stability of the single-end-to-differential circuit is improved.
Further, the first operational amplifier circuit includes the first operational amplifier 4, a resistor R1, a resistor R2, a capacitor C2, and a resistor R3, wherein: the signal input end 1 is connected with the input end of the resistor R1; the inverting input end of the first operational amplifier 4 is connected with the resistor R1, and the non-inverting input end is connected with the first reference input end 2; the input end of the resistor R2 is connected with the input end of the capacitor C2 and is connected with the inverting input end of the first operational amplifier 4, and the output end of the resistor R2 is connected with the output end of the resistor R3; the input end of the capacitor C2 is connected with the inverting input end of the first operational amplifier 4, the output end of the capacitor C2 is connected with the output end of the first operational amplifier 4, and the input end of the resistor R3 is connected; the output of the resistor R3 is connected on the one hand to the input of the resistor R4 and on the other hand is used to output the negative output signal 7 of the differential signal. The first operational amplifier circuit is mainly used for feedback amplification to generate a negative input signal of differential analog input of the ADC chip and is used as an input signal of the second operational amplifier circuit, the resistor R1 is preferably a gain configuration resistor with a large resistance value to avoid generating large reverse output current on the gain configuration resistor when the input signal is negative, so that output error of the single-end to differential circuit is caused, the resistor R2 is also preferably a gain configuration resistor with a large resistance value, and the resistor R3 and the capacitor C2 are mainly used for phase margin compensation of the first operational amplifier 4 to improve stability of chopping operational amplifier during operation.
Further, the second operational amplifier circuit includes a second operational amplifier 5, a resistor R4, a resistor R5, a capacitor C3, and a resistor R6, wherein: the output end of the first operational amplifier circuit is connected with the input end of the resistor R4; the inverting input end of the second operational amplifier 5 is connected with the resistor R4, and the non-inverting input end is connected with the second reference input end 3; the input end of the resistor R5 is connected with the input end of the capacitor C3 and is connected with the inverting input end of the second operational amplifier 5, and the output end of the resistor R5 is connected with the output end of the resistor R6; an input terminal of the capacitor C3 is connected to an inverting input terminal of the second operational amplifier 5, and an output terminal of the capacitor C3 is connected to an output terminal of the second operational amplifier 5 and an input terminal of the resistor R6. The output terminal of the resistor R6 is used to output the positive output signal 6 of the differential signal. The second operational amplifier circuit is mainly used for generating a positive input signal of the differential analog input of the ADC chip through feedback amplification, the resistor R4 and the resistor R5 are gain configuration resistors, and the resistor R6 and the capacitor C3 are mainly used for phase margin compensation of the second operational amplifier 5, so that the stability of the chopping operational amplifier during working is improved.
Further, the circuit also comprises a capacitor C1, one end of the capacitor C1 is connected to the first reference input terminal 2, and the other end is grounded. The capacitor C1 is mainly used for filtering noise of the voltage division network resistor of the first reference input end 2 and enhancing the anti-interference capability of the single-end-to-differential circuit.
Further, the circuit also comprises a capacitor C4, wherein one end of the capacitor C4 is connected with the second reference input terminal 3, and the other end is grounded. The capacitor C4 is mainly used for filtering noise of a voltage division network resistor of the second reference input end 3 and enhancing the anti-interference capability of the single-end-to-differential circuit.
Further, the first reference input terminal 2 and the second reference input terminal 3 are both reference voltages obtained by dividing voltage of a reference voltage source through resistors. In the embodiment of the present application, the reference voltage circuit is shown in fig. 2, and the reference voltage input is defined as Vref, the reference voltage at the first reference input terminal 2 is Vref1, and the reference voltage at the second reference input terminal 3 is Vref 2. The reference voltage is 5V, the reference voltage Vref1 (1/3) Vref 1.667V, and the reference voltage Vref2 (1/2) Vref 2.5V, as known from the manual of ADC conversion chips, where the resistors RA, RB, RC, RD, and RE are all low-temperature-drift precision alloy foil resistors.
Further, the first operational amplifier 4 and the second operational amplifier 5 are a dual operational amplifier single chip. The operational amplifier uses a chopped operational amplifier chip, can realize ultra-low offset, zero drift and rail-to-rail input, can effectively reduce input errors caused by offset of devices, and has extremely low-frequency noise.
Furthermore, the power supply of the double operational amplifier single chip adopts single-ended power supply. The power supply of the chip uses single-end +5V for power supply.
Specifically, in one embodiment of the present application, it can be defined that the input signal of the signal input terminal 1 is Vin, the reference voltage of the first reference input terminal 2 is Vref1, the reference voltage of the second reference input terminal 3 is Vref2, the positive output signal 6 of the differential signal is Vin +, and the negative output signal 7 of the differential signal is Vin-.
Wherein:
(Vin+)+(Vin-)＝Vref
(Vin+)-(Vin-)＝Vin
the circuit can obtain:
wherein:
the calculation can yield:
R4＝R5
R1＝2R2
let R4 ═ R5 ═ 1 k.
When values of R1 and R2 are taken, it is particularly noted that in the microgravity measurement system, a single-ended input signal of the single-ended to differential circuit is filtered by a previous active low-pass filter, and the low-pass filter also adopts a method of in-loop phase margin compensation, when the input signal is a negative value, since a reference voltage of the first reference input terminal 2 is 1.667V, there is a problem of impedance matching, at this time, if a resistance value of the input resistor R1 is small, a resistor of the previous low-pass filter used for in-loop phase margin compensation may generate a voltage division effect on the input signal, resulting in attenuation of the input signal, so that when selecting a gain configuration resistor in the first operational amplifier circuit, a gain configuration resistor with a large resistance value needs to be used, in this embodiment, R1 is selected to be 20k, and R2 is selected to be 10 k. When the preceding stage low pass filter has no phase margin compensation resistor, this problem is not taken into account.
The filter capacitors at the reference voltage input ends of the first operational amplifier 4 and the second operational amplifier 5 are both 300pF capacitors, which are used for improving the anti-interference performance of the single-ended to differential circuit, and in addition, the in-loop phase margin compensation capacitor C2 is equal to C3 which is equal to 300pF, and the resistor R3 is equal to R6 which is equal to 100 Ω.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (8)
1. A single-ended to differential circuit structure, comprising a signal input terminal, a first reference input terminal, a second reference input terminal, a first operational amplifier circuit and a second operational amplifier circuit, wherein:
the input end of the first operational amplifier circuit is respectively connected with the signal input end and the first reference input end;
and the input end of the second operational amplification circuit is respectively connected with the second reference input end and the output end of the first operational amplification circuit.
2. The single-ended to differential circuit structure of claim 1, wherein said first operational amplification circuit comprises a first operational amplifier, a resistor R1, a resistor R2, a capacitor C2, and a resistor R3, wherein:
the signal input end is connected with the input end of the resistor R1;
the inverting input end of the first operational amplifier is connected with the resistor R1, and the non-inverting input end of the first operational amplifier is connected with the first reference input end;
the input end of the resistor R2 is connected with the input end of a capacitor C2 and is connected with the inverting input end of the first operational amplifier, and the output end of the resistor R2 is connected with the output end of the resistor R3;
the input end of the capacitor C2 is connected with the inverting input end of the first operational amplifier, the output end of the capacitor C2 is connected with the output end of the first operational amplifier, and the input end of the resistor R3 is connected;
the output end of the resistor R3 is connected to the input end of the resistor R4, and is used for outputting a negative output signal of the differential signal.
3. The single-ended to differential circuit structure of claim 2, wherein said second operational amplification circuit comprises a second operational amplifier, a resistor R4, a resistor R5, a capacitor C3, and a resistor R6, wherein:
the output end of the first operational amplifier circuit is connected with the input end of the resistor R4;
the inverting input end of the second operational amplifier is connected with the resistor R4, and the non-inverting input end of the second operational amplifier is connected with the second reference input end;
the input end of the resistor R5 is connected with the input end of a capacitor C3 and is connected with the inverting input end of the second operational amplifier, and the output end of the resistor R5 is connected with the output end of the resistor R6;
the input end of the capacitor C3 is connected with the inverting input end of the second operational amplifier, and the output end of the capacitor C3 is connected with the output end of the second operational amplifier and the input end of the resistor R6;
the output end of the resistor R6 is used for outputting a positive output signal of the differential signal.
4. The single-ended to differential circuit structure of claim 2, further comprising a capacitor C1, wherein one end of said capacitor C1 is connected to said first reference input terminal and the other end is connected to ground.
5. The single-ended to differential circuit structure of claim 3, further comprising a capacitor C4, wherein one end of said capacitor C4 is connected to said second reference input terminal and the other end is connected to ground.
6. The single-ended to differential circuit architecture of claim 1, wherein said first reference input and said second reference input are both reference voltages obtained by dividing a reference voltage source by resistors.
7. The single-ended to differential circuit structure of claim 1, wherein said first operational amplifier and said second operational amplifier are a dual-op-amp single chip.
8. The single-ended to differential circuit architecture of claim 7, wherein said dual op-amp chip is single-ended powered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111513633.9A CN114362720A (en) | 2021-12-10 | 2021-12-10 | Single-ended to differential circuit structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111513633.9A CN114362720A (en) | 2021-12-10 | 2021-12-10 | Single-ended to differential circuit structure |
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| CN114362720A true CN114362720A (en) | 2022-04-15 |
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| CN202111513633.9A Pending CN114362720A (en) | 2021-12-10 | 2021-12-10 | Single-ended to differential circuit structure |
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