CN114361234A - Display module, manufacturing method of display module and electronic equipment - Google Patents

Abstract

The embodiment of the application provides a display module, a display module manufacturing method and electronic equipment, and relates to the technical field of display. In the display module, a bias electrode and a switch unit are arranged between adjacent light-emitting units, and the bias electrode is connected with a signal lead wire for providing a bias voltage signal through the switch unit; the switch unit can be conducted when any one of the corresponding adjacent light-emitting units is lightened, so that the bias electrode can inhibit the transverse movement of the current carriers in the common layer between the corresponding adjacent light-emitting units based on an electric field formed by the bias voltage signal and the second electrode. In addition, the switch unit is conducted only when any one of the corresponding adjacent light-emitting units is lightened, so that the power consumption of the display module can be reduced.

Description

Display module, manufacturing method of display module and electronic equipment

Technical Field

The application relates to the technical field of display, in particular to a display module, a display module manufacturing method and electronic equipment.

Background

When the display module displays a monochrome image (e.g., a green image), the sub-pixels (e.g., red sub-pixels) surrounding the green sub-pixels may emit light slightly, which may cause poor crosstalk and affect the display performance of the display module.

Disclosure of Invention

In order to overcome the technical problems mentioned in the above technical background, embodiments of the present application provide a display module, a method for manufacturing the display module, and an electronic device.

In a first aspect of the present application, a display module is provided, which includes an array substrate and a plurality of light emitting units disposed on the array substrate, where each light emitting unit includes a first electrode, a second electrode, and a common layer and a light emitting layer located between the first electrode and the second electrode, and the plurality of light emitting units share the same common layer and the second electrode;

the display module further comprises a bias electrode and a switch unit, wherein the bias electrode and the switch unit are arranged between the adjacent light-emitting units, the bias electrode is arranged on the array substrate, and the bias electrode is connected with a signal lead wire for providing a bias voltage signal through the switch unit;

the switch unit is turned on when any one of the corresponding adjacent light emitting units is lighted, and the bias electrode and the second electrode form a restraining electric field for restraining carriers in the common layer from moving transversely between the corresponding adjacent light emitting units through the bias voltage signal.

In the above structure, a bias electrode and a switching unit are provided between adjacent light emitting units, and the bias electrode is connected to a signal lead for supplying a bias voltage signal through the switching unit; the switch unit can be conducted when any one of the corresponding adjacent light-emitting units is lighted, so that the bias electrode can inhibit the transverse movement of the carriers in the common layer between the corresponding adjacent light-emitting units based on an electric field formed by the bias voltage signal and the second electrode, the poor crosstalk caused by the transverse movement of the carriers in the common layer is avoided, and the display performance of the display module is improved.

In one possible embodiment of the present application, the bias electrode is in conduction with the common layer;

preferably, the bias electrode is in contact with the common layer;

preferably, the bias electrode is positioned between adjacent light emitting cells of different colors.

In one possible embodiment of the present application, a pixel defining layer is disposed on the array substrate, the pixel defining layer defining a pixel opening on the array substrate for accommodating a light emitting layer in the light emitting unit;

the pixel limiting layer positioned between the adjacent light-emitting units is provided with a gap, and the common layer positioned between the adjacent light-emitting units is conducted with the bias electrode through the gap;

preferably, the size of the notch is smaller than or equal to the size of the pixel opening.

In one possible embodiment of the present application, the array substrate includes a pixel driving layer and a planarization layer on the pixel driving layer;

the bias electrode is located between the pixel defining layer and the planarization layer or in a gap of the pixel defining layer;

the switch unit and a signal lead wire for providing the bias voltage signal are positioned in the array substrate, and one end of the switch unit is electrically connected with the signal lead wire;

the other end of the switch unit is electrically connected with the bias electrode through a planarization layer through hole;

preferably, the planarization layer includes a first planarization layer and a second planarization layer sequentially stacked on the pixel driving layer, the switch unit is located on a side of the first planarization layer away from the pixel driving layer, and the switch unit is connected to the bias electrode through the second planarization layer via hole;

preferably, the signal lead is made of any metal layer in the array substrate;

preferably, the signal lead is located in the planarization layer and on a side of the first planarization layer away from the pixel driving layer.

In one possible embodiment of the present application, the bias electrode is a transparent electrode;

preferably, the bias electrode is made of an indium tin oxide material.

In one possible embodiment of the present application, the switch unit is a photodiode, an anode terminal of the photodiode is connected to the signal lead, and a cathode terminal of the photodiode is connected to the bias electrode.

In one possible embodiment of the present application, the light emitting unit is a single-layer OLED light emitting device;

the common layer includes at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, which are sequentially stacked.

In one possible embodiment of the present application, the light emitting unit is a multi-layer OLED light emitting device, the light emitting unit includes a plurality of the light emitting layers;

the common layer includes at least one of a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer, which are sequentially stacked.

Preferably, the number of layers of the charge generation layer is at least one;

in a second aspect of the present application, a method for manufacturing a display module is provided, the method including:

manufacturing an array substrate, wherein the array substrate comprises a bias electrode, a switch unit and a signal lead wire for providing a bias voltage signal, and the bias electrode is connected with the signal lead wire through the switch unit;

manufacturing a plurality of light emitting units on the array substrate, wherein each light emitting unit comprises a first electrode, a common layer, a light emitting layer and a second electrode, the plurality of light emitting units share the same common layer and the second electrode, the bias electrode is positioned between the adjacent light emitting units, the switch unit is conducted when any one of the corresponding adjacent light emitting units is lighted, and the bias electrode and the second electrode form a restraining electric field for restraining carriers in the common layer from moving transversely between the corresponding adjacent light emitting units through the bias voltage signal;

preferably, the step of fabricating an array substrate includes:

manufacturing a pixel driving layer;

manufacturing a first planarization layer on the pixel driving layer;

manufacturing the signal lead on one side of the first planarization layer far away from the pixel driving layer;

manufacturing a switch unit with one end conducted with the signal lead on one side of the first planarization layer away from the pixel driving layer;

manufacturing a second planarization layer on the first planarization layer and the switch unit;

fabricating a planarization layer via hole on the second planarization layer to expose the other end of the switching unit;

and manufacturing the bias electrode on one side of the second planarization layer, which is far away from the first planarization layer, and connecting the bias electrode with the other end of the switch unit through the planarization layer via hole.

In a third aspect of the present application, an electronic device is provided, which includes the display module of the first aspect.

Compared with the prior art, the embodiment of the application provides a display module, a display module manufacturing method and electronic equipment, in the display module, a bias electrode and a switch unit are arranged between adjacent light-emitting units, and the bias electrode is connected with a signal lead wire for providing a bias voltage signal through the switch unit; the switching unit may be turned on when any one of the corresponding adjacent light emitting units is lit, so that the bias electrode may suppress lateral movement of carriers between the corresponding adjacent light emitting units in the common layer based on an electric field formed by the bias voltage signal and the second electrode. Compared with the prior art, the display module does not need to improve the composition material or the film structure of the common layer, can avoid bad crosstalk caused by the transverse movement of current carriers in the common layer, and improves the display performance of the display module. In addition, the switch unit is conducted only when any one of the corresponding adjacent light-emitting units is lightened, so that the power consumption of the display module can be reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a schematic view of a partial film structure of a display module according to an embodiment of the present disclosure;

fig. 2 is a schematic equivalent circuit diagram of a technical solution provided by an embodiment of the present application;

fig. 3 is a second schematic view illustrating a partial film structure of a display module according to an embodiment of the present disclosure;

FIG. 4 is a diagram illustrating a detailed structure of a display module according to the prior art;

fig. 5 is a schematic view illustrating a specific film structure of a display module according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of an equivalent driving circuit of adjacent light emitting units according to an embodiment of the present disclosure;

fig. 7 is a second schematic view illustrating a specific film structure of a display module according to an embodiment of the present disclosure;

fig. 8 is a third schematic view illustrating a specific film structure of a display module according to an embodiment of the present disclosure;

fig. 9 is a schematic flow chart illustrating a method for manufacturing a display module according to an embodiment of the present disclosure;

fig. 10 is a process diagram of the array substrate according to the embodiment of the present disclosure.

Icon: 10-a display module; 110-an array substrate; 1101-a substrate layer; 1102-a buffer layer; 1103 — pixel drive layer; 11031-an active layer; 11032-gate insulation layer; 11033-gate; 11034-source electrode; 11035-drain electrode; 11036 — first insulating layer; 11037-second insulating layer; 11038-a third electrode; 11039-a fourth electrode; 1104-a planarization layer; 11041-first planarizing layer; 11042-second planarization layer; 12-a light emitting device layer; 120-a light emitting unit; 1201-an anode film layer; 1202-a cathode film layer; 1204-a pixel definition layer; 121-a first electrode; 122-a second electrode; 123-common layer; 1231-hole injection layer; 1232-hole transport layer; 1233-electron transport layer; a 1234-electron injection layer; 1235-a charge generation layer; 124-a light emitting layer; 125-charge generation layer; 130-a bias electrode; 140-a switching unit; 150-signal leads.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

In the description of the present application, it should be noted that the terms "upper", "lower", and the like refer to orientations or positional relationships based on orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, are only used for convenience of description and simplification of description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application.

It should be noted that, in case of conflict, different features in the embodiments of the present application may be combined with each other.

The OLED display module uses a large number of light emitting units to emit light to form a display image, generally, the light emitting units in the OLED display module may include red light emitting units (R sub-pixels), green light emitting units (G sub-pixels), and blue light emitting units (B sub-pixels) arranged in an array, and a full-color display image may be realized by the cooperation of the R sub-pixels, the G sub-pixels, and the B sub-pixels. The light-emitting units structurally comprise an anode film layer, a cathode film layer, a light-emitting layer and a common layer, wherein the light-emitting layer and the common layer are located between the anode film layer and the cathode film layer, the R sub-pixel, the G sub-pixel and the B sub-pixel are respectively provided with an independent light-emitting layer for emitting red light, green light and blue light, the common layer and the cathode film layer are shared by all light-emitting units in the OLED display module, and the common layer can comprise a hole injection layer, a hole transport layer, an electron injection layer and the like.

The inventor has found that one of the main causes of the crosstalk failure in the OLED display module mentioned in the foregoing background art is that a film layer (for example, a hole injection layer) with high conductivity exists in a common layer, and taking the red display as an example, when an R sub-pixel is turned on, the hole concentration of a region where the R sub-pixel is located is higher than that of a region where an adjacent G sub-pixel is located, so that holes may laterally diffuse in the hole injection layer, and a lateral current occurs, so that a phenomenon that the adjacent G sub-pixel is excited to emit weak light occurs, and the display crosstalk failure is caused.

In order to solve the above display crosstalk problem, the prior art provides the following two solutions.

In the first technical scheme, materials with poor conductivity are selected to manufacture all film layers in the common layer.

In the second technical scheme, the existing common layer is manufactured into independent film layers corresponding to the R sub-pixel, the G sub-pixel and the B sub-pixel.

The first technical solution causes the driving voltage of the light emitting unit to increase, and increases power consumption. The second technical scheme has two possible implementation modes, wherein the first mode is manufacturing through a mask, and the mode can increase working procedures, reduce manufacturing efficiency and improve manufacturing cost; the second method is to remove the common layer between the adjacent light emitting units on the basis of manufacturing the existing common layer (for example, removing the common layer between the adjacent light emitting units by using ultraviolet light), and the ultraviolet light used in this method may cause damage to the thin film transistor device in the array substrate.

In order to solve the above-mentioned technical problems, embodiments of the present application innovatively design a display module, a method for manufacturing the display module, and an electronic device, in which a bias electrode and a switch unit are disposed between adjacent light emitting units, the switch unit is turned on when any one of the adjacent light emitting units is turned on, and an electric field formed by the bias electrode and a common electrode of the light emitting units suppresses lateral movement of carriers in a common layer between the corresponding adjacent light emitting units. Specific implementations of the present application will be described in detail below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 shows a schematic view of a partial film structure of a display module 10 according to an embodiment of the present disclosure, the display module 10 may include an array substrate 110 and a plurality of light emitting units 120 disposed on the array substrate 110, where each of the light emitting units 120 includes a first electrode 121, a second electrode 122, and a common layer 123 and a light emitting layer 124 disposed between the first electrode 121 and the second electrode 122. The light emitting units 120 in the display module 10 share the common layer 123 and the second electrode 122, and the common layer 123 has conductivity and is used for transporting carriers (including holes and electrons), so that when the first electrode 121 provides a data voltage, the holes and the electrons in the common layer 123 are combined in the light emitting layer 124 through an electric field formed by the first electrode 121 and the second electrode 122, so as to excite the light emitting layer 124 to perform light emitting display.

The display module 10 further includes a bias electrode 130 and a switch unit 140 disposed between the adjacent light emitting units 120, the bias electrode 130 is disposed on the array substrate 110, and the bias electrode 130 is connected to a signal lead 150 providing a bias voltage signal Vbias through the switch unit 140. The distance between the adjacent light emitting units 120 may be the distance between the geometric centers of the light emitting units 120, the adjacent light emitting units 120 may belong to the same pixel or different pixels, and the number of the light emitting units 120 adjacent to a target light emitting unit 120 may be one or more. In this embodiment, the bias voltage signal Vbias may be a constant voltage signal, and the signal lead 150 may be a single lead or may share other leads having the same voltage signal.

Referring to fig. 2, in the present embodiment, the switch unit 140 is turned on when any one of the corresponding adjacent light emitting units 120 is turned on, the bias electrode 130 forms a suppression electric field for suppressing carriers in the common layer 123 from moving laterally between the corresponding adjacent light emitting units 120 through the bias voltage signal Vbias and the second electrode 122, and the carriers in the common layer 123 are moved vertically by the suppression electric field. The switch unit 140 may be controlled to be turned on and off by a control circuit, for example, the control circuit may include a collecting device for collecting an optical signal, and the state of the switch unit 140 is controlled by whether the collecting device collects the optical signal; it is also possible to employ a device having optical characteristics as the switching unit 140 to control the switching unit 140 to be turned on and off according to light emitted from any one of the adjacent light emitting units 120.

In the display module 10 provided above, the bias electrode 130 and the switching unit 140 are provided between the adjacent light emitting cells 120, and the bias electrode 130 is connected to the signal lead 150 that supplies the bias voltage signal Vbias through the switching unit 140; the switch unit 140 may be turned on when any one of the corresponding adjacent light emitting units 120 is turned on, so that the bias electrode 130 may suppress, based on the electric field formed by the bias voltage signal Vbias and the second electrode 122, the lateral movement of the carriers in the common layer 123 between the corresponding adjacent light emitting units 120, and compared with the prior art, there is no need to improve the composition material or the film structure of the common layer 123, that is, it may be possible to avoid the poor crosstalk caused by the lateral movement of the carriers in the common layer 123, and improve the display performance of the display module 10. In addition, the switch unit 140 is turned on only when any one of the corresponding adjacent light emitting units 120 is turned on, so that power consumption of the display module 10 can be reduced.

In the embodiment of the present application, the bias electrode 130 may be conductive or non-conductive with respect to the common layer 123, and when the bias electrode 130 is non-conductive with respect to the common layer 123, an interlayer film layer (e.g., a pixel defining layer) may be disposed between the bias electrode 130 and the common layer 123. When the bias electrode 130 is conducted with the common layer 123, a spacer layer may not be disposed between the bias electrode 130 and the common layer 123, and the bias electrode 130 is in direct contact with the common layer 123; a spacer layer may be provided between the bias electrode 130 and the common layer 123, and the bias electrode 130 and the common layer 123 may be in direct contact at the position of the gap by forming the gap in the spacer layer.

In the embodiment of the present application, when the bias electrode 130 and the common layer 123 are conducted through the gap on the interlayer film layer, the size of the gap is smaller than or equal to the size of the pixel opening, and for example, when the interlayer film layer is a pixel defining layer, the size of the gap is set smaller than the size of the pixel opening, so that the aperture ratio of the pixel opening is not affected.

Referring to fig. 3, fig. 3 shows a second schematic diagram of a partial film structure of the display module 10 according to the second embodiment of the present disclosure, in order to further reduce the power consumption of the display module 10, the common layer 123 between the bias electrode 130 and the second electrode 122 may be respectively conducted with the bias electrode 130 and the second electrode 122. By reducing the distance between the bias electrode 130 and the second electrode 122 in this way, the electric field intensity formed between the bias electrode 130 and the second electrode 122 can be increased without increasing the bias voltage signal Vbias, the ability to suppress lateral movement of carriers in the common layer 123 can be improved, and carriers in the common layer 123 can be extracted from the common layer 123 via the bias electrode 130, the switching element 140, and the signal lead 150. In detail, a notch may be opened in the pixel defining layer at the position of the bias electrode 130, so that the common layer 123 may be directly conducted with the bias electrode 130 through the opened notch.

In the embodiment of the present application, the bias electrode 130 may be disposed between adjacent light emitting cells 120 of different colors to solve a crosstalk problem caused by a lateral movement of carriers in the common layer 123. For example, the bias electrode 130 may be disposed between the adjacent blue light emitting cell and the other color light emitting cell, for example, between the adjacent blue light emitting cell and the red light emitting cell, or between the adjacent blue light emitting cell and the green light emitting cell.

For the convenience of the following description, a specific film structure of the conventional display module 10 is described below, and referring to fig. 4, fig. 4 is a schematic view illustrating the specific film structure of the conventional display module 10.

The display module 10 may include an array substrate 110 and a light emitting device layer 12, wherein the array substrate 110 may include a substrate layer 1101, a buffer layer 1102 and a pixel driving layer 1103.

The substrate layer 1101 may be a glass substrate or a flexible substrate, the buffer layer 1102 is located on one side of the substrate layer 1101, and the pixel driving layer 1103 is located on one side of the buffer layer 1102 away from the substrate layer 1101. In the present embodiment, the buffer layer 1102 may be made of an inorganic material, such as silicon oxide, silicon nitride, silicon oxynitride, etc. In this embodiment, the buffer layer 1102 may have a double-layer structure of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer sequentially formed on the substrate layer 1101.

The pixel driving layer 1103 may include an active layer 11031, a gate insulating layer 11032, a gate electrode 11033, a source electrode 11034, a drain electrode 11035, a first insulating layer 11036, a second insulating layer 11037, and a third electrode 11038 and a fourth electrode 11039 for forming a capacitor.

The active layer 11031 is formed on the buffer layer 1102, the active layer 11031 may be formed of an inorganic semiconductor (e.g., amorphous silicon or polycrystalline silicon), an organic semiconductor, or an oxide semiconductor, and the active layer 11031 may include a source region (S), a drain region (D), and a channel region (p-si).

A gate insulating layer 11032 is formed on the active layer 11031 and the buffer layer 1102, which is not covered with the active layer 11031, so as to insulate the active layer 11031 from the gate electrode 11033. The gate insulating layer 11032 may be made of a material such as silicon oxide or silicon nitride, but is not limited thereto.

A gate electrode 11033 is formed on one side of the gate insulating layer 11032 at a position corresponding to the active layer 11031, and the gate electrode 11033 may be formed using one or more of metal Al, Mo, Cu, Ti, or other low resistivity metal material. Meanwhile, a third electrode 11038 of a capacitor is formed over the gate insulating layer 11032. The third electrode 11038 is formed on the gate insulating layer 11032, the third electrode 11038 and the gate electrode 11033 may be made of the same material, and a first metal layer M1 may be formed on the gate insulating layer 11032, so that the gate electrode 11033 and the third electrode 11038 may be formed on the gate insulating layer 11032 at the same time.

The first insulating layer 11036 is formed over the gate insulating layer 11032 and covers the gate electrode 11033 and the third electrode 11038, and the fourth electrode 11039 is located on a side of the first insulating layer 11036 away from the substrate layer 1101. The first insulating layer 11036 serves to insulate and isolate the gate electrode 11033 from the source electrode 11034 and the drain electrode 11035, and to insulate and isolate the third electrode 11038 from the fourth electrode 11039. The first insulating layer 11036 electrically insulates the gate electrode 11033 from the source electrode 11034 and the drain electrode 11035, respectively, and forms a capacitance between the third electrode 11038 and the fourth electrode 11039. The first insulating layer 11036 may also be formed of an inorganic material such as: silicon nitride and silicon oxide. The fourth electrode 11039 is located in the second metal layer M2 formed over the first insulating layer 11036.

The second insulating layer 11037 is formed on the first insulating layer 11036 and covers the fourth electrode 11039 for isolating the source electrode 11034, the drain electrode 11035 and the fourth electrode 11039, so that the source electrode 11034, the drain electrode 11035 and the fourth electrode 11039 are insulated from each other. The second insulating layer 11037 can also be formed of an inorganic material such as silicon nitride and silicon oxide. The second insulating layer 11037 may have a double-layer structure or a structure of three or more layers formed of silicon nitride and silicon oxide.

A source electrode 11034 and a drain electrode 11035 are formed on the second insulating layer 11037, the source electrode 11034 is electrically connected to a source region (S) in the active layer 11031 through a via hole, and the drain electrode 11035 is electrically connected to a drain region (D) in the active layer 11031 through a via hole. The electrode material of the gate electrode 11033, the source electrode 11034, the drain electrode 11035, the third electrode 11038 and the fourth electrode 11039 may be one or more of metal Al, Mo, Cu, Ti or other metal materials with low resistivity. The source electrode 11034 and the drain electrode 11035 are located in a third metal layer M3 formed on the second insulating layer 11037.

A planarization layer 1104 and a light-emitting device layer 12 on the planarization layer 1104 may also be provided on the side of the pixel driving layer 1103 away from the substrate layer 1101. The driving element includes a TFT (Thin Film Transistor) formed of a gate electrode 11033, a source electrode 11034, a drain electrode 11035, an active layer 11031, and the like.

The light emitting device layer 12 may include an anode film layer 1201, a pixel defining layer 1204, a light emitting layer 124, and a cathode film layer 1202. The anode film layer 1201 is positioned on the array substrate 110, the pixel defining layer 1204 forms a pixel opening on the anode film layer 1201, the light emitting layer 124 is positioned in the pixel opening, and the cathode film layer 1202 is positioned on the side of the light emitting layer 124 away from the array substrate 110.

Specifically, the anode film layer 1201 is positioned on a side of the planarization layer 1104 away from the substrate layer 1101, and the anode film layer 1201 is electrically connected to the drain 11035 of the driving element through the planarization layer via. The pixel defining layer 1204 is located on the planarization layer 1104 and the side of the anode film layer 1201 away from the substrate layer 1101.

In this embodiment, the planarization layer 1104 may include a first planarization layer 11041 and a second planarization layer 11042, a fourth metal layer M4 may be further disposed between the first planarization layer 11041 and the second planarization layer 11042, and the fourth metal layer M4 may connect the drain 11035 of the driving element and the anode film 1201 through a film via of the planarization layer 1104. For example, in fig. 4, the anode film 1201 may be connected to the fourth metal layer M4 through the film via of the second planarization layer 11042, and the fourth metal layer M4 may be connected to the drain 11035 of the driving element in the third metal layer M3 through the film via of the first planarization layer 11041.

In the embodiment of the present application, the first electrode 121 corresponds to the anode film 1201 in fig. 4, and the second electrode 122 corresponds to the cathode film 1202 in fig. 4.

Referring to fig. 5, further, the switch unit 140 and the signal lead 150 providing the bias voltage signal Vbias may be located in the array substrate 110, for example, the switch unit 140 and the signal lead 150 may be located in the planarization layer 1104 or between the planarization layer 1104 and the pixel defining layer 1204, one end of the switch unit 140 is electrically connected to the signal lead 150, and the other end of the switch unit 140 is electrically connected to the bias electrode 130 through a planarization layer via. For example, the signal lead 150 may be made of the fourth metal layer M4 on the first planarization layer 11041, the switching unit 140 may be made on the signal lead 150, and the switching unit 140 may be electrically connected to the bias electrode 130 through a via hole on the second planarization layer 11042. It is understood that in other embodiments of the present application, the signal lead 150 may be made of any one of the first metal layer M1, the second metal layer M2 and the third metal layer M3 in fig. 4.

In the embodiment of the present application, further, the bias electrode 130 may be a transparent electrode or a non-transparent electrode, preferably, the bias electrode 130 is a transparent electrode, and the bias electrode 130 may be made of an indium tin oxide material. The light emitted from the light emitting unit 120 can be reflected and transmitted through the bias electrode 130 by setting the bias electrode 130 as a light transmitting electrode, so that the control circuit switches the on and off states of the switching unit 140 according to the received light signal. Illustratively, the bias electrode 130 may be located between the planarization layer 1104 and the pixel defining layer 1204, or in a gap of the pixel defining layer 1204.

Further, the switching unit 140 may be a photodiode, an anode terminal of which is connected to the signal lead 150, and a cathode terminal of which is connected to the bias electrode 130. Adopt the photosensitive diode can directly carry out the switching of switch on and off state based on the light signal that receives, need not to increase extra control circuit, so can save the cost of manufacture, in addition, introduce the photosensitive diode and also do benefit to the integration of optics fingerprint identification function in display module assembly 10. Referring to fig. 6, fig. 6 illustrates an equivalent driving circuit diagram of the adjacent light emitting units 120 when the switch unit 140 is a photodiode PD, as shown in the figure, a cathode terminal of the photodiode PD is connected between anode terminals of two OLED devices, when any one OLED device emits light, the photodiode PD is turned on, and the connection between the anode terminals of the two OLED devices can be disconnected by an electric field formed by the bias voltage signal Vbias and the second electrode 122, so that a lateral current formed between the anode terminals of the adjacent light emitting units 120 due to uneven carrier concentration after the light emitting units 120 are turned on can be avoided.

Referring to fig. 5 again, in an implementation manner of the embodiment of the present disclosure, the light emitting unit 120 may be a single-layer OLED light emitting device, the common layer 123 may include a hole injection layer 1231, a hole transport layer 1232, an electron transport layer 1233, and an electron injection layer 1234 that are stacked, and in the light emitting unit 120, the first electrode 121, the hole injection layer 1231, the hole transport layer 1232, the light emitting layer 124, the electron transport layer 1233, the electron injection layer 1234, and the second electrode 122 are stacked. Between the adjacent light emitting cells 120, the lateral diffusion of carriers in the common layer 123 between the adjacent light emitting cells 120 may be suppressed by the electric field formed by the second electrode 122 and the bias electrode 130.

In another embodiment of the present disclosure, the light emitting unit 120 may be a multi-Layer OLED light emitting device, the light emitting unit 120 may have a plurality of light emitting layers 124, the common Layer 123 may include a hole injection Layer 1231, a hole transport Layer 1232, a Charge Generation Layer (CGL) 1235, an electron transport Layer 1233, and an electron injection Layer 1234, which are stacked, the number of the Charge generation Layer 1235 between the hole transport Layer 1232 and the electron transport Layer 1233 is at least one, wherein the charge generation layer 1235 can generate electrons and holes, and the generated electrons and holes are combined with the holes injected from the first electrode 121 and the electrons injected from the second electrode 122, respectively, in the light emitting layer 124 to emit light, that is, the charge generation layer 1235 has good conductive performance, and there is a problem that carriers are laterally diffused when any one of the adjacent light emitting cells 120 is turned on. In this way, in the light emitting unit 120 of the multi-layer OLED light emitting device in this embodiment, when any one of the adjacent light emitting units 120 emits light, the switch unit 140 is turned on, so that the electric field formed between the bias electrode 130 and the second electrode 122 can effectively suppress the lateral diffusion of carriers in the charge generation layer 1235, thereby avoiding the display crosstalk problem.

For example, in this embodiment, when the light emitting unit 120 is a two-layer OLED light emitting device, referring to fig. 7, the light emitting unit 120 may have two light emitting layers 124, the number of the charge generating layers 1235 between the hole transporting layer 1232 and the electron transporting layer 1233 is one, and in the light emitting unit 120, the two light emitting layers 124 are respectively located between the hole transporting layer 1232 and the charge generating layer 1235 near the hole transporting layer 1232 and between the charge generating layer 1235 near the electron transporting layer 1233 and the electron transporting layer 1233. When the light emitting unit 120 is a three-layer OLED light emitting device, referring to fig. 8, the light emitting unit 120 may have three light emitting layers 124, the number of the charge generating layers 1235 between the hole transporting layer 1232 and the electron transporting layer 1233 is two, and in the light emitting unit 120, the three light emitting layers 124 are respectively located between the hole transporting layer 1232 and the charge generating layer 1235 adjacent to the hole transporting layer 1232, between the adjacent charge generating layers 1235, and between the charge generating layer 1235 adjacent to the electron transporting layer 1233 and the electron transporting layer 1233.

Referring to fig. 9, fig. 9 is a schematic flow step diagram illustrating a manufacturing method of the display module 10, and the following introduces the manufacturing method of the display module 10 with reference to the schematic flow step diagram.

In step S11, an array substrate 110 is fabricated.

The array substrate 110 manufactured in this step includes a bias electrode 130, a switching unit 140, and a signal lead 150 for providing a bias voltage signal Vbias, where the bias electrode 130 is connected to the signal lead 150 through the switching unit 140.

Referring to the process diagram of the array substrate 110 shown in fig. 10, in the embodiment of the present invention, the step S11 can be made as follows.

First, the pixel driving layer 1103 is fabricated.

The substrate layer 1101 and the buffer layer 1102 may also be formed before the pixel driving layer 1103 is formed.

Next, a first planarizing layer 11041 is formed over the pixel driving layer 1103.

Next, a signal lead 150 is formed on a side of the first planarization layer 11041 away from the pixel driving layer 1103.

In the embodiment of the present application, the signal lead 150 may be made of the fourth metal layer M4.

Next, a switch unit 140 having one end electrically connected to the signal lead 150 is formed on a side of the first planarization layer 11041 away from the pixel driving layer 1103.

In the embodiment of the present application, the switching unit 140 may be located on the signal lead 150, and one end of the switching unit 140 contacts the signal lead 150.

Next, a second planarizing layer 11042 is formed over the first planarizing layer 11041 and the switching element 140.

Then, a planarization layer via hole is fabricated on the second planarization layer 11042 to expose the other end of the switching unit 140;

finally, a bias electrode 130 is formed on the second planarization layer 11042 on the side away from the first planarization layer 11041, and the bias electrode 130 is connected to the other end of the switching unit 140 through a planarization layer via.

In step S12, a plurality of light emitting cells 120 are fabricated on the array substrate 110.

In this step, the light emitting units 120 include a first electrode 121, a common layer 123, a light emitting layer 124, and a second electrode 122, the plurality of light emitting units 120 share the common layer 123 and the second electrode 122, the bias electrode 130 is located between adjacent light emitting units 120, the switching unit 140 is turned on when any one of the corresponding adjacent light emitting units 120 is turned on, and the bias electrode 130 forms a suppression electric field for suppressing carriers in the common layer 123 from moving laterally between the corresponding adjacent light emitting units 120 with the second electrode 122 by the bias voltage signal Vbias.

The process of fabricating the light emitting unit 120 in this step is the same as the prior art, and is not described again.

The embodiment of the present application further provides an electronic device, the electronic device may include the foregoing display module 10, and the electronic device using the display module 10 has the characteristics of low crosstalk influence and excellent display performance.

In summary, in the display module, the display module manufacturing method and the electronic device provided in the embodiment of the present application, the bias electrode and the switch unit are disposed between the adjacent light emitting units, and the bias electrode is connected to the signal lead providing the bias voltage signal through the switch unit; the switch unit can be conducted when any one of the corresponding adjacent light-emitting units is lightened, so that the bias electrode can inhibit the transverse movement of the current carriers in the common layer between the corresponding adjacent light-emitting units based on an electric field formed by the bias voltage signal and the second electrode. In addition, the switch unit is conducted only when any one of the corresponding adjacent light-emitting units is lightened, so that the power consumption of the display module can be reduced.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A display module is characterized by comprising an array substrate and a plurality of light-emitting units arranged on the array substrate, wherein each light-emitting unit comprises a first electrode, a second electrode, a common layer and a light-emitting layer, and the common layer and the light-emitting layer are positioned between the first electrode and the second electrode;

the display module further comprises a bias electrode and a switch unit which are arranged between the adjacent light-emitting units, and the bias electrode is connected with a signal lead wire which provides a bias voltage signal through the switch unit;

the switch unit is turned on when any one of the corresponding adjacent light emitting units is lighted, and the bias electrode and the second electrode form a restraining electric field for restraining carriers in the common layer from moving transversely between the corresponding adjacent light emitting units through the bias voltage signal.

2. The display module of claim 1,

the bias electrode is conducted with the common layer;

preferably, the bias electrode is in contact with the common layer;

preferably, the bias electrode is positioned between adjacent light emitting cells of different colors.

3. The display module of claim 2, wherein the array substrate has a pixel defining layer disposed thereon, the pixel defining layer defining a pixel opening on the array substrate for receiving a light emitting layer in the light emitting unit;

the pixel limiting layer positioned between the adjacent light-emitting units is provided with a gap, and the common layer positioned between the adjacent light-emitting units is conducted with the bias electrode through the gap;

preferably, the size of the notch is smaller than or equal to the size of the pixel opening.

4. The display module of claim 3, wherein the array substrate comprises a pixel driving layer and a planarization layer on the pixel driving layer;

the bias electrode is located between the pixel defining layer and the planarization layer or in a gap of the pixel defining layer;

the switch unit and a signal lead wire for providing the bias voltage signal are positioned in the array substrate, and one end of the switch unit is electrically connected with the signal lead wire;

the other end of the switch unit is electrically connected with the bias electrode through a planarization layer through hole;

preferably, the planarization layer includes a first planarization layer and a second planarization layer sequentially stacked on the pixel driving layer, the switch unit is located on a side of the first planarization layer away from the pixel driving layer, and the switch unit is connected to the bias electrode through the second planarization layer via hole;

preferably, the signal lead is made of any metal layer in the array substrate;

preferably, the signal lead is located in the planarization layer and on a side of the first planarization layer away from the pixel driving layer.

5. The display module of claim 1, wherein the bias electrode is a transparent electrode;

preferably, the bias electrode is made of an indium tin oxide material.

6. The display module according to claim 5, wherein the switching unit is a photodiode, an anode terminal of the photodiode is connected to the signal lead, and a cathode terminal of the photodiode is connected to the bias electrode.

7. The display module according to any one of claims 1-6, wherein the light emitting unit is a single-layer OLED light emitting device;

the common layer includes at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

8. The display module according to any one of claims 1-6, wherein the light-emitting unit is a multi-layer OLED light-emitting device, the light-emitting unit comprising a plurality of the light-emitting layers;

the common layer includes at least one of a hole injection layer, a hole transport layer, a charge generation layer, an electron transport layer, and an electron injection layer;

preferably, the number of layers of the charge generation layer is at least one.

9. A method for manufacturing a display module is characterized by comprising the following steps:

manufacturing an array substrate, wherein the array substrate comprises a bias electrode, a switch unit and a signal lead wire for providing a bias voltage signal, and the bias electrode is connected with the signal lead wire through the switch unit;

manufacturing a plurality of light emitting units on the array substrate, wherein each light emitting unit comprises a first electrode, a common layer, a light emitting layer and a second electrode, the plurality of light emitting units share the same common layer and the second electrode, the bias electrode is positioned between the adjacent light emitting units, the switch unit is conducted when any one of the corresponding adjacent light emitting units is lighted, and the bias electrode and the second electrode form a restraining electric field for restraining carriers in the common layer from moving transversely between the corresponding adjacent light emitting units through the bias voltage signal;

preferably, the step of fabricating an array substrate includes:

manufacturing a pixel driving layer;

manufacturing a first planarization layer on the pixel driving layer;

manufacturing the signal lead on one side of the first planarization layer far away from the pixel driving layer;

manufacturing a switch unit with one end conducted with the signal lead on one side of the first planarization layer away from the pixel driving layer;

manufacturing a second planarization layer on the first planarization layer and the switch unit;

fabricating a planarization layer via hole on the second planarization layer to expose the other end of the switching unit;

and manufacturing the bias electrode on one side of the second planarization layer, which is far away from the first planarization layer, and connecting the bias electrode with the other end of the switch unit through the planarization layer via hole.

10. An electronic device, characterized in that the electronic device comprises a display module according to any one of claims 1-8.

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