CN114355133A - Semiconductor device fault detection method and related equipment - Google Patents

Semiconductor device fault detection method and related equipment Download PDF

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CN114355133A
CN114355133A CN202111478391.4A CN202111478391A CN114355133A CN 114355133 A CN114355133 A CN 114355133A CN 202111478391 A CN202111478391 A CN 202111478391A CN 114355133 A CN114355133 A CN 114355133A
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semiconductor device
determining
signal
reference signal
reflection coefficient
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肖经
朱新锋
黄青春
李志文
张俊宇
文迪
黄前龙
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Guilin University of Electronic Technology
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Guilin University of Electronic Technology
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Abstract

The invention relates to the field of semiconductor detection, in particular to a semiconductor device fault detection method and related equipment. Wherein, the method comprises the following steps: acquiring a feedback signal of a reference signal after the reference signal passes through a semiconductor device to be tested; determining a circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal; determining a first difference between the circuit reflection coefficient and a target circuit reflection coefficient; and if the first difference is larger than a first threshold value, determining that the semiconductor device to be tested has a fault. In the embodiment of the invention, the circuit reflection coefficient of the semiconductor device to be tested is calculated by measuring and is compared with the target circuit reflection coefficient of the normal semiconductor device, so that whether the semiconductor device to be tested is a fault device or not is determined, and the semiconductor device can be rapidly and conveniently detected in an online test mode under the condition that the semiconductor device and specific detection equipment are not required to be disassembled.

Description

Semiconductor device fault detection method and related equipment
[ technical field ] A method for producing a semiconductor device
The invention relates to the field of semiconductor detection, in particular to a semiconductor device fault detection method and related equipment.
[ background of the invention ]
The power semiconductor device is also called as a power electronic device, and is mainly used for electronic devices with high power in the aspects of electric energy conversion and control circuits of power equipment. The usability of the power semiconductor device is affected when the power semiconductor device is aged, damaged or fails. In the prior art, fault detection of a power semiconductor device is mainly divided into three types, namely mechanical, electrical and morphological. The mechanical detection is mainly used for detecting the bonding wire process quality before the power semiconductor device leaves the factory, and can inevitably cause slight damage to the detected device in the detection process, and the device can not be detected on line. The electrical detection can achieve the effect of online detection, but different detection circuits need to be designed separately for different power semiconductor devices, and the requirements on the resolution of detection signals and the level of detection personnel are high. And the morphology detection intelligently adopts a damage sampling detection or X-RAY imaging detection mode for the device after plastic packaging. Both the two morphology detection methods need to disassemble devices to specific equipment or make specific test structures, and the X-RAY cost is high and the test efficiency is low. Therefore, how to rapidly and conveniently detect the power semiconductor device is a problem to be solved urgently at present.
[ summary of the invention ]
In order to solve the above problem, embodiments of the present invention provide a method and related device for detecting a fault of a semiconductor device, which can quickly and conveniently determine whether a fault occurs in the semiconductor device to be detected.
In a first aspect, an embodiment of the present invention provides a method for detecting a fault of a semiconductor device, including:
acquiring a feedback signal of a reference signal after the reference signal passes through a semiconductor device to be tested;
determining a circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining a first difference between the circuit reflection coefficient and a target circuit reflection coefficient;
and if the first difference is larger than a first threshold value, determining that the semiconductor device to be tested has a fault.
In the embodiment of the invention, the circuit reflection coefficient of the semiconductor device is calculated by acquiring the feedback signal and the reference signal after passing through the semiconductor device to be tested, and whether the semiconductor device to be tested has a fault is determined by the difference between the circuit reflection coefficient and the target circuit reflection coefficient.
In one possible implementation, determining a circuit reflection coefficient of the semiconductor device under test according to the feedback signal and the reference signal includes:
determining a circuit reflection signal of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining the circuit reflection coefficient from the circuit reflection signal and the reference signal.
In one possible implementation, determining a circuit reflected signal of the semiconductor device under test according to the feedback signal and the reference signal includes:
and determining the circuit reflection signal according to the formula Vr-VFB-Vref/2, wherein Vr is the circuit reflection signal, VFB is the feedback signal and Vref is the reference signal.
In one possible implementation, determining the circuit reflection coefficient from the circuit reflection signal and the reference signal includes:
according to the formula r ═ Vr |/|0.5Vref |, where r is the circuit reflection coefficient.
In one possible implementation, after determining that the semiconductor device under test has failed, the method further includes:
determining an input reflection parameter of the semiconductor device to be tested according to the circuit reflection coefficient;
and determining the number of the disconnected bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter.
In a second aspect, an embodiment of the present invention provides a semiconductor fault detection apparatus, including:
the acquisition module is used for acquiring a feedback signal of the reference signal after the reference signal passes through the semiconductor device to be detected;
the processing module is used for determining the circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal;
the processing module is further configured to determine a first difference between the circuit reflection coefficient and a target circuit reflection coefficient;
the processing module is further configured to determine that the semiconductor device under test has failed if the first difference is greater than a first threshold.
In a possible implementation manner, the processing module is specifically configured to:
determining a circuit reflection signal of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining the circuit reflection coefficient from the circuit reflection signal and the reference signal.
In one possible implementation, the processing module is further configured to:
determining an input reflection parameter of the semiconductor device to be tested according to the circuit reflection coefficient;
and determining the number of the disconnected bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter.
In a third aspect, an embodiment of the present invention provides an electronic device, including:
at least one processor; and
at least one memory communicatively coupled to the processor, wherein:
the memory stores program instructions executable by the processor, and the processor calls the program instructions to execute the method of the first to second aspects.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where the computer-readable storage medium stores computer instructions, and the computer instructions cause the computer to execute the method according to the first aspect to the second aspect.
It should be understood that the second to fourth aspects of the embodiment of the present invention are consistent with the technical solution of the first aspect of the embodiment of the present invention, and the beneficial effects obtained by the aspects and the corresponding possible implementation manners are similar, and are not described again.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of an equivalent impedance circuit model of a semiconductor device according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for detecting a failure of a semiconductor device according to an embodiment of the present invention;
FIG. 3 is a flow chart of another method for detecting a failure in a semiconductor device according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a waveform of an input reflection parameter according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a semiconductor device failure detection apparatus according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions in the present specification, the following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only a few embodiments of the present specification, and not all embodiments. All other embodiments obtained by a person skilled in the art based on the embodiments in the present specification without any inventive step are within the scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the specification. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
In the embodiment of the invention, whether the inside of the semiconductor device to be tested has faults such as aging or damage or the like is determined by calculating the circuit reflection coefficient of the semiconductor device to be tested.
Fig. 1 is a schematic diagram of an equivalent impedance circuit model of a semiconductor device according to an embodiment of the present invention, and as shown in fig. 1, P1 and P2 are any two pins of the semiconductor device. The equivalent impedance in the equivalent impedance network circuit of FIG. 1 is ZinR + jX, where R is the real part resistance and jX is the imaginary part reactance of the equivalent impedance network circuit. And the deterioration and damage of the semiconductor device are rarely caused by the internal chip damage. Most of the reasons for this are due to bond wire breakage on the chip-to-package leads or solder joint degradation on both sides of the bond wire. When a bonding wire in the semiconductor device is broken, the real part resistance R is increased, and the imaginary part reactance jX is also increased, so that Z is causedinThe modulus value of (a) increases. While the signal may cause signal reflection if passing through a node where impedance is discontinuous during the passing process. Specifically, the reference signal can be connected to the equivalent impedance network circuit after passing through a coaxial transmission line with a fixed length, and then the reference signal can pass through a formula
Figure BDA0003394472950000051
The circuit reflection coefficient f of the reflected signal is obtained. Wherein Z is0Is the characteristic impedance of the coaxial transmission line. Therefore, the circuit reflection coefficient of the reference signal after passing through the equivalent impedance network circuit can be obtained by taking the characteristic impedance of the coaxial transmission line as a reference. Therefore, whether the bonding wire is disconnected in the semiconductor device to be tested can be confirmed by comparing the measured circuit reflection coefficient with the circuit reflection coefficient of the intact semiconductor device.
Based on the above test thought, an embodiment of the present invention provides a method for detecting a fault of a semiconductor device, as shown in fig. 2, where the method includes the following processing steps:
step 201, obtaining a feedback signal of the reference signal after passing through the semiconductor device to be tested. The signal generation module may be connected to the semiconductor device to be tested, and the signal generation module is responsible for generating the reference signal. And the reference signal passes through the semiconductor device to be tested to obtain a signal which is the feedback signal. Optionally, a single-frequency point signal may be used as a reference signal, the signal generation module is connected to any one of the pins of the semiconductor device to be tested, and then any one of the other pins is selected for signal acquisition to obtain a feedback signal. In some embodiments, the output end of the signal generation module may be connected to a 1 × 2 power divider to obtain two reference signals. Then, one of the reference signals output by the power divider is connected to the pin P1 in fig. 1, and signal acquisition is performed from the pin P2 to obtain a feedback signal. And the other path of reference signal output by the power divider is connected with the signal acquisition equipment, so that a reference signal is obtained.
Step 202, determining a circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal. In some embodiments, a circuit reflection signal of the semiconductor device under test may be determined based on the feedback signal and the reference signal, and then a circuit reflection coefficient may be determined based on the circuit reflection signal and the reference signal. Wherein, because the reference signal can produce signal reflection after hitting the discontinuous node of impedance in the process of passing through the semiconductor device, the circuit reflected signal can be superposed with the reference signal transmitted forward. It can be seen that the feedback signal is substantially the result of the superposition of the reference signal and the circuit reflection signal. Thus, after obtaining the feedback signal and the reference signal, the feedback signal and the reference signal can be obtained by the formula Vr=VFB-VrefAnd/2, obtaining a circuit feedback signal. Wherein Vr is a circuit reflection signal, VFBVref is a reference signal for the feedback signal.
After the circuit reflection signal is determined, it can be determined according to the formula Γ ═ Vr|/|0.5VrefThe reflection coefficient of the circuit is obtained.
At step 203, a first difference between the circuit reflection coefficient and the target circuit reflection coefficient is determined. Wherein the target circuit reflection coefficient is the circuit reflection coefficient of a normal semiconductor device.
And step 204, if the first difference is larger than the first threshold, determining that the semiconductor device to be tested has a fault.
In some embodiments, after determining that the semiconductor device under test has failed, the number of broken bond wires in the semiconductor device under test may also be determined from the circuit reflection coefficient. As shown in fig. 3, the processing steps of the method include:
step 301, determining an input reflection parameter of the semiconductor device to be tested according to the circuit reflection coefficient. Wherein the input reflection parameter is S in the scattering parameter (S parameter)11Parameters, then, can be according to the formula S11Converting a circuit reflection coefficient f into an input reflection parameter S20 lg | f |11
And step 302, determining the number of the disconnected bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter. Fig. 4 is a schematic waveform diagram of an input reflection parameter according to an embodiment of the present invention. As shown in fig. 4, waveform 1 is S of a semiconductor device without bond wire disconnection11A parametric waveform. Waveform 2 is S of a semiconductor device with one broken bond wire11A parameter waveform, for example, S of the semiconductor device under test when any one of the bonding wires 1 to 6 shown in fig. 1 is broken11The parameter waveform is the shape of waveform 2. The waveform 3 is that two S are disconnected in a plurality of bonding wires which are connected in parallel at the same side11The parameter waveform, for example, of the 3 bonding wires connected in parallel on the left in fig. 1, bonding wires 1 and 2 are broken. Or the bonding wire 5 and the bonding wire 6 in the 3 bonding wires connected in parallel at the right side are disconnected. Waveform 4 is S when 2 bonding wires on different sides are disconnected11A parametric waveform. For example, the bonding wires 3 of the 3 parallel bonding wires on the left side in fig. 1 are disconnected from the bonding wires 6 on the right side. Waveform 5 is S when 3 bonding wires on different sides are disconnected11A parametric waveform. For example, bond wires 2 and 3 and the right-hand bond wire 6 in fig. 1 are broken. Thus, it is possible to test a semiconductor deviceS11The parameter waveform and each S in FIG. 411And comparing the parameter waveforms to determine the specific number of the broken bonding wires in the semiconductor device to be tested.
Corresponding to the semiconductor device fault detection method, the embodiment of the invention provides a structural schematic diagram of a semiconductor device fault detection device. As shown in fig. 5, the apparatus includes: an acquisition module 501 and a processing module 502.
The obtaining module 501 is configured to obtain a feedback signal after the reference signal passes through the semiconductor device to be tested.
And the processing module 502 is used for determining the circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal.
The processing module 502 is further configured to determine a first difference between the circuit reflection coefficient and the target circuit reflection coefficient.
The processing module 502 is further configured to determine that the semiconductor device under test has failed if the first difference is greater than the first threshold.
In some embodiments, the processing module 502 is specifically configured to:
and determining a circuit reflection signal of the semiconductor device to be tested according to the feedback signal and the reference signal.
A circuit reflection coefficient is determined from the circuit reflection signal and the reference signal.
In some embodiments, the processing module 502 is further configured to:
and determining the input reflection parameters of the semiconductor device to be tested according to the circuit reflection coefficient.
And determining the number of broken bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter.
The semiconductor device failure detection apparatus provided in the embodiment shown in fig. 5 may be used to implement the technical solutions of the method embodiments shown in fig. 1 to fig. 4 in this specification, and the implementation principles and technical effects thereof may further refer to the related descriptions in the method embodiments.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 6, the electronic device may include at least one processor and at least one memory communicatively connected to the processor, where: the memory stores program instructions executable by the processor, and the processor calls the program instructions to execute the semiconductor device fault detection method provided by the embodiment shown in fig. 1-4 in the specification.
As shown in fig. 6, the electronic device is in the form of a general purpose computing device. Components of the electronic device may include, but are not limited to: one or more processors 610, a communication interface 620, and a memory 630, a communication bus 640 that connects the various system components (including memory 630, communication interface 620, and processing unit 610).
Communication bus 640 represents one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, and a processor or local bus using any of a variety of bus architectures. These architectures include, but are not limited to, Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MAC) bus, enhanced ISA bus, Video Electronics Standards Association (VESA) local bus, and Peripheral Component Interconnect (PCI) bus, to name a few.
Electronic devices typically include a variety of computer system readable media. Such media may be any available media that is accessible by the electronic device and includes both volatile and nonvolatile media, removable and non-removable media.
Memory 630 may include computer system readable media in the form of volatile Memory, such as Random Access Memory (RAM) and/or cache Memory. The electronic device may further include other removable/non-removable, volatile/nonvolatile computer system storage media. Memory 630 may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of embodiments of the specification.
A program/utility having a set (at least one) of program modules, including but not limited to an operating system, one or more application programs, other program modules, and program data, may be stored in memory 630, each of which examples or some combination may include an implementation of a network environment. The program modules generally perform the functions and/or methodologies of the embodiments described herein.
The processor 610 executes various functional applications and data processing by executing programs stored in the memory 630, for example, implementing the semiconductor device failure detection method provided by the embodiments shown in fig. 1 to 4 of the present specification.
The embodiment of the specification provides a computer-readable storage medium, which stores computer instructions for causing a computer to execute the semiconductor device fault detection method provided by the embodiment shown in fig. 1-4 of the specification.
The computer-readable storage medium described above may take any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a flash Memory, an optical fiber, a portable compact disc Read Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
In the description of the specification, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the specification. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present specification, "a plurality" means at least two, e.g., two, three, etc., unless explicitly defined otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present description in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present description.
The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.
It should be noted that the apparatuses referred to in the embodiments of the present disclosure may include, but are not limited to, a Personal Computer (Personal Computer; hereinafter, PC), a Personal Digital Assistant (Personal Digital Assistant; hereinafter, PDA), a wireless handheld apparatus, a Tablet Computer (Tablet Computer), a mobile phone, an MP3 display, an MP4 display, and the like.
In the several embodiments provided in this specification, it should be understood that the disclosed system, apparatus, and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions in actual implementation, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
In addition, functional units in the embodiments of the present description may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a connector, or a network device) or a Processor (Processor) to execute some steps of the methods described in the embodiments of the present disclosure. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only a preferred embodiment of the present disclosure, and should not be taken as limiting the present disclosure, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims (10)

1. A method for detecting a failure in a semiconductor device, comprising:
acquiring a feedback signal of a reference signal after the reference signal passes through a semiconductor device to be tested;
determining a circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining a first difference between the circuit reflection coefficient and a target circuit reflection coefficient;
and if the first difference is larger than a first threshold value, determining that the semiconductor device to be tested has a fault.
2. The method of claim 1, wherein determining a circuit reflection coefficient of the semiconductor device under test from the feedback signal and the reference signal comprises:
determining a circuit reflection signal of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining the circuit reflection coefficient from the circuit reflection signal and the reference signal.
3. The method of claim 2, wherein determining a circuit reflection signal of the semiconductor device under test from the feedback signal and the reference signal comprises:
according to formula Vr=VFB-Vref/2 determining the circuit reflection signal, wherein VrFor the circuit reflecting a signal, VFBFor said feedback signal, VrefIs the reference signal.
4. The method of claim 3, wherein determining the circuit reflection coefficient from the circuit reflection signal and the reference signal comprises:
according to the formula r ═ Vr|/|0.5VrefWherein r is the circuit reflection coefficient.
5. The method of claim 1, wherein after determining that the semiconductor device under test has failed, the method further comprises:
determining an input reflection parameter of the semiconductor device to be tested according to the circuit reflection coefficient;
and determining the number of the disconnected bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter.
6. A semiconductor device failure detection apparatus, comprising:
the acquisition module is used for acquiring a feedback signal of the reference signal after the reference signal passes through the semiconductor device to be detected;
the processing module is used for determining the circuit reflection coefficient of the semiconductor device to be tested according to the feedback signal and the reference signal;
the processing module is further configured to determine a first difference between the circuit reflection coefficient and a target circuit reflection coefficient;
the processing module is further configured to determine that the semiconductor device under test has failed if the first difference is greater than a first threshold.
7. The apparatus of claim 6, wherein the processing module is specifically configured to:
determining a circuit reflection signal of the semiconductor device to be tested according to the feedback signal and the reference signal;
determining the circuit reflection coefficient from the circuit reflection signal and the reference signal.
8. The apparatus of claim 6, wherein the processing module is further configured to:
determining an input reflection parameter of the semiconductor device to be tested according to the circuit reflection coefficient;
and determining the number of the disconnected bonding wires in the semiconductor device to be tested according to the value of the input reflection parameter.
9. An electronic device, comprising:
at least one processor; and
at least one memory communicatively coupled to the processor, wherein:
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1 to 5.
10. A computer-readable storage medium storing computer instructions for causing a computer to perform the method of any one of claims 1 to 5.
CN202111478391.4A 2021-12-06 2021-12-06 Semiconductor device fault detection method and related equipment Pending CN114355133A (en)

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