CN114355041A - Electrical performance failure analysis positioning method and device - Google Patents
Electrical performance failure analysis positioning method and device Download PDFInfo
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- CN114355041A CN114355041A CN202111500015.0A CN202111500015A CN114355041A CN 114355041 A CN114355041 A CN 114355041A CN 202111500015 A CN202111500015 A CN 202111500015A CN 114355041 A CN114355041 A CN 114355041A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
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Abstract
The application discloses an electrical performance failure analysis positioning method and device. The electrical property failure analysis positioning method specifically comprises the following steps: step S11, electrically connecting the monitoring lead with a component to be tested or a PCB to be tested, and encapsulating the component to be tested or the PCB to be tested into a sample to be tested; step S12, electrically connecting the monitoring lead with the resistance value monitoring equipment; step S13, grinding the sample to be detected, and monitoring the current resistance value of the sample to be detected through resistance value monitoring equipment; and step S14, determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the resistance abnormal position of the failed sample to be detected can be accurately positioned.
Description
Technical Field
The application relates to the technology in the field of failure analysis, in particular to an electrical performance failure analysis positioning method and device.
Background
Failure of a component or PCB (Printed Circuit Board) occurs in development, production and use, and an Electrical Failure Analysis (EFA) of the component or PCB is an important component of the Failure Analysis. Failure localization analysis is an analysis for observing, testing and dissecting the interior of a sample to determine a failure part or region, and is an important link of a failure analysis process.
In the related art, after the abnormal position of a failure sample is positioned in a fuzzy manner by adopting analysis technologies such as X-ray microscopic fluoroscopy, microscopic infrared hot spot detection and the like, a slice grinding and metallographic observation mode is utilized to determine whether the failure sample is ground to the failure position so as to detect failure factors and failure mechanisms, but the grinding position cannot be accurately controlled by the mode.
Disclosure of Invention
The present application is directed to solving at least one of the problems in the prior art. Therefore, the electrical performance failure analysis positioning method and device can accurately grind the failed component to be tested or the PCB to be tested to the position with abnormal resistance.
According to a first aspect of the application, an electrical performance failure analysis positioning method specifically includes the following steps:
step S11, electrically connecting a monitoring lead with a component to be tested or a PCB to be tested, and encapsulating the component to be tested or the PCB to be tested into a sample to be tested;
step S12, electrically connecting the monitoring lead with resistance monitoring equipment;
step S13, grinding the sample to be detected, and monitoring the current resistance value through the resistance value monitoring equipment;
and step S14, determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value.
According to the electrical performance failure analysis positioning method, at least the following beneficial effects are achieved: firstly, in order to accurately locate the abnormal resistance position of the failed component to be tested or the PCB to be tested, the monitoring lead is electrically connected with the component to be tested or the PCB to be tested, and the connected component to be tested or the connected PCB to be tested is encapsulated into a sample to be tested. The method comprises the steps of electrically connecting a monitoring lead with resistance value monitoring equipment, grinding a sample to be detected, monitoring the current resistance value of the sample to be detected through the resistance value monitoring equipment, and determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the abnormal resistance position of the sample to be detected can be accurately positioned.
According to some embodiments of the application, the step S14, comprises:
and determining that the sample to be detected is ground to the position with abnormal resistance value according to the resistance value change rule of the sample to be detected and the current resistance value.
According to some embodiments of the application, the step S11, comprises:
electrically connecting the monitoring lead with a component to be tested or a PCB to be tested, and placing the monitoring lead in a mold;
and injecting pouring sealant into the mold to obtain a sample to be detected.
According to some embodiments of the application, the step S13, comprises:
and grinding the sample to be detected by using sand paper.
According to some embodiments of the present application, the method for electrical performance failure analysis positioning further comprises:
and detecting the resistance failure mode of the sample to be detected according to the resistance abnormal position.
According to some embodiments of the present application, the resistance failure mode comprises:
any of short circuit or electrical parameter drift.
According to some embodiments of the present application, the resistance value monitoring device includes:
digital bridge or equivalent resistance dynamic monitoring device.
An electrical performance failure analysis locating apparatus according to an embodiment of a second aspect of the present application, the abnormality analysis apparatus comprising:
monitoring a lead: the resistance value monitoring device is used for electrically connecting the resistance value monitoring equipment with a component to be tested or a PCB to be tested;
resistance monitoring equipment: and the current resistance value of the component to be tested or the PCB to be tested is monitored.
According to some embodiments of the present application, will the components and parts to be measured or the PCB to be measured encapsulates into the sample that awaits measuring, an electrical property failure analysis positioner still includes the mould, the mould is used for:
accommodating the electrically connected monitoring lead and the component to be tested or the PCB to be tested;
accommodating the pouring sealant;
the to-be-tested component or the to-be-tested PCB, the monitoring lead and the pouring sealant accommodated in the mold form the to-be-tested sample.
According to some embodiments of the present application, the resistance value monitoring device includes: digital bridge or equivalent resistance dynamic monitoring device.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The present application is further described with reference to the following figures and examples, in which:
fig. 1 is a flow chart of an electrical performance failure analysis positioning method according to an embodiment of the present application;
FIG. 2 is a flowchart of step S13 in FIG. 1;
fig. 3 is a schematic diagram of an electrical performance failure analysis positioning apparatus according to an embodiment of the present disclosure.
Reference numerals:
the device under test 100, the monitoring wire 110, the mold 120, the sample under test 130, the resistance monitoring device 140, and the test port 150.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it is to be understood that the positional descriptions, such as the directions of up, down, front, rear, left, right, etc., referred to herein are based on the directions or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific direction, be constructed and operated in a specific direction, and thus, should not be construed as limiting the present application.
In the description of the present application, unless otherwise expressly limited, terms such as set, mounted, connected and the like should be construed broadly, and those skilled in the art can reasonably determine the specific meaning of the terms in the present application by combining the detailed contents of the technical solutions.
Reference throughout this specification to the description of "a particular embodiment," "some embodiments," or "some other embodiments," or the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Failure of a component or PCB occurs in development, production and use, and Failure Analysis of Electrical properties (EFA) of a component or PCB is an important component in Failure Analysis. Failure localization analysis is an analysis for observing, testing and dissecting the interior of a sample to determine a failure part or region, and is an important link of a failure analysis process.
In the related art, after the abnormal position of a failure sample is positioned in a fuzzy manner by adopting analysis technologies such as X-ray microscopic fluoroscopy, microscopic infrared hot spot detection and the like, a slice grinding and metallographic observation mode is utilized to determine whether the failure sample is ground to the failure position so as to detect failure factors and failure mechanisms, but the grinding position cannot be accurately controlled by the mode.
Based on this, the main object of the embodiments of the present application is to provide an electrical property failure analysis positioning method and apparatus, which can accurately position the abnormal resistance position of the failed sample to be detected by grinding the sample to be detected and monitoring the current resistance of the sample to be detected in real time through the resistance monitoring device.
Referring to fig. 1, the embodiment of the present application provides an electrical performance failure analysis positioning method, which specifically includes, but is not limited to, the following steps S11 to S14.
Step S11, electrically connecting the monitoring lead with the component to be tested or the PCB to be tested, and encapsulating the component to be tested or the PCB to be tested into a sample to be tested;
step S12, electrically connecting the monitoring lead with the resistance value monitoring equipment;
step S13, grinding the sample to be detected, and monitoring the current resistance value of the sample to be detected through resistance value monitoring equipment;
and step S14, determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value.
Specifically, first, in order to accurately locate the abnormal resistance position of the failed component to be tested or the PCB to be tested, the monitoring wire is electrically connected with the component to be tested or the PCB to be tested, and the connected component to be tested or the PCB to be tested is encapsulated into a sample to be tested. The method comprises the steps of electrically connecting a monitoring lead with resistance value monitoring equipment, grinding a sample to be detected, monitoring the current resistance value of the sample to be detected through the resistance value monitoring equipment, and determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the abnormal resistance position of the invalid sample to be detected can be accurately positioned.
In some embodiments, step S14 of the embodiments of the present application includes: and determining that the sample to be detected is ground to the position with abnormal resistance value according to the resistance value change rule of the sample to be detected and the current resistance value.
Specifically, firstly, a sample to be detected is ground, the current resistance value of the sample to be detected is monitored through resistance value monitoring equipment, and the sample to be detected is ground to a failure position according to the resistance value change rule of the sample to be detected. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the resistance abnormal position of the failed sample to be detected can be accurately positioned.
In a specific embodiment, taking the chip resistor as an example, when the resistance monitoring device is used to monitor the resistance of the chip resistor, the chip resistor to be tested is connected with the resistance monitoring device through the monitoring wire, and then the chip resistor to be tested is ground, and when the short circuit point of the chip resistor to be tested is ground, the current resistance on the resistance monitoring device is observed to be suddenly increased, so that the chip resistor to be tested is determined to be ground to the abnormal resistance position.
In some embodiments, referring to fig. 2, step S13 of the embodiments of the present application includes, but is not limited to, step S210 to step S220.
Step S210, electrically connecting the monitoring lead with a component to be tested or a PCB to be tested, and placing the monitoring lead in a mold;
and step S220, injecting pouring sealant into the mold to obtain a sample to be detected.
Specifically, a device to be tested or a PCB to be tested is obtained, then the monitoring lead is electrically connected with the device to be tested or the PCB to be tested, the monitoring lead is placed in a mold, and a pouring sealant is injected into the mold to obtain a sample to be tested. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the abnormal resistance position of the invalid sample to be detected can be accurately positioned.
When a sample to be tested is encapsulated, a monitoring lead is electrically connected with a component to be tested or a PCB to be tested, the monitoring lead is placed in a mold, the volume of encapsulating glue such as epoxy resin or acrylic resin is determined according to the size of the mold, and a proper amount of curing agent and catalyst are dripped in, so that the encapsulating glue is fully cured until the encapsulating glue is hardened. And then, taking the cured sample to be tested out of the die, and carrying out electrical performance failure analysis positioning on the failed sample to be tested.
Note that, during sealing, attention is paid to the placement of the polished surface, and for example, in the case of a Multi-layer Ceramic capacitor (MLCC), the polished side surface must be in a direction perpendicular to the inner electrode and the long side.
It should be noted that, when the current resistance value of the sample to be tested is monitored in real time by using the resistance value monitoring device, the testing conditions must be determined by referring to the technical specification to ensure the original appearance of the failure characteristics.
In some embodiments, step S13 of the embodiments of the present application includes: and grinding the sample to be detected by using sand paper.
Specifically, in order to better locate the abnormal resistance position of the invalid sample to be detected, the sample to be detected is ground on abrasive paper, the current resistance monitored by the resistance monitoring equipment is observed in real time, and the sample to be detected is ground to the abnormal resistance position according to the resistance change rule and the current resistance of the sample to be detected. According to the method, the sample to be detected is ground through the abrasive paper, the current resistance of the sample to be detected is monitored through the resistance monitoring equipment, and the resistance abnormal position of the invalid sample to be detected can be accurately positioned.
It should be noted that the sandpaper can perform rough grinding and fine grinding operations on the sample to be tested according to different numbers of grinding sand grains adhered to the base paper.
In some embodiments, the electrical performance failure analysis positioning method of the embodiments of the present application further includes: and detecting the resistance failure mode of the sample to be detected according to the abnormal resistance position.
It should be noted that, in a specific embodiment, the failure factor and the failure mechanism of the device to be tested or the PCB to be tested are determined by observing the microscopic morphology of the abnormal position of the resistance value.
In some embodiments, the resistance failure modes of the embodiments of the present application include: any of short circuit or electrical parameter drift.
The defects corresponding to short circuits include: the tantalum block of the solid tantalum electrolytic capacitor and the anode lead wire generate relative displacement, and the anode lead wire shakes; ceramic capacitor electrode nodules, and the like. The defects corresponding to the electrical parameter drift include: silver migration, etc.
Specifically, firstly, a component to be tested or a PCB to be tested is obtained, in order to better locate the abnormal position of the resistance value of the failed component to be tested or the PCB to be tested, the monitoring wire is electrically connected with the component to be tested or the PCB to be tested, and the connected component to be tested or the PCB to be tested is encapsulated into a sample to be tested. The method comprises the steps of electrically connecting a monitoring lead with resistance value monitoring equipment, grinding a sample to be detected, monitoring the current resistance value of the sample to be detected through the resistance value monitoring equipment, and determining that the sample to be detected is ground to the position with abnormal resistance value according to the resistance value change rule and the current resistance value of the sample to be detected. And determining failure factors and failure mechanisms of the sample to be detected by observing the microscopic morphology of the abnormal position of the resistance value. According to the method and the device, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the resistance abnormal position of the invalid sample to be detected can be accurately positioned.
In some embodiments, a resistance value monitoring device of an embodiment of the present application includes: digital bridge or equivalent resistance dynamic monitoring device.
It should be noted that the dynamic equivalent resistance monitoring device includes: a dynamic resistance tester, a resistance analyzer, and the like.
In a specific embodiment, taking a multilayer ceramic capacitor as an example, the insulation resistance of the MLCC on a certain circuit board is low, the resistance of a normal product is infinite, and the defective product is only a few hundred ohms. After determining that the MLCC is failed in short circuit, two monitoring leads can be welded on two end electrodes of the MLCC, the MLCC and the leads are encapsulated into a sample to be tested and ground, the two led-out monitoring leads are connected to a digital bridge, and when the phenomenon that the resistance value is suddenly increased is observed, the situation that the short circuit position is ground is shown. At the moment, the metallographic observation is carried out, the phenomenon that the electrodes in the sample to be detected are unevenly distributed and have electrode nodulation is found, the electrode nodulation caused by the abrupt change causes short circuit between the originally unconnected electrode layers, and the electrode layers which are originally connected are not connected when the sample is ground to the short circuit position, so that the resistance value is increased.
It should be noted that, in a specific embodiment, the position of the abnormal resistance value of the failed device under test or the PCB under test is located more accurately. Firstly, the monitoring wires are electrically connected with the component to be detected or the PCB to be detected, namely two monitoring wires are respectively led out from two monitoring points of the component to be detected or the PCB to be detected, and the component to be detected or the PCB to be detected is encapsulated into a sample to be detected. Then, the two monitoring wires are connected to a resistance value monitoring device, the current resistance value of the sample to be detected is observed in real time by grinding the sample to be detected, and the sample to be detected is ground to the position with the abnormal resistance value according to the resistance value change rule and the current resistance value of the sample to be detected.
The embodiment of the application also provides an electrical property failure analysis positioner, and the electrical property failure analysis positioner includes: monitoring wires and resistance monitoring equipment. The monitoring lead is used for electrically connecting the resistance value monitoring equipment and the component to be tested or the PCB to be tested; the resistance value monitoring equipment is used for monitoring the current resistance value of the component to be tested or the PCB to be tested.
In some embodiments, the device to be tested or the PCB to be tested is encapsulated into a sample to be tested, and the electrical failure analysis positioning device further comprises a mold for accommodating the electrically connected monitoring lead and the device to be tested or the PCB to be tested; accommodating the pouring sealant; the to-be-tested component or the to-be-tested PCB, the monitoring lead and the pouring sealant which are accommodated in the mold form a to-be-tested sample.
Specifically, a device to be tested or a PCB to be tested is obtained, the device to be tested or the PCB to be tested electrically connected to the monitoring lead is placed in a mold, and a potting adhesive is injected into the mold to obtain a sample to be tested. Therefore, the sample to be detected is ground, the current resistance of the sample to be detected is monitored in real time through the resistance monitoring equipment, and the resistance abnormal position of the failed sample to be detected can be accurately positioned.
In a specific embodiment, referring to fig. 3, first, a device to be tested 100 is obtained, the monitoring wire 110 is electrically connected to the device to be tested 100, and is placed in the mold 120, and a pouring sealant is injected into the mold 120 to obtain a sample to be tested 130. To monitor the current resistance of the sample 130 in real time, two monitor wires 110 are connected to the test port 150 of the resistance monitoring device 140. Therefore, according to the present invention, by grinding the sample 130 to be tested and monitoring the current resistance of the sample 130 to be tested in real time through the resistance monitoring device 140, the abnormal resistance position of the failed component 100 to be tested can be accurately located.
It should be noted that, in some embodiments, the monitor wires 110 are electrically connected to the device under test 100 or the PCB under test by soldering. In addition, the electrical connection between the monitoring wire 110 and the device under test 100 or the PCB under test may be achieved by plugging, which is not limited in the embodiments of the present application.
It can be seen that the contents in the above embodiments of the electrical performance failure analysis positioning method are all applicable to the embodiments of the electrical performance failure analysis positioning apparatus, the functions specifically implemented in the embodiments of the electrical performance failure analysis positioning apparatus are the same as those in the above embodiments of the electrical performance failure analysis positioning method, and the beneficial effects achieved in the embodiments of the electrical performance failure analysis positioning method are also the same as those achieved in the above embodiments of the electrical performance failure analysis positioning method.
The above-described embodiments of the apparatus are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may also be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods disclosed above may be implemented as software, firmware, hardware, or suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Claims (10)
1. An electrical property failure analysis positioning method is characterized by comprising the following steps:
step S11, electrically connecting a monitoring lead with a component to be tested or a PCB to be tested, and encapsulating the component to be tested or the PCB to be tested into a sample to be tested;
step S12, electrically connecting the monitoring lead with resistance monitoring equipment;
step S13, grinding the sample to be detected, and monitoring the current resistance value of the sample to be detected through the resistance value monitoring equipment;
and step S14, determining the abnormal position of the resistance value of the sample to be detected according to the current resistance value.
2. The electrical performance failure analysis positioning method of claim 1,
the step S14 includes:
and determining that the sample to be detected is ground to the position with abnormal resistance value according to the resistance value change rule of the sample to be detected and the current resistance value.
3. The electrical performance failure analysis positioning method of claim 1,
the step S11 includes:
electrically connecting the monitoring lead with a component to be tested or a PCB to be tested, and placing the monitoring lead in a mold;
and injecting pouring sealant into the mold to obtain a sample to be detected.
4. The electrical performance failure analysis positioning method of claim 1,
the step S13 includes:
and grinding the sample to be detected by using sand paper.
5. The electrical performance failure analysis positioning method of claim 1,
the electrical performance failure analysis positioning method further comprises the following steps:
and detecting the resistance failure mode of the sample to be detected according to the resistance abnormal position.
6. The electrical performance failure analysis positioning method of claim 5,
the resistance failure modes include:
any of short circuit or electrical parameter drift.
7. The electrical performance failure analysis positioning method of any one of claims 1 to 6,
the resistance value monitoring device includes: digital bridge or equivalent resistance dynamic monitoring device.
8. An electrical performance failure analysis locating device, the electrical performance failure analysis locating device comprising:
monitoring a lead: the resistance value monitoring device is used for electrically connecting the resistance value monitoring equipment with a component to be tested or a PCB to be tested;
resistance monitoring equipment: and the current resistance value of the component to be tested or the PCB to be tested is monitored.
9. The electrical failure analysis positioning apparatus of claim 8, wherein the device under test or the PCB under test is potted into a sample under test, the electrical failure analysis positioning apparatus further comprising a mold configured to:
accommodating the electrically connected monitoring lead and the component to be tested or the PCB to be tested;
accommodating the pouring sealant;
the to-be-tested component or the to-be-tested PCB, the monitoring lead and the pouring sealant accommodated in the mold form the to-be-tested sample.
10. The electrical performance failure analysis locating device of claim 8, wherein the resistance monitoring apparatus comprises: digital bridge or equivalent resistance dynamic monitoring device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111500015.0A CN114355041A (en) | 2021-12-09 | 2021-12-09 | Electrical performance failure analysis positioning method and device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111500015.0A CN114355041A (en) | 2021-12-09 | 2021-12-09 | Electrical performance failure analysis positioning method and device |
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| CN114355041A true CN114355041A (en) | 2022-04-15 |
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| CN202111500015.0A Pending CN114355041A (en) | 2021-12-09 | 2021-12-09 | Electrical performance failure analysis positioning method and device |
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