CN114336535A - High-voltage protection circuit, chip and device - Google Patents

High-voltage protection circuit, chip and device Download PDF

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Publication number
CN114336535A
CN114336535A CN202111658950.XA CN202111658950A CN114336535A CN 114336535 A CN114336535 A CN 114336535A CN 202111658950 A CN202111658950 A CN 202111658950A CN 114336535 A CN114336535 A CN 114336535A
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Prior art keywords
voltage
chip
substrate
switch
control signal
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CN202111658950.XA
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Chinese (zh)
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张弛
罗庆峰
赵辉
梁洁
李举会
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Nationz Technologies Inc
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Nationz Technologies Inc
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Priority to CN202111658950.XA priority Critical patent/CN114336535A/en
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Abstract

The application provides a high-voltage protection circuit, a chip and a device. The high-voltage protection circuit is connected with the chip pins and the chip internal circuit in series and comprises a substrate selection circuit, a high-voltage detection circuit and a protection switch: the high-voltage detection circuit receives power supply voltage and chip pin voltage, detects the chip pin voltage and outputs a control signal; the substrate selection circuit receives a power supply voltage and a chip pin voltage and outputs a substrate voltage; and the protection switch receives the control signal and the substrate voltage and controls the on-off of the high-voltage protection circuit.

Description

High-voltage protection circuit, chip and device
Technical Field
The application relates to the field of integrated circuits, in particular to a high-voltage protection circuit, a chip and a device.
Background
Modern chips tend to use advanced node technologies to meet the demands of increased performance and reduced power consumption. The advanced process enables the withstand voltage of the CMOS device in a chip to be reduced through thinner gate oxide layer thickness and higher carrier injection concentration.
In many chip application scenarios, the non-ideal use environment may cause the voltage of the pin of the chip to be higher than the chip supply voltage; in severe cases, the pin voltage may also exceed the withstand voltage of the chip. For example, in the application environment of the motor, the three alternating currents of the motor have higher energy, and a higher voltage may be coupled to the pin terminals of the control chip thereof through the coupling effect of the parasitic capacitance and inductance, the high voltage of this type is usually between 4V and 5V, whereas the standard supply voltage of the Micro Control Unit (MCU) which is currently in the market is 3.3V, and the upper limit of the withstand voltage of the pin thereof is 3.63V. If these MCUs are applied to motor control, the internal devices of the chip will cause damage to the chip once receiving high voltage.
The above information disclosed in this background section is only for enhancement of understanding of the background of the application and therefore it may contain information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
The application provides a high-voltage protection circuit, chip and device, when the voltage of the pin of chip is higher than chip supply voltage, can cut off this voltage to the inside transport of chip, reaches the purpose of protection chip.
According to an aspect of the present application, a high voltage protection circuit is provided, the high voltage protection circuit is used for a chip, the high voltage protection circuit is connected in series with a chip pin and a chip internal circuit, and comprises a substrate selection circuit, a high voltage detection circuit and a protection switch:
the high-voltage detection circuit receives power supply voltage and chip pin voltage, detects the chip pin voltage and outputs a control signal;
the substrate selection circuit receives a power supply voltage and a chip pin voltage and outputs a substrate voltage;
and the protection switch receives the control signal and the substrate voltage and controls the on-off of the high-voltage protection circuit.
According to some embodiments, if the chip pin voltage is higher than the supply voltage, the high voltage detection circuit outputs the control signal to control the protection switch to be turned off;
and if the voltage of the chip pin is lower than the power supply voltage, the high-voltage detection circuit outputs the control signal to control the protection switch to be conducted.
According to some embodiments, the substrate selection circuit outputs the substrate voltage equal to the chip pin voltage if the chip pin voltage is higher than a supply voltage;
and if the voltage of the chip pin is lower than the power supply voltage, the substrate selection circuit outputs the substrate voltage equal to the power supply voltage.
According to some embodiments, the high voltage detection circuit further comprises a P-MOS transistor, and the substrate voltage output by the substrate selection circuit is input.
According to some embodiments, the protection switch comprises a first switch and a second switch connected in parallel, wherein:
the first switch is an N-MOS tube, the grid electrode is connected with the power supply voltage, and the substrate is grounded;
the second switch is a P-MOS tube, the grid electrode is connected with the control signal, and the substrate is connected with the substrate voltage.
According to some embodiments, if the chip pin voltage is higher than a supply voltage, the high voltage detection circuit outputs the control signal as a second control signal;
and if the voltage of the chip pin is lower than the power supply voltage, the high-voltage detection circuit outputs the control signal as a second control signal.
According to some embodiments, the first switch is turned off if the chip pin voltage is higher than a supply voltage;
and if the voltage of the chip pin is lower than the power supply voltage, the first switch is conducted.
According to some embodiments, if the control signal is the first control signal, the second switch is turned off;
and if the control signal is the second control signal, the second switch is conducted.
According to some embodiments, the protection switch has a voltage-withstanding protection function.
According to another aspect of the present application, a chip is proposed, comprising a high voltage protection circuit as described in any of the preceding.
According to another aspect of the application, an apparatus is proposed, comprising a chip as described in the foregoing.
Technical solutions according to some embodiments of the present application may have one or more of the following benefits:
a protection circuit is added between the chip internal circuit and the chip pin, and when the voltage of the chip pin is detected to be high voltage, the high-voltage protection circuit is disconnected to block the high voltage from entering the chip internal circuit; when the voltage of the chip pin is smaller than the power supply voltage, the high-voltage protection circuit is conducted.
1. When the voltage V1 of the chip pin is higher than the power supply voltage, the N-type switch and the P-type switch bear high voltage, the N-type switch and the P-type switch have a protection mechanism, and the protection circuit has a voltage-resistant design.
2. When the voltage of the chip pin is higher than the power supply voltage, the substrate voltage is the pin voltage, so that the parasitic diode of the P-MOS tube cannot be conducted in the forward direction, and the phenomenon of backward flow of the current of the chip pin is prevented.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The above and other objects, features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings. The drawings described below are for illustrative purposes only of certain embodiments of the present application and are not intended to limit the present application.
FIG. 1 shows a schematic block diagram of a high voltage protection circuit connection of an exemplary embodiment of the present application;
FIG. 2 illustrates a schematic diagram of a high voltage protection circuit according to an exemplary embodiment of the present application;
FIG. 3 illustrates yet another embodiment of a structural schematic of a high voltage protection circuit of an example of the present application;
FIG. 4 illustrates a schematic diagram of a substrate selection circuit according to an exemplary embodiment of the present application;
fig. 5 shows a schematic structure diagram of a high voltage detection circuit according to an exemplary embodiment of the present application.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus, a repetitive description thereof will be omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the embodiments of the disclosure can be practiced without one or more of the specific details, or with other means, components, materials, devices, etc. In such cases, well-known structures, methods, devices, implementations, materials, or operations are not shown or described in detail.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
It will be appreciated by those skilled in the art that the drawings are merely schematic representations of exemplary embodiments, and that the blocks or processes shown in the drawings are not necessarily required to practice the present application and are, therefore, not intended to limit the scope of the present application.
Embodiments of apparatus of the present application are described below that may be used to perform embodiments of the methods of the present application. For details not disclosed in the embodiments of the apparatus of the present application, reference is made to the embodiments of the method of the present application.
Fig. 1 shows a schematic block diagram of a high voltage protection circuit connection of an exemplary embodiment of the present application.
As shown in fig. 1, inside the chip, a high voltage protection circuit 101 is connected between the chip internal circuit 105 and the chip pin 103.
According to an example embodiment, if the voltage on the chip pin 103 is lower than the chip supply voltage, the high voltage protection circuit 101 assumes a conducting state, and a voltage or a current may be transmitted between the chip pin 103 and the chip internal circuit 105.
According to an exemplary embodiment, if the voltage on the chip pin 103 is higher than the chip supply voltage, the high voltage protection circuit 101 is in an off state, and the voltage or current on the chip pin 103 cannot be transmitted to the chip internal circuit 105.
According to an example embodiment, the high voltage protection circuit 101 has a function of preventing a current of the chip pin 103 from flowing backward, and when a voltage of the chip pin 103 is higher than a chip supply voltage, a current flowing from the chip pin 103 to the power supply is not generated.
Fig. 2 shows a schematic structural diagram of a high-voltage protection circuit according to an exemplary embodiment of the present application.
As shown in fig. 2, the high-voltage protection circuit 101 includes a high-voltage detection circuit 201, a protection switch 203, and a substrate selection circuit 205.
According to an example embodiment, the chip pin 103 is electrically connected to the high voltage detection circuit 201, to the substrate selection circuit 205, to the protection switch 203, the high voltage detection circuit 201 is electrically connected to the protection switch 203, and the protection switch 201 is electrically connected to the chip internal circuit 105.
According to an example embodiment, the high voltage detection circuit 201 inputs the substrate voltage VPB, the supply voltage, and the chip pin voltage V1. The high voltage detection circuit 201 detects whether the voltage V1 of the chip pin 103 is higher than the power supply voltage, and if the voltage V1 of the chip pin 103 is less than or equal to the power supply voltage, the high voltage detection circuit outputs a control signal SW1 as a first control signal to control the protection switch 203 to be closed, so that the voltage is transmitted between the chip pin 103 and the chip internal circuit 106; if the voltage V1 of the chip pin 103 is greater than the power supply voltage, the output control signal SW1 is the second control signal, the control protection switch 203 is turned off, and the voltage of the chip pin 103 is cut off and cannot be led to the chip internal circuit 105, so that the chip internal circuit 105 is protected.
According to an exemplary embodiment, the first control signal is at a high level and the second control signal is at a low level, but the present application is not limited thereto.
According to an example embodiment, the substrate selection circuit 205 inputs the supply voltage and the chip pin voltage V1, outputting the substrate voltage VPB. If the voltage V1 of the chip pin 103 is higher than the power supply voltage, the output substrate voltage VPB is equal to the voltage V1 of the chip pin 103; if the voltage V1 of the chip pin 103 is less than or equal to the supply voltage, the output substrate voltage VPB is equal to the supply voltage.
According to an example embodiment, the substrate selection circuit 205 provides the substrate voltage VPB for the P-MOS transistor in the high-voltage protection circuit 101, and the voltage is always the highest voltage of the circuit, so that when the voltage V1 of the chip pin voltage 103 is higher than the supply voltage of the chip, the parasitic diode of the P-MOS transistor is not turned on in the forward direction, and the current flowing backward through the chip pin occurs.
According to some embodiments, the high voltage detection circuit 205 includes P-MOS transistors, and thus the high voltage detection circuit 201 requires the input substrate voltage VPB.
According to some embodiments, the protection switch 203 has a voltage-withstanding function.
Fig. 3 shows a further exemplary embodiment of a schematic representation of a high-voltage protection circuit according to the present disclosure.
As shown in fig. 3, the high voltage protection circuit 101 includes a transmission gate switch 207, a high voltage detection circuit 201, and a substrate selection circuit 205.
According to an example embodiment, the transmission gate switch 207 including the P-type switch 2071 and the N-type switch 2073 may ensure a turn-on characteristic in a full voltage range (ground potential to supply voltage), and when the transmission gate switch 207 is turned on, the transmission gate switch 207 may provide a smaller turn-on impedance when the voltage V1 of the chip pin is close to the power supply or ground potential.
According to an example embodiment, the N-type switch 2073 comprises an N-MOS transistor having a gate terminal electrically connected to a supply voltage. The P-type switch 2071 comprises a P-MOS transistor, the gate of which is connected to the control signal SW1, and if the control signal SW1 is at low level or ground potential, the P-type switch is turned on; if the control signal SW1 is high or the supply voltage, the P-type switch is off.
According to an exemplary embodiment, the N-type switch 2073 is connected in parallel with the P-type switch 2071, and then one end of the N-type switch is used as an input terminal to electrically connect to the chip pin 103, and the other end of the N-type switch is used as an output terminal to electrically connect to the chip internal circuit 105.
According to an example embodiment, the high voltage detection circuit 201 inputs the chip pin voltage V1, the supply voltage, and the substrate voltage VPB, and outputs the control signal SW 1. The high voltage detection circuit 201 detects whether the voltage V1 of the chip pin is higher than the power supply voltage, and outputs a control signal SW1 as a second control signal if the voltage V1 of the chip pin is less than or equal to the power supply voltage; if the voltage V1 of the chip pin is greater than the power supply voltage, the output control signal SW1 is the first control signal.
According to an exemplary embodiment, the first control signal is at a high level and the second control signal is at a low level, but the present application is not limited thereto.
According to an example embodiment, the substrate selection circuit 205 inputs the chip pin voltage V1 and the supply voltage, outputting the substrate voltage VPB. The substrate selection circuit 205 provides the substrate voltage VPB to all of the P-MOS transistors connected to the pins. If the voltage V1 of the chip pin 103 is higher than the power supply voltage, the output substrate voltage VPB is equal to the voltage V1 of the chip pin 103; if the voltage V1 of the chip pin 103 is less than or equal to the supply voltage, the output substrate voltage VPB is equal to the supply voltage.
According to the exemplary embodiment, the substrate selection circuit 205 provides the substrate voltage VPB for all the P-MOS transistors connected to the pins, and the voltage is always the highest voltage of the circuit, so that when the pin voltage of the chip is higher than the chip supply voltage, the parasitic diodes of the P-MOS transistors will not be turned on in the forward direction, and the current flowing backward through the pin of the chip occurs.
According to an exemplary embodiment, if the chip pin voltage V1 is lower than the power supply voltage, the output control signal SW1 is low, and the P-type switch 2071 is turned on. The chip pin voltage V1 is less than or equal to the power supply voltage, and the N-type switch 2073 is turned on. The voltage or current is passed to the on-chip circuitry 105 through the pass-gate switch 207. At this time, the substrate voltage VPB is output as the supply voltage.
According to an exemplary embodiment, if the chip pin voltage V1 is higher than the power supply voltage, the output control signal SW1 is high, and the P-type switch 2071 is turned off. The chip pin voltage V1 is greater than the supply voltage and the N-type switch 2073 is turned off. The voltage or current cannot pass through the pass gate switch 207 to the on-chip circuitry 105. At this time, the substrate voltage VPB is output as a pin voltage.
According to an exemplary embodiment, the high-low level of the control signal SW1 output by the high voltage detection circuit 201 varies according to the MOS switch type of the transmission gate switch, which is exemplified by an N-type switch and a P-type switch, but only one of them is shown in the present application, but the present application is not limited thereto, and does not represent other design methods to circumvent the subject matter of the present application.
According to an exemplary embodiment, the transfer gate switch 207 has a withstand voltage function. When the chip pin voltage V1 is higher than the supply voltage, the N-type switch 2073 and the P-type switch 2071 themselves will also bear the high voltage, and have a protection mechanism:
according to some embodiments, when the chip pin voltage V1 is higher than the power supply voltage, the N-type switch 2073 may sustain three voltages: the voltage of the active region V1 terminal to the gate terminal, the voltage of the active region V1 terminal to the active region V2 terminal, and the voltage of the active region V1 terminal to the substrate terminal.
The voltage from the active region V1 terminal to the gate terminal, since the gate terminal is electrically connected to the supply voltage, the voltage at the active region V1 terminal needs to be higher than the supply voltage by a device withstand voltage to possibly damage the N-type switch, and the coupling high voltage is usually not over this range.
The voltage from the active region V1 to the active region V2 is cut off by the pass gate switch 207 when the voltage at the active region V1 rises to the supply voltage, and the voltage at the active region V2 is kept at the supply voltage. Therefore, the voltage at the active region V1 needs to be higher than the supply voltage by one device withstand voltage to possibly damage the N-type switch, and the coupling high voltage does not exceed the range.
The voltage from the active region V1 end to the substrate end is applied, the N-MOS tube substrate is grounded, so the voltage from the active region V1 end to the substrate end is V1, but the implantation concentration of the substrate is low, so the parasitic diode from the active region V1 end to the substrate end has high reverse bias voltage resistance capability, and the coupling high voltage of the chip pin can not exceed the value normally.
According to some embodiments, when the chip pin voltage V1 is higher than the power supply voltage, the P-type switch 2071 may sustain three voltages: the voltage of the active region V1 terminal to the gate terminal, the voltage of the active region V1 terminal to the active region V2 terminal, and the voltage of the active region V1 terminal to the substrate terminal.
Since the voltage at the end of the active region V1 to the gate terminal is greater than the supply voltage at the end of the active region V1, the output voltage provided by the control signal SW1 is equal to the voltage of V1, and thus the voltage difference between the end of the active region V1 to the gate terminal is 0.
The voltage from active region V1 to active region V2 will turn off pass gate switch 207 when the voltage at active region V1 rises to the supply voltage, so that the voltage at active region V2 will remain at the supply voltage. Therefore, the voltage at the active region V1 needs to be higher than the power supply voltage by a device withstand voltage to possibly damage the P-type switch, and the coupling high voltage of the chip pin does not exceed the range.
When the voltage from the end of the active region V1 to the end of the substrate is greater than the supply voltage, the substrate voltage VPB of the P-MOS transistor is equal to the voltage from the end of the active region V1, so that the voltage difference from the end of the active region V1 to the end of the substrate is 0 without risk.
Fig. 4 shows a schematic diagram of a substrate selection circuit according to an example embodiment of the present application.
As shown in fig. 4, the substrate selection circuit includes switches PM1, PM 2. The substrate selection circuit can select a high voltage between a power supply voltage and a chip pin voltage V1 to output, the output voltage is VPB, and a P-MOS substrate voltage is provided for the high-voltage protection circuit.
If the supply voltage is greater than V1, switch PM1 is turned on and the supply voltage is conducted to VPB through switch PM 1.
If the supply voltage is less than V1, switch PM1 turns off, the voltage of the active region (drain and source) of switch PM2 is at its highest, the parasitic diode from the active region to the substrate region of switch PM2 turns on, and V1 conducts to VPB through this parasitic diode.
The substrate selection circuit has high voltage endurance.
For switch PM 1: when the chip pin voltage V1 is high, V1 is VPB, so the gate-to-VPB voltage difference of PM1 is 0, and there is no problem of withstand voltage; the gate terminal voltage needs to be higher than the supply voltage by a device withstand voltage so as to possibly damage the PN junction from V1 to the supply voltage terminal, and the coupling high voltage of the chip pin usually does not exceed this range.
For switch PM 2: when the chip pin voltage V1 is high, the four terminals of PM2 are all equal, so there is no risk.
There are many design methods for the substrate selection circuit, and only one of them is shown in the present application, but the present application is not limited thereto, and does not represent other design methods that can circumvent the subject matter of the present application.
Fig. 5 shows a schematic structure diagram of a high voltage detection circuit according to an exemplary embodiment of the present application.
As shown in fig. 5, the high voltage detection circuit includes switches PM3, PM4, a resistor R, and an inverter INV connected in series.
When the chip pin voltage V1 is greater than the chip supply voltage, the SW1 outputs a first control signal; when the chip pin voltage V1 is less than or equal to the chip supply voltage, SW1 outputs a second control signal.
According to example embodiments, the first control signal may be a high level and the second control signal may be a low level in the present application, but the present application is not limited thereto.
When the chip pin voltage V1 is lower than the power supply voltage, PM4 is turned off, INV output is low, PM3 is turned on, and SW1 is at ground, i.e. low potential.
When the chip pin voltage V1 is greater than the power supply voltage, PM4 turns on, INV outputs high, and PM3 turns off, so the SW1 voltage is equal to V1, i.e. high.
The high-voltage detection circuit has a plurality of design methods, and only one of the design methods is shown in the application, but the application is not limited to the design method, and does not represent other design methods which can evade the subject matter of the application.
The high and low logic of SW1 is coordinated with the switching action and should not limit the scope of patent protection.
It should be clearly understood that this application describes how to make and use particular examples, but the application is not limited to any details of these examples. Rather, these principles can be applied to many other embodiments based on the teachings of the present disclosure.
Furthermore, it should be noted that the above-mentioned figures are only schematic illustrations of the processes involved in the method according to exemplary embodiments of the present application, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.
Exemplary embodiments of the present application are specifically illustrated and described above. It is to be understood that the application is not limited to the details of construction, arrangement, or method of implementation described herein; on the contrary, the intention is to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (11)

1. The high-voltage protection circuit is used for a chip, is connected with a chip pin and a chip internal circuit in series, and comprises a substrate selection circuit, a high-voltage detection circuit and a protection switch:
the high-voltage detection circuit receives power supply voltage and chip pin voltage, detects the chip pin voltage and outputs a control signal;
the substrate selection circuit receives a power supply voltage and a chip pin voltage and outputs a substrate voltage;
and the protection switch receives the control signal and the substrate voltage and controls the on-off of the high-voltage protection circuit.
2. The high voltage protection circuit of claim 1, wherein:
if the voltage of the chip pin is higher than the power supply voltage, the high-voltage detection circuit outputs the control signal to control the protection switch to be switched off;
and if the voltage of the chip pin is lower than the power supply voltage, the high-voltage detection circuit outputs the control signal to control the protection switch to be conducted.
3. The high voltage protection circuit of claim 1, wherein:
if the chip pin voltage is higher than the power supply voltage, the substrate selection circuit outputs the substrate voltage equal to the chip pin voltage;
and if the voltage of the chip pin is lower than the power supply voltage, the substrate selection circuit outputs the substrate voltage equal to the power supply voltage.
4. The high voltage protection circuit of claim 1, wherein the high voltage detection circuit further comprises a P-MOS transistor, and the P-MOS transistor inputs the substrate voltage output by the substrate selection circuit.
5. The high voltage protection circuit of claim 3, wherein the protection switch comprises a first switch and a second switch in parallel, wherein:
the first switch is an N-MOS tube, the grid electrode is connected with the power supply voltage, and the substrate is grounded;
the second switch is a P-MOS tube, the grid electrode is connected with the control signal, and the substrate is connected with the substrate voltage.
6. The high voltage protection circuit of claim 5, wherein:
if the voltage of the chip pin is higher than the power supply voltage, the high-voltage detection circuit outputs the control signal as a first control signal;
and if the voltage of the chip pin is lower than the power supply voltage, the high-voltage detection circuit outputs the control signal as a second control signal.
7. The high voltage protection circuit of claim 6, wherein:
if the voltage of the chip pin is higher than the power supply voltage, the first switch is cut off;
and if the voltage of the chip pin is lower than the power supply voltage, the first switch is conducted.
8. The high voltage protection circuit of claim 6, wherein:
if the control signal is the first control signal, the second switch is turned off;
and if the control signal is the second control signal, the second switch is conducted.
9. The high-voltage protection circuit according to claim 5, wherein the protection switch has a withstand voltage protection function.
10. A chip comprising a high voltage protection circuit according to any one of claims 1 to 9.
11. An apparatus comprising the chip of claim 10.
CN202111658950.XA 2021-12-31 2021-12-31 High-voltage protection circuit, chip and device Pending CN114336535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111658950.XA CN114336535A (en) 2021-12-31 2021-12-31 High-voltage protection circuit, chip and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111658950.XA CN114336535A (en) 2021-12-31 2021-12-31 High-voltage protection circuit, chip and device

Publications (1)

Publication Number Publication Date
CN114336535A true CN114336535A (en) 2022-04-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111658950.XA Pending CN114336535A (en) 2021-12-31 2021-12-31 High-voltage protection circuit, chip and device

Country Status (1)

Country Link
CN (1) CN114336535A (en)

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