CN114333734A - Mainboard circuit and system supporting multiple LCD displays and implementation method - Google Patents
Mainboard circuit and system supporting multiple LCD displays and implementation method Download PDFInfo
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- CN114333734A CN114333734A CN202210243738.5A CN202210243738A CN114333734A CN 114333734 A CN114333734 A CN 114333734A CN 202210243738 A CN202210243738 A CN 202210243738A CN 114333734 A CN114333734 A CN 114333734A
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Abstract
The invention discloses a mainboard circuit, a system and an implementation method for supporting various LCD displays, which belong to the technical field of signal processing and comprise the following steps: the display device comprises a CPU, an AC coupling capacitor, a PTN3460 chip, a pull-up resistor and a mainboard BIOS, wherein through the combination of a hardware part and a software part, the eDP data stream is converted into an LVDS protocol through the PTN3460 chip, so that the LCD can work on a mainboard without an LVDS interface conveniently, the internal configuration of the PTN3460 chip can be completed from the interface through an internal integrated I2C, the display driving of various LCD displays is realized, and the VBT of the VBIOS can support the display specification of most LCD displays on the market.
Description
Technical Field
The invention relates to the technical field of signal processing, in particular to a mainboard circuit and a system supporting multiple LCD displays and an implementation method.
Background
At present, the LCD display on the market does not basically have an integrated EEPROM chip for storing EDID data, and when the LCD is applied to an X86 platform, the trouble is caused that the EDID data needs to be written in VBIOS again to be displayed normally when the LCD display is replaced every time, so that a plurality of obstacles are brought to the maintenance of the expandability of the LCD display under the condition, and a method for automatically identifying most LCD display specifications on the market and enabling the LCD display specifications to work normally is urgently needed.
Disclosure of Invention
The invention aims to overcome the defects that EDID data needs to be written in VBIOS again to be displayed normally every time when the LCD is replaced in the prior art, and a plurality of obstacles are brought to the maintenance of the expandability of LCD display under the condition, and provides a mainboard circuit, a system and an implementation method for supporting various LCD displays.
In order to achieve the above purpose, the invention provides the following technical scheme:
a motherboard circuit supporting multiple LCD displays, comprising: the circuit comprises a CPU, an AC coupling capacitor, a PTN3460 chip and a pull-up resistor;
the display interface and the AUX interface of the CPU are electrically connected with the PTN3460 chip through the AC coupling capacitor, and the CPU is used for reading the input state of the GPIO interface of the LCD and writing the display parameters of the LCD into a relevant register of the PTN3460 chip;
the LCD display is electrically connected with the CPU, the PTN3460 chip and the pull-up resistor;
the pull-up resistor is used for changing the input state of a GPIO interface of the LCD display;
the PTN3460 chip is used for converting the eDP data into LVDS data and transmitting the LVDS data to the LCD display.
The display parameters include: display resolution, CLOCK output mode in dual LVDS mode, LVDS mode and data format.
By adopting the technical scheme, the specifications of various LCD displays can be automatically identified and can work normally.
As a preferable embodiment of the present invention, the I2C interface of the CPU is electrically connected to the I2C interface of the PTN 3460.
As a preferable scheme of the invention, the GPIO interface of the CPU is electrically connected with the GPIO interface of the LCD display.
As a preferable scheme of the present invention, the pull-up resistor is electrically connected to a GPIO interface of the LCD display.
As a preferred aspect of the present invention, the LVDS interface of the PTN3460 is electrically connected to the LVDS interface of the LCD display.
In another aspect, a system supporting multiple LCD displays is provided, including any one of the above motherboard circuits, and a motherboard BIOS, where the motherboard BIOS is configured to drive the motherboard circuit.
By adopting the technical scheme, the mainboard BIOS drives the mainboard circuit, so that the display of various LCD displays is supported under the condition of keeping the hardware part unmodified.
In another aspect, an implementation method supporting multiple LCD displays is provided, where the implementation method uses the above system, and includes the following steps:
s100: the mainboard circuit is powered on and started;
s200: a user reads a BIOS menu, selects an identification mode of a currently connected LCD display, and selects automatic identification or manual identification;
s300: display driving is performed.
By adopting the technical scheme, the system can automatically identify or manually identify the specification of the LCD display, and the matched parameters are used for enabling the LCD display to normally display.
As a preferred aspect of the present invention, the automatic identification includes the steps of:
s201: the mainboard BIOS drives the CPU to acquire the input state of the GPIO interface of the LCD;
s202: the CPU initializes the PTN3460 chip according to a truth table;
s203: the main board BIOS driver sends an I2C-over-AUX command to the PTN3460 chip;
s204: the PTN3460 chip simulates EDID data and returns the EDID data to the CPU through the AUX interface.
As a preferred aspect of the present invention, the truth table includes display parameters corresponding to each input state of the GPIO interface of the LCD display.
By adopting the technical scheme, the configuration parameters of the LCD can be matched through the truth table, and the driving of various LCD displays is realized.
As a preferred embodiment of the present invention, in the step S200, the manual recognition includes the steps of:
s211: the main board BIOS opens the self-defined option of the PTN3460, and a user manually configures the parameters of the LCD display and the display parameters of the PTN3460 through the BIOS menu;
s222: and the mainboard BIOS drives and reads VBT to obtain EDID data of the LCD, wherein the VBT is provided by VBIOS.
By adopting the technical scheme, the display specification of most LCD displays on the market can be supported.
Compared with the prior art, the invention has the beneficial effects that: through the combination of the hardware part and the software part, the eDP data stream is converted into the LVDS protocol through the PTN3460 chip, so that the LCD can work on a mainboard without an LVDS interface conveniently, the internal configuration of the PTN3460 chip can be completed through an internal integrated I2C interface, the display driving of various LCD displays is realized, and the VBIOS internal self-contained VBT can support the display specification of most LCD displays in the market.
Drawings
Fig. 1 is a schematic diagram of a motherboard circuit supporting multiple LCD displays according to embodiment 1 of the present invention;
FIG. 2 is a block diagram of a system supporting multiple LCD displays according to embodiment 2 of the present invention;
fig. 3 is a flowchart of an implementation method for supporting multiple LCD displays according to embodiment 3 of the present invention.
Detailed Description
The present invention will be described in further detail with reference to test examples and specific embodiments. It should be understood that the scope of the above-described subject matter is not limited to the following examples, and any techniques implemented based on the disclosure of the present invention are within the scope of the present invention.
Example 1
A motherboard circuit supporting multiple LCD displays, as shown in fig. 1, comprising: the circuit comprises a CPU, an AC coupling capacitor, a PTN3460 chip and a pull-up resistor;
the display interface and the AUX interface of the CPU are electrically connected with the PTN3460 chip through the AC coupling capacitor, and the CPU is used for reading the input state of the GPIO interface of the LCD and writing the display parameters of the LCD into a relevant register of the PTN3460 chip;
the description of the relevant registers is as follows:
LVDS interface control1(0x81)
the register completes the setting of pixel color depth, data packet format, LVDS mode and clock output mode as follows:
EDID ROM emulation control(0x84)
the register completes selection of EDID source and built-in EDID number. The EDID source can be set as an EDID internal or obtained through a DDC bus, and the configuration register inside the eDP to LVDS data PTN3460 chip is:
EDID ROM access control(0x85)
the register sets the number of the built-in EDID to be accessed. Internal EDID can be obtained from register positions 0-127, and the configuration register inside the chip for converting eDP data into LVDS data PTN3460 is as follows:
the LCD display is electrically connected with the CPU, the PTN3460 chip and the pull-up resistor;
the pull-up resistor is used for changing the input state of a GPIO interface of the LCD display;
the PTN3460 chip is used for converting the eDP data into LVDS data and transmitting the LVDS data to the LCD display.
The I2C interface of the CPU is electrically connected with the I2C interface of the PTN 3460.
The GPIO interface of the CPU is electrically connected with the GPIO interface of the LCD display,
the pull-up resistor is electrically connected with the GPIO interface of the LCD.
Specifically, the states of the GPIOs are divided into high and low levels, the high level represents 1, the low level represents digital 0, the state of the GPIOs can be changed by a pull-up resistor, and the GPIOs connected with the pull-up resistor are at the high level.
Specifically, according to different LCD displays, signals of LCD _ ID 0-ID 2 are selectively communicated with the ground of the display screen, and the connection mode has 8 connection possibilities in total.
The LVDS interface of the PTN3460 is electrically connected with the LVDS interface of the LCD display.
The display parameters include: display resolution, CLOCK output mode in dual LVDS mode, LVDS mode and data format.
By adopting the technical scheme, the specifications of various LCD displays can be automatically identified and can work normally.
Example 2
A system supporting multiple LCD displays, as shown in fig. 2, includes the motherboard circuit of embodiment 1, and a motherboard BIOS, where the motherboard BIOS is configured to drive the motherboard circuit.
By adopting the technical scheme, the mainboard BIOS drives the mainboard circuit to support the display of various LCD displays under the condition of keeping the hardware part unmodified
Example 3
An implementation method supporting multiple LCD displays, the implementation method using the system described in embodiment 2, comprising the steps of:
s100: the mainboard circuit is powered on and started;
s200: a user reads a BIOS menu, selects an identification mode of a currently connected LCD display, and selects automatic identification or manual identification;
s300: display driving is performed.
The automatic identification comprises the following steps:
s201: the mainboard BIOS drives the CPU to acquire the input state of the GPIO interface of the LCD;
s202: the CPU initializes the PTN3460 chip according to a truth table;
s203: the main board BIOS driver sends an I2C-over-AUX command to the PTN3460 chip;
s204: the PTN3460 chip simulates EDID data and returns the EDID data to the CPU through the AUX interface.
Specifically, the input state is already set on the connection line between the LCD display and the main board circuit.
And the truth table comprises display parameters corresponding to each input state of the GPIO interface of the LCD.
Specifically, the truth table is as follows:
in step S200, the manual identification includes the following steps:
s211: the main board BIOS opens the self-defined option of the PTN3460, and a user manually configures the parameters of the LCD display and the display parameters of the PTN3460 through the BIOS menu;
s222: and the mainboard BIOS drives and reads VBT to obtain EDID data of the LCD, wherein the VBT is provided by VBIOS.
The specification of the VBT default LCD display is as follows:
specifically, when an LCD display with a resolution of 1280 × 800 needs to be supported, the Panel number is set to 14, and if the LCD display specification outside the above table appears, the support can be achieved by directly modifying the VBT DTD parameter.
By adopting the technical scheme, the system can automatically identify or manually identify the specification of the LCD display, and the matched parameters are used for enabling the LCD display to normally display, so that the display specification of most LCD displays in the market can be supported.
Example 4
This example is a specific example of embodiment 3,
automatically identifying read GPIO [ 0-2 ] = 001b, indicating that the resolution of an LCD connected at the rear end is 1280x800, the LVDS mode is a single bus, the data format is JEIDA, the clock mode is Box, and in order to complete the code logic in the BIOS of the configuration items, the method comprises the following steps:
initializing PTN3460
[0x81] = 0x13;
[0x84] = 0x00。
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A motherboard circuit for supporting a plurality of LCD displays, comprising: the circuit comprises a CPU, an AC coupling capacitor, a PTN3460 chip and a pull-up resistor;
the display interface and the AUX interface of the CPU are electrically connected with the PTN3460 chip through the AC coupling capacitor, and the CPU is used for reading the input state of the GPIO interface of the LCD and writing the corresponding display parameters of the LCD into a relevant register of the PTN3460 chip according to the input state;
the LCD display is electrically connected with the CPU, the PTN3460 chip and the pull-up resistor;
the pull-up resistor is used for changing the input state of a GPIO interface of the LCD display;
the PTN3460 chip is used for converting the eDP data into LVDS data and transmitting the LVDS data to the LCD display.
2. A motherboard circuit supporting multiple LCD displays as recited in claim 1, wherein the I2C interface of the CPU is electrically connected to the I2C interface of the PTN3460 chip.
3. The motherboard circuit capable of supporting multiple LCD displays as recited in claim 1, wherein said GPIO interface of said CPU is electrically connected to said GPIO interface of said LCD display.
4. The main board circuit supporting multiple LCD displays according to claim 3, wherein the pull-up resistor is electrically connected with GPIO interface of the LCD display.
5. The motherboard circuit supporting various LCD displays as recited in claim 1, wherein the LVDS interface of the PTN3460 chip is electrically connected with the LVDS interface of the LCD display.
6. A system supporting multiple LCD displays, comprising a motherboard circuit as claimed in any one of claims 1 to 5, and a motherboard BIOS for driving the motherboard circuit.
7. An implementation method supporting multiple LCD displays, the implementation method using the system of claim 6, comprising the steps of:
s100: the mainboard circuit is powered on and started;
s200: a user reads a BIOS menu, selects an identification mode of a currently connected LCD display, and selects automatic identification or manual identification;
s300: display driving is performed.
8. The method according to claim 7, wherein in the step S200, the automatically recognizing comprises the steps of:
s201: the mainboard BIOS drives the CPU to acquire the input state of the GPIO interface of the LCD;
s202: the CPU initializes the PTN3460 chip according to a truth table;
s203: the main board BIOS driver sends an I2C-over-AUX command to the PTN3460 chip;
s204: the PTN3460 chip simulates EDID data and returns the EDID data to the CPU through the AUX interface.
9. The method of claim 8, wherein the truth table comprises display parameters corresponding to each input state of a GPIO interface of the LCD display.
10. The method according to claim 7, wherein the step S200 of manually recognizing comprises the steps of:
s211: the main board BIOS opens the self-defined option of the PTN3460 chip, and a user manually configures the parameters of the LCD through the BIOS menu;
s222: and the mainboard BIOS drives and reads VBT to obtain EDID data of the LCD, wherein the VBT is provided by VBIOS.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004184560A (en) * | 2002-11-29 | 2004-07-02 | Nanao Corp | Method, system and device for display, interface device and computer program |
| CN202206063U (en) * | 2011-09-05 | 2012-04-25 | 江苏西电南自智能电力设备有限公司 | GIS (geographic information system) integrated imitation screen |
| CN102708077A (en) * | 2012-05-25 | 2012-10-03 | 华为终端有限公司 | State recognition method and state recognition apparatus |
| CN106847194A (en) * | 2015-12-03 | 2017-06-13 | 深圳市祈飞科技有限公司 | The system and method for LVDS output resolution ratios are set |
| CN207425324U (en) * | 2017-08-11 | 2018-05-29 | 合肥惠科金扬科技有限公司 | A kind of display driving system and integral computer |
| CN110895916A (en) * | 2018-09-20 | 2020-03-20 | 研祥智能科技股份有限公司 | System for adaptively setting output resolution of LVDS (Low Voltage differential Signaling) interface |
| CN211427195U (en) * | 2019-12-10 | 2020-09-04 | 合肥市卓怡恒通信息安全有限公司 | Loongson platform all-in-one machine integrating KVM mainboard |
-
2022
- 2022-03-14 CN CN202210243738.5A patent/CN114333734A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004184560A (en) * | 2002-11-29 | 2004-07-02 | Nanao Corp | Method, system and device for display, interface device and computer program |
| CN202206063U (en) * | 2011-09-05 | 2012-04-25 | 江苏西电南自智能电力设备有限公司 | GIS (geographic information system) integrated imitation screen |
| CN102708077A (en) * | 2012-05-25 | 2012-10-03 | 华为终端有限公司 | State recognition method and state recognition apparatus |
| CN106847194A (en) * | 2015-12-03 | 2017-06-13 | 深圳市祈飞科技有限公司 | The system and method for LVDS output resolution ratios are set |
| CN207425324U (en) * | 2017-08-11 | 2018-05-29 | 合肥惠科金扬科技有限公司 | A kind of display driving system and integral computer |
| CN110895916A (en) * | 2018-09-20 | 2020-03-20 | 研祥智能科技股份有限公司 | System for adaptively setting output resolution of LVDS (Low Voltage differential Signaling) interface |
| CN211427195U (en) * | 2019-12-10 | 2020-09-04 | 合肥市卓怡恒通信息安全有限公司 | Loongson platform all-in-one machine integrating KVM mainboard |
Non-Patent Citations (1)
| Title |
|---|
| NXP SEMICONDUCTORS: "《PTN3460I数据手册》", 16 August 2016 * |
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