CN114327920A - Hardware resource sharing method for multiprocessor system - Google Patents
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Abstract
The invention discloses a hardware resource sharing method for a multiprocessor system, which comprises the steps of counting the number of hardware resources required to be shared by a target multiprocessor system; setting a special register to store the current state data of the hardware resource needing to be shared; designing a data rewriting rule of a special register; the processor system reads the data of the corresponding special register and occupies the corresponding shared hardware resource according to the read result; releasing the shared hardware resource and recovering the data of the corresponding special register after the resource is occupied; and completing the hardware resource sharing of the multiprocessor system. The hardware resource sharing method for the multiprocessor system provided by the invention realizes the hardware resource sharing of the multiprocessor system through an innovative resource sharing mechanism design, and has the advantages of simple realization and high reliability.
Description
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a hardware resource sharing method for a multiprocessor system.
Background
With the development of integrated circuit technology and the continuous expansion of function scale, the integration level and complexity of chip design are higher and higher. The large-scale high-integration chip is often internally provided with a plurality of processors, so that a multi-processor system is formed, and each system is independent and mutually associated. Generally, the processors themselves are relatively independent, and most of the hardware resources are related to each other or shared by multiple processors. The hardware resources comprise an SRAM corresponding to a certain section of address space, a DDR memory space corresponding to a certain section of address space, and different peripherals such as UART, SPI, IIC and the like. These hardware resources need to be called by multiple processor systems.
In a multi-processor environment, each processor may use a resource (peripheral or memory) at times. The processor can judge the occupation condition of the equipment by reading the zone bit (or IDLE and BUSY states) of the resource; if the flag bit is read, the bus is judged to be BUSY, the resource is indicated to be unavailable, and then reading is carried out; if the flag bit is read, the IDLE is judged, and then the flag bit is operated to enable the state of the resource to be BUSY; then, there is a problem here: in the case where a plurality of processors operate this flag bit at the same time, the state value of the flag bit is unreliable; the time is needed for the state value of the state bit to return to the processor, and the time is also needed for the state value of the state bit to change to BUSY; during this time period, if another processor accesses the flag register, the value it returns is incorrect; therefore, this situation requires additional attention from the researcher.
The hardware resource sharing scheduling schemes for multiprocessor systems today are generally divided into two types: the first is a physically isolated deployment and the second is a broadcast deployment. In the first scheme, all hardware resources are generally allocated in advance, and scheduling is directly performed according to the allocated scheme; for example, the first processor system uses the first path of UART, the second processor system uses the second path of UART, and so on; and the hardware resources between the various processor systems are dedicated and not shared. In the second scheme, when a certain processor system needs to use a certain hardware resource, the processor system needs to notify other systems of a message that the certain hardware resource needs to be used by the processor system in a broadcast mode, and judges whether the certain hardware resource can be used or not according to feedback; for example, the first path SPI needs to be used by the first processor system, and the first processor system first sends out a broadcast message to be received by all other processors; broadcast messages are typically sent using bus interconnect or interrupt lines; at this time, if no other processor system uses the first path of SPI, a specific message is fed back to the first processor system, and then the first processor system starts to use and operate the first path of SPI; however, if some of the other processor systems is using the path of SPI, a specific message is fed back to let the processor system know that the processor system needs to wait for a specific period of time before broadcasting using the first path of SPI is initiated until all the feedback indicates that the first path of SPI device is idle, and then the first path of processor system starts using the first path of SPI.
Aiming at two methods in the prior art, although the first method is the simplest and most effective use method, the system of the first method is lack of flexibility and waste of hardware resources can be caused; the first approach is clearly ineffective, particularly in some special-purpose systems, when multiple processor systems must use the same hardware resources. The second method realizes hardware resource sharing of the multiprocessor system, but the operation is extremely complex, and a broadcast and feedback protocol needs to be designed among the multiprocessor systems; especially when the number of processor systems is large, the protocol implementation can be very complex.
Disclosure of Invention
The invention aims to provide a hardware resource sharing method for a multiprocessor system, which can realize high sharing of hardware resources, is simple to realize and has high reliability.
The hardware resource sharing method for the multiprocessor system comprises the following steps:
s1, counting the number of the hardware resources needing to be shared aiming at the target multiprocessor system;
s2, setting a special register for storing the current state data of the hardware resource to be shared;
s3, designing the data rewriting rule of the special register set in the step S2 to ensure that each hardware resource needing to be shared can be shared by the multiprocessor system;
s4, when some processor system in the target multiprocessor system needs to call some shared hardware resource, the processor system reads the data of the corresponding special register;
s5, the processor system occupies the corresponding shared hardware resource according to the read data of the special register;
s6, after the processor system occupies the shared hardware resource, it releases the corresponding shared hardware resource and recovers the data of the corresponding special register; thereby completing the hardware resource sharing of the multiprocessor system.
The setting special register in step S2 is used to store the current state data of the hardware resource that needs to be shared, specifically, the settingNEach special register corresponds to one hardware resource needing to be shared, and each special register is used for storing the current state data of the corresponding hardware resource needing to be shared;Nis a positive integer and takes the value of the amount of hardware resources that need to be shared.
The designing of the data rewrite rule of the special register set in step S2 described in step S3 to ensure that each hardware resource to be shared can be shared by the multiprocessor system, specifically including the following steps:
setting an initial value of a special register, and indicating that the hardware resource needing to be shared is in an idle state by using the initial value;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is the initial value, the special registerjAfter returning to the initial value, the initial value stored in the register is changed into a state value representing a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is a status value, the special registerjKeeping the value stored by the self as a state value;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the written value is the initial value, the special registerjWill retain the original value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (2) is a state value, the special registerjModifying the value stored by the self-storage device into an initial value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (a) is an initial value, the special registerjThe value stored in itself is held as the initial value.
The processor system stated in step S5 occupies the corresponding shared hardware resource according to the read data of the special register, and specifically includes the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjIndicates that the corresponding shared hardware resource is in an idle state when the data of (1) is an initial value, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data is a state value, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiAnd continuously waiting until the data of the corresponding special register is read next time.
After the processor system occupies the shared hardware resource, releasing the corresponding shared hardware resource and recovering the data of the corresponding special register in step S6, which specifically includes the following steps:
the processor systemiAnd after occupying the shared hardware resources, releasing the corresponding shared hardware resources, and writing a state value into the corresponding special register.
The data rewriting rule of the special register set in the designing step S2 ensures that each hardware resource to be shared can be shared by the multiprocessor system, and specifically includes the following steps:
setting the initial value of a special register to be 0, and using the initial value 0 to represent that the hardware resource needing to be shared is in an idle state;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is 0, the special registerjAfter returning to 0, the value of the register is changed to 1 to indicate a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is 1, the special registerjKeeping the value stored by the self as 1;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the value written is 0, the special registerjWill retain the original value;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 1, the registerjModifying the value stored by the self-storage device into 0;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 0, the registerjThe value stored in itself is kept to 0.
The processor system occupies the corresponding shared hardware resource according to the read data of the special register, and specifically comprises the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjThe data of (1) indicates that the corresponding shared hardware resource is in an idle state, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data of (1) is 1, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiAnd continuously waiting until the data of the corresponding special register is read next time.
After the processor system occupies the shared hardware resource, releasing the corresponding shared hardware resource and recovering the data of the corresponding special register, specifically comprising the following steps:
the processor systemiAfter occupying the shared hardware resources, releasing the corresponding shareAnd writes 1 to the corresponding dedicated register.
The hardware resource sharing method for the multiprocessor system provided by the invention realizes the hardware resource sharing of the multiprocessor system through an innovative resource sharing mechanism design, and has the advantages of simple realization and high reliability.
Drawings
FIG. 1 is a schematic process flow diagram of the process of the present invention.
Detailed Description
FIG. 1 is a schematic flow chart of the method of the present invention: the hardware resource sharing method for the multiprocessor system comprises the following steps:
s1, counting the number of the hardware resources needing to be shared aiming at the target multiprocessor system;
s2, setting a special register for storing the current state data of the hardware resource to be shared; in particular to be provided withNEach special register corresponds to one hardware resource needing to be shared, and each special register is used for storing the current state data of the corresponding hardware resource needing to be shared;Nthe number of the hardware resources is positive integer, and the value is the number of the hardware resources needing to be shared;
s3, designing the data rewriting rule of the special register set in the step S2 to ensure that each hardware resource needing to be shared can be shared by the multiprocessor system; the method specifically comprises the following steps:
setting an initial value of a special register, and indicating that the hardware resource needing to be shared is in an idle state by using the initial value;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is the initial value, the special registerjAfter returning to the initial value, the initial value stored in the register is changed into a state value representing a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is a status value, the special registerjHoldingThe value stored by the self is a state value;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the written value is the initial value, the special registerjWill retain the original value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (2) is a state value, the special registerjModifying the value stored by the self-storage device into an initial value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (a) is an initial value, the special registerjKeeping the value stored by the self as an initial value;
s4, when some processor system in the target multiprocessor system needs to call some shared hardware resource, the processor system reads the data of the corresponding special register;
s5, the processor system occupies the corresponding shared hardware resource according to the read data of the special register; the method specifically comprises the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjIndicates that the corresponding shared hardware resource is in an idle state when the data of (1) is an initial value, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data is a state value, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiContinuing to wait until the data of the corresponding special register is read next time;
s6, after the processor system occupies the shared hardware resource, it releases the corresponding shared hardware resource and recovers the data of the corresponding special register; thereby completing the hardware resource sharing of the multiprocessor system; the method specifically comprises the following steps:
the processor systemiAfter occupying the shared hardware resources, releasing the corresponding shared hardware resources, and pairingThe corresponding special register writes the status value.
When embodied as a preferred embodiment, the method of the present invention comprises the steps of:
s1, counting the number of the hardware resources needing to be shared aiming at the target multiprocessor system;
s2, setting a special register for storing the current state data of the hardware resource to be shared; in particular to be provided withNEach special register corresponds to one hardware resource needing to be shared, and each special register is used for storing the current state data of the corresponding hardware resource needing to be shared;Nthe number of the hardware resources is positive integer, and the value is the number of the hardware resources needing to be shared;
s3, designing the data rewriting rule of the special register set in the step S2 to ensure that each hardware resource needing to be shared can be shared by the multiprocessor system; the method specifically comprises the following steps:
setting the initial value of a special register to be 0, and using the initial value 0 to represent that the hardware resource needing to be shared is in an idle state;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is 0, the special registerjAfter returning to 0, the value of the register is changed to 1 to indicate a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is 1, the special registerjKeeping the value stored by the self as 1;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the value written is 0, the special registerjWill retain the original value;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 1, the registerjModifying the value stored by the self-storage device into 0;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 0, the registerjKeeping the value stored in the memory to be 0;
s4, when some processor system in the target multiprocessor system needs to call some shared hardware resource, the processor system reads the data of the corresponding special register;
s5, the processor system occupies the corresponding shared hardware resource according to the read data of the special register; the method specifically comprises the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjThe data of (1) indicates that the corresponding shared hardware resource is in an idle state, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data of (1) is 1, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiContinuously waiting until the data of the corresponding special register is read next time
S6, after the processor system occupies the shared hardware resource, it releases the corresponding shared hardware resource and recovers the data of the corresponding special register; thereby completing the hardware resource sharing of the multiprocessor system; the method specifically comprises the following steps:
the processor systemiAnd after occupying the shared hardware resources, releasing the corresponding shared hardware resources, and writing 1 into the corresponding special register.
The invention uses a (group) special register to represent the occupied state of the equipment, and uses a set of simple rules to realize the reliable sharing mechanism of resources in a multiprocessor system.
The special register has the characteristics of reading automatic setting 1 and writing 1 and setting 0, so that the occupied state of resources (including peripheral equipment or a memory) is more reliable.
The special register designed by the invention can very conveniently and quickly solve the problem of reliability of the resource occupation state: when the processor tries to use a certain resource (peripheral or memory), the register address for marking the resource occupation state is accessed, namely the processor has an action of reading the register, the action does not simply make the processor know the occupation state of the resource, and the action also triggers the automatic jump from 0 to 1 of the register (if the current state is 0); even if the current processor does not operate the register immediately (and does not need) and the read operation of other processors can obtain the reliable state for representing the resource occupation condition, and the misjudgment can not be carried out.
In cooperation with the special register designed by the invention, the invention also provides a use rule followed by processor software: "read 0 used, write 1 released"; therefore, under the multi-processor environment, the processor software does not need a handshake negotiation mechanism any more, and the sharing of hardware resources can be conveniently and reliably realized.
Claims (7)
1. A method for sharing hardware resources in a multiprocessor system, comprising the steps of:
s1, counting the number of the hardware resources needing to be shared aiming at the target multiprocessor system;
s2, setting a special register for storing the current state data of the hardware resource to be shared;
s3, designing the data rewriting rule of the special register set in the step S2 to ensure that each hardware resource needing to be shared can be shared by the multiprocessor system;
s4, when some processor system in the target multiprocessor system needs to call some shared hardware resource, the processor system reads the data of the corresponding special register;
s5, the processor system occupies the corresponding shared hardware resource according to the read data of the special register;
s6, after the processor system occupies the shared hardware resource, it releases the corresponding shared hardware resource and recovers the data of the corresponding special register; thereby completing the hardware resource sharing of the multiprocessor system.
2. Hardware resource sharing method for multiprocessor system according to claim 1Wherein the setting dedicated register of step S2 is used to store the current status data of the hardware resource to be shared, specifically settingNEach special register corresponds to one hardware resource needing to be shared, and each special register is used for storing the current state data of the corresponding hardware resource needing to be shared;Nis a positive integer and takes the value of the amount of hardware resources that need to be shared.
3. The method according to claim 2, wherein the step S3 of designing the data rewrite rule of the special register set in step S2 ensures that each hardware resource to be shared can be shared by the multiprocessor system, and comprises the following steps:
setting an initial value of a special register, and indicating that the hardware resource needing to be shared is in an idle state by using the initial value;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is the initial value, the special registerjAfter returning to the initial value, the initial value stored in the register is changed into a state value representing a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is a status value, the special registerjKeeping the value stored by the self as a state value;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the written value is the initial value, the special registerjWill retain the original value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (2) is a state value, the special registerjModifying the value stored by the self-storage device into an initial value;
if special purpose registerjThe value written is a state value and the special registerjWhen the current value of (a) is an initial value, the special registerjThe value stored in itself is held as the initial value.
4. The method as claimed in claim 3, wherein the processor system occupies the corresponding shared hardware resource according to the read data of the special register in step S5, and the method specifically comprises the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjIndicates that the corresponding shared hardware resource is in an idle state when the data of (1) is an initial value, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data is a state value, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiContinuing to wait until the data of the corresponding special register is read next time;
after the processor system occupies the shared hardware resource, releasing the corresponding shared hardware resource and recovering the data of the corresponding special register in step S6, which specifically includes the following steps:
the processor systemiAnd after occupying the shared hardware resources, releasing the corresponding shared hardware resources, and writing a state value into the corresponding special register.
5. The method according to claim 2, wherein the data rewrite rule of the special register set in the designing step S2 ensures that each hardware resource to be shared can be shared by the multiprocessor system, and specifically comprises the following steps:
setting the initial value of a special register to be 0, and using the initial value 0 to represent that the hardware resource needing to be shared is in an idle state;
if processor systemiAccessing special purpose registersjAnd read the special registerjThe value of (c):
if special purpose registerjIf the returned value is 0, the special registerjAfter returning to 0, the value of the register is changed to 1 to indicate a special registerjThe corresponding shared hardware state is occupied;
if special purpose registerjIf the returned value is 1, the special registerjKeeping the value stored by the self as 1;
if processor systemiAccessing special purpose registersjParallel special registerjWhen writing the value:
if special purpose registerjWhen the value written is 0, the special registerjWill retain the original value;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 1, the registerjModifying the value stored by the self-storage device into 0;
if special purpose registerjA value of 1 being written and a special registerjWhen the current value of (2) is 0, the registerjThe value stored in itself is kept to 0.
6. The method as claimed in claim 5, wherein the processor system occupies the corresponding shared hardware resource according to the read data of the dedicated register, and comprises the following steps:
the processor systemiObtaining read special registersjAnd making the following judgments:
if read special registerjThe data of (1) indicates that the corresponding shared hardware resource is in an idle state, and the processor system is in the idle stateiOccupying shared hardware resources;
if read special registerjIf the data of (1) is 1, indicating that the corresponding shared hardware resource is in an occupied state; processor system at this timeiAnd continuously waiting until the data of the corresponding special register is read next time.
7. The method as claimed in claim 6, wherein the step of releasing the corresponding shared hardware resource and recovering the data of the corresponding dedicated register after the shared hardware resource is completely occupied by the processor system comprises the following steps:
the processor systemiAnd after occupying the shared hardware resources, releasing the corresponding shared hardware resources, and writing 1 into the corresponding special register.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101065736A (en) * | 2004-11-30 | 2007-10-31 | 国际商业机器公司 | Managing multiprocessor operations |
CN101078996A (en) * | 2006-05-06 | 2007-11-28 | 辉达公司 | System and method for hardware share |
US20090138683A1 (en) * | 2007-11-28 | 2009-05-28 | Capps Jr Louis B | Dynamic instruction execution using distributed transaction priority registers |
CN101546275A (en) * | 2008-03-26 | 2009-09-30 | 中国科学院微电子研究所 | Multiprocessor system with hardware semaphore module and realization method thereof |
US20120089812A1 (en) * | 2009-06-12 | 2012-04-12 | Graeme Roy Smith | Shared resource multi-thread processor array |
CN114036091A (en) * | 2021-10-30 | 2022-02-11 | 西南电子技术研究所(中国电子科技集团公司第十研究所) | Multiprocessor peripheral multiplexing circuit and multiplexing method thereof |
-
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- 2022-03-16 CN CN202210256324.6A patent/CN114327920B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101065736A (en) * | 2004-11-30 | 2007-10-31 | 国际商业机器公司 | Managing multiprocessor operations |
CN101078996A (en) * | 2006-05-06 | 2007-11-28 | 辉达公司 | System and method for hardware share |
US20090138683A1 (en) * | 2007-11-28 | 2009-05-28 | Capps Jr Louis B | Dynamic instruction execution using distributed transaction priority registers |
CN101546275A (en) * | 2008-03-26 | 2009-09-30 | 中国科学院微电子研究所 | Multiprocessor system with hardware semaphore module and realization method thereof |
US20120089812A1 (en) * | 2009-06-12 | 2012-04-12 | Graeme Roy Smith | Shared resource multi-thread processor array |
CN114036091A (en) * | 2021-10-30 | 2022-02-11 | 西南电子技术研究所(中国电子科技集团公司第十研究所) | Multiprocessor peripheral multiplexing circuit and multiplexing method thereof |
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