CN1143222C

CN1143222C - High speed data bus driver

Info

Publication number: CN1143222C
Application number: CNB971825238A
Authority: CN
Inventors: J・图尔茨; J·图尔茨; 特斯丁; W·J·特斯丁
Original assignee: RCA Licensing Corp
Current assignee: RCA Licensing Corp; Technicolor USA Inc
Priority date: 1997-12-18
Filing date: 1997-12-18
Publication date: 2004-03-24
Anticipated expiration: 2017-12-18
Also published as: CN1288543A

Abstract

The present invention relates to a device, which uses a push-pull circuit to couple information on a data bus, such as an I<2>C data bus. The push-pull circuit provides two different data rates of transmitting data on the data bus and comprises an active lifting device which can provide high data rates under a first push-pull operation mode, and under a second operation mode, namely a normal mode, the active lifting device is forbidden and low data rates can be provided. When the active lifting device is forbidden, a connected external resistor drives a clock and the data bus and data rates are lower than the data rates under the first mode.

Description

High speed data bus driver

Technical field

The present invention relates to digital data bus system.

Background technology

Some systems such as consumer electronics system, typically comprise plurality of devices, and such as integrated circuit, these equipment link together by a data bus, transmit information to each other.An example of this type system is exactly a television receiver, and it comprises an I ²The C serial data bus, transmission information between control microprocessor and tuner is so that the tuning a certain passage of tuner.I ²C is known serial data bus, comprises two data lines, and one is to be designated the clock line of SCL and one to be connected to the serial data line that is called SDA that equipment room on the bus transmits information.Each equipment has a unique address, guarantees that the information on the bus can directly send to a certain particular device.Each equipment can send information, can receive information, and perhaps the needs according to functions of the equipments not only send but also receive.Except sending and receiving, every equipment can also serve as main equipment or slave unit when actual figure reportedly send.Main equipment is meant data transfer procedure of beginning and the equipment of clocking to realize transmitting on bus.This moment, any equipment that has the address was slave unit.

I ²The C data bus is a kind of bus of many main equipments, promptly can have more than this bus of device control.Main equipment is opertaing device normally, microprocessor for example, microcomputer or microcontroller (also being referred to as " controller " here).Many microcontrollers can be connected and mean on the bus that many main equipments can attempt to begin to send data simultaneously on bus.A process that is called arbitration can successfully address this problem.Arbitrated procedure depends on all I on the bus ²The line of C interface be connected.If plural main equipment is attempted information is passed on the bus, first produces a logic one, and when logical zero of another generation, arbitrated procedure finishes.Clock signal in the arbitrated procedure is those synchronization of clock signals combinations that produce by line and the main equipment that is connected on the scl line.In order to realize wired and computing, I ²The equipment of pointing out to be connected in the explanation of C bus protocol on the bus will have an open-drain or collection utmost point open circuit in its output stage.Therefore, the lifting of each bar line of bus realizes by the lifting resistance that connects between online and the voltage supply power supply usually.

At I ²The clocking task of main equipment always on the C bus.When transmitting data on bus, each main equipment produces the clock signal of oneself.Data are only just effective in the logic high stage of clock.Only when arbitrated procedure takes place, or the slow slave unit that suppresses clock line comes the clock signal of autonomous device just can change when suppressing clock signal.For instance, every byte data (i.e. 8 information) back of serving sda line must have one to confirm that the position follows.Produce by main equipment with confirming relevant time clock.Confirming the time clock stage, transmitter discharges sda line, the receiver sda line of leaving behind.By keeping the SCL clock line at logic low, force transfer equipment to enter waiting status, accepting device can delay the acceptance of another byte data, such as it is finished some other function and for example handles an interruption by the time.Authorize the United States Patent (USP) #4 of AdrianusP.M.Moelands and Herman Schutte, 689,740 describe I in detail ²C bus and agreement thereof.

Summary of the invention

The present invention partly belongs to such problem of recognizing: though the existence of relative simplicity and a large amount of compatible equipments makes shape such as I ²The bus protocol of C bus system is feasible, but the form of the bus driver related with this bus protocol may not satisfy the needs of some application.For example, I ²The bus driver that uses in the C bus uses an open type collection utmost point (or drain electrode) at large, and it has a kind of lifting resistance that is connected between bus and the voltage supply power supply.The capacity load of bus adds that the resistance that promotes resistance can reduce the pulling speed of bus to a great extent.Moreover capacity load increases along with the quantity that is connected the equipment on the bus.This will need situation high-speed and that relate to the high capacitance load throw into question to those, such as to the product test stage (please note " equipment " speech here comprise integrated circuit and instrument such as television receiver) of a kind of equipment in conjunction with the bus driver ability.And main equipment except will with the slave unit swap data, also have other a large amount of task to do.Therefore, a kind of bus driver of demand drives as I under the high speed high load condition ²The bus that C is such, transmission information between main equipment and slave unit as quickly as possible.

In addition, the inventor also recognize use a kind of revised can may be incompatible with existing bus compatible equipment at the bus driver that high capacity drives down at a high speed.Particularly existing I ²The current performance that falls behind gradually that C compatible equipment design possesses only can realize that the drop-down resistance that is raised keeps the bus line of high pressure (for example confirm at interval or cause waiting status).A kind of like this performance that falls behind gradually may and be not suitable for a drop-down bus line that is driven by high-speed driving circuit.

Although simultaneously the inventor recognizes that also it is adapted on the bus of high capacity doing producing bad noise effects like this with high data rate transport data.On data bus, draw together and to use the fast signal edge of containing the high-frequency harmonic composition with high data rate transfer data packets.Such as a television system, so high-frequency harmonic can bring the noise of Video processing passage, causes the bad noise effects of video image.

A kind of equipment that can transmit data and solve the problem of describing on bus that provides also partly is provided in this invention.In particular, the equipment of making according to the one side of the present invention comprises data bus, and be under first mode of operation with first speed and switching the slave equipment of signal condition on the bus between first and second states of signal, and be in the active devices that between first and second states, changes signal under second mode of operation with the second speed that is different from first speed.Second mode of operation may for example be confirmed state or data read state corresponding to a certain particular case.

According to invention on the other hand, the information of equipment generation is served I via a kind of equipment of recommending ²The C data bus.Invention relate to the equipment of recommending on the other hand with first and second modes of operation.Under first mode of operation, the equipment of recommending is coupled to I to information with first speed ²The C data bus.Under second mode of operation, the equipment of recommending is coupled to I to information with second speed ²The C data bus.

According to invention on the other hand, this equipment comprises that one is coupled to Coupling device and a kind of timing signals generator on the data bus to data, produces first and second portion that clock signal indicates TV signal.Coupling device is controlled according to clock signal by a kind of opertaing device, and Coupling device with the first speed coupling data, and is coupled to data on the bus with second speed in the second portion of TV signal in the first of TV signal like this.The first of TV signal may comprise an effective video at interval, and the second portion of signal may comprise a blank spaces.First speed of coupling data may be lower than the second speed of coupling data.In the first of TV signal, this equipment of recommending that comprises in the Coupling device can be under an embargo, and is activated at the second portion of signal, comes data to data bus with second speed.

The invention provides the device of data transmission on a kind of control data bus, this device comprises:

The driven lifting means that links to each other with data bus is used to set up first mode of operation, and data-signal transmits on data bus with first rate under this pattern;

The active lifting means that links to each other with data bus is used to set up second mode of operation, and signal transmits on data bus with second speed under this pattern, and described first rate is different from described second speed.

Wherein data bus is I ²C data bus, described driven lifting means comprise that promotes a resistance, are used to connect data bus and voltage source, and described active lifting means comprises a push-pull arrangement, between data bus and voltage source.Data are transmitted between a main equipment and a slave unit, and described active lifting means is included in the described main equipment, and described push-pull arrangement makes main equipment link to each other with data bus.Described active lifting means is under an embargo under described first operational mode, thereby prevents that described active lifting means from influencing described first rate.Described driven lifting means runs under first and second operational mode, is used at the signal that changes between logic high and the logic low state on the data bus.Data are transmitted between a main equipment and a slave unit, described active lifting means is included in the described main equipment, described push-pull arrangement connects main equipment and data bus, described first operational mode is corresponding to affirmation state or data read state, under this state, a slave unit transmits information to main equipment.

The present invention also provides a kind of processing television signals system, comprises the device of data transmission on the control data bus, and this device comprises:

The driven lifting means that links to each other with data bus is used to set up first operational mode, and data-signal transmits with first rate under this pattern;

The active lifting means that links to each other with data bus, be used to set up second operational mode, signal transmits on data bus with second speed under this pattern, described first rate is different from second speed, wherein said first operational mode takes place at the interval corresponding to first's TV signal, this TV signal is a video information, and described second operational mode takes place at the interval corresponding to the second portion TV signal, and this TV signal has the information except that video information.

Described processing television signals system further comprises a main equipment and slave unit that links to each other with data bus, wherein said data bus is the I2C data bus, data are transmitted between main equipment and slave unit, described active lifting means comprises a push-pull arrangement, connect main equipment and data bus, described active lifting means is under an embargo under first operational mode, thereby prevent that initiatively lifting means influences described first rate, described first operational mode is corresponding to an affirmation state or data read state, under this state, one of them slave unit transmits information to main equipment.

Description of drawings

Be easier to understand this invention with reference to accompanying drawing.

Fig. 1 is depicted as the device by the master-slave equipment of bus communication information in schematic form.

Fig. 2 A-2D illustrates sequential chart in schematic form, the operation of system in the key diagram 1.

Fig. 3 be depicted as in schematic form according to of the present invention a kind of between master-slave equipment the embodiment of the data highway system of the communication information.

Fig. 4 illustrates a part of embodiment of system among Fig. 3 in schematic form;

Fig. 5 A-5D is the sequential sketch, the working condition of system in the key diagram 3.

Embodiment

As shown in Figure 1 as I ²In the conventional bus system of C bus, main equipment 2 passes through I ²C bus 6 links to each other with slave unit 4 (being designated as slave unit #1).According to I ²C bus rule, label SDA and SCL are used for identifying serial data line and clock line respectively.Main equipment 2 has a driver respectively to drive every circuit.More particularly, circuit SCL is driven by the NPN

bipolar tube

8 and 10 that is connected on it respectively with SDA among Fig. 1.

Each

transistor

8 and 10 base stage are connected in the output terminal of

reverser

11,12 respectively.Independently drive signal SCL drives and the SDA driving, is connected respectively to the input end of corresponding reverser 11,12.When SCL drives and SDA drive signal when being logic high,

NPN transistor

8 and 10 is separately disconnected, and makes circuit SCL and SDA rise to high level respectively by lifting resistance R C and RD, for example rises to 5volts in Fig. 1.When SCL drives and SDA drive signal when being logic low,

NPN transistor

8 and 10 drop-down circuits separately are low level, for example line-to-ground among Fig. 1.

Slave unit 4 comprises a pull-down device, is embodied as a npn bipolar transistor 13 among Fig. 1, and its base terminal is linked the output of reverser 14.In case the base stage of transistor 13 receives a logic high signal, it is with regard to drop-down sda line road.The input end coupling of reverser 14 is to receive " reading of data " signal.When sense data from slave unit 4, switch between height such as " reading of data " input, transistor 13 drop-down circuit SDA take place.Slave unit 4 is coupled to the receive logic circuit of deal with data from the data of bus line SCL and SDA reception.

The lifting resistance of scl line is designated as RC, and the lifting resistance of sda line is called RD.Each promotes resistance, and an end connects typical 5 volts of supply voltages, represents the lump capacitor C C of equal value or the CD of circuit separately with being connected.As shown in Figure 1, SDA and scl line also are connected with other slave unit.Sda line is two-way, and scl line only is the output of the main equipment of clocking, i.e. equipment among Fig. 12.

Fig. 2 A-2D represents the corresponding sequential sketch of SCL drive signal respectively, appears at the signal on the scl line, SDA drive signal and the signal that appears on the sda line.SCL drives and the SDA drive signal is to be coupled to drive signal on SCL and the SDA bus respectively by pale pinkish purple equipment such as the

bus driver equipment

8,11 and 10,12 among Fig. 1.The transmission of nine bit data comprises that is confirmed a position, in Fig. 2 A-2D, drives with signal SCL, and SCL, SDA drives and the waveform of SDA shows.The solid line of signal SCL waveform partly is designated as " low C _C", shown because the scl line signal waveform that low capacity load forms on the scl line.Dotted line part minute mark in the SCL waveform is made " high C _C", the scl line signal waveform that the high capacitance load causes on the expression scl line.Similarly, represented among the figure that (solid line waveform in the SDA waveform is designated as " low C for the sda line of low capacity load _D") and the sda line of high capacitance load (the dotted line waveform note in the SDA waveform is made " high C _D").Confirm at interval (main equipment produces the acknowledging time pulse and comes mark, transmitter discharge sda line and at the drop-down sda line of acknowledging time recurrent interval receiver) data mode (logical zero and 1), also shown in Fig. 2 A-2D.

Fig. 3 has shown the bus driver device of principle according to the invention.At a high speed data rate when heavy duty is provided for example satisfies product test at a high speed, and Fig. 3 has illustrated the system the time-to-climb that minimizing being slow a kind of high capacitance loading condition under.Especially the bus driver in the main equipment 2 has comprised providing bus initiatively to promote and drop-down buffer device 15 and 16.More particularly, the

impact damper

15 and 16 of three condition with a kind of fast mode that should be referred to as push-pull mode, drives bus line SCL and SDA respectively.Still can be in a conventional manner (such as under low-speed mode by driven lifting resistance) realize the bus running.Under push-pull mode, the

impact damper

15 and 16 of three condition always is in state of activation; By the big relatively supply voltage that the three condition impact damper provides, bus line is thus lifted to the speed of logic high with respect to faster under the traditional mode.

The impact damper of three condition such as the impact damper among Fig. 3 15 and 16, can be realized as shown in Figure 4.Though embodiment shown in Figure 4 has been used field effect transistor, comprise that bipolar and various technology field effect transistor also can be used for realizing this quasi-driver.As shown in Figure 4, the drain electrode of PMOS transistor 17 and nmos pass transistor 18 is coupled.The source electrode of transistor 17 is received supply voltage such as 5 volts; The source electrode of transistor 18 is received a reference voltage, such as ground.The gate pole of transistor 17 has been received the output terminal of Sheffer stroke gate 34, and it has input signal " input ", and it is the data that are driven on the bus, and enable signal " enables ".The gate pole of transistor 18 has been received the output terminal of rejection gate 32, and it has input signal " input " and the reverse signal (reverse by reverser 30) of " enabling " process.When signal " enabled " to high (logical one), impact damper can transmit data.Concrete, when permitted, the logical zero in the signal " input " arrive bus (OUTPUT signal) through rejection gate 32 and transistor 18, and the logical one value in the signal " input " arrives bus through Sheffer stroke gate 34 and transistor 17.

Get back among Fig. 3, PP mode signal (push-pull mode) is produced by microprocessor 27.Microprocessor 27 decisions produce high or low level PP mode signal, and this signal deciding main equipment 2 is with push-pull mode or with normal mode work.The PP mode signal is sent into Sheffer stroke gate 22 through reverser 20.The SCL drive signal also is to be produced by microprocessor 27, inserts another input end of Sheffer stroke gate 22.The output of Sheffer stroke gate 22, for three-state buffer provides " enabling " signal, when the PP enable signal was logic high, impact damper 15 always was allowed to like this.When three-state buffer 15 is allowed to, with the equipment that activates in the impact damper 15 that the SCL drive signal of logic high links to each other scl line is risen to logic high, this is first state.When three-state buffer 15 is allowed to, with active equipment in the impact damper 15 that the SCL drive signal of logic low links to each other scl line is pulled down to logic low, this is second state.When the PP enable signal was in logic high, three-state buffer 15 always can drive scl line, and (height and low logic level) changes the state of scl line between first and second states.

In order to use push-pull mode, on sda line, realize logic high, main equipment 2 can not can not produce the SCL time clock for the affirmation position that slave unit produces from reading of data on the slave unit that is addressed.The PP enable signal also is coupled to an input end of Sheffer stroke gate 23 simultaneously by reverser 21.The SDA drive signal is also produced by microprocessor 27, is coupled to another input end of Sheffer stroke gate 23.The three-state buffer 16 of exporting to of Sheffer stroke gate 23 provides the permission signal, and when PP MEDE signal was in logic high, impact damper 16 always was allowed to like this.When three-state buffer 16 was allowed to, the equipment that activates in the impact damper 16 when linking to each other with the SDA drive signal of logic high rose to logic high to sda line; The equipment that activates in the impact damper 16 when linking to each other with the SDA drive signal of logic low puts sda line and draws logic low.

When main equipment 2 is in a read cycle or confirms that microprocessor 27 will produce the PP enable signal of a logic low at interval; When SCL and SDA drive signal were in logic high respectively,

impact damper

15 and 16 was under an embargo.At this moment, SCL and SDA bus are worked under normal mode, respectively by the resistance R of outside _CAnd R _DPromote.Microprocessor produces logic low PP enable signal during this period.Like this, under normal operation, the PP enable signal is the control bit of a logic low; When SCL drives and the SDA drive signal is in the logic high stage, driving I ²The three-state buffer of C bus is the output high-impedance state.In other words, SCL drives and SDA drives when being logical one, and push-pull mode has been closed.When the PP enable signal is logical zero, promotes resistance R C and RD and on bus line, set up logic high.That is to say that passive lifting resistance changes signal condition on the bus line at (logic low and logic high) between signal first and second states, change speed is by resistance that promotes resistance and the decision of the capacity load on the bus line.

Fig. 5 A-5D has shown the relative timing figure of selected signal on the bus shown in Figure 3.Waveform when now the waveform under the push-pull mode meets low capacitive load shown in the solid line fully.Should be noted that when the data that provided by driven unit 4 were provided main equipment 2, the push-pull mode of active cell equipment 2 must be suspended.This point is because generally speaking the slave unit on the bus does not have the push-pull mode driving force.In fact, please note that the affirmation shown in Fig. 2 A-2D is that slave unit 4 discharges or the SDA bus is remained low result at interval.During the slave unit return data, main equipment must discharge the DSA line, like this slave unit could be drop-down it.And fetch stage SCL bus clock must slow down, and allows the rising more slowly of return data on the sda line.

Shown in Fig. 5 A-5D, corresponding to the affirmation interval of the 9th clock period, the slave unit that is addressed returns one data to main equipment, and main equipment switches to normal mode from push-pull mode.Confirm that the interval timer cycle arbitrarily increases to original 2 times.The software of microprocessor 27 operations provides the control of clock period.In case slave unit returns reading or confirms position (logic high of the 9th clock period or logic low), slave unit is served bus to data by drop-down sda line or by allowing to promote resistance lifting sda line.During the slave unit return data, the purpose that increases the cycle of time clock on the scl line is can not be operated in this fact of push-pull mode in order to adapt to slave unit.A pure slave unit (the definition here is not prepare to make it as main equipment) promotes bus by push-pull mode till the ass ascends the ladder., please note in another embodiment of the invention, when a main equipment is used as slave unit, can realize total line traffic control by push-pull mode.

Although the preferred embodiment that specifically describes with reference to it of the present invention must understand that such description only is a method by way of example, can not explain it here from there being any circumscribed meaning to get on.What need further understand is that with reference to these descriptions, those skilled in the art also can understand and produce variation and some other embodiment of the present invention of some details aspects of this embodiment.For instance, combine I although be directed to such one ²The anti-case of the enforcement of the data bus of C agreement is described, and the present invention also is applicable to other data bus protocol in conjunction with the serial or parallel data transmission.The example of the data bus protocol that another the present invention is suitable for is the IM data bus protocol that ITT supports.

Also have, although traditional slave unit does not have the symmetrical operation pattern, those consider the manufacturer of invention disclosed herein, and this invention is in conjunction with the three-state buffer in the main equipment as mentioned above, and those pure slave units can be made by them.In addition, although the solid line of the concrete logic control signal utmost point and circuit is all described, wish to have in this field the modification that average personage does at 26S Proteasome Structure and Function of the present invention and do not depart from its essence and scope; Wish that simultaneously all these are changed and some other embodiment all meets following true scope of the present invention and the essence of stating.

Claims

1. the device of data transmission on the control data bus, this device comprises:

2. the described device of claim 1, wherein data bus is I ²The C data bus.

3. the described device of claim 2, wherein said driven lifting means comprise that promotes a resistance, are used to connect data bus and voltage source, and described active lifting means comprises a push-pull arrangement, between data bus and voltage source.

4. the described device of claim 3, wherein data are transmitted between a main equipment and a slave unit, and described active lifting means is included in the described main equipment, and described push-pull arrangement makes main equipment link to each other with data bus.

5. the described device of claim 1, wherein said active lifting means is under an embargo under described first operational mode, thereby prevents that described active lifting means from influencing described first rate.

6. the described device of claim 5, wherein said driven lifting means runs under first and second operational mode, is used at the signal that changes between logic high and the logic low state on the data bus.

7. the described device of claim 5, wherein data are transmitted between a main equipment and a slave unit, described active lifting means is included in the described main equipment, described push-pull arrangement connects main equipment and data bus, described first operational mode is corresponding to affirmation state or data read state, under this state, a slave unit transmits information to main equipment.

8. the described device of claim 7, wherein data bus is I ²The C data bus.

9. processing television signals system comprises the device of data transmission on the control data bus, and this device comprises:

10. the described processing television signals of claim 9 system further comprises a main equipment and a slave unit of linking to each other with data bus, and wherein said data bus is I ²The C data bus, data are transmitted between main equipment and slave unit, described active lifting means comprises a push-pull arrangement, connect main equipment and data bus, described active lifting means is under an embargo under first operational mode, thereby prevents that initiatively lifting means influences described first rate, and described first operational mode is corresponding to an affirmation state or data read state, under this state, one of them slave unit transmits information to main equipment.