CN114302179A - Video transmission method and device, electronic equipment and storage medium - Google Patents
Video transmission method and device, electronic equipment and storage medium Download PDFInfo
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Abstract
The invention provides a video transmission method, a video transmission device, electronic equipment and a storage medium. The method comprises the following steps: packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. The invention adopts a single carrier frequency domain equalization mode to carry out video transmission and has good diffraction and anti-interference capability.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a video transmission method and apparatus, an electronic device, and a storage medium.
Background
With the continuous development of the communication field, the demand for high-speed data transmission is remarkably increased. Video transmission in a non-line-of-sight channel often faces severe multipath effects, and a special anti-multipath interference technology is required to ensure the normal operation of a receiver.
Most of the existing non-line-of-sight high-speed video transmission utilizes orthogonal Frequency Division multiplexing (ofdm) (orthogonal Frequency Division multiplexing) and Single Carrier time Domain Equalization (SC-TDE).
When OFDM is used for transmitting information of a plurality of orthogonal carriers which only occupy small bandwidth in parallel, the problem of overlarge peak-to-average power ratio exists, and the reduction of the volume and the power consumption of equipment is not facilitated; the use of SC-TDE requires that the number of taps of its transversal filter should be larger than the number of symbols affected by intersymbol interference, which leads to a linear increase in computational complexity in case of maximum delay spread of multipath channels or an increase in symbol rate of the communication system.
Disclosure of Invention
In order to solve the above problems, the present invention provides a video transmission method, an apparatus, an electronic device and a storage medium, which are used to solve the problem of multipath interference encountered in the video transmission process.
The invention provides a video transmission method, which comprises the following steps:
packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end;
and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
Optionally, the performing, by the equalizer MMSE, frequency domain equalization on the video signal according to a single carrier frequency domain equalization algorithm to obtain a time domain video signal includes:
performing fast Fourier transform on the video signal so as to transform the video signal to a frequency domain to obtain a frequency domain video signal;
and multiplying the frequency domain video signal by the frequency domain of the equalizer MMSE, and then obtaining the time domain video signal through inverse fast Fourier transform.
Optionally, before sending the video signal to a receiving end in the corresponding time slot in the preset frame structure, the method further includes:
dividing time frames based on a time division multiple access mode to obtain the preset frame structure; the preset frame structure comprises at least three time slots, and each time slot corresponds to a path of video signals to be transmitted.
Optionally, the encoding is performed after the video signal to be transmitted is packaged into a data frame format by the network interface chip, and includes:
and packaging the video signal to be transmitted into a data frame format through a network interface chip, and then coding the video signal by adopting an AR4JA LDPC coding mode.
Optionally, before the receiving end sends the video signal to an equalizer MMSE, the method further includes:
performing frame synchronization on the video signal, and determining a frame header position;
performing frequency offset estimation on the video signal after frame synchronization, and performing frequency offset compensation on the video signal according to the estimated frequency offset;
and carrying out bit synchronization on the video signal after the frequency offset compensation so as to send the video signal after the bit synchronization to an equalizer MMSE.
Optionally, the portal chip is a W5500 chip.
The present invention also provides a video transmission apparatus, comprising:
the first processing module is used for packaging a video signal to be transmitted into a data frame format through an internet access chip, then coding the video signal, framing and modulating the coded video signal according to a preset frame structure, and then sending a corresponding time slot of the video signal in the preset frame structure to a receiving end;
and the second processing module is used for receiving the video signal and sending the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of any of the video transmission methods described above when executing the program.
The invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the video transmission method as described in any one of the above.
The invention also provides a computer program product comprising a computer program which, when executed by a processor, carries out the steps of the video transmission method as described in any one of the above.
According to the video transmission method, the video transmission device, the electronic equipment and the storage medium, video signals to be transmitted are packaged into a data frame format through an internet access chip and then are coded, the coded video signals are framed and modulated according to a preset frame structure, and then corresponding time slots of the video signals in the preset frame structure are sent to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. Therefore, the invention effectively resists multi-path interference by adopting a single carrier equalization technology, so that the video transmission method has an excellent video transmission function under various interference environments.
Drawings
In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a video transmission method provided by the present invention;
FIG. 2 is a second flowchart of a video transmission method according to the present invention;
FIG. 3 is a schematic structural diagram of a data frame format provided by the present invention;
FIG. 4 is a schematic diagram of a frame structure provided by the present invention;
FIG. 5 is a schematic structural diagram of a video transmission apparatus provided in the present invention;
fig. 6 is a schematic structural diagram of an electronic device provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the video transmission method provided by the present invention includes:
step 101: packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end;
in this step, it should be noted that, the sending end first sends the video signal received by the camera to the video compression board, and after video compression, packs the compressed signal by the W5500 network interface chip and sends it to the encoder. Optionally, the encoding part adopts AR4JA LDPC encoding, and compared with other encoding methods, such as convolutional encoding, the LDPC encoding has performance closer to the shannon limit. The AR4JA LDPC code punctures part of the check bits, thereby improving the code rate.
In this step, the coded video signal is framed and polarized according to a set frame structure, a baseband waveform is obtained by performing shaping interpolation on a shaping filter module according to a set communication rate, and the AD9361 performs up-conversion according to a set frequency point to complete transmission. Specifically, a baseband waveform is generated by an internal algorithm in a Field-Programmable Gate Array (FPGA), and then signal transmission is completed by adjusting a transmission frequency point of the AD9361 to a channel frequency 1050MHz adopted by design. As shown in fig. 3, the frame format packaged by the nic is divided into two parts, wherein the first part is a header part, and includes a source node IP address of 4 bytes, a source node port number of 2 bytes, and a video data length of 2 bytes. The second part is a video data part, and is divided by packing in 188 bytes, so that the video data length is N × 188 bytes, and N is 16 at maximum, and each pack of video data includes four bytes of video header and 184 bytes of video data. The video header contains 1 own sync byte fixed to 0x 47; 1 bit error indicating bit, 1 indicates that the packet has at least 1 bit transmission error; a 1-bit load cell start flag, where 1 indicates that this is the first packet data, i.e., the data start; 1 bit transmission priority, 1 indicating high priority; the 13-bit PID index is fixed to 0x 1324; 2 bits of encryption control, where 00 denotes unencrypted and the others denote encrypted; 2 bits of additional region control identification, wherein 01 represents no additional region, only Payload, 10 represents only additional region, no Payload, 11 represents additional region and Payload, 00 represents reservation; finally, a 4-bit continuous counter is used to identify that the current video is the packet data of the second few, 0-15 indicating the current packet ID.
Step 102: and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
In this step, after receiving the video signal, the receiving end first performs frame synchronization on the video signal to determine the position of the frame header. Specifically, the video signal is delayed step by step and multiplied and accumulated step by the coefficients of the m-sequence with the length of 512, and when the received data is just coincided with the delays, the accumulation result becomes larger, namely, a larger correlation peak is generated. The sampling rate is kept consistent with the received data by inserting 0 in the local m sequence, and then the autocorrelation function of the two is calculated, and when the peak value is reached, the last 1 bit data representing the frame head sequence comes. And then carrying out frequency offset estimation on the video signal after frame synchronization, and carrying out frequency offset compensation on the video signal according to the frequency offset obtained by estimation. Specifically, a data packet larger than two packets is immediately followed after the frame header is detected, and the pilot data of the two packets of data is used for frequency offset estimation. Since the channels through which the pilots of the adjacent data packets pass are the same, the amplitudes of the received complex sequences of the two data packets should be completely the same, and the pilot heads of the two data packets before and after the receiving end can be respectively expressed as:
、
easy to calculate
Comprises the following steps:
. From the above formula can be seen
And
the multiplication can cancel out the phase offset of the transmission system, leaving only the influence of the frequency offset, so the following formula can be easily calculated:
. Wherein the content of the first and second substances,
it can be seen that the phase of the final calculated result is only associated with the frequency offsetfResulting phase deviation
In connection with, i.e. only with
In connection with
The time interval between two pilot heads is known, so that the ratio of the phase values obtained finally is only required to be taken
The frequency offset may be calculated.
In this step, the video signal after the frequency offset compensation is subjected to bit synchronization, so that the video signal after the bit synchronization is sent to the equalizer MMSE. Specifically, the eye pattern opening maximum position is used as an optimal sampling point, so that each bit of information received by the receiving end is kept synchronous with the transmitting end. And then sending the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. Specifically, firstly, fast fourier transform is performed on the video signal to transform the video signal to a frequency domain to obtain a frequency domain video signal, and then the frequency domain video signal is multiplied by the frequency domain of the equalizer MMSE and then subjected to inverse fast fourier transform to obtain a time domain video signal.
The video transmission method provided by the invention comprises the steps of packaging a video signal to be transmitted into a data frame format through an internet access chip, then coding the video signal, framing and modulating the coded video signal according to a preset frame structure, and then sending a corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. Therefore, the invention effectively resists multi-path interference by adopting a single carrier equalization technology, so that the video transmission method has an excellent video transmission function under various interference environments.
Based on the content of the foregoing embodiment, in this embodiment, the performing, by the equalizer MMSE, frequency domain equalization on the video signal according to a single carrier frequency domain equalization algorithm to obtain a time domain video signal includes:
performing fast Fourier transform on the video signal so as to transform the video signal to a frequency domain to obtain a frequency domain video signal;
and multiplying the frequency domain video signal by the frequency domain of the equalizer MMSE, and then obtaining the time domain video signal through inverse fast Fourier transform.
In this embodiment, the single-carrier frequency domain equalization algorithm uses Fast Fourier transform (fft) and inverse Fast Fourier transform (ifft) operations, which can further reduce the computational complexity. The invention solves the problem of multipath interference by applying a single carrier frequency domain equalization technology, overcomes the defects of high peak-to-average power ratio (PAPR) and sensitivity to frequency deviation of OFDM, and reduces intersymbol interference by correcting or compensating the channel characteristics of a system.
Based on the content of the foregoing embodiment, in this embodiment, before sending the video signal to the receiving end in the corresponding time slot in the preset frame structure, the method further includes:
dividing time frames based on a time division multiple access mode to obtain the preset frame structure; the preset frame structure comprises at least three time slots, and each time slot corresponds to a path of video signals to be transmitted.
In this embodiment, to implement the multi-channel parallel transmission of video signals, each time frame is divided into a plurality of time slots when designing a frame structure, one channel of video signals to be transmitted corresponds to one time slot, and the time slots are independent of each other. The sending end compresses data transmitted back by a camera, packages the data through a W5500 chip, codes the data through a coder, and then frames the data according to a designed frame structure, wherein the 1 st path of video data transmission uses a time slot 1, the 2 nd path of video data transmission uses a time slot 2, and the 3 rd path of video data transmission uses a time slot 3 … and is respectively responsible for the transmission of multiple paths of data through a plurality of independent time slots. Optionally, when designing the frame structure, each time frame is divided into 3 time slots, one path of video signal to be transmitted corresponds to one time slot, and the 3 time slots are independent from each other. The sending end compresses data transmitted back by the camera, packages the data through a W5500 chip, codes the data through a coder, and then frames the data according to a designed frame structure, wherein the 1 st path of video data transmission uses time slot 1, the 2 nd path of video data transmission uses time slot 2, and the 3 rd path of video data transmission uses time slot 3.
In this embodiment, as shown in fig. 4, the frame structure includes: synchronization header, frame header, pilot header, data section.
The synchronous head data is used for carrying out AGC and bit synchronization algorithm, m sequence data of 512 symbols is closely followed by the synchronous head and used as a frame header to determine the initial position of the data, and before bit synchronization, namely at the level of a sampling point, correlation detection is carried out to determine the position of the frame header. And framing the effective data section after the frame header according to the principle of frequency domain equalization, wherein one data block comprises two pilot frequency headers and 10 effective data packets. The pilot header takes the form of a pair of positive and negative pilots, i.e., Chu sequences of the same amplitude and opposite phase, for channel estimation. The data segment is used for transmitting valid video data.
Based on the content of the foregoing embodiment, in this embodiment, the encoding after the video signal to be transmitted is packaged into a data frame format by the network interface chip includes:
and packaging the video signal to be transmitted into a data frame format through a network interface chip, and then coding the video signal by adopting an AR4JA LDPC coding mode.
In the embodiment, the encoding part adopts AR4JA LDPC encoding, and compared with other encoding methods, such as convolutional encoding, the LDPC code has performance closer to the shannon limit. The AR4JA LDPC code punctures part of the check bits, thereby improving the code rate.
Based on the content of the foregoing embodiment, in this embodiment, before the receiving end sends the video signal to an equalizer MMSE, the method further includes:
performing frame synchronization on the video signal, and determining a frame header position;
performing frequency offset estimation on the video signal after frame synchronization, and performing frequency offset compensation on the video signal according to the estimated frequency offset;
and carrying out bit synchronization on the video signal after the frequency offset compensation so as to send the video signal after the bit synchronization to an equalizer MMSE.
Based on the content of the above embodiments, in this embodiment, the portal chip is a W5500 chip.
The following is illustrated by specific examples:
the first embodiment is as follows:
in this embodiment, as shown in fig. 2, the present invention provides a video transmission method, including:
step 201: transmitting video data to a signal transmitting unit according to a UDP protocol through a W5500 network port chip;
in this step, video data is transmitted at the transmitting end through the W5500 network port chip, and the communication protocol adopts the UDP protocol.
Step 202: carrying out operations such as framing, modulation and the like on the coded data according to a frame structure and then sending the coded data;
step 203: the receiving end performs frequency domain equalization on the signal;
in this step, before performing frequency domain equalization on a signal, a receiving end forwards decoded data to a receiving decompressing plate through a W5500 network port chip for processing, performs frame synchronization on the received signal, finds a frame header position, performs frequency offset estimation on the frame-synchronized signal, performs frequency offset compensation according to the estimated frequency offset, performs bit synchronization on the frequency offset-compensated signal, finds an optimal sampling point, and performs equalization by using a frequency domain MMSE algorithm after the in-situ synchronization.
Therefore, the method effectively avoids the problem of overlarge peak-to-average power ratio of the OFDM signal by adopting a frequency domain MMSE algorithm, has higher overall efficiency, simultaneously makes up the problem that the OFDM is sensitive to synchronous errors and phase noise, is more suitable for uplink transmission, and is an ideal physical layer technology for non-line-of-sight high-speed video transmission.
As shown in fig. 5, the present invention also provides a video transmission apparatus, including:
the first processing module 1 is configured to package a video signal to be transmitted into a data frame format through an internet access chip, encode the video signal, perform framing and modulation on the encoded video signal according to a preset frame structure, and send a corresponding time slot of the video signal in the preset frame structure to a receiving end;
and the second processing module 2 is configured to receive the video signal and send the video signal to an equalizer MMSE, so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
In this embodiment, operations such as framing and polarization are performed on the encoded video signal according to a set frame structure, a baseband waveform is obtained by performing shaping interpolation on a shaping filtering module according to a set communication rate, and the AD9361 performs up-conversion according to a set frequency point, thereby completing transmission. Specifically, a baseband waveform is generated by an internal algorithm in a Field-Programmable Gate Array (FPGA), and then signal transmission is completed by adjusting a transmission frequency point of the AD9361 to a channel frequency 1050MHz adopted by design. As shown in fig. 3, the frame format packaged by the nic is divided into two parts, wherein the first part is a header part, and includes a source node IP address of 4 bytes, a source node port number of 2 bytes, and a video data length of 2 bytes. The second part is a video data part, and is divided by packing in 188 bytes, so that the video data length is N × 188 bytes, and N is 16 at maximum, and each pack of video data includes four bytes of video header and 184 bytes of video data. The video header contains 1 own sync byte fixed to 0x 47; 1 bit error indicating bit, 1 indicates that the packet has at least 1 bit transmission error; a 1-bit load cell start flag, where 1 indicates that this is the first packet data, i.e., the data start; 1 bit transmission priority, 1 indicating high priority; the 13-bit PID index is fixed to 0x 1324; 2 bits of encryption control, where 00 denotes unencrypted and the others denote encrypted; 2 bits of additional region control identification, wherein 01 represents no additional region, only Payload, 10 represents only additional region, no Payload, 11 represents additional region and Payload, 00 represents reservation; finally, a 4-bit continuous counter is used to identify that the current video is the packet data of the second few, 0-15 indicating the current packet ID.
In this embodiment, after receiving a video signal, a receiving end first performs frame synchronization on the video signal to determine a frame header position. Specifically, the video signal is delayed step by step and multiplied and accumulated step by the coefficients of the m-sequence with the length of 512, and when the received data is just coincided with the delays, the accumulation result becomes larger, namely, a larger correlation peak is generated. The sampling rate is kept consistent with the received data by inserting 0 in the local m sequence, and then the autocorrelation function of the two is calculated, and when the peak value is reached, the last 1 bit data representing the frame head sequence comes. And then carrying out frequency offset estimation on the video signal after frame synchronization, and carrying out frequency offset compensation on the video signal according to the frequency offset obtained by estimation. Specifically, a data packet larger than two packets is immediately followed after the frame header is detected, and the pilot data of the two packets of data is used for frequency offset estimation. Since the channels through which the pilots of the adjacent data packets pass are the same, the amplitudes of the received complex sequences of the two data packets should be completely the same, and the pilot heads of the two data packets before and after the receiving end can be respectively expressed as:
、
easy to calculateGo out
Comprises the following steps:
. From the above formula can be seen
And
the multiplication can cancel out the phase offset of the transmission system, leaving only the influence of the frequency offset, so the following formula can be easily calculated:
. Wherein the content of the first and second substances,
it can be seen that the phase of the final calculated result is only associated with the frequency offsetfResulting phase deviation
In connection with, i.e. only with
In connection with
The time interval between two pilot heads is known, so that the ratio of the phase values obtained finally is only required to be taken
The frequency offset may be calculated.
In this embodiment, the video signal after the frequency offset compensation is subjected to bit synchronization, so that the video signal after the bit synchronization is sent to the equalizer MMSE. Specifically, the eye pattern opening maximum position is used as an optimal sampling point, so that each bit of information received by the receiving end is kept synchronous with the transmitting end. And then sending the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. Specifically, firstly, fast fourier transform is performed on the video signal to transform the video signal to a frequency domain to obtain a frequency domain video signal, and then the frequency domain video signal is multiplied by the frequency domain of the equalizer MMSE and then subjected to inverse fast fourier transform to obtain a time domain video signal.
The video transmission device provided by the invention packs the video signal to be transmitted into a data frame format through an internet access chip and then encodes the video signal, frames and modulates the encoded video signal according to a preset frame structure, and then sends the corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal. Therefore, the invention effectively resists multi-path interference by adopting a single carrier equalization technology, so that the video transmission method has an excellent video transmission function under various interference environments.
Fig. 6 illustrates a physical structure diagram of an electronic device, which may include, as shown in fig. 6: a processor (processor)610, a communication Interface (Communications Interface)620, a memory (memory)630 and a communication bus 640, wherein the processor 610, the communication Interface 620 and the memory 630 communicate with each other via the communication bus 640. The processor 610 may invoke logic instructions in the memory 630 to perform a video transmission method comprising: packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
In addition, the logic instructions in the memory 630 may be implemented in software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, the computer program product comprising a computer program, the computer program being storable on a non-transitory computer-readable storage medium, the computer program, when executed by a processor, being capable of executing a video transmission method provided by the above methods, the method comprising: packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the video transmission method provided by the above methods, the method comprising: packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end; and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (9)
1. A video transmission method, comprising:
packaging a video signal to be transmitted into a data frame format through an internet access chip, encoding, framing and modulating the encoded video signal according to a preset frame structure, and sending a corresponding time slot of the video signal in the preset frame structure to a receiving end;
and the receiving end receives the video signal and sends the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
2. The video transmission method according to claim 1, wherein the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal, and comprises:
performing fast Fourier transform on the video signal so as to transform the video signal to a frequency domain to obtain a frequency domain video signal;
and multiplying the frequency domain video signal by the frequency domain of the equalizer MMSE, and then obtaining the time domain video signal through inverse fast Fourier transform.
3. The video transmission method according to claim 1, wherein before transmitting the video signal to a receiving end in the corresponding time slot of the preset frame structure, the method further comprises:
dividing time frames based on a time division multiple access mode to obtain the preset frame structure; the preset frame structure comprises at least three time slots, and each time slot corresponds to a path of video signals to be transmitted.
4. The video transmission method according to claim 1, wherein the encoding of the video signal to be transmitted after being packetized into a data frame format by the network interface chip comprises:
and packaging the video signal to be transmitted into a data frame format through a network interface chip, and then coding the video signal by adopting an AR4JA LDPC coding mode.
5. The video transmission method according to claim 1, wherein before the receiving end sends the video signal to an equalizer MMSE, the method further comprises:
performing frame synchronization on the video signal, and determining a frame header position;
performing frequency offset estimation on the video signal after frame synchronization, and performing frequency offset compensation on the video signal according to the estimated frequency offset;
and carrying out bit synchronization on the video signal after the frequency offset compensation so as to send the video signal after the bit synchronization to an equalizer MMSE.
6. The video transmission method according to claim 1, wherein the portal chip is a W5500 chip.
7. A video transmission apparatus, comprising:
the first processing module is used for packaging a video signal to be transmitted into a data frame format through an internet access chip, then coding the video signal, framing and modulating the coded video signal according to a preset frame structure, and then sending a corresponding time slot of the video signal in the preset frame structure to a receiving end;
and the second processing module is used for receiving the video signal and sending the video signal to an equalizer MMSE (minimum mean square error), so that the equalizer MMSE performs frequency domain equalization on the video signal according to a single-carrier frequency domain equalization algorithm to obtain a time domain video signal.
8. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the video transmission method according to any of claims 1 to 6 are implemented when the processor executes the program.
9. A non-transitory computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the video transmission method according to any one of claims 1 to 6.
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