CN114297974A - Integrated circuit layout method and integrated circuit layout system - Google Patents

Integrated circuit layout method and integrated circuit layout system Download PDF

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Publication number
CN114297974A
CN114297974A CN202111566687.1A CN202111566687A CN114297974A CN 114297974 A CN114297974 A CN 114297974A CN 202111566687 A CN202111566687 A CN 202111566687A CN 114297974 A CN114297974 A CN 114297974A
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module
layout
modules
position information
integrated circuit
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CN202111566687.1A
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张玉杰
姚聪
蒙奕帆
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Shanghai Anlu Information Technology Co ltd
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Shanghai Anlu Information Technology Co ltd
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Abstract

The invention provides a method for obtaining the relative position information of a module in a layout, which calculates the layout position information of the module according to the relative position information of the module and the size of the module, calls the layout position information of the module and the address information of the module through an integrated circuit design tool to realize the layout of the integrated circuit layout, does not need manual layout, and improves the layout efficiency and the accuracy. The invention also provides an integrated circuit layout system.

Description

Integrated circuit layout method and integrated circuit layout system
Technical Field
The invention relates to the technical field of semiconductors, in particular to an integrated circuit layout method and an integrated circuit layout system.
Background
In the design of an integrated circuit layout, particularly when the layout is planned according to the layout, the number, the placement direction, the placement position, the relative positions of the modules, and the like, which are called by the layout, need to be correctly realized.
The existing scheme is that each module required to be used is called in a layout design tool according to a planned layout, each parameter of the module, such as placing direction, placing coordinates, placing quantity and the like, needs to be modified manually during calling, first round verification is needed after placing, namely whether a place with an obvious calling error exists or not is carefully checked by naked eyes, then a second round is verified and changed by an LVS tool, and then the verification operation is repeated for third round and fourth round until no error exists in verification.
In the prior art, because the error rate of manual layout is high, if any error occurs when the number of modules is wrong or the coordinate position is wrong and the like during layout, time and labor are consumed for later verification, and the cost is directly increased. And the manual layout efficiency is too low, when the chip scale is large and the later-stage layout planning design is updated and iterated, the layout is far from the layout planning iteration rhythm, so that the whole chip design flow time is prolonged, the chip flow time node is influenced, and the inestimable result is caused.
Therefore, there is a need to provide a new integrated circuit layout method and system to solve the above-mentioned problems in the prior art.
Disclosure of Invention
The invention aims to provide an integrated circuit layout method and an integrated circuit layout system, which improve the efficiency and the accuracy of integrated circuit layout.
In order to achieve the above object, the integrated circuit layout method of the present invention comprises:
acquiring relative position information of a module in a layout;
calculating layout position information of the modules according to the relative position information of the modules and the sizes of the modules;
and calling the layout position information of the module and the address information of the module through an integrated circuit design tool to realize the layout of the integrated circuit.
The integrated circuit layout method has the beneficial effects that: the method comprises the steps of obtaining relative position information of a module in a layout, calculating layout position information of the module according to the relative position information of the module and the size of the module, calling the layout position information of the module and address information of the module through an integrated circuit design tool to achieve layout of the integrated circuit layout, and improving layout efficiency and accuracy without manual layout.
Optionally, the obtaining of the relative position information of the module in the layout includes:
and acquiring the rows and columns of the modules, and then taking the rows and columns of the modules as the relative position information of the modules in the layout.
Optionally, the calculating layout position information of the module according to the relative position information of the module and the size of the module includes:
and taking the original point position of the layout as a coordinate original point, and taking the coordinate original point as layout position information of a module positioned at the original point position of the layout, wherein a rectangle is drawn along the outermost edge of the layout, and the position of any corner of the rectangle is the original point position.
Optionally, the calculating the layout position information of the module according to the relative position information of the module and the size of the module includes:
taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row;
in the same column of modules, taking any module as a target module, and acquiring the sum of the heights of all modules from the target module to the first row of modules to obtain the vertical coordinate of the target module;
and in the modules in the same row, taking any module as a target module, and acquiring the sum of the widths of all modules from the target module to the first column of modules to obtain the abscissa of the target module.
Optionally, the calculating layout position information of the module according to the relative position information of the module and the size of the module further includes:
and acquiring the interval of the module in the layout.
Optionally, the calculating the layout position information of the module according to the relative position information of the module and the size of the module includes:
taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row;
in the same column of modules, taking any module as a target module, and acquiring the heights of all modules and the sum of the heights of all intervals between the target module and the first row of modules to obtain the vertical coordinate of the target module;
and in the modules in the same row, taking any module as a target module, and acquiring the width of all the modules between the target module and the first column of modules and the sum of the widths of all the intervals to obtain the abscissa of the target module.
Optionally, the address information of the module includes first-level directory information and second-level directory information, where the second-level directory information is lower-level address information of the first-level directory information.
Optionally, the integrated circuit layout method further includes: building a database comprising address information of the module and a size of the module.
The invention also provides an integrated circuit layout system, which comprises an acquisition unit, a calculation unit and a layout unit, wherein the acquisition unit is used for acquiring the relative position information of a module in a layout, the calculation unit is used for calculating the layout position information of the module according to the relative position information of the module and the size of the module, and the layout unit is used for calling the layout position information of the module and the address information of the module through an integrated circuit design tool to realize the layout of the integrated circuit.
The integrated circuit layout system has the beneficial effects that: the acquisition unit is used for acquiring relative position information of a module in a layout, the calculation unit is used for calculating layout position information of the module according to the relative position information of the module and the size of the module, and the layout unit is used for calling the layout position information of the module and the address information of the module through an integrated circuit design tool to realize layout of the integrated circuit layout without manual layout, so that the layout efficiency and accuracy are improved.
Optionally, the integrated circuit layout system further includes a storage unit for storing a database.
Optionally, the integrated circuit layout system further includes a database construction unit, configured to construct a database.
Drawings
FIG. 1 is a flow chart of an integrated circuit layout method of the present invention;
FIG. 2 is a schematic diagram of a layout in some embodiments of the invention;
FIG. 3 is a schematic diagram of a layout in further embodiments of the present invention;
fig. 4 is a block diagram of the layout system of the integrated circuit of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
To solve the problems in the prior art, embodiments of the present invention provide a layout method for an integrated circuit. Referring to fig. 1, the integrated circuit layout method includes the steps of:
s1: acquiring relative position information of a module in a layout;
s2: calculating layout position information of the modules according to the relative position information of the modules and the sizes of the modules;
s3: and calling the layout position information of the module and the address information of the module through an integrated circuit design tool to realize the layout of the integrated circuit.
In some embodiments, the obtaining of the relative position information of the module in the layout includes: and acquiring the rows and columns of the modules, and then taking the rows and columns of the modules as the relative position information of the modules in the layout.
In some embodiments, the column where the module is located is represented by an abscissa, the row where the module is located is represented by an ordinate, and then the relative position information of the module in the layout is jointly represented by the abscissa and the ordinate.
FIG. 2 is a schematic diagram of a layout in some embodiments of the invention. Referring to fig. 2, a first module, a second module, a third module, a fourth module, a fifth module, a sixth module, a seventh module, an eighth module, and a ninth module are shown.
Referring to fig. 2, the first module is located at the first row and the first column in the layout, and the relative position information of the first module in the layout is (x1, y 1).
Referring to fig. 2, the second module is located in the first row and the second column of the layout, and the relative position information of the first module in the layout is (x2, y 1).
Referring to fig. 2, the third module is located at the first row and the third column in the layout, and the relative position information of the first module in the layout is (x3, y 1).
Referring to fig. 2, the fourth module is located at the second row and the first column in the layout, and the relative position information of the first module in the layout is (x1, y 2).
Referring to fig. 2, the fifth module is located in the second row and the second column of the layout, and the relative position information of the first module in the layout is (x2, y 2).
Referring to fig. 2, the sixth module is located in the second row and the third column in the layout, and the relative position information of the first module in the layout is (x3, y 2).
Referring to fig. 2, the seventh module is located in the third row and the first column of the layout, and the relative position information of the first module in the layout is (x1, y 3).
Referring to fig. 2, the eighth module is located in the third row and the second column of the layout, and the relative position information of the first module in the layout is (x2, y 3).
Referring to fig. 2, the ninth module is located in the third row and the third column in the layout, and the relative position information of the first module in the layout is (x3, y 3).
In some embodiments, the calculating layout position information of the modules according to the relative position information of the modules and the sizes of the modules includes: and taking the original point position of the layout as a coordinate original point, and taking the coordinate original point as layout position information of a module positioned at the original point position of the layout, wherein a rectangle is drawn along the outermost edge of the layout, and the position of any corner of the rectangle is the original point position.
In some embodiments, the calculating the layout position information of the module based on the relative position information of the module and the size of the module includes: taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row; in the same column of modules, taking any module as a target module, and acquiring the sum of the heights of all modules from the target module to the first row of modules to obtain the vertical coordinate of the target module; and in the modules in the same row, taking any module as a target module, and acquiring the sum of the widths of all modules from the target module to the first column of modules to obtain the abscissa of the target module. Wherein the modules are all rectangular.
Referring to fig. 2, the first module, the second module, the third module, the fourth module, the fifth module, the sixth module, the seventh module, the eighth module, and the ninth module each have a height and a width of 10.
Referring to fig. 2, if the first module is a module located at the origin position, the first module is a first module in a first column, and is a first module in a first row, an abscissa of the first module is 0, and a ordinate of the first module is 0, that is, the layout position information of the first module is (0, 0).
Referring to fig. 2, when the second module is a target module, the second module is located in the first row and on the right side of the first module, and there is no space between the second module and the first module, the abscissa of the second module is the width of the first module, that is, the abscissa of the second module is 10, and the ordinate of the second module is 0, that is, the layout position information of the second module is (10, 0).
Referring to fig. 2, when the second module is a target module and the first module is called 2 times at (x1, y1), the abscissa of the second module is the width of two first modules, i.e., the abscissa of the second module is 20, and the ordinate of the second module is 0, i.e., the layout position information of the second module is (20, 0).
Referring to fig. 2, when the third module is a target module, the third module is located in the first row and on the right side of the second module, and no detection is performed between the third module and the second module, the abscissa of the third module is the sum of the width of the first module and the width of the second module, that is, the abscissa of the third module is 20, and the ordinate of the third module is 0, that is, the layout position information of the third module is (20, 0).
Referring to fig. 2, when the fourth module is a target module, the fourth module is located in the first column and on the upper side of the first module, and there is no space between the fourth module and the first module, the ordinate of the fourth module is the height of the first module, that is, the ordinate of the fourth module is 10, and the abscissa of the fourth module is 0, that is, the layout position information of the fourth module is (0, 10).
Referring to fig. 2, when the seventh module is a target module, the seventh module is located in the first column and on the upper side of the fourth module, and there is no space between the seventh module and the fourth module, the ordinate of the seventh module is the sum of the first module height and the fourth module height, that is, the ordinate of the seventh module is 20, and the abscissa of the seventh module is 0, that is, the layout position information of the fourth module is (0, 20).
Referring to fig. 2, when the ninth module is a target module, the ninth module is located in a third row and a third column, an abscissa of the ninth module is a sum of the seventh module width and the eighth module width, that is, an abscissa of the ninth module is 20, and an ordinate of the ninth module is a sum of the third module height and the sixth module height, that is, an ordinate of the ninth module is 20, that is, layout position information of the ninth module is (20, 20).
In some embodiments, the calculating the layout position information of the modules according to the relative position information of the modules and the sizes of the modules further includes: and acquiring the interval of the module in the layout.
In some embodiments, the calculating the layout position information of the module based on the relative position information of the module and the size of the module includes: taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row; in the same column of modules, taking any module as a target module, and acquiring the heights of all modules and the sum of the heights of all intervals between the target module and the first row of modules to obtain the vertical coordinate of the target module; and in the modules in the same row, taking any module as a target module, and acquiring the width of all the modules between the target module and the first column of modules and the sum of the widths of all the intervals to obtain the abscissa of the target module.
FIG. 3 is a schematic diagram of a layout in further embodiments of the present invention. Referring to fig. 3, a first module, a second module, a third module, a fourth module, a fifth module, and a sixth module are shown.
Referring to fig. 3, the first module is located at the first row and the first column in the layout, and the relative position information of the first module in the layout is (x1, y 1).
Referring to fig. 3, the second module is located in the first row and the second column of the layout, and the relative position information of the second module in the layout is (x2, y 1).
Referring to fig. 3, the third module is located at the first row and the third column in the layout, and the relative position information of the third module in the layout is (x3, y 1).
Referring to fig. 3, the fourth module is located in the second row and the first column in the layout, and the relative position information of the fourth module in the layout is (x1, y 2).
Referring to fig. 3, the fifth module is located in the second row and the second column of the layout, and the relative position information of the first module in the layout is (x2, y 2).
Referring to fig. 3, the sixth module is located in the third row and the first column of the layout, and the relative position information of the first module in the layout is (x1, y 3).
Referring to fig. 3, the first module has a height of 10 and a width of 10; the height of the second module is 15, and the width of the second module is 10; the height of the third module is 10, and the width of the third module is 10; the height of the fourth module is 10, and the width of the fourth module is 15; the height of the fifth module is 10, and the width of the fifth module is 10; the sixth module has a height of 20 and a width of 18.
Referring to fig. 3, if the first module is a module located at the origin position, the first module is a first module in a first column, and is a first module in a first row, an abscissa of the first module is 0, and a ordinate of the first module is 0, that is, the layout position information of the first module is (0, 0).
Referring to fig. 3, when the second module is a target module, the second module is located in the first row and on the right side of the first module, and a first interval is provided between the first module and the second module, and the width of the first interval is 5, the abscissa of the second module is the sum of the width of the first module and the width of the first interval, that is, the abscissa of the second module is 15, and the ordinate of the second module is 0, that is, the layout position information of the second module is (15, 0).
Referring to fig. 3, when the third module is a target module, the third module is located in the first row, is located on the right side of the second module, and there is no space between the third module and the second module, the abscissa of the third module is the sum of the first module width, the first space width, and the second module width, that is, the abscissa of the second module is 25, and the ordinate of the second module is 0, that is, the layout position information of the second module is (25, 0).
Referring to fig. 3, when the fourth module is a target module, the fourth module is located in the first column and on the upper side of the first module, and there is no space between the fourth module and the first module, the ordinate of the fourth module is the height of the first module, that is, the ordinate of the fourth module is 10, and the abscissa of the fourth module is 0, that is, the layout position information of the fourth module is (0, 10).
Referring to fig. 3, when the fifth module is a target module, the fifth module is located in the second column and the second row, the fifth module is located on the right side of the fourth module and the upper side of the second module, and there is no space between the fifth module and the fourth module, and there is no space between the fifth module and the second module, the abscissa of the fifth module is the width of the fourth module, that is, the abscissa of the fifth module is 15, and the ordinate of the fifth module is the height of the second module, that is, the ordinate of the fifth module is 15, that is, the layout position information of the fifth module is (15, 15).
Referring to fig. 3, when the sixth module is a target module, the sixth module is located in the first column, the sixth module is located on the upper side of the fourth module, a second gap is formed between the sixth module and the fourth module, and the height of the second gap is 5, the ordinate of the sixth module is the sum of the first module height, the fourth module height, and the second gap height, that is, the ordinate of the sixth module is 25, and the abscissa of the sixth module is 0, that is, the layout position information of the sixth module is (0, 25).
In some embodiments, the address information of the module includes primary directory information and secondary directory information, and the secondary directory information is subordinate address information of the primary directory information.
In some embodiments, the integrated circuit layout method further includes: building a database comprising address information of the module and a size of the module.
In some embodiments, the integrated circuit design tool is a virtuoso, the invoking the layout location information of the module and the address information of the module by the integrated circuit design tool to realize the layout of the integrated circuit layout comprises loading a kill script by the virtuoso, and the virtuoso identifies the code # |! And the/usr/bin/kill recognizes the kill script, and then calls the layout position information, the primary directory information and the secondary directory information through a function dbCreateSampleMosaic to realize the layout of the integrated circuit. Wherein one module corresponds to one function dbCreateSimpleMosaic.
FIG. 4 is a block diagram of an integrated circuit layout system according to the present invention. Referring to fig. 4, the integrated circuit layout system 100 includes an obtaining unit 101, a calculating unit 102, and a layout unit 103, where the obtaining unit 101 is configured to obtain relative position information of a module in a layout, the calculating unit 102 is configured to calculate layout position information of the module according to the relative position information of the module and a size of the module, and the layout unit 103 is configured to call the layout position information of the module and address information of the module through an integrated circuit design tool to implement layout of the integrated circuit layout.
In some embodiments, the integrated circuit layout system further includes a storage unit for storing a database.
In some embodiments, the integrated circuit layout system further comprises a database construction unit for constructing a database.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.

Claims (11)

1. An integrated circuit layout method, comprising:
acquiring relative position information of a module in a layout;
calculating layout position information of the modules according to the relative position information of the modules and the sizes of the modules;
and calling the layout position information of the module and the address information of the module through an integrated circuit design tool to realize the layout of the integrated circuit.
2. The integrated circuit layout method according to claim 1, wherein the obtaining of the relative position information of the modules in the layout comprises:
and acquiring the rows and columns of the modules, and then taking the rows and columns of the modules as the relative position information of the modules in the layout.
3. The integrated circuit layout method according to claim 2, wherein said calculating layout position information of said modules based on the relative position information of said modules and the sizes of said modules comprises:
and taking the original point position of the layout as a coordinate original point, and taking the coordinate original point as layout position information of a module positioned at the original point position of the layout, wherein a rectangle is drawn along the outermost edge of the layout, and the position of any corner of the rectangle is the original point position.
4. The integrated circuit layout method according to claim 3, wherein the dimensions of the module include height and width, the layout position information includes abscissa and ordinate, and the calculating the layout position information of the module based on the relative position information of the module and the dimensions of the module includes:
taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row;
in the same column of modules, taking any module as a target module, and acquiring the sum of the heights of all modules from the target module to the first row of modules to obtain the vertical coordinate of the target module;
and in the modules in the same row, taking any module as a target module, and acquiring the sum of the widths of all modules from the target module to the first column of modules to obtain the abscissa of the target module.
5. The integrated circuit layout method according to claim 3, wherein said calculating layout position information of said modules based on the relative position information of said modules and the sizes of said modules further comprises:
and acquiring the interval of the module in the layout.
6. The integrated circuit layout method according to claim 5, wherein the dimensions of the module include height and width, the layout position information includes abscissa and ordinate, and the calculating the layout position information of the module based on the relative position information of the module and the dimensions of the module includes:
taking the column where the module located at the origin position is located as a first column, and taking the row where the module located at the origin position is located as a first row;
in the same column of modules, taking any module as a target module, and acquiring the heights of all modules and the sum of the heights of all intervals between the target module and the first row of modules to obtain the vertical coordinate of the target module;
and in the modules in the same row, taking any module as a target module, and acquiring the width of all the modules between the target module and the first column of modules and the sum of the widths of all the intervals to obtain the abscissa of the target module.
7. The integrated circuit layout method according to claim 1, wherein the address information of the module includes primary directory information and secondary directory information, the secondary directory information being subordinate address information of the primary directory information.
8. The integrated circuit layout method according to claim 1, further comprising: building a database comprising address information of the module and a size of the module.
9. An integrated circuit layout system, characterized in that, it is used for implementing the integrated circuit layout method according to any claim from 1 to 8, the integrated circuit layout system includes an acquisition unit, a calculation unit and a layout unit, the acquisition unit is used for acquiring the relative position information of the module in the layout, the calculation unit is used for calculating the layout position information of the module according to the relative position information of the module and the size of the module, the layout unit is used for calling the layout position information of the module and the address information of the module through an integrated circuit design tool to implement the integrated circuit layout.
10. The integrated circuit layout system according to claim 9, further comprising a storage unit for storing a database.
11. The integrated circuit layout system according to claim 9, further comprising a database construction unit for constructing a database.
CN202111566687.1A 2021-12-20 2021-12-20 Integrated circuit layout method and integrated circuit layout system Pending CN114297974A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115221831A (en) * 2022-07-28 2022-10-21 清华大学 Method and device for realizing coded semi-automatic layout of circuit layout

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115221831A (en) * 2022-07-28 2022-10-21 清华大学 Method and device for realizing coded semi-automatic layout of circuit layout
CN115221831B (en) * 2022-07-28 2023-10-13 清华大学 Method and device for realizing circuit layout coding semi-automatic layout

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