CN114284303A

CN114284303A - Display panel

Info

Publication number: CN114284303A
Application number: CN202111643405.3A
Authority: CN
Inventors: 梁玉姣; 李荣荣
Original assignee: HKC Co Ltd; Changsha HKC Optoelectronics Co Ltd
Current assignee: HKC Co Ltd; Changsha HKC Optoelectronics Co Ltd
Priority date: 2021-12-29
Filing date: 2021-12-29
Publication date: 2022-04-05
Anticipated expiration: 2041-12-29
Also published as: CN114284303B

Abstract

The application relates to a display panel, which comprises a substrate and a plurality of sub-pixels positioned on the substrate, wherein each sub-pixel comprises a light-emitting element and a pixel circuit electrically connected with the light-emitting element, the pixel circuit comprises a driving transistor, a first switching transistor and a capacitor, the driving transistor is electrically connected with an anode of the light-emitting element, the pixel circuit further comprises a second switching transistor, and the second switching transistor and the first switching transistor are used for controlling the driving transistor to be turned on and turned off. According to the display panel, one switching transistor is additionally arranged in the existing pixel circuit, when any switching transistor in the pixel circuit is damaged, the other switching transistor can be used for controlling the light-emitting element, and the laser is not needed to be adopted to remove impurities in the damaged area, so that the follow-up repairing time is shortened, and the repairing risk is reduced.

Description

Display panel

Technical Field

The present application relates to the field of display technologies, and in particular, to a display panel.

Background

An Organic Light Emitting Diode (OLED) display panel includes a plurality of Thin Film Transistors (TFTs) fabricated by depositing various films, such as a semiconductor layer, a dielectric layer, and a metal electrode layer, on a substrate. In the manufacturing process, a defect that a normal switching operation cannot be performed due to disconnection, short circuit, or the like occurs, and a light emitting element connected to the TFT having the defect becomes a defective pixel to which a voltage cannot be applied, thereby decreasing reliability of the OLED display panel.

For the defective pixel, the conventional repairing method is to remove the impurity in the short-circuit region by using laser, but this method has a certain repairing risk, for example, the peripheral display region may be damaged, resulting in a permanent dark spot, and the repairing time is long and the process is complicated.

Disclosure of Invention

The present application aims to provide a display panel, which can reduce the subsequent repair time and reduce the repair risk.

In a first aspect, an embodiment of the present application provides a display panel, which includes a substrate and a plurality of sub-pixels located on the substrate, where each sub-pixel includes a light emitting element and a pixel circuit electrically connected to the light emitting element, the pixel circuit includes a driving transistor, a first switching transistor, and a capacitor, the driving transistor is electrically connected to an anode of the light emitting element, and the pixel circuit further includes a second switching transistor, and the second switching transistor and the first switching transistor are both used to control the driving transistor to be turned on and off.

In one possible implementation, the plurality of sub-pixels are arranged in an array along a row direction and a column direction, the display panel further includes a plurality of data lines extending along the column direction and a plurality of scan lines extending along the row direction, the second switching transistor and the first switching transistor of each sub-pixel are electrically connected to the same data line, and the second switching transistor and the first switching transistor of each sub-pixel are electrically connected to the same scan line.

In one possible embodiment, in the row direction, the light emitting element of each sub-pixel and the orthographic projection of the pixel circuit on the substrate do not overlap, and the light emitting elements of the plurality of sub-pixels are arranged in a staggered manner in the row direction and the column direction; the scan line includes a first sub-scan line and a second sub-scan line connected to each other, and in the row direction, a gate of the first switching transistor of each pixel circuit is electrically connected to the first sub-scan line, and a gate of the second switching transistor of each pixel circuit is electrically connected to the second sub-scan line.

In one possible embodiment, the first sub-scanning line includes a plurality of square-shaped wavy conductive lines sequentially distributed in a row direction, each square-shaped wavy conductive line at least partially overlapping with a corresponding pixel circuit; the second sub-scanning line is a linear wire connected with the opening of the square wave-shaped wire; the square wavy lead comprises transverse lines and longitudinal lines which are distributed in a staggered mode along the row direction and connected with each other, the transverse lines extend along the row direction, the longitudinal lines extend along the column direction, and the second sub-scanning lines are arranged in parallel with the transverse lines.

In one possible embodiment, the light emitting element of each sub-pixel and the orthographic projection of the pixel circuit on the substrate do not overlap, and the light emitting elements of the plurality of sub-pixels are arranged in a staggered manner in the row direction and the column direction; the pixel circuit is provided with a first wiring area and a second wiring area, the driving transistor, the first switch transistor and the capacitor are positioned in the first wiring area, the second switch transistor is positioned in the second wiring area, the light-emitting element and the corresponding first wiring area and the second wiring area are positioned in the same column, and the second wiring area is positioned between the first wiring area and the light-emitting element; the scanning line comprises a plurality of square wave-shaped conducting wires which are sequentially distributed along the row direction, the square wave-shaped conducting wires comprise transverse lines and longitudinal lines which are distributed along the row direction in a staggered mode and connected with each other, the transverse lines extend along the row direction, the longitudinal lines extend along the column direction, the transverse lines are located between a first wiring area and a second wiring area corresponding to each pixel circuit, and the longitudinal lines are located between two adjacent columns of sub-pixels.

In one possible embodiment, the orthographic projection of the longitudinal lines of the scan lines on the substrate overlaps with the orthographic projection of the data lines on the substrate.

In one possible embodiment, the plurality of sub-pixels are arranged in alignment in a row direction and a column direction, and the second wiring regions of two sub-pixels adjacent in the row direction are arranged offset from each other in the column direction.

In one possible embodiment, the plurality of sub-pixels are arranged offset in the row direction and the column direction, and the second wiring regions of two sub-pixels adjacent to each other in the row direction are arranged aligned in the row direction.

In one possible embodiment, the plurality of sub-pixels are arranged in alignment in a row direction and a column direction, and the second wiring regions and the light emitting elements of two sub-pixels adjacent in the row direction are arranged in a staggered manner in the column direction.

In one possible embodiment, the light emitting element of each sub-pixel coincides with an orthographic projection of the pixel circuit on the substrate, and the plurality of sub-pixels are arranged aligned in the row direction and the column direction.

According to the display panel provided by the embodiment of the application, one switching transistor is additionally arranged in the existing pixel circuit, when any switching transistor in the pixel circuit is damaged, the other switching transistor can control the light-emitting element, the two switching transistors are mutually backup, and the laser is not needed to be adopted to remove impurities in the damaged area, so that the subsequent repair time is shortened, and the repair risk is reduced.

Drawings

Features, advantages and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, like parts are provided with like reference numerals. The drawings are not necessarily to scale, and are merely intended to illustrate the relative positions of the layers, the thicknesses of the layers in some portions being exaggerated for clarity, and the thicknesses in the drawings are not intended to represent the proportional relationships of the actual thicknesses.

Fig. 1 is a schematic cross-sectional view illustrating a display panel according to a first embodiment of the present disclosure;

FIG. 2 illustrates a pixel circuit diagram of the display panel shown in FIG. 1;

FIG. 3 illustrates a partial top view of the display panel shown in FIG. 1;

FIG. 4 is a partial top view of a display panel provided in a second embodiment of the present application;

fig. 5 is a partial top view of a display panel provided in a third embodiment of the present application;

FIG. 6 is a partial top view of a display panel according to a fourth embodiment of the present application;

fig. 7 is a schematic cross-sectional view illustrating a display panel according to a fifth embodiment of the present application;

fig. 8 illustrates a partial top view of the display panel shown in fig. 7.

Description of reference numerals:

1. a substrate; 2. driving the array layer; 21. a first metal layer; 22. a second metal layer; 23. a planarization layer; D. a data line; G. scanning a line; C. a pixel circuit; c1, a first wiring area; c2, a second wiring area; cst, capacitance; td, a drive transistor; t1, a first switching transistor; t2, a second switching transistor;

3. a light-emitting functional layer; 4. a pixel defining layer; 41. a pixel opening; px, sub-pixel; 30 l, a light-emitting element; 31. an anode; 32. a cathode; 33. a light emitting structure;

x, the row direction; y, column direction.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof. In the drawings and the following description, at least some well-known structures and techniques have not been shown in detail in order to avoid unnecessarily obscuring the present application; also, the size of the region structures may be exaggerated for clarity. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

First embodiment

Fig. 1 is a schematic cross-sectional view illustrating a display panel according to a first embodiment of the present disclosure, and fig. 2 is a pixel circuit diagram of the display panel shown in fig. 1.

As shown in fig. 1 and 2, the display panel provided by the embodiment of the present application includes a substrate 1 and a plurality of subpixels Px on the substrate 1, each subpixel Px includes a light emitting element 30 and a pixel circuit C electrically connected to the light emitting element 30, the pixel circuit C includes a driving transistor Td electrically connected to an anode 31 of the light emitting element 30, a first switching transistor T1, and a capacitor Cst. The pixel circuit C further includes a second switching transistor T2, and the second switching transistor T2 and the first switching transistor T1 are used to control the driving transistor Td to be turned on and off.

Alternatively, the driving transistor Td, the first switching transistor T1, and the second switching transistor T2 are all thin film transistors TFT. In addition, the term "pixel circuit" refers to a circuit structure for driving a sub-pixel to emit light, and the pixel circuit may be any of a 2T1C circuit, a 7T1C circuit, a 7T2C circuit, or a 9T1C circuit. Here, the "2T 1C circuit" means that the pixel circuit includes 2 tfts and 1 capacitor, and the other "7T 1C circuit", "7T 2C circuit", "9T 1C circuit", and the like.

Optionally, the light emitting element 30 is an organic light emitting diode OLED, so the display panel provided in the embodiment of the present application is an OLED display panel. The OLED is a current device, current is not stably stored, the capacitor Cst can temporarily store voltage, the driving transistor Td is used to convert the stored voltage into current, and the first switching transistor T1 is used to control the driving transistor Td to be turned on and off. In the embodiment of the present application, the pixel circuit C further includes a second switching transistor T2, and the second switching transistor T2 and the first switching transistor T1 are used to control the driving transistor Td to be turned on and off. In the display process, the first and second switching transistors T1 and T2 supply a signal inputted from the data line D to the light emitting element 30 corresponding to the driving transistor Td under the control of the scan line G.

Specifically, the display panel further includes a plurality of data lines D and a plurality of scan lines G disposed to cross each other, the gate of the second switching transistor T2 and the gate of the first switching transistor T1 are electrically connected to the same scan line G, the source of the second switching transistor T2 and the source of the first switching transistor T1 are electrically connected to the same data line D, and the drain of the second switching transistor T2 and the drain of the first switching transistor T1 are electrically connected to the gate of the driving transistor Td.

That is to say, the display panel provided in the embodiment of the present application may additionally include a switching transistor on the basis of any one of the 2T1C circuit, the 7T1C circuit, the 7T2C circuit, and the 9T1C circuit, and when any one of the switching transistors in the existing pixel circuit C is damaged, the light emitting element 30 may be continuously controlled by the additionally added switching transistor, or when the additionally added switching transistor is damaged, the light emitting element 30 may be continuously controlled by any one of the switching transistors in the existing pixel circuit C, and the two circuits are backup to each other.

Since the TFT has a defect that a normal switching operation cannot be performed due to disconnection, short circuit, or the like during the manufacturing process, a light emitting element connected to the TFT having the defect becomes a defective pixel to which a voltage cannot be applied, and reliability of the OLED display panel is lowered. For a defective pixel, a conventional repair method is a series of repair actions such as blowing off a data line by laser, removing impurities in a short-circuited region, and connecting a source or a drain of a TFT to a fixed potential. The repairing method may damage the peripheral display area to cause permanent dark spots, and has long repairing time and complicated process.

In the display panel provided by the embodiment of the application, one switching transistor is additionally arranged in the existing pixel circuit C, when any one switching transistor in the pixel circuit C is damaged, the sub-pixel Px can be controlled through the other switching transistor, the two switching transistors are mutually backup, and a laser is not needed to remove devices in a damaged area, so that the subsequent repair time is shortened, and the repair risk is reduced.

For convenience of explanation, the embodiment of the present application takes the pixel circuit shown in fig. 2 as an example, that is, a switching transistor is added to the 2T1C circuit as an example. The 2T1C circuit includes a driving transistor Td, a first switching transistor T1 and a capacitor Cst, and the added thin film transistor is a second switching transistor T2.

Fig. 3 illustrates a partial top view of the display panel shown in fig. 1.

As shown in fig. 3, the plurality of sub-pixels Px are arranged in an array along the row direction X and the column direction Y, the display panel further includes a plurality of data lines D extending along the column direction Y and a plurality of scan lines G extending along the row direction X, the second switching transistor T2 and the first switching transistor T1 of each pixel circuit C are electrically connected to the same data line D, and the second switching transistor T2 and the first switching transistor T1 of each pixel circuit C are electrically connected to the same scan line G. With the adoption of the structure, the circuit structure can be simplified, the wiring is convenient, the occupied space of the pixel circuit C is saved, the backup TFT is provided on the premise of not influencing the original circuit design, and the reliability of the display panel is improved.

In one example, the display panel is a bottom emission type display panel, that is, the anode 31 of the light emitting element 30 is a transparent metal electrode, the cathode 32 of the light emitting element 30 is a reflective metal electrode, and the pixel aperture ratio is low, and is generally used for a large-sized display device such as a television set.

As shown in fig. 2, the direction indicated by the arrow is the light outgoing direction of the display panel, i.e., the light emitted by the light emitting element 30 is directed from the cathode 32 to the anode 31. Alternatively, the anode 31 is made of a light-transmitting conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO). Alternatively, the cathode 32 is made of an opaque metal such as aluminum or silver.

In addition, the pixel circuit C of the bottom emission type display panel is generally a 2T1C circuit, and the bottom emission type display panel in the embodiment of the present application additionally adds a switching transistor on the basis of the 2T1C circuit, and when any switching transistor in the existing pixel circuit C is damaged, the light emitting element 30 can be continuously controlled by the additionally added switching transistor, or when the additionally added switching transistor is damaged, any switching transistor in the existing pixel circuit C can continuously control the light emitting element 30, and the two circuits are backup to each other.

Further, in order to improve the light transmittance of the display panel, the light emitting element 30 of each sub-pixel Px does not overlap with the orthographic projection of the pixel circuit C on the substrate 1, and the light emitting elements 30 of the plurality of sub-pixels Px are arranged alternately in the row direction X and the column direction Y. Alternatively, the light emitting element 30 is rectangular in shape.

Further, the scanning line G includes a first sub-scanning line G1 and a second sub-scanning line G2 connected to each other, and in the row direction X, the gate of the first switching transistor T1 of each pixel circuit C is electrically connected to the first sub-scanning line G1, and the gate of the second switching transistor T2 of each pixel circuit C is electrically connected to the second sub-scanning line G2.

That is, the first switching transistor T1 controls the first sub-scanning line G1, the second switching transistor T2 controls the second sub-scanning line G2, and the first sub-scanning line G1 and the second sub-scanning line G2 are electrically connected to form one scanning line. The first sub-scanning line G1 and the second sub-scanning line G2 may also be backup to each other, and either one of them is damaged and can be electrically connected to the first switching transistor T1 or the second switching transistor T2 through the other.

Further, as shown in fig. 3, the first sub-scanning line G1 includes a plurality of square-shaped wavy conductors distributed in sequence in the row direction X, each square-shaped wavy conductor at least partially overlapping a corresponding pixel circuit C; the second sub-scanning line G2 is a linear conductive line connected to the opening of the square wave conductive line.

The square wavy lead includes transverse lines and longitudinal lines which are distributed in a staggered manner in the row direction X and are connected in sequence, the transverse lines extend in the row direction X, the longitudinal lines extend in the column direction Y, and the second sub-scanning lines G2 are arranged in parallel with the transverse lines.

In the row direction X, since the light emitting elements 30 of the sub-pixels Px are arranged alternately with the pixel circuits C of the adjacent sub-pixels Px, the first sub-scanning line G1 and the second sub-scanning line G2 constitute a plurality of rectangular frames connected in series with each other in the row direction X, and the adjacent two rectangular frames are arranged diagonally and symmetrically. With this arrangement, the wiring space of the scanning line G can be saved, thereby reserving more space for the light emitting element 30 and improving the aperture ratio of the display panel.

In some embodiments, the orthographic projection of the longitudinal line of the scan line G on the substrate 1 overlaps with the orthographic projection of the data line D on the substrate 1. With this arrangement, the occupied space of the scanning line G can be further reduced, so that more space is reserved for the light emitting element 30, and the aperture ratio of the display panel is improved.

In addition, as shown in fig. 2, the OLED display panel includes a driving array layer 2 and a light emitting function layer 3 sequentially formed on a substrate 1. The light emission function layer 3 includes a plurality of light emission elements 30 arrayed in a row direction X and a column direction Y, and the driving array layer 2 includes a plurality of pixel circuits C corresponding to the plurality of light emission elements 30 one by one, and data lines D and scanning lines G intersecting each other.

The light-emitting function layer 3 includes a plurality of pixel units arranged in an array, each pixel unit including at least three light-emitting elements 30 having different colors. Fig. 3 illustrates a top view of one pixel unit of the display panel, the plurality of data lines D extending in the first direction X, the pixel unit including four light emitting elements 30, respectively a red light emitting element R, a green light emitting element G, a blue light emitting element B, and a white light emitting element W, each of the light emitting elements 30 being electrically connected to a corresponding one of pixel circuits C, each of the pixel circuits C including a driving transistor Td, a first switching transistor T1, a second switching transistor T2, and a capacitor Cst.

In addition, the first switching transistor T1 and the second switching transistor T2 corresponding to the light emitting elements 30 of the same color in the same column share the same data line D. When the light emitting elements 30 of the same color in the same column and in the same physical position on the display panel are driven to emit light, the data signals are actually received through the same data line, so that the display panel is more compatible with the existing driving chip, and the driving chip does not need to be greatly changed.

The pixel unit is a minimum repeating unit, and may include three light-emitting elements 30, for example, a red light-emitting element R, a green light-emitting element G, and a blue light-emitting element B. Each pixel unit may also include other numbers of light emitting elements 30, which are not described in detail.

Second embodiment

Fig. 4 illustrates a partial top view of a display panel provided in a second embodiment of the present application.

As shown in fig. 4, the second embodiment of the present application further provides a display panel, which has a similar structure to that of the display panel provided in the first embodiment, except that the first switching transistor T1 and the second switching transistor T2 of the pixel circuit C are connected to the scan line in a different manner.

Specifically, the display panel is a bottom emission type display panel, the pixel circuit C has a first wiring region C1 and a second wiring region C2, the driving transistor Td, the first switching transistor T1 and the capacitor Cst are located in the first wiring region C1, the second switching transistor T2 is located in the second wiring region C2, the light emitting element 30 is rectangular in shape, the light emitting element 30 is located in the same column as the corresponding first wiring region C1 and second wiring region C2, and the second wiring region C2 is located between the first wiring region C1 and the light emitting element 30.

The plurality of subpixels Px are arranged in alignment in the row direction X and the column direction Y, and the second wiring regions C2 of two subpixels Px adjacent in the row direction X are arranged offset from each other in the column direction Y.

The scanning line G includes horizontal lines and vertical lines, which are alternately arranged in the row direction X and connected to each other, the horizontal lines extending in the row direction X, the vertical lines extending in the column direction Y, the horizontal lines being located between the first wiring region C1 and the second wiring region C2 corresponding to each pixel circuit C, and the vertical lines being located between two adjacent columns of subpixels Px.

That is to say, the first switch transistor T1 and the second switch transistor T2 are electrically connected to the same scan line G, so as to reduce the occupied space of the scan line G and increase the aperture ratio of the display panel.

Further, the orthographic projection of the longitudinal line of the scanning line G on the substrate 1 overlaps with the orthographic projection of the data line D on the substrate 1. With this arrangement, the occupied space of the scanning line G can be further reduced, so that more space is reserved for the light emitting element 30, and the aperture ratio of the display panel is improved.

Third embodiment

Fig. 5 is a partial top view of a display panel according to a third embodiment of the present application.

As shown in fig. 5, the third embodiment of the present application further provides a display panel, which has a similar structure to that of the display panel provided in the second embodiment, except that the arrangement of the pixel circuits is different.

Specifically, the display panel is a bottom emission type display panel. The pixel circuit C has a first wiring region C1 and a second wiring region C2, the driving transistor Td, the first switching transistor T1 and the capacitor Cst are located in the first wiring region C1, the second switching transistor T2 is located in the second wiring region C2, the light emitting element 30 is rectangular in shape, the light emitting element 30 and the corresponding first wiring region C1 and second wiring region C2 are located in the same column, and the second wiring region C2 is located between the first wiring region C1 and the light emitting element 30.

The plurality of subpixels Px are arranged offset in the row direction X and the column direction Y, and the second wiring regions C2 of two subpixels Px adjacent in the row direction X are arranged aligned in the row direction X. With such an arrangement, the structure of the pixel circuits C is more compact, and the occupied space is smaller, so that more space is reserved for the light emitting elements 30, and the aperture ratio of the display panel is improved.

Further, the scanning line G includes a plurality of square-shaped wavy conductive lines sequentially distributed in the row direction, the square-shaped wavy conductive lines include transverse lines and longitudinal lines, the transverse lines extend in the row direction X, the longitudinal lines extend in the column direction Y, the transverse lines are located between the first wiring region C1 and the second wiring region C2 corresponding to each pixel circuit C, and the longitudinal lines are located between two adjacent columns of sub-pixels Px.

Fourth embodiment

Fig. 6 is a partial top view of a display panel according to a fourth embodiment of the present application.

As shown in fig. 6, the fourth embodiment of the present application further provides a display panel, which has a similar structure to that of the display panel provided in the second embodiment, except that the shape of the light emitting element 30 is different, and accordingly, the arrangement of the pixel circuits is different.

Specifically, the display panel is a bottom emission type display panel. The pixel circuit C has a first wiring region C1 and a second wiring region C2, the driving transistor Td, the first switching transistor T1 and the capacitor Cst are located in the first wiring region C1, the second switching transistor T2 is located in the second wiring region C2, the light emitting element 30 and the corresponding first wiring region C1 and second wiring region C2 are located in the same column, and the second wiring region C2 is located between the first wiring region C1 and the light emitting element 30.

The plurality of sub-pixels Px are arranged in alignment in the row direction X and the column direction Y, and the second wiring regions C2 and the light emitting elements 30 of two sub-pixels Px adjacent in the row direction X are arranged in a staggered manner in the column direction Y.

That is, the light emitting elements 30 include rectangular portions and convex portions connected to each other, the convex portions of two light emitting elements 30 adjacent in the row direction X are arranged offset in the column direction Y, and each light emitting element 30 is complementary to the corresponding second wiring region C2 into a rectangle, so that the second wiring regions C2 of two sub-pixels Px adjacent in the row direction X and the light emitting elements 30 are arranged offset in the column direction Y.

Since the first wiring region C1 is provided with the driving transistor Td, the first switching transistor T1, and the capacitor Cst, the second wiring region C2 is provided with only the second switching transistor T2, and the wiring area of the second wiring region C2 is smaller than that of the first wiring region C1, so that the convex portion of the light emitting element 30 and the second wiring region C2 are complementary to each other in a rectangular shape, the area of the light emitting element 30 is increased, and the aperture ratio of the display panel is increased while the luminance of the display panel is increased.

Further, the size of the first switching transistor T1 is larger than that of the second switching transistor T2. With this arrangement, the first switching transistor T1 can be used as the main TFT of the pixel circuit C, the second switching transistor T2 can be used as the auxiliary TFT of the pixel circuit C, and the first switching transistor T1 with a larger size is always activated during the use process to control the on and off of the driving transistor Td, thereby improving the reliability of the pixel circuit C. And the second switching transistor T2 with a smaller size is activated only after the first switching transistor T1 fails, and plays a role in assisting the control of the on and off of the driving transistor Td.

Since the second switching transistor T2 is small in size, the wiring area of the second wiring region C2 can be further reduced, thereby increasing the area of the light emitting element 30, further improving the luminance of the display panel, and at the same time, further improving the aperture ratio of the display panel.

Fifth embodiment

Fig. 7 is a schematic cross-sectional view illustrating a display panel according to a fifth embodiment of the present disclosure, and fig. 8 is a partial top view illustrating the display panel shown in fig. 7.

As shown in fig. 7 and 8, the fifth embodiment of the present application further provides a display panel, which is similar in structure to the display panels provided in the first to fourth embodiments, except that: the display panel is a top emission display panel.

Specifically, the anode 31 of the subpixel Px is a reflective metal electrode, the cathode 32 of the subpixel Px is a transparent metal electrode, and the orthographic projection of the subpixel Px on the substrate 1 overlaps the orthographic projection of the pixel circuit C on the substrate 1. As shown in fig. 7, the direction indicated by the arrow is the light outgoing direction of the display panel, i.e., the light emitted by the sub-pixel Px is directed from the anode 31 to the cathode 32.

When the display panel is a top emission display panel, the pixel aperture ratio is high under the condition that the design size is kept unchanged, and the display panel is generally used for small-sized display devices such as smart phones and tablet computers.

In addition, the pixel circuit of the top emission display panel may be generally any one of a 2T1C circuit, a 7T1C circuit, a 7T2C circuit, and a 9T1C circuit. Here, the "2T 1C circuit" means that the pixel circuit includes 2 tfts and 1 capacitor, and the other "7T 1C circuit", "7T 2C circuit", "9T 1C circuit", and the like.

The top emission display panel provided in the embodiment of the application may additionally add a switching transistor on the basis of any one of the 2T1C circuit, the 7T1C circuit, the 7T2C circuit, or the 9T1C circuit, and when any one of the switching transistors in the existing pixel circuit C is damaged, the light emitting element 30 may be continuously controlled by the additionally added switching transistor, or when the additionally added switching transistor is damaged, any one of the switching transistors in the existing pixel circuit C may continuously control the light emitting element 30, and the two are backup to each other.

In addition, in order to improve the light transmittance of the display panel, the light emitting element 30 of each sub-pixel Px is overlapped with the orthographic projection of the pixel circuit C on the substrate 1, and the plurality of sub-pixels Px are arranged in alignment in the row direction X and the column direction Y.

It can be understood that the display panel of the embodiment of the present application may also be other self-light emitting display panels that are similar to the OLED display panel and can be driven in an Active Matrix (AM) manner, and details are not repeated.

It should be readily understood that "on … …", "above … …" and "above … …" in this application should be interpreted in its broadest sense such that "on … …" means not only "directly on something", but also includes the meaning of "on something" with intervening features or layers therebetween, and "above … …" or "above … …" includes not only the meaning of "above something" or "above" but also includes the meaning of "above something" or "above" without intervening features or layers therebetween (i.e., directly on something).

The term "substrate" as used herein refers to a material on which a subsequent layer of material is added. The substrate itself may be patterned. The material added atop the substrate may be patterned or may remain unpatterned. In addition, the substrate may comprise a wide range of materials, such as silicon, germanium, gallium arsenide, indium phosphide, and the like. Alternatively, the substrate may be made of a non-conductive material (e.g., glass, plastic, or sapphire wafer, etc.).

The term "layer" as used herein may refer to a portion of material that includes a region having a thickness. A layer may extend over the entire underlying or overlying structure or may have a smaller extent than the underlying or overlying structure. Furthermore, a layer may be a region of a continuous structure, homogeneous or heterogeneous, having a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of the continuous structure or between any pair of lateral planes at the top and bottom surfaces. The layers may extend laterally, vertically, and/or along a tapered surface. The drive array layer may be a layer, may include one or more layers therein, and/or may have one or more layers located above, and/or below it. The layer may comprise a plurality of layers. For example, the interconnect layer may include one or more conductors and contact layers (within which contacts, interconnect lines, and/or vias are formed) and one or more dielectric layers.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel comprising a substrate and a plurality of sub-pixels on the substrate, each of the sub-pixels comprising a light emitting element and a pixel circuit electrically connected to the light emitting element, the pixel circuit comprising a driving transistor, a first switching transistor and a capacitor, the driving transistor being electrically connected to an anode of the light emitting element,

the pixel circuit further comprises a second switch transistor, and the second switch transistor and the first switch transistor are used for controlling the driving transistor to be switched on and switched off.

2. The display panel according to claim 1, wherein the plurality of sub-pixels are arranged in an array in a row direction and a column direction, the display panel further comprises a plurality of data lines extending in the column direction and a plurality of scan lines extending in the row direction, the second switching transistor and the first switching transistor of each of the sub-pixels are electrically connected to the same data line, and the second switching transistor and the first switching transistor of each of the sub-pixels are electrically connected to the same scan line.

3. The display panel according to claim 2, wherein the light emitting element of each of the sub-pixels does not overlap with an orthogonal projection of the pixel circuit on the substrate, and the light emitting elements of the plurality of sub-pixels are arranged alternately in a row direction and a column direction;

the scanning line includes first scanning sub-line and the second scanning sub-line of interconnect, and in the row direction, every pixel circuit the grid of first switch transistor with first scanning sub-line electricity is connected, every pixel circuit the grid of second switch transistor with second scanning sub-line electricity is connected.

4. The display panel according to claim 3, wherein the first sub-scanning line includes a plurality of square-shaped wavy conductors sequentially distributed in a row direction, each of the square-shaped wavy conductors at least partially overlapping with the corresponding pixel circuit;

the second sub-scanning line is a linear wire connected to an opening of the square wave-shaped wire;

the square wavy conducting wire comprises transverse wires and longitudinal wires which are distributed in a staggered mode along the row direction and connected in sequence, the transverse wires extend along the row direction, and the longitudinal wires extend along the column direction; the second sub-scanning line is arranged in parallel with the transverse line.

5. The display panel according to claim 2, wherein the light emitting element of each of the sub-pixels does not overlap with an orthogonal projection of the pixel circuit on the substrate, and the light emitting elements of the plurality of sub-pixels are arranged alternately in a row direction and a column direction;

the pixel circuit has a first wiring area and a second wiring area, the driving transistor, the first switching transistor and the capacitor are located in the first wiring area, the second switching transistor is located in the second wiring area, the light emitting element and the corresponding first and second wiring areas are located in the same column, and the second wiring area is located between the first wiring area and the light emitting element;

the scanning line includes a plurality of square wavy wires that distribute in proper order along the row direction, square wavy wire includes crisscross distribution and interconnect's horizontal line and vertical line along the row direction, the horizontal line extends along the row direction, the vertical line extends along row direction, the horizontal line is located every pixel circuit corresponds first wiring district with between the second wiring district, the vertical line is located adjacent two columns between the sub-pixel.

6. The display panel according to claim 3 or 5, wherein an orthogonal projection of the longitudinal line of the scanning line on the substrate overlaps with an orthogonal projection of the data line on the substrate.

7. The display panel according to claim 5, wherein the plurality of sub-pixels are arranged in alignment in a row direction and a column direction, and the second wiring regions of two of the sub-pixels adjacent in the row direction are arranged to be shifted from each other in the column direction.

8. The display panel according to claim 5, wherein the plurality of sub-pixels are arranged with a shift in a row direction and a column direction, and the second wiring regions of two of the sub-pixels adjacent to each other in the row direction are arranged in alignment in the row direction.

9. The display panel according to claim 5, wherein the plurality of sub-pixels are arranged in alignment in a row direction and a column direction, and the second wiring regions and the light emitting elements of two of the sub-pixels adjacent in the row direction are arranged in a staggered manner in the column direction.

10. The display panel according to claim 2, wherein the light emitting element of each of the sub-pixels coincides with an orthographic projection of the pixel circuit on the substrate, and the plurality of sub-pixels are arranged in alignment in a row direction and a column direction.