CN114281632A

CN114281632A - Method and device for initializing Romcode in SoC verification

Info

Publication number: CN114281632A
Application number: CN202111360699.9A
Authority: CN
Inventors: 张阳午; 李德建; 王于波; 郝燚; 冯曦
Original assignee: State Grid Corp of China SGCC; State Grid Information and Telecommunication Co Ltd; State Grid Jiangsu Electric Power Co Ltd; Beijing Smartchip Microelectronics Technology Co Ltd
Current assignee: State Grid Corp of China SGCC; State Grid Information and Telecommunication Co Ltd; State Grid Jiangsu Electric Power Co Ltd; Beijing Smartchip Microelectronics Technology Co Ltd
Priority date: 2021-11-17
Filing date: 2021-11-17
Publication date: 2022-04-05

Abstract

The embodiment of the invention provides a method and a device for initializing Romcode in SoC verification, belonging to the technical field of chips. The method comprises the following steps: for the Romcode to be initialized, circularly executing the following steps until the Romcode to be initialized is traversed according to rows: reading uninitialized file contents from the Romcode to be initialized; extracting addresses and data from the file content; determining a memory corresponding to the address; and storing the data into a memory address corresponding to the address of the memory to complete the initialization of the file content. The method and the device avoid the defect that the file needs to be split according to the address or continuously complement the value because the address of the file to be initialized is discontinuous, overcome the defect of splitting directional excitation when the multi-memory jumps, improve the automation degree of verification and reduce the risk of accidental errors caused by manual intervention.

Description

Method and device for initializing Romcode in SoC verification

Technical Field

The invention relates to the technical field of chips, in particular to a method and a device for initializing Romcode in SoC verification.

Background

With the continuous development of Chip technology, the integration level of SoC (System on Chip) is higher and higher. Most socs integrate one or more CPU cores. Such chips are verified at the module level before integration. However, after the integration is completed, a complete verification of the SoC still needs to be performed.

Verification of SoC is currently performed mainly based on UVM (Universal Verification Methodology). Unlike block-level verification, the completeness of verification will depend largely on the directional stimulus, since in SoC verification the system is handed over to CPU control, so that the use of randomization will become very limited. The directional stimulus is typically written in C language. The directional stimulus written in C language is converted into a hex or bin format file (hereinafter, referred to as hex or bin file) by a tool, and is initialized by the verification platform into a Memory, which includes a ROM (Read-Only Memory), an SRAM (Static Random-Access Memory), an SDRAM (synchronous dynamic Random-Access Memory), an OTP (One Time Programmable) Memory, a flash Memory, and the like. In the present application, files in a similar format, such as an initialization hex or bin file, are collectively referred to as an initialization Romcode.

In the related art, the Romcode initialization method is as follows: the tool generates hex or bin files; an initialization module in the verification platform reads a hex or bin file by using a $ readmemh function; starting from memory space address 0, the Romcode is copied into memory at once.

Disclosure of Invention

The embodiment of the invention aims to provide a method and a device for initializing Romcode in SoC verification, which are used for solving at least the defects in the related art.

In order to achieve the above object, an embodiment of the present invention provides a method for initializing a Romcode in SoC verification, where the method includes: for the Romcode to be initialized, circularly executing the following steps until the Romcode to be initialized is traversed according to rows: reading uninitialized file contents from the Romcode to be initialized; extracting addresses and data from the file content; determining a memory corresponding to the address; and storing the data into a memory address corresponding to the address of the memory to complete the initialization of the file content.

Optionally, reading the uninitialized file content from the to-be-initialized Romcode, including: reading one row of uninitialized file contents from the Romcode to be initialized, wherein addresses in the contents of different rows can correspond to different memories.

Optionally, extracting addresses and data from the file content includes: and processing characters associated with addresses and data in the acquired file contents to obtain the addresses and the data.

Optionally, determining the memory corresponding to the address includes: and determining a memory corresponding to the address by using an SoC address mapping relation, wherein the SoC address mapping relation is stored in advance and comprises an address range corresponding to each memory.

Optionally, storing the data in a memory address of the memory corresponding to the address to complete initialization of the file content, including: and calling a corresponding array writing function to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

Optionally, the Romcode includes a hex file or a bin file, and the corresponding memory is one of one or more memories.

Optionally, the method is performed based on an SoC verification platform, where a virtual interface is set for each memory in the SoC verification platform, and the virtual interface is set with an address range of the corresponding memory.

Optionally, determining the memory corresponding to the address includes: traversing the virtual interface to determine a memory corresponding to the address; storing the data into a memory address corresponding to the address of the memory to complete initialization of the file content, including: providing the data and the address to a corresponding virtual interface; and calling a corresponding array writing function by the corresponding virtual interface to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

Optionally, the SoC verification platform adopts a dual-TOP-level structure, the dual-TOP-level structure includes an HDL _ TOP portion and an HVL _ TOP portion, and program code for executing the method is disposed in a bus function model portion of the HDL _ TOP portion.

Correspondingly, an embodiment of the present invention further provides an apparatus for initializing a Romcode in SoC verification, where the apparatus includes: the reading module is used for reading uninitialized file contents from the Romcode to be initialized; the extraction module is used for extracting addresses and data from the file content; the determining module is used for determining a memory corresponding to the address; the storage module is used for storing the data into a memory address of the memory, which corresponds to the address, so as to complete the initialization of the file content; and the loop execution module is used for executing loop from the reading module aiming at the Romcode to be initialized until the Romcode to be initialized is traversed and completed according to rows.

Optionally, the reading module reads the uninitialized file content according to the following steps: reading one row of uninitialized file contents from the Romcode to be initialized, wherein addresses in the contents of different rows can correspond to different memories.

Optionally, the extracting module extracts addresses and data from the file content according to the following steps: and processing characters associated with addresses and data in the acquired file contents to obtain the addresses and the data.

Optionally, the determining module determines the memory corresponding to the address according to the following steps: and determining a memory corresponding to the address by using an SoC address mapping relation, wherein the SoC address mapping relation is stored in advance and comprises an address range corresponding to each memory.

Optionally, the storage module stores the data into a memory address of the memory corresponding to the address according to the following steps to complete initialization of the file content: and calling a corresponding array writing function to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the corresponding memory.

Optionally, the apparatus is integrated in an SoC verification platform, and a virtual interface is set in the SoC verification platform for each memory, where the virtual interface is provided with an address range of the corresponding memory.

Optionally, the determining module determines the memory corresponding to the address according to the following steps: traversing the virtual interface to determine a memory corresponding to the address; the storage module stores the data into a memory address of the memory corresponding to the address according to the following steps to complete initialization of the file content: providing the data and the address to a corresponding virtual interface; and calling a corresponding array writing function by the corresponding virtual interface to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

Optionally, the SoC verification platform adopts a dual-TOP-level structure, the dual-TOP-level structure includes an HDL _ TOP portion and an HVL _ TOP portion, and program code forming the apparatus is disposed in a bus function model portion of the HDL _ TOP portion.

Accordingly, the embodiment of the present invention also provides a machine-readable storage medium, which stores instructions for causing a machine to execute the above method.

Correspondingly, the embodiment of the present invention further provides a processor, configured to execute a program, where the program is executed to perform the above method.

By the technical scheme, the corresponding memory is automatically judged when the Romcode is initialized, and the address and the data in the Romcode are stored in the corresponding memory. Therefore, the defect that the file needs to be split according to the address or continuously complemented due to the discontinuous address of the file to be initialized is avoided, the defect of splitting directional excitation when the multi-memory jumps is overcome, the automation degree of verification is improved, and the risk of accidental errors caused by manual intervention is reduced.

Additional features and advantages of embodiments of the invention will be set forth in the detailed description which follows.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the embodiments of the invention without limiting the embodiments of the invention. In the drawings:

fig. 1 is a schematic flowchart illustrating a method for initializing a Romcode in SoC verification according to an embodiment of the present invention;

FIG. 2 illustrates a modular block diagram of a platform upon which the method for initializing Romcode in SoC authentication provided by the present invention is based;

FIG. 3 shows a flow diagram of the load _ hex task;

fig. 4 shows a flow diagram of a prog _ memory task; and

fig. 5 is a block diagram illustrating an apparatus for initializing Romcode in SoC verification according to an embodiment of the present invention.

Detailed Description

The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating embodiments of the invention, are given by way of illustration and explanation only, not limitation.

The applicant has found that the related art has the following drawbacks:

(1) copying data into the memory needs to start from address 0, in order until the entire content copy is completed. This has an effect on some special directional stimuli, such as those requiring long jumps. The address of the hex or bin file generated for these stimuli is not continuous, and it is necessary to store the address in the hex or bin file at initialization, but not continuous storage. The above-described related art does not achieve such a function. It is often necessary to process such stimulated romcodes separately, such as splitting by address, and reinitializing the Romcode. In addition, additional code needs to be added to continuously complement the address of the interrupt. This method is not only cumbersome and error-prone, but also results in a CPU hang-up once an error occurs and is not easy to quickly find out a problem.

(2) For the directional excitation needing to jump in a plurality of memories, the directional excitation needs to be split into a plurality of directional excitations according to the types of the stored memories, and then a hex or bin file is generated and stored in the memory according to the related technology. For example, when a CPU needs to jump from a ROM to an SRAM to fetch an instruction, a directional excitation is usually split into two parts, i.e., a part running in the ROM and a part running in the SRAM, and then a hex or bin file is generated and the two romcodes are respectively initialized according to the related art to be stored in corresponding memories. This approach increases the complexity of the verification and increases the workload.

Fig. 1 is a flowchart illustrating a method for initializing a Romcode in SoC verification according to an embodiment of the present invention. As shown in fig. 1, an embodiment of the present invention provides a method for initializing Romcode in SoC verification, which may be implemented, for example, on a UVM-based SoC verification platform, and program code for initializing Romcode may be provided in a bus function model portion of the platform. The method can include circularly executing the following steps S110 to S140 for the Romcode to be initialized until the Romcode to be initialized is completed by row traversal.

Step S110, reading uninitialized file contents from the Romcode to be initialized.

The Romcode to be initialized is a hex file or a bin file or a similar file of directional excitation conversion. During specific execution, a file of Romcode to be initialized is firstly opened, and then a system function can be called to acquire uninitialized Romcode from the file to be initialized. The called system function may be a $ fgets function, etc.

Step S120, extracting addresses and data from the file content.

The extracted address may be an address or a range of addresses.

The uninitialized file contents can be read one line at a time from the Romcode to be initialized. A line of file content corresponds to an address or a range of addresses. The address range corresponds to an identical store, indicating that data is to be stored in the address range of the memory.

Characters associated with addresses and data in the file content may be processed to extract the addresses and data. The extracted address and data may be arranged into a data format similar to "address-data" to facilitate subsequent processing. Here, a system function, which may be, for example, a $ sscanf function or the like, may be called to process the file content.

Step S130, determining a memory corresponding to the address.

An SoC address mapping relationship including an address range corresponding to each memory may be stored in advance. In this way, the SoC address mapping relationship may be used to determine the memory to which the address corresponds.

During specific execution, a virtual interface can be set for each memory on the SoC verification platform, and each virtual interface is provided with an address range of the corresponding memory. By traversing the virtual interface, the memory corresponding to the address can be determined. The corresponding memory is one of one or more memories. The one or more memories comprise one or more of: ROM, SRAM, SDRAM, OTP memory, flash memory, etc.

Step S140, storing the data into a memory address of the memory corresponding to the address, so as to complete initialization of the file content.

The initialization of the file content may be completed by calling an array write function corresponding to the memory to store the data into a memory address of the memory corresponding to the address. Different memories correspond to different array writing functions, and the array writing functions are used for converting the format of data to be written into a format matched with the corresponding memories. The memory address for storing data corresponds to the address extracted in step S120, and may be the same as the address extracted in step S120, or may be the address extracted in step S120 and obtained based on a certain operation rule, and the embodiment of the present invention is not limited in particular.

In the case where a virtual interface is provided, the data and address may be provided to the virtual interface, and the array write function may be called by the virtual interface to write the data to the corresponding memory, thereby completing initialization of the file content. Here, the data and address may be provided to the virtual interface using, for example, a write _ word function.

In executing the step S110, one row of uninitialized file contents may be read from the Romcode to be initialized at a time. A line of file content corresponds to an address or a range of addresses. The address range corresponds to an identical store, indicating that data is to be stored in the address range of the memory. And traversing the Romcode in sequence according to rows in such a way that each row of file contents of the Romcode is automatically initialized.

In the expandable case, more than one row of uninitialized file contents may also be read from the Romcode to be initialized at a time when the step S110 is executed. However, in this manner, it is necessary to perform the corresponding steps in each row in turn in steps S120 to S140. The implementation is more complex than acquiring one line of file content at a time. It is preferable that when the step S110 is executed, one row of uninitialized file contents can be acquired from the Romcode to be initialized at a time.

In determining whether the Romcode is traversed to completion, the file state of the Romcode may be determined using a system function, where the system function used may be a $ feof function. And if the loop is not traversed, returning to continue executing the loop. If the traversal is completed, the initialization process is ended. The SoC verification process enters the next state, namely the emulation state.

The method for initializing Romcode in SoC verification provided by the embodiment of the invention can automatically judge the corresponding memory when the Romcode is initialized and store the address and data in the Romcode into the corresponding memory. Therefore, the defect that the file needs to be split according to the address or continuously complemented due to the discontinuous address of the file to be initialized is avoided, the defect of splitting directional excitation when the multi-memory jumps is overcome, the automation degree of verification is improved, and the risk of accidental errors caused by manual intervention is reduced.

Fig. 2 shows a modular block diagram of a platform on which the method for initializing Romcode in SoC authentication provided by the present invention is based. As shown in fig. 2, the method for initializing Romcode in SoC verification according to the embodiment of the present invention may be performed based on a UVM SoC verification platform. The platform may employ a dual TOP-level architecture, divided into an HDL _ TOP portion associated with register level (RTL) and an HVL _ TOP portion associated with abstraction level, behavioral level (i.e., a standard UVM verification platform). Program code for a method of initializing Romcode in SoC authentication is set to a Bus Function Model (BFM) section of the HDL _ TOP section. In fig. 2, ". SV" indicates that the code is written in SV language, and "DUT" indicates a device to be verified, i.e., SoC to be tested. The DUT and HVL _ TOP parts interact through the config _ db mechanism in UVM.

The code modules of the method of initializing Romcode do not have data interaction with the HVL _ TOP section, which is equivalent to independent modules running in the HDL _ TOP section.

An interface queue and storage array initialization module is instantiated in the memory _ gaskets module. The interface queue includes virtual interfaces provided for the respective memories, including, for example, an SRAM virtual interface, an OTP memory virtual interface, a flash memory virtual interface, an SDRAM virtual interface, and the like shown in the drawing. In actual writing, only one interface needs to be written and declared as a virtual type, and then an interface array can be instantiated. The memory array initialization module includes initialization modules for respective memories, including, for example, sram _ gaskets, otp _ gaskets, flash _ gaskets, sdram _ gaskets, and the like shown in the drawings. The interface queue is provided with an address range corresponding to the memory, and the memory corresponding to the address of the data content to be initialized can be determined by traversing the interface queue. The interface queue and the storage array initialization module are arranged, the situation that the type of a memory needs to be distinguished by macro definition during original initialization is omitted, the verification environment is cleaner, meanwhile, the number of the memories needing to be initialized can be increased and decreased by changing the size of the interface queue, and changes to other files of a verification platform are reduced. The virtual interfaces listed in fig. 2 are for purposes of example only and are not limiting, and a virtual interface may be provided for one or more of any other types of storage, if desired.

Take the Romcode to be initialized as the hex file as an example. The memory _ desktop module is provided with a load _ hex task and a prog _ memory task. The load _ hex task is used for processing the format of the hex file and judging the reading state of the hex file, and the prog _ memory task is used for processing the writing of data in the hex file.

At time 0 of SoC authentication, first call load _ hex task in memory _ gasket module. The load _ hex task may perform the aforementioned steps S110 to S120. The execution flow of this task is shown in fig. 3. Firstly, judging whether a hex file exists or not, and if not, finishing the verification. If so, the hex file is opened. The $ fgets function is then used to read the contents of a line of the hex file that is not initialized. Processing characters associated with addresses and data in the file content using a $ sscanf function to extract the addresses and data, and converting the format of the extracted addresses and data into an "address-data" format. And after the address and the data are extracted, calling a prog _ memory task to complete the initialization of the content of the line of hex files. And judging the hex file state by using a $ feof function, and if the hex file state is not read completely, acquiring the content of the next line of hex files which are not initialized so as to repeatedly execute the steps. If the reading is finished, the load _ hex task is ended, and the verification is started.

Here, the execution flow of the prog _ memory task is exemplified by taking an example that the memory includes an SRAM or an OTP memory. The prog _ memory task is mainly used for executing the aforementioned steps S130 to S140. As shown in fig. 4, the memory corresponding to the extracted address is first determined by traversing the interface queue. And in the case that the address corresponds to the SRAM, namely the address belongs to the SRAM, providing the address and the data to the SRAM virtual interface by calling a write _ word function in the SRAM virtual interface. Then, the SRAM virtual interface calls an SRAM array writing function, and writes the data into the SRAM according to the address so as to complete the initialization of the file content. The SRAM array write function is capable of converting the format of the data to a data format that matches SRAM. In case the address corresponds to the OTP memory, i.e. belongs to an OTP memory address, the address and the data are provided to the OTP memory virtual interface by calling a write _ word function in the OTP memory virtual interface. And then, calling an OTP memory array writing function by the OTP memory virtual interface, and writing the data into the OTP memory according to the address to complete the initialization of the file content. The OTP memory array write function is capable of converting the format of the data to a data format that matches OTP memory.

The array write function corresponding to the memory may be named, for example, as the act _ write _ byte function. According to different memories, the function needs to be defined in the sram _ gasket module in advance.

The method for initializing Romcode in SoC verification provided by the embodiment of the invention can automatically judge the memory needing initialization during initialization and can automatically switch among a plurality of memories. The defect that the file needs to be split according to the address or the value is continuously complemented because the address of the file to be initialized is discontinuous is avoided, the defect that the directional excitation is split when the multi-memory jumps is overcome, the automation degree of verification is improved, and the risk of accidental errors caused by manual intervention is reduced.

Fig. 5 is a block diagram illustrating an apparatus for initializing Romcode in SoC verification according to an embodiment of the present invention. As shown in fig. 5, an embodiment of the present invention further provides an apparatus for initializing Romcode in SoC verification, where the apparatus includes: a reading module 520, configured to read uninitialized file content from a Romcode to be initialized; an extracting module 530, configured to extract addresses and data from the file content; a determining module 540, configured to determine a memory corresponding to the address; and a storage module 550, configured to store the data into a memory address of the memory corresponding to the address, so as to complete initialization of the file content; and a loop execution module 510, configured to loop the read module to execute the to-be-initialized Romcode until the to-be-initialized Romcode is traversed by rows.

In some optional embodiments, the reading module 520 may read the uninitialized file content according to the following steps: reading one row of uninitialized file contents from the Romcode to be initialized, wherein addresses in the contents of different rows can correspond to different memories.

In some optional embodiments, the extraction module 530 extracts addresses and data from the file content according to the following steps: and processing characters associated with addresses and data in the acquired file contents to obtain the addresses and the data.

In some optional embodiments, the determining module 540 determines the memory corresponding to the address according to the following steps: and determining a memory corresponding to the address by using an SoC address mapping relation, wherein the SoC address mapping relation is stored in advance and comprises an address range corresponding to each memory.

In some optional embodiments, the storage module 550 stores the data into the memory address of the memory corresponding to the address according to the following steps to complete the initialization of the file content: and calling a corresponding array writing function to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the corresponding memory.

In some optional embodiments, the Romcode comprises a hex file or a bin file, and the corresponding memory is one of one or more memories.

In some optional embodiments, the apparatus is integrated into a SoC verification platform in which a virtual interface is provided for each memory, the virtual interface being provided with an address range of the corresponding memory.

In some optional embodiments, the determining module 540 determines the memory corresponding to the address according to the following steps: traversing the virtual interface to determine a memory corresponding to the address; the storage module 550 stores the data into the memory address of the memory corresponding to the address according to the following steps to complete the initialization of the file content: providing the data and the address to a corresponding virtual interface; and calling a corresponding array writing function by the corresponding virtual interface to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

In some optional embodiments, the SoC validation platform employs a dual TOP-level architecture including an HDL _ TOP section and an HVL _ TOP section, with program code forming the apparatus being disposed in a bus functional model section of the HDL _ TOP section.

The apparatus for initializing Romcode in SoC verification according to an embodiment of the present invention may include a processor and a memory, where the foregoing modules may be stored in the memory as program units, and the processor executes the program units stored in the memory to implement the method for initializing Romcode in SoC verification according to any embodiment of the present invention.

The processor comprises a kernel, and the kernel calls the corresponding program unit from the memory. The kernel can be provided with one or more than one, and the method for initializing Romcode in SoC verification according to any embodiment of the invention is executed by adjusting the kernel parameters.

The memory may include volatile memory in a computer readable medium, random access memory, and/or nonvolatile memory, such as read only memory or flash memory, and the memory includes at least one memory chip.

The specific working principle and benefits of the apparatus for initializing the Romcode in SoC verification provided by the embodiment of the present invention are the same as those of the method for initializing the Romcode in SoC verification provided by the embodiment of the present invention, and will not be described herein again.

An embodiment of the present invention further provides a machine-readable storage medium, which stores instructions for causing a machine to execute the method for initializing Romcode in SoC verification according to any embodiment of the present invention.

The embodiment of the invention also provides a processor, which is used for running the program, wherein the program runs to execute the method for initializing Romcode in SoC verification according to any embodiment of the invention.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.

The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A method for initializing Romcode in SoC authentication, the method comprising:

for the Romcode to be initialized, circularly executing the following steps until the Romcode to be initialized is traversed according to rows:

reading uninitialized file contents from the Romcode to be initialized;

extracting addresses and data from the file content;

determining a memory corresponding to the address; and

and storing the data into a memory address corresponding to the address of the memory to complete the initialization of the file content.

2. The method of claim 1, wherein reading uninitialized file content from the Romcode to be initialized comprises:

reading one row of uninitialized file contents from the Romcode to be initialized, wherein addresses in the contents of different rows can correspond to different memories.

3. The method of claim 1, wherein extracting addresses and data from the file content comprises:

and processing characters associated with addresses and data in the acquired file contents to obtain the addresses and the data.

4. The method of claim 1, wherein determining the memory to which the address corresponds comprises:

and determining a memory corresponding to the address by using an SoC address mapping relation, wherein the SoC address mapping relation is stored in advance and comprises an address range corresponding to each memory.

5. The method of claim 1, wherein storing the data in a memory address of the memory corresponding to the address to complete initialization of the file content comprises:

and calling a corresponding array writing function to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

6. The method of claim 1, wherein the Romcode comprises a hex file or a bin file, and wherein the corresponding memory is one of one or more memories.

7. The method of claim 1, wherein the method is performed based on a SoC authentication platform in which a virtual interface is provided for each memory, the virtual interface being provided with an address range of the corresponding memory.

8. The method of claim 7,

determining a memory corresponding to the address, including: traversing the virtual interface to determine a memory corresponding to the address;

storing the data into a memory address corresponding to the address of the memory to complete initialization of the file content, including: providing the data and the address to a corresponding virtual interface; and calling a corresponding array writing function by the corresponding virtual interface to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

9. The method of claim 7 or 8, wherein the SoC validation platform employs a dual TOP-level architecture, the dual TOP-level architecture comprising an HDL _ TOP section and an HVL _ TOP section, program code to perform the method being disposed in a bus functional model section of the HDL _ TOP section.

10. An apparatus for initializing Romcode in SoC authentication, the apparatus comprising:

the reading module is used for reading uninitialized file contents from the Romcode to be initialized;

the extraction module is used for extracting addresses and data from the file content;

the determining module is used for determining a memory corresponding to the address;

the storage module is used for storing the data into a memory address of the memory, which corresponds to the address, so as to complete the initialization of the file content; and

and the loop execution module is used for executing loop from the reading module aiming at the Romcode to be initialized until the Romcode to be initialized is traversed and completed according to rows.

11. The apparatus of claim 10, wherein the reading module reads uninitialized file content according to the following steps:

12. The apparatus of claim 10, wherein the extraction module extracts addresses and data from the document content according to the following steps:

13. The apparatus of claim 10, wherein the determining module determines the memory corresponding to the address according to the following steps:

14. The apparatus of claim 10, wherein the storage module stores the data into a memory address of the memory corresponding to the address to complete initialization of the file content according to the following steps:

and calling a corresponding array writing function to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the corresponding memory.

15. The apparatus of claim 10, wherein the Romcode comprises a hex file or a bin file, and wherein the corresponding memory is one of one or more memories.

16. The apparatus of claim 10, wherein the apparatus is integrated into a SoC verification platform, and wherein a virtual interface is provided for each memory in the SoC verification platform, and wherein the virtual interface is provided with an address range of the corresponding memory.

17. The apparatus of claim 16,

the determining module determines the memory corresponding to the address according to the following steps: traversing the virtual interface to determine a memory corresponding to the address;

the storage module stores the data into a memory address of the memory corresponding to the address according to the following steps to complete initialization of the file content: providing the data and the address to a corresponding virtual interface; and calling a corresponding array writing function by the corresponding virtual interface to write the data into the memory address of the memory so as to complete the initialization of the file content, wherein the array writing function is used for converting the format of the data into a format matched with the memory.

18. The apparatus of claim 16 or 17, wherein the SoC validation platform employs a dual TOP-level architecture comprising an HDL _ TOP portion and an HVL _ TOP portion, program code forming the apparatus being disposed in a bus functional model portion of the HDL _ TOP portion.

19. A machine-readable storage medium having stored thereon instructions for causing a machine to perform the method of any one of claims 1-9.

20. A processor characterized by being configured to run a program, wherein the program is configured to perform the method according to any of claims 1-9 when being run.