CN114280985A - Signal output board card and automatic test system - Google Patents
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Abstract
The application relates to a signal output board card and an automatic test system. The signal output board card provided by the embodiment of the application comprises a main controller, a bus module and a signal output module, wherein the bus module and the signal output module are respectively connected with the main controller. The bus module is used for connecting an upper computer and the main controller, the main controller is used for receiving an initial signal sent by the upper computer through the bus module and sending the initial signal to the signal output module, and the signal output module is used for outputting a plurality of paths of target analog signals in different forms according to the initial signal. The automatic test system that this application embodiment provided includes host computer and signal output integrated circuit board, and bus module and host computer in the signal output integrated circuit board are connected, and the host computer is used for generating initial signal to send initial signal for main control unit through bus module. The signal output board card and the automatic test system provided by the embodiment of the application can effectively reduce the automatic test cost of the target equipment.
Description
Technical Field
The application relates to the field of automatic testing of electronic equipment or components, in particular to a signal output board card and an automatic testing system.
Background
In the field of automated testing of electronic devices or components used in the aerospace industry, it is often necessary to provide various types of analog signals as input stimuli for target devices, where the analog signals are used to provide either enabling stimuli for the target devices or signal analysis and the like, and therefore, in general, the target devices can normally enter a testing state through the combination of multiple analog signals. In the prior art, different types of analog signals need to be realized through different signal output board cards, so that the automatic test cost of the target equipment is increased to a great extent.
Disclosure of Invention
An object of the present application is to provide a signal output board card and an automatic test system, so as to solve the above problems.
The signal output board card provided by the embodiment of the application comprises a main controller, a bus module and a signal output module, wherein the bus module and the signal output module are respectively connected with the main controller;
the bus module is used for connecting the upper computer and the main controller;
the main controller is used for receiving an initial signal sent by the upper computer through the bus module and sending the initial signal to the signal output module;
the signal output module is used for outputting a plurality of target analog signals in different forms according to the initial signal.
With reference to the first aspect, an embodiment of the present application further provides a first optional implementation manner of the first aspect, where the signal output module includes a digital-to-analog converter, a first signal output unit, and a second signal output unit, and the digital-to-analog converter is connected to the main controller, the first signal output unit, and the second signal output unit, respectively;
the digital-to-analog converter is used for converting the initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending the two paths of intermediate analog signals to the first signal output unit and the second signal output unit respectively;
the first signal output unit is used for converting the received intermediate analog signal into an analog signal in a direct current form;
the second signal output unit is used for converting the received intermediate analog signal into an analog signal in an alternating current form.
With reference to the first optional implementation manner of the first aspect, an embodiment of the present application further provides a second optional implementation manner of the first aspect, where the first signal output unit includes an output driver, an output mode selection end of the output driver is connected to the main controller, and a signal input end of the output driver is connected to the digital-to-analog converter;
the main controller is also used for receiving a mode selection instruction sent by the upper computer through the bus module and sending the mode selection instruction to the output driver, and the mode selection instruction comprises a first selection instruction used for indicating to output an analog voltage signal and a second selection instruction used for indicating to output an analog current signal;
the digital-to-analog converter is used for converting the initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending one path of intermediate analog signal in the two paths of intermediate analog signals to the output driver;
the output driver is used for converting the received intermediate analog signal into an analog voltage signal in a direct current form when the mode selection instruction is a first selection instruction, and converting the received intermediate analog signal into an analog current signal in a direct current form when the mode selection instruction is a second selection instruction.
With reference to the first optional implementation manner of the first aspect, an embodiment of the present application further provides a third optional implementation manner of the first aspect, where the second signal output unit includes an operational amplifier, a forward input end of the operational amplifier is connected to the digital-to-analog converter, and a backward input end of the operational amplifier is connected to the reference voltage signal;
the digital-to-analog converter is used for converting the initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending one path of intermediate analog signal in the two paths of intermediate analog signals to the operational amplifier;
the operational amplifier is used for converting the received intermediate analog signal into an analog voltage signal in an alternating current form.
In combination with the first aspect, an embodiment of the present application further provides a fourth optional implementation manner of the first aspect, where a plurality of signal output modules are provided, and the signal output board further includes a plurality of isolation power modules, and the plurality of isolation power modules are connected to the plurality of signal output modules in a one-to-one correspondence manner;
the isolation power supply module is used for providing working electric energy for the corresponding signal output module.
With reference to the fourth optional implementation manner of the first aspect, an embodiment of the present application further provides a fifth optional implementation manner of the first aspect, where the isolated power supply module includes a first adjusting unit and a second adjusting unit, the first adjusting unit and the second adjusting unit are respectively connected to corresponding signal output modules, and the second adjusting unit is further connected to the first adjusting unit;
the first adjusting unit is used for connecting a back plate of the bus module to adjust an initial power supply signal provided by the back plate to obtain a first target power supply signal, and the first target power supply signal is used for accessing the second adjusting unit and providing part of working electric energy for the corresponding signal output module;
the second adjusting unit is used for adjusting the first target power supply signal to obtain a second target power supply signal, and the second target power supply signal is used for providing another part of working electric energy for the corresponding signal output module.
With reference to the fourth optional implementation manner of the first aspect, an embodiment of the present application further provides a sixth optional implementation manner of the first aspect, where the signal output board includes a circuit substrate;
the plurality of signal output modules are arranged on the circuit substrate in an array mode, and the plurality of isolation power supply modules correspond to the plurality of signal output modules in arrangement positions one to one.
With reference to the first aspect, an embodiment of the present application further provides a seventh optional implementation manner of the first aspect, where the signal output board further includes a power conversion module, and the power conversion module is connected to the main controller;
the power supply conversion module is used for connecting a back plate of the bus module so as to adjust an initial power supply signal provided by the back plate to obtain a third target power supply signal, and the third target power supply signal is used for providing part of working electric energy for the main controller.
With reference to the first aspect, an embodiment of the present application further provides an eighth optional implementation manner of the first aspect, where the bus module includes a PXIe bus module and a PXI bus module, and the master controller integrates control logic of the PXIe bus module and the PXI bus module.
In a second aspect, the automated testing system provided in the embodiment of the present application includes an upper computer and a signal output board card provided in the first aspect or any one of the optional implementation manners of the first aspect, wherein a bus module in the signal output board card is connected to the upper computer;
the upper computer is used for generating an initial signal and sending the initial signal to the main controller through the bus module.
The signal output board card provided by the embodiment of the application comprises a main controller, a bus module and a signal output module, wherein the bus module and the signal output module are respectively connected with the main controller. The bus module is used for connecting an upper computer and the main controller, the main controller is used for receiving an initial signal sent by the upper computer through the bus module and sending the initial signal to the signal output module, and the signal output module is used for outputting a plurality of paths of target analog signals in different forms according to the initial signal. That is, the signal output integrated circuit board that this application embodiment provided can export the target analog signal of multichannel different forms simultaneously to make target device normally enter test state, consequently, can effectively reduce target device's automatic test cost.
The automatic test system provided by the embodiment of the application has the same beneficial effects as the signal output board card, and the details are not repeated here.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic structural block diagram of a signal output board card according to an embodiment of the present application.
Fig. 2 is a second schematic structural block diagram of a signal output board card according to an embodiment of the present application.
Fig. 3 is a schematic circuit structure diagram of a signal output module according to an embodiment of the present disclosure.
Fig. 4 is a third schematic structural block diagram of a signal output board card according to an embodiment of the present application.
Fig. 5 is a fourth schematic structural block diagram of a signal output board card according to an embodiment of the present application.
Fig. 6 is a schematic circuit structure diagram of a first adjusting unit according to an embodiment of the present disclosure.
Fig. 7 is a schematic circuit structure diagram of a second adjusting unit according to an embodiment of the present disclosure.
Fig. 8 is a schematic diagram illustrating an arrangement manner of a plurality of signal output modules and a plurality of isolated power modules according to an embodiment of the present application.
Fig. 9 is a fifth schematic structural block diagram of a signal output board card according to an embodiment of the present application.
Fig. 10 is a schematic circuit structure diagram of a power conversion module according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. Furthermore, it should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Referring to fig. 1, an embodiment of the present application provides a signal output board 100, which includes a main controller 110, a bus module 120 and a signal output module 130, where the bus module 120 and the signal output module 130 are respectively connected to the main controller 110.
The bus module 120 is configured to connect the upper computer and the main controller 110, the main controller 110 is configured to receive an initial signal sent by the upper computer through the bus module 120 and send the initial signal to the signal output module 130, and the signal output module 130 is configured to output a plurality of target analog signals in different forms according to the initial signal, that is, the input of the signal output module 130 is the initial signal, which is a digital signal, and the output is the target analog signal.
In this embodiment, the bus module 120 may be a PXIe bus module, a PXI bus module, or a CPCI bus module, and is configured to connect the upper computer and the main controller 110, that is, to implement interaction of data and instructions between the upper computer and the main controller 110, where the upper computer may be understood as a computer device capable of directly sending out a control instruction, and the main controller 110 may be a Field Programmable Gate Array (FPGA). Based on this, it can be understood that, in the embodiment of the present application, the main controller 110 may integrate the control logic of the PXIe bus module, the control logic of the PXI bus module, and the control logic of the CPCI bus module. Of course, the bus module 120 may also include at least two of the PXIe bus module, the PXI bus module and the CPCI bus module at the same time, for example, the PXIe bus module and the PXI bus module at the same time, so that the main controller 110 needs to integrate the control logic of the PXIe bus module and the PXI bus module at the same time to implement the compatibility of the signal output board 100 with the PXIe bus module and the PXI bus module.
In addition, in the embodiment of the present application, the multiple different forms of target analog signals may include analog signals in a direct current form and analog signals in an alternating current form. The analog signal in the direct current form may be an analog voltage signal in the direct current form or an analog current signal in the direct current form, which is not particularly limited in the embodiments of the present application.
Because the signal output board card 100 provided by the embodiment of the application can simultaneously output multiple paths of target analog signals in different forms, so that the target device normally enters a test state, the automatic test cost of the target device can be effectively reduced.
Referring to fig. 2, as an optional implementation manner, in the embodiment of the present application, the signal output module 130 may include a digital-to-analog converter 131, a first signal output unit 132, and a second signal output unit 133, where the digital-to-analog converter 131 is connected to the main controller 110, the first signal output unit 132, and the second signal output unit 133 respectively.
The digital-to-analog converter 131 is configured to convert the initial signal into two intermediate analog signals after receiving the initial signal sent by the main controller 110, and send the two intermediate analog signals to the first signal output unit 132 and the second signal output unit 133, respectively, where the first signal output unit 132 is configured to convert the received intermediate analog signal into an analog signal in a direct current form, for example, an analog voltage signal in a direct current form or an analog current signal in a direct current form, and the second signal output unit 133 is configured to convert the received intermediate analog signal into an analog signal in an alternating current form, for example, an analog voltage signal in an alternating current form.
In the above embodiment, the signal output module 130 may finally output an analog signal in a dc form, and at the same time, may also output an analog signal in an ac form, during a test operation of the target device, the former may be used as an input stimulus of the target device, or used to provide an enable stimulus for the target device, and the latter may be provided to the target device for signal analysis, so that a universal test requirement in an automation test field may be met, thereby improving usability of the signal output board 100.
Referring to fig. 3, in the embodiment of the present application, the digital-to-analog converter 131 may include a DAC8563 digital-to-analog conversion chip U1.
Taking the DAC8563 as the DAC conversion chip U1 as an example, in the DAC conversion chip U1, the sixth pin, the seventh pin, and the eighth pin are respectively connected to the main controller 110, and meanwhile, the eighth pin is also connected to the ground FGND1 through the first resistor R1. The sixth pin and the seventh pin are used to receive control commands related to signal acquisition and sent by the main controller 110, that is, signals F1_ SYNC # and F1_ SCLK shown in fig. 3, and the eighth pin is used to receive an initial signal F1_ DIN sent by the main controller 110. After receiving the initial signal F1_ DIN through the eighth pin, the digital-to-analog conversion chip U1 converts the initial signal F1_ DIN into two intermediate analog signals, and sends one of the two intermediate analog signals to the first signal output unit 132 through the first pin, and sends the other of the two intermediate analog signals to the second signal output unit 133 through the second pin.
In the digital-to-analog conversion chip U1, the fourth pin is connected to the reference voltage signal FVREF1+ through the second resistor R2, the tenth pin is also connected to the reference voltage signal FVREF1+, the fifth pin is connected to the first power signal F5V1+ through the third resistor R3, the ninth pin is connected to the first power signal F5V1+, and the first capacitor C1 and the second capacitor C2 which are connected in parallel are connected to the ground FGND1, and the third pin is connected to the ground FGND 1.
The resistance of the first resistor R1 may be 100K Ω, the resistances of the second resistor R2 and the third resistor R3 may be 10K Ω, the capacitance of the first capacitor may be 0.1UF, the capacitance of the second capacitor may be 4.7UF, the reference voltage signal FVREF1+ may be in a voltage range of 2.5V to 10V, and specifically may be set according to actual requirements, and the first power signal F5V1+ is a positive voltage signal of 5V.
In addition, as described above, in the embodiment of the present application, the analog signal in the direct current form output by the first signal output unit 132 may actually be an analog voltage signal in the direct current form, and may also be an analog current signal in the direct current form, so that in actual implementation, the main controller 110 may be further combined to set the output of the analog voltage signal in the direct current form and the output of the analog current signal in the direct current form to be controllable, so as to improve the controllability of the signal output board 100. Based on this, as shown in fig. 3, in practical implementation, the first signal output unit 132 may include an output driver U2, an output mode selection terminal of the output driver U2 is connected to the main controller 110, and a signal input terminal of the output driver U2 is connected to the digital-to-analog converter 131, specifically, to the first pin of the digital-to-analog conversion chip U1 in the digital-to-analog converter 131.
Based on the above description, in the embodiment of the present application, the main controller 110 is further configured to receive a mode selection command F1_ M2 sent by the upper computer through the bus module 120, and send the mode selection command F1_ M2 to the output driver U2, where the mode selection command F1_ M2 includes a first selection command for instructing to output an analog voltage signal, and a second selection command for instructing to output an analog current signal. The dac 131 is configured to convert the initial signal F1_ DIN into two intermediate analog signals after receiving the initial signal F1_ DIN sent by the main controller 110, and send one of the two intermediate analog signals to the output driver U2. The output driver U2 is configured to convert the received intermediate analog signal into an analog voltage signal in a direct current form when the mode selection command is the first selection command, and is configured to convert the received intermediate analog signal into an analog current signal in a direct current form when the mode selection command is the second selection command.
As shown in fig. 3, in the embodiment of the present application, the output driver U2 may be an XTR300 output driver chip.
Taking the example that the output driver U2 is an XTR300 output driver chip, in the output driver U2, the first pin and the second pin will be collectively used as an output mode selection terminal, and if the input of the first pin is low and the input of the second pin is low, the received mode selection command F1_ M2 is a first selection command for instructing to output an analog voltage signal in a dc form, and if the input of the first pin is high and the input of the second pin is low, the received mode selection command F1_ M2 is a second selection command for instructing to output an analog current signal in a dc form. Based on this, as shown in fig. 3, in practical implementation, the first pin and the second pin of the output driver U2 may be connected to the main controller 110 only through the first pin to receive the mode selection command F1_ M2 sent by the main controller 110, and at the same time, the first pin is grounded FGND1 through the fourth resistor R4, and the second pin is grounded FGND1 through the fifth resistor R5, at this time, the mode selection command F1_ M2 is equivalent to considering only the level signal received by the first pin.
In addition, in the output driver U2, the third pin is connected to the digital-to-analog converter 131 through the sixth resistor R6 to receive an intermediate analog signal sent by the digital-to-analog converter 131, that is, one path of intermediate analog signals sent by a first pin of a digital-to-analog conversion chip U1, a fourth pin is connected with a reference voltage signal FVREF1+ through a seventh resistor R7, a fifth pin is grounded FGND1 through an eighth resistor R8, a sixth pin is grounded FGND1 through a ninth resistor R9, a seventh pin is grounded FGND1 through a tenth resistor R10, a ninth pin is connected with a tenth pin through an eleventh resistor R11, the eleventh pin is connected with a second electric power supply signal F5V1-, and is grounded FGND1 through a third capacitor C3, the thirteenth pin serves as an analog signal output, for outputting an analog signal DA1 in direct current form, i.e. an analog voltage signal in direct current form, or an analog current signal in direct current form. Peripheral circuitry of the thirteenth pin:
the thirteenth pin is connected to the eighth pin through a twelfth resistor R12 and a thirteenth resistor R13 which are connected in series, a fourth capacitor C4 is connected between the eighth pin and the seventh pin, in addition, the cathode of the first diode D1 and the anode of the second diode D2 are respectively connected between the twelfth resistor R12 and the thirteenth resistor R13, the anode of the first diode D1 is connected to the third power signal F15V1-, and the anode of the second diode D2 is connected to the fourth power signal F15V1+, here, the first diode D1 and the second diode D2 form a clamping diode at the output position of the analog signal DA1, and meanwhile, the thirteenth pin is also connected to the fourth pin through a fifth capacitor C5.
In the output driver U2, the fifteenth pin is connected to the fourth power signal F15V1+, and is grounded FGND1 through the sixth capacitor C6. The sixteenth pin is grounded FGND1, the seventeenth pin, the eighteenth pin and the nineteenth pin are used for outputting an error identification signal F1_ EF, the twentieth pin is connected to the first power signal F5V1+ through a fourteenth resistor R14, and the twenty-first pin is connected to the third power signal F15V 1-.
Wherein, the fourth resistor R4 may have a resistance of 100K Ω, the fifth resistor R5 may have a resistance of 5.1K Ω, the sixth resistor R6 and the seventh resistor R7 may have a resistance of 1.02K Ω, the eighth resistor R8 and the ninth resistor R9 may have a resistance of 750 Ω, the tenth resistor R10 may have a resistance of 5.1K Ω, the eleventh resistor R11 may have a resistance of 8.25K Ω, the twelfth resistor R12 may have a resistance of 15 Ω, the thirteenth resistor R13 may have a resistance of 5.1K Ω, the fourteenth resistor R14 may have a resistance of 100K Ω, the third capacitor C3 may have a capacitance of 0.1, the fourth capacitor C4 may have a capacitance of 10NF, the fifth capacitor C5 may have a capacitance of 0.047UF, the sixth capacitor C6 may have a capacitance vref of 0.1, the reference voltage signal voltage V1V + 5V + 3V, and the actual positive voltage V3V + V3V may be set according to the actual positive voltage range of the power supply requirements of 5V1, the second electrical power signal is a 5V negative voltage signal, the third power signal F15V 1-is a 15V negative voltage signal, and the fourth power signal F15V1+ is a 15V positive voltage signal.
Further, in the embodiment of the present application, the second signal output unit 133 may include an operational amplifier U3, a positive input terminal of the operational amplifier U3 is connected to the digital-to-analog converter 131, specifically to the second pin of the digital-to-analog conversion chip U1 in the digital-to-analog converter 131, and a negative input terminal of the operational amplifier U3 is connected to the reference voltage signal FVREF1 +.
Based on the above description, in the embodiment of the present application, the dac 131 is configured to convert the initial signal F1_ DIN into two intermediate analog signals after receiving the initial signal F1_ DIN sent by the main controller 110, and send one of the two intermediate analog signals to the operational amplifier U3, and the operational amplifier U3 is configured to convert the received intermediate analog signal into an analog voltage signal in an ac format.
Illustratively, in the operational amplifier U3, the third pin is used as a positive input terminal, and is connected to the second pin of the digital-to-analog conversion chip U1 in the digital-to-analog converter 131 through a fifteenth resistor R15 to receive another intermediate analog signal sent by the digital-to-analog converter 131, meanwhile, the third pin is grounded through a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18 and a nineteenth resistor R19 which are connected in series, the second pin is used as a negative input end, the reference voltage signal FVREF1+ is accessed through a twentieth resistor R20, a seventh pin is used as a positive power supply end and is accessed into a fourth power supply signal F15V1+, and is grounded FGND1 through a seventh capacitor C7, a fourth pin is used as a negative power supply end, a third power supply signal F15V 1-is accessed, and is grounded FGND1 through an eighth capacitor C8, the sixth pin serves as an analog signal output terminal, for outputting an analog voltage signal DA2 in alternating form, i.e. an analog voltage signal in alternating form. Peripheral circuitry of the sixth pin:
the sixth pin is connected to the second pin through a ninth capacitor C9 and a resistor network which are connected in parallel, wherein the resistor network comprises a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23 and a twenty-fourth resistor R24 which are connected in series, in addition, the sixth pin is respectively connected to the cathode of a third diode D3 and the anode of a fourth diode D4, the anode of the third diode D3 is connected to a third power signal F15V1-, the anode of the fourth diode D4 is connected to a fourth power signal F15V1+, and the third diode D3 and the fourth diode D4 constitute a clamping diode at the output position of the analog voltage signal DA 2.
The resistance of the fifteenth resistor R15 may be 10K Ω, the resistances of the sixteenth resistor R16, the seventeenth resistor R17, the eighteenth resistor R18, the nineteenth resistor R19, the twentieth resistor R20, the twenty-first resistor R21, the twenty-second resistor R22, the twenty-third resistor R23, and the twenty-third resistor R23 may be 10K Ω, the capacitances of the seventh capacitor C7 and the eighth capacitor C8 may be 0.1UF, and the capacitance of the ninth capacitor C9 may be 33 PF.
Hereinafter, the calculation derivation will be made for the process in which the second signal output unit 133 outputs the analog voltage signal DA2, in conjunction with the circuit configuration shown in fig. 3.
Vout: analog voltage signal DA2
DACVout: the intermediate analog signal output by the second pin of the digital-to-analog conversion chip U1
Vref: reference voltage signal FVREF1+
According to the principle diagram of the operational amplifier U3 for the chop, it can be derived that:
Vout＝4*DACVout-Vref
suppose, VrefAt 2.5V, the above equation can be simplified as:
Vout＝4*DACVout-10
DACVoutthe calculation formula of (2) is as follows:
DACVout＝(Din/2n)*Vref*Gain
wherein, VrefAt 2.5V, Gain is set to a constant value of 2, DinIs a digital code output from the main controller 110, and thus, a DACVoutCan be simplified as follows:
DACVout＝(Din/2n)*5
finally, VoutThe calculation formula of (2) is as follows:
Vout＝20*(Din/2n)-10
referring to fig. 4, in the embodiment of the present application, the signal output module 130 may be provided with a plurality of modules, for example, 8 modules and 16 modules. Based on this, in the embodiment of the present application, the signal output board 100 may also include a plurality of isolated power modules 140, and the isolated power modules 140 are connected to the signal output modules 130 in a one-to-one correspondence manner.
The isolated power module 140 is used to provide operating power for the corresponding signal output module 130.
For each isolated power module 140 in the plurality of isolated power modules 140, the isolated power module 140 is only used to provide working power for the corresponding signal output module 130, so that mutual interference caused by power sharing can be avoided, and then, the signal output module 130 outputs the target analog signal according to the initial signal, so that the independence of signal transmission can be ensured, and the accuracy of the target analog signal can be ensured.
Referring to fig. 5, in the embodiment of the present application, the isolation power module 140 may include a first adjusting unit 141 and a second adjusting unit 142, where the first adjusting unit 141 and the second adjusting unit 142 are respectively connected to the corresponding signal output modules 130, and the second adjusting unit 142 is further connected to the first adjusting unit 141.
The first adjusting unit 141 is configured to connect to a backplane of the bus module 120 to adjust an initial power signal provided by the backplane to obtain a first target power signal, where the first target power signal is used to access the second adjusting unit 142 and is used to provide a part of working power for the corresponding signal output module 130, and the second adjusting unit 142 is used to adjust the first target power signal to obtain a second target power signal, where the second target power signal is used to provide another part of working power for the corresponding signal output module 130.
Referring to fig. 6, in the embodiment of the present application, the first adjusting unit 141 may include a WRA _ S-3WR voltage adjusting chip, which is defined as a first voltage adjusting chip U4.
In the first voltage regulating chip U4, the second pin is connected to the backplane of the bus module 120 to receive an initial power signal VCC provided by the backplane, and is grounded through the tenth capacitor C10, the first pin is grounded, the sixth pin is used as a positive voltage signal output terminal for outputting one path of the first target power signal, specifically, the fourth power signal F15V1+, and is grounded FGND1 through the eleventh capacitor C11 and the twelfth capacitor C12 connected in parallel, the eighth pin is used as a negative voltage signal output terminal for outputting another path of the first target power signal, specifically, the third power signal F15V1-, and is grounded FGND1 through the thirteenth capacitor C13 and the fourteenth capacitor C14 connected in parallel, and the seventh pin is grounded FGND 1.
The capacitance values of the tenth capacitor C10, the eleventh capacitor C11 and the thirteenth capacitor C13 are 0.1UF, the capacitance values of the twelfth capacitor C12 and the fourteenth capacitor are 10UF, the initial power supply signal VCC is a 5V voltage signal, the third power supply signal F15V 1-is a 15V negative voltage signal, and the fourth power supply signal F15V1+ is a 15V positive voltage signal.
In addition, in the case where the signal output module 130 has the circuit configuration shown in fig. 3, the third power signal F15V 1-is used to provide part of the operating power for the first signal output unit 132 and the second signal output unit 133 included in the signal output module 130, and the fourth power signal F15V1+ is also used to provide part of the operating power for the first signal output unit 132 and the second signal output unit 133 included in the signal output module 130.
Further, referring to fig. 7, in the embodiment of the present application, the second regulating unit 142 may include a CW78M05 voltage regulating chip, which is defined as a second voltage regulating chip U5.
In the second voltage regulating chip U5, a first pin is connected to the first regulating unit 141 to receive a first target power signal, for example, when the first regulating unit 141 has the circuit structure shown in fig. 6, the first pin is connected to a sixth pin of the first voltage regulating chip U4 to receive the fourth power signal F15V1+, and meanwhile, FGND1 is grounded through a fifteenth capacitor C15 and a sixteenth capacitor C16 connected in parallel. In addition, in the second voltage regulating chip U5, the second pin is grounded FGND1, the third pin serves as a positive voltage signal output terminal for outputting the second target power signal, i.e., the first power signal F5V1+, and the third pin is grounded FGND1 through a seventeenth capacitor C17 and a polar capacitor C18 connected in parallel, the positive electrode of the polar capacitor C18 is connected to the third pin, and the negative electrode is grounded FGND 1.
The capacitance of the fifteenth capacitor C15 is 22UF, the capacitance of the sixteenth capacitor C16 is 0.1UF, the capacitance of the seventeenth capacitor is 0.1UF, the capacitance of the polarity capacitor C18 is 10UF, and the first power signal F5V1+ is a positive voltage signal of 5V.
In the case where the signal output module 130 has the circuit configuration shown in fig. 3, the first power signal F5V1+ is 5V for supplying part of the operating power to the first signal output unit 132 and the second signal output unit 133 included in the signal output module 130.
Further, in the embodiment of the present application, the signal output board 100 may include a circuit substrate 150.
Referring to fig. 8, the signal output modules 130 are disposed on the circuit substrate 150 in an array manner, and the isolation power modules 140 are disposed at positions corresponding to the signal output modules 130.
In the above embodiment, the signal output modules 130 and the isolation power supply modules 140 are reasonably arranged on the circuit substrate 150, so that the compactness of the signal output board 100 can be enhanced, the size of the signal output board 100 can be reduced, and finally, the size of the signal output board 100 can be 160mm by 100 mm.
Referring to fig. 9, in the embodiment of the present application, the signal output board 100 further includes a power conversion module 160, the power conversion module 160 is connected to the main controller 110, and the power conversion module 160 is used for connecting to a backplane of the bus module 120 to adjust an initial power signal provided by the backplane to obtain a third target power signal, where the third target power signal is used to provide part of working power for the main controller 110.
For example, the power conversion module 160 may include a third voltage regulation chip U6, and the third voltage regulation chip U6 may be an LTM4644 voltage regulation chip, as shown in fig. 10. The third voltage regulating chip U6 is used to regulate the initial power signal provided by the backplane, and obtain one path of the third target power signal +1V0 and another path of the third target power signal +1V8, which are used to provide partial working power for the main controller 110.
The third target power signal +1V0 is a voltage signal of 1V, and the third target power signal +1V8 is a voltage signal of 1.8V. In addition, in fig. 10, the capacitance values of the nineteenth capacitor C19, the twentieth capacitor C20, the twenty-first capacitor C21, and the twenty-second capacitor C22 may be 10UF, the capacitance values of the twenty-third capacitor C23 and the twenty-fourth capacitor C24 may be 0.1UF, the capacitance values of the twenty-fifth capacitor C25 and the twenty-sixth capacitor C26 may be 10PF, the resistance value of the twenty-fifth resistor R25 may be 54 Ω, the resistance values of the twenty-sixth resistor R26 and the twenty-eighth resistor R28 may be 30.1K Ω, and the resistance values of the twenty-seventh resistor R27 and the twenty-ninth resistor R29 may be 100K Ω.
The embodiment of the application further provides an automatic test system, which comprises an upper computer and the signal output board card 100, wherein the bus module 120 in the signal output board card 100 is connected with the upper computer.
The host computer is used for generating an initial signal and sending the initial signal to the main controller 110 through the bus module 120.
The signal output board card 100 provided in the embodiment of the present application includes a main controller 110, a bus module 120, and a signal output module 130, where the bus module 120 and the signal output module 130 are respectively connected to the main controller 110. The bus module 120 is used for connecting the upper computer and the main controller 110, the main controller 110 is used for receiving an initial signal sent by the upper computer through the bus module 120 and sending the initial signal to the signal output module 130, and the signal output module 130 is used for outputting a plurality of paths of target analog signals in different forms according to the initial signal. That is, the signal output board 100 provided in the embodiment of the present application can output multiple paths of target analog signals in different forms at the same time, so that the target device normally enters a test state, and therefore, the automated test cost of the target device can be effectively reduced.
The automatic test system provided by the embodiment of the application has the same beneficial effects as the signal output board 100, and the details are not repeated herein.
In the description of the present application, it should be noted that, unless otherwise explicitly specified or limited, the terms "connected" and "disposed" should be interpreted broadly, for example, they may be mechanically fixed, detachably connected or integrally connected, they may be electrically connected, and they may be communicatively connected, where the communications connection may be a wired communications connection or a wireless communications connection, and furthermore, they may be directly connected, indirectly connected through an intermediate medium, or be communicated between two elements. Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
The above description is only a few examples of the present application and is not intended to limit the present application, and those skilled in the art will appreciate that various modifications and variations can be made in the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A signal output board card is characterized by comprising a main controller, a bus module and a signal output module, wherein the bus module and the signal output module are respectively connected with the main controller;
the bus module is used for connecting the upper computer and the main controller;
the main controller is used for receiving an initial signal sent by the upper computer through the bus module and sending the initial signal to the signal output module;
and the signal output module is used for outputting a plurality of paths of target analog signals in different forms according to the initial signal.
2. The signal output board card of claim 1, wherein the signal output module comprises a digital-to-analog converter, a first signal output unit and a second signal output unit, and the digital-to-analog converter is respectively connected to the main controller, the first signal output unit and the second signal output unit;
the digital-to-analog converter is used for converting the initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending the two paths of intermediate analog signals to the first signal output unit and the second signal output unit respectively;
the first signal output unit is used for converting the received intermediate analog signal into an analog signal in a direct current form;
the second signal output unit is used for converting the received intermediate analog signal into an analog signal in an alternating current form.
3. The signal output board card of claim 2, wherein the first signal output unit comprises an output driver, an output mode selection terminal of the output driver is connected to the main controller, and a signal input terminal of the output driver is connected to the digital-to-analog converter;
the main controller is further used for receiving a mode selection instruction sent by the upper computer through the bus module and sending the mode selection instruction to the output driver, and the mode selection instruction comprises a first selection instruction used for indicating to output an analog voltage signal and a second selection instruction used for indicating to output an analog current signal;
the digital-to-analog converter is used for converting the initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending one path of intermediate analog signal in the two paths of intermediate analog signals to the output driver;
the output driver is used for converting the received intermediate analog signal into an analog voltage signal in a direct current form when the mode selection instruction is a first selection instruction, and converting the received intermediate analog signal into an analog current signal in a direct current form when the mode selection instruction is a second selection instruction.
4. The signal output board card of claim 2, wherein the second signal output unit comprises an operational amplifier, a forward input end of the operational amplifier is connected to the digital-to-analog converter, and a reverse input end of the operational amplifier is connected to a reference voltage signal;
the digital-to-analog converter is used for converting an initial signal into two paths of intermediate analog signals after receiving the initial signal sent by the main controller, and sending one path of intermediate analog signal in the two paths of intermediate analog signals to the operational amplifier;
the operational amplifier is used for converting the received intermediate analog signal into an analog voltage signal in an alternating current form.
5. The signal output board card of claim 1, wherein a plurality of signal output modules are provided, the signal output board card further comprises a plurality of isolation power supply modules, and the isolation power supply modules are connected with the signal output modules in a one-to-one correspondence manner;
and the isolation power supply module is used for providing working electric energy for the corresponding signal output module.
6. The signal output board card of claim 5, wherein the isolation power supply module comprises a first adjusting unit and a second adjusting unit, the first adjusting unit and the second adjusting unit are respectively connected with the corresponding signal output modules, and the second adjusting unit is further connected with the first adjusting unit;
the first adjusting unit is used for connecting a back plate of the bus module to adjust an initial power supply signal provided by the back plate to obtain a first target power supply signal, and the first target power supply signal is used for accessing the second adjusting unit and providing part of working electric energy for a corresponding signal output module;
the second adjusting unit is used for adjusting the first target power supply signal to obtain a second target power supply signal, and the second target power supply signal is used for providing another part of working electric energy for the corresponding signal output module.
7. The signal output board of claim 5, wherein the signal output board comprises a circuit substrate;
the plurality of signal output modules are arranged on the circuit substrate in an array mode, and the plurality of isolation power supply modules correspond to the plurality of signal output modules in one-to-one correspondence.
8. The signal output board card of claim 1, further comprising a power conversion module, the power conversion module being connected to the main controller;
the power supply conversion module is used for being connected with a back plate of the bus module so as to adjust an initial power supply signal provided by the back plate and obtain a third target power supply signal, and the third target power supply signal is used for providing partial working electric energy for the main controller.
9. The signal output board card of claim 1, wherein the bus modules include a PXIe bus module and a PXI bus module, and the main controller has control logic of the PXIe bus module and the PXI bus module integrated therein.
10. An automatic test system is characterized by comprising an upper computer and a signal output board card as claimed in any one of claims 1 to 9, wherein a bus module in the signal output board card is connected with the upper computer;
the upper computer is used for generating an initial signal and sending the initial signal to the main controller through the bus module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202111517564.9A CN114280985A (en) | 2021-12-13 | 2021-12-13 | Signal output board card and automatic test system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111517564.9A CN114280985A (en) | 2021-12-13 | 2021-12-13 | Signal output board card and automatic test system |
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| CN1967269A (en) * | 2006-05-23 | 2007-05-23 | 华为技术有限公司 | A method for examining impedance |
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Inventor after: Liu Ying Inventor after: Wei Longhua Inventor after: Han Bingbing Inventor after: Bian Yuan Inventor after: Zhang Laiyuan Inventor after: Zhao Yunqing Inventor after: Ye Bo Inventor after: Bai Kefan Inventor after: Lu Lin Inventor after: Cai Wenyi Inventor before: Liu Ying Inventor before: Han Bingbing Inventor before: Bian Yuan Inventor before: Zhang Laiyuan Inventor before: Zhao Yunqing Inventor before: Ye Bo Inventor before: Bai Kefan Inventor before: Lu Lin Inventor before: Wei Longhua |