CN114273992A - Surface polishing method for patterned metal layer - Google Patents
Surface polishing method for patterned metal layer Download PDFInfo
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- CN114273992A CN114273992A CN202210008223.7A CN202210008223A CN114273992A CN 114273992 A CN114273992 A CN 114273992A CN 202210008223 A CN202210008223 A CN 202210008223A CN 114273992 A CN114273992 A CN 114273992A
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Abstract
The invention discloses a surface polishing method of a patterned metal layer, belonging to the technical field of microwave components and parts, comprising the following steps: firstly, spin-coating photosensitive polyimide on the surface of a patterned metal layer on a silicon chip, and filling and covering the whole Au patterned metal layer; heating and curing the polyimide layer; coating a photoresist layer on the upper surface of the polyimide layer; etching and polishing the photoresist layer, and etching the photoresist layer completely to obtain a polyimide layer with a smooth surface; continuously etching the polyimide layer to enable the patterned metal layer pattern with higher thickness to leak out; polishing the metal layer pattern with the convex surface until the metal layer pattern is flush with the upper surface of the polyimide; removing the polyimide filled in the gaps of the metal layer patterns; the invention can obviously improve the flatness and the roughness of the Au microwave circuit pattern before the bonding of the silicon-based MEMS circulator/isolator, increase the strength of the bonding process, improve the structural strength of the device and improve the yield of each wafer.
Description
Technical Field
The invention relates to the technical field of microwave components, in particular to a method for polishing the surface of a patterned metal layer.
Background
In general, a silicon-based microstrip circulator based on the MEMS technology is mainly manufactured by combining an upper silicon substrate and a lower silicon substrate. The common silicon-based MEMS circulator at present realizes the processing of a device by an upper silicon substrate and a lower silicon substrate through gold bonding, and the main process steps comprise: coating, metal etching, electroplating, deep silicon etching, bonding, and nesting and assembling the gyromagnetic ferrite. The main structure is shown in fig. 1, and comprises: the structure comprises a lower silicon wafer 1, an upper silicon wafer 2, a central junction pattern (a bonding surface, namely a patterned metal layer 3) between the upper silicon wafer 2 and the lower silicon wafer 1, a ferrite groove (a gyromagnetic ferrite substrate 4 is embedded in the groove) formed by deep etching of the lower silicon wafer 1, an iron bottom plate 5 (used for ensuring uniform magnetic lines of force) below the lower silicon wafer 1, and a permanent magnet 6 (used as a magnetic source) on the upper silicon wafer 2.
In the structure, the upper silicon chip and the lower silicon chip complete the processing of the central junction pattern and the manufacturing of the ferrite groove by a hot-pressing bonding process method, the ferrite groove for mounting the gyromagnetic ferrite substrate is realized by silicon chip through hole etching and silicon chip metal bonding, and because the method needs to use wafer-level metal hot-pressing bonding, the method has high requirements on the flatness and the surface roughness of a metal layer. Generally, the better the flatness of the wafer-level metal layer is, the smaller the surface roughness is, the better the wafer-level bonding effect is, the higher the bonding strength is, and the better the performance of the device is, the more consistent the simulation design result is. Specifically, in order to meet the requirements of microwave electrical property and reliability of the device, the bonded Au layer has high requirements, and the flatness is preferably about 3%, and the surface roughness is less than 20 nm.
The problems of the metal layer of the existing microwave circuit mainly comprise:
1. the common electroplating process with glue uses groove type electroplating, the flatness of a metal pattern is difficult to control within the range of 6 inches of a wafer, and the flatness is generally about 20 percent;
2. the bonding process requires that a metal bonding interface has very good roughness and flatness, and ensures enough bonding surface bonding force to meet the structural strength requirement of a device, thereby providing higher requirements for process equipment and additionally adding process steps;
3. at present, the electroplated Au layer with glue is thicker, the thickness of the electroplated Au layer is generally more than 4 μm, the ductility of metal Au is very high, and the polishing treatment difficulty is very high;
4. for the metal circuit plated with glue, the polishing process is very easy to damage the metal circuit due to the fact that the metal pattern is formed and the step thickness is very high (4 mu m), and an irreversible result is caused;
5. in the prior art, the roughness of the metal layer is tested by a step instrument and SEM (scanning Electron microscope), and is generally 500nm at 300-;
that is to say, the thickness of the Au layer plated with glue is about 4 μm or more, the surface flatness of the Au layer plated with glue exceeds 20% under the condition of using the groove plating, and far exceeds the flatness requirement of thermocompression bonding under the general condition, which puts a high requirement on the bonding process and poses a significant challenge on the reliability of the device. Therefore, the problems of poor flatness of the current electroplating with glue, difficult polishing of the patterned Au metal layer and the like need to be solved urgently.
Disclosure of Invention
The present invention is directed to a method for polishing a surface of a patterned metal layer to solve the above-mentioned problems.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows: a method of polishing a surface of a patterned metal layer, the method comprising the steps of:
(1) firstly, spin-coating photosensitive polyimide on the surface of a patterned metal layer on a silicon chip, and filling and covering the whole Au patterned metal layer;
(2) heating and curing the polyimide layer;
(3) coating a photoresist layer on the upper surface of the polyimide layer;
(4) etching and polishing the photoresist layer, and etching the photoresist layer completely to obtain a polyimide layer with a smooth surface;
(5) continuously etching the polyimide layer to enable the patterned metal layer pattern with higher thickness to leak out;
(6) polishing the metal layer pattern with the convex surface until the metal layer pattern is flush with the upper surface of the polyimide;
(7) and removing the polyimide filled in the gaps of the metal layer pattern, cleaning and drying to obtain the metal layer pattern.
As a preferred technical scheme: in the step (1), the thickness of the polyimide coating is 0.5-1.0 μm higher than the uppermost layer of the patterned metal layer.
There are two reasons to control at this thickness: one is because the thickness of the polyimide coating is reduced by several hundred nanometers when the polyimide coating is cured, and the other is because the flatness of the metal layer pattern is up to 20%, and it is ensured that all the metal layers are completely covered after the polyimide coating is spin-coated and cured.
As a preferred technical scheme: in the step (2), a step heating method is adopted during heating and curing.
As a further preferable technical scheme: the step heating procedure is as follows: 80 ℃,1h-120 ℃,1h-180 ℃,1h-235 ℃ and 3 h-natural cooling.
The temperature rise program is adopted to ensure that the polyimide closer to the substrate can well volatilize the solvent and complete the imidization process, and prevent the polyimide film from cracking, falling off and the like.
As a preferred technical scheme: in the step (4), a Reactive Ion Etching (RIE) method is adopted, and the etching gas is O2And SF6。
The common photoresist is easy to react with oxygen free radicals to form volatile substances which are pumped away by a vacuum pump, so that the invention adopts O2As the main etching gas, SF6Then to assist the etch gas, both gases may be used to etch the photoresist and polyimide, but O2The efficiency of the etching process is much higher, and the mixing of the two gases can adjust the etching rate, the roughness of the etching thickness and the like. Here, O is preferred2Over 90%, with a typical preferred value of O2：96sccm、SF6: 4 sccm. For RIE etching, both gases are commonly used etching gases, whether photoresist or polyImide, all of which are readily reacted with O2The reaction is carried out so that O is selected2Mainly etching.
As a preferred technical scheme: after etching, the selection ratio of etching polyimide to etching photoresist is ensured to be 1: 1.
The selection ratio is that the etching speed of the photoresist and the etching speed of the polyimide layer are 1:1, so that the advantages that when the etching ratio is 1:1, the etching speeds of the photoresist and the polyimide layer are the same, the smooth surface of the photoresist can be transmitted to the surface of the polyimide layer in a fidelity mode, the polyimide filling layer is high in thickness consistency when Au is leaked out of the metal layer in an etching mode, and the structure is stable when the Au layer is processed later.
As a preferred technical scheme: in the step (6), a Chemical Mechanical Polishing (CMP) device or a metallographic polishing device is adopted during polishing.
As a preferred technical scheme: in the step (7), polyimide is removed by using a polyimide corrosive solution.
The polyimide corrosive liquid can be generally removed by adopting hot alkali or hot acid or sulfuric acid/hydrogen peroxide, and a proper solution is selected under the condition of ensuring that the metal layer and the substrate are not damaged
The RIE etching and polishing method can be replaced by a polyimide CMP process, namely the RIE etching of the polyimide in the fifth step can be replaced by a CMP process, but the RIE etching method is still needed for leaking the metal layer.
The method for filling the photosensitive polyimide photoresist and curing (imidizing) the photosensitive polyimide photoresist is adopted, and the excellent mechanical and chemical properties of the polyimide are used as the supporting layer of the Au pattern, so that the Au pattern is prevented from being damaged by a polishing process;
filling the uneven polyimide surface by using a method of spin-coating photoresist on the polyimide surface, and then polishing the polyimide surface by using a RIE dry etching method; the flatness and the roughness of the surface of the polyimide are improved by using a method of spin-coating photoresist for multiple times and RIE etching;
leaking the Au metal pattern with the later thickness, polishing the Au metal pattern layer by an RIE etching or CMP method, and ensuring the stability of the Au metal pattern on the premise of improving the flatness and the roughness by a multi-time polishing process;
and finally removing the polyimide filling material by wet etching.
Compared with the prior art, the invention has the advantages that: the invention can obviously improve the flatness and the roughness of the Au microwave circuit pattern before the bonding of the silicon-based MEMS circulator/isolator, increase the bonding process strength, improve the structural strength of the device, improve the yield of each wafer from less than 50 percent to more than 80 percent, and provide a new method and a new thought for the process realization of the silicon-based micro-strip circulator isolator.
Drawings
FIG. 1 is a block diagram of a prior art silicon-based MEMS circulator of the present invention;
FIG. 2 is a process flow diagram of example 1 of the present invention.
In the figure: 1. a lower silicon wafer; 2. a silicon wafer is arranged; 3. patterning the metal layer; 4. a gyromagnetic ferrite substrate; 5. an iron bottom plate; 6. a permanent magnet; 7. a polyimide layer; 8. and a photoresist layer.
Detailed Description
The invention will be further explained with reference to the drawings.
Example 1:
referring to fig. 2, a method for polishing a surface of a patterned metal layer includes the steps of:
(a) the initial Au patterned metal layer structure to be surface-polished is shown in FIG. 2 (a), and through measurement, the flatness of the Au patterned metal layer is 20% (about maximum 800 nm), the surface roughness is 300-500nm, and the measurement data provides parameter guidance for the subsequent process;
(b) spin-coating a photosensitive polyimide layer 7 on the surface of the Au patterned metal layer 3, adopting a parameter of selecting acceleration of 500 rad/min2 and rotation speed of 7000 rad/min to spin-coat filling layer polyimide, enabling the thickness of the polyimide layer 7 in a coil gap to be 0.5-1 μm higher than the uppermost layer of the Au patterned metal layer 3, then performing step heating imidization treatment on the polyimide, wherein the specific heating program is as follows: 80 ℃,1h-120 ℃,1h-180 ℃,1h-235 ℃,3 h-natural cooling, as shown in figure 2 (b);
(c) coating a photoresist layer 8 (adopting AZ6124 photoresist) on the upper surface of the polyimide layer 7, and then baking and curing at 111 ℃ for 90 s; if the flatness of the upper surface of the photoresist is too poor to reach within 5%, the photoresist is coated for multiple times in a spinning mode, so that the flatness of the surface of the photoresist is guaranteed to be within 5%, and better within 3%, as shown in fig. 2 (c);
(d) using RIE etcher, selecting etching gas as O2And SF6In which O is2Is the main etching gas; specifically, the method comprises the following steps: using Corial 210IL RIE etcher, adjusting power to 300W or less, fixing total flow rate to 100sccm, and adjusting SF6The flow rate is 2, 4, 6, 8 and 10 sccm, and researches show that when a small amount of fluorine is added in the oxygen plasma atmosphere, fluorine atoms not only have the effects of activating the surface of polyimide and destroying the molecular structure of the polyimide, but also can promote the generation of oxygen active particles, so that the etching rate is increased; however, as the fluorine content increases, the difference in etching rates between polyimide and photoresist becomes larger, so that only a small amount of SF is required6To ensure the selectivity of the two materials to be etched is 1:1, SF is selected for this embodiment6Flow rate of 4sccm, O296 sccm; as shown in fig. 2 (d);
(e) etching the surface of the wafer by RIE, completely etching the photoresist, ensuring that polyimide forms a flat surface, enabling the polyimide layer 7 to be 0.3 mu m higher than the uppermost layer of the Au patterned metal layer 3, and then testing the surface flatness and roughness, wherein as a result, the surface flatness of the polyimide layer 7 is less than 8 percent, the roughness is less than 150nm, the surface etching effect is good, and the polyimide polishing is finished, as shown in FIG. 2 (e); if the flatness and the roughness are unqualified, repeating the steps b, c and d to finally form a flat polyimide surface, wherein the roughness is less than 150nm, and the flatness is less than 5%;
(f) etching the polyimide film by using the RIE etching method, wherein SF is increased to improve etching surface roughness (< 80 nm)6The flow rate is 50sccm, the etching rate is about 0.7 μm/min, and only etching is required to be no more than 1 μm thick until the Au metal pattern with higher thickness is exposed, as shown in FIG. 2 (f);
(g) polishing the protruding Au on the surface of the wafer by using metallographic polishing equipment to a position flush with the upper surface of the polyimide, as shown in FIG. 2 (g);
the steps f and g are adopted for multiple times, the surface of the whole Au patterning metal layer is polished until the surface is polished, the flatness of the Au patterning metal layer is ensured to be less than 5% (the smaller the better), and the roughness of the Au patterning metal layer is about 100nm (the smaller the better);
(h) putting the wafer into polyimide corrosive liquid, and corroding all polyimide filled in the Au patterned metal gaps, as shown in FIG. 2 (h);
then putting the mixture into cleaning equipment for cleaning, and finally putting the mixture into a wafer spin dryer for spin-drying to obtain the product;
through measurement, the flatness of the surface of the metal layer of the obtained wafer is 4.5%, and the roughness is about 100 nm.
Example 2:
in this example, compared with example 1, the etching and polishing in step f is performed by a polyimide Chemical Mechanical Polishing (CMP) method, and the Au protruding from the surface of the wafer is polished by the CMP method in step g, and the rest is the same as example 1, so that the surface of the metal layer of the wafer has a flatness of 4.6% and a roughness of about 100 nm.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (8)
1. A method of polishing a surface of a patterned metal layer, the method comprising the steps of:
(1) firstly, spin-coating photosensitive polyimide on the surface of a patterned metal layer on a silicon chip, and filling and covering the whole Au patterned metal layer;
(2) heating and curing the polyimide layer;
(3) coating a photoresist layer on the upper surface of the polyimide layer;
(4) etching and polishing the photoresist layer, and etching the photoresist layer completely to obtain a polyimide layer with a smooth surface;
(5) continuously etching the polyimide layer to enable the patterned metal layer pattern with higher thickness to leak out;
(6) polishing the metal layer pattern with the convex surface until the metal layer pattern is flush with the upper surface of the polyimide;
(7) and removing the polyimide filled in the gaps of the metal layer pattern, cleaning and drying to obtain the metal layer pattern.
2. The method of claim 1, wherein: in the step (1), the thickness of the polyimide coating is 0.5-1.0 μm higher than the uppermost layer of the patterned metal layer.
3. The method of claim 1, wherein: in the step (2), a step heating method is adopted during heating and curing.
4. The method of claim 3, wherein: the step heating procedure is as follows: 80 ℃,1h-120 ℃,1h-180 ℃,1h-235 ℃ and 3 h-natural cooling.
5. The method of claim 1, wherein: in the step (4), a reactive ion etching method is adopted, and etching gases are O2 and SF 6.
6. The method of claim 5, wherein: after etching, the selection ratio of etching polyimide to etching photoresist is ensured to be 1: 1.
7. The method of claim 1, wherein: and (6) adopting chemical mechanical polishing equipment or metallographic polishing equipment during polishing.
8. The method of claim 1, wherein: in the step (7), polyimide is removed by using a polyimide corrosive solution.
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Cited By (2)
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| CN117690943A (en) * | 2024-01-31 | 2024-03-12 | 合肥晶合集成电路股份有限公司 | Manufacturing method of image sensor |
| CN117690943B (en) * | 2024-01-31 | 2024-06-04 | 合肥晶合集成电路股份有限公司 | Manufacturing method of image sensor |
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