CN114270330A - 数据传输电路及方法、核、芯片、电子设备及存储介质 - Google Patents

数据传输电路及方法、核、芯片、电子设备及存储介质 Download PDF

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Publication number
CN114270330A
CN114270330A CN201980098177.0A CN201980098177A CN114270330A CN 114270330 A CN114270330 A CN 114270330A CN 201980098177 A CN201980098177 A CN 201980098177A CN 114270330 A CN114270330 A CN 114270330A
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China
Prior art keywords
unit
data packet
original
subunit
data
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Pending
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CN201980098177.0A
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English (en)
Inventor
罗飞
王维伟
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Beijing Simm Computing Technology Co ltd
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Beijing Simm Computing Technology Co ltd
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Publication of CN114270330A publication Critical patent/CN114270330A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/74Address processing for routing
    • H04L45/745Address table lookup; Address filtering
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306Intercommunication techniques
    • G06F15/17318Parallel communications techniques, e.g. gather, scatter, reduce, roadcast, multicast, all to all
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3063Pipelined operation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22Parsing or analysis of headers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2212/00Encapsulation of packets

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

一种数据传输电路及方法、核、多核结构芯片、电子设备及存储介质。数据传输电路,包括接收单元、控制单元、查找表单元和选择单元;接收单元,用于接收来自Fabric的原数据包;控制单元,用于根据原控制位确定原数据包是否需要接力中转,响应于所述原数据包需要接力中转,所述控制单元用于控制所述选择单元的第一输入端有效,所述选择单元用于将新数据包经由所述第一输入端发送至所述Fabric;其中,所述新数据包包括:所述原数据,以及所述查找表单元根据原索引获取的新包头。该数据传输电路能够有效降低多核之间数据传输的功耗。

Description

PCT国内申请,说明书已公开。

Claims (16)

  1. PCT国内申请,权利要求书已公开。
CN201980098177.0A 2019-08-24 2019-08-24 数据传输电路及方法、核、芯片、电子设备及存储介质 Pending CN114270330A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/102374 WO2021035454A1 (zh) 2019-08-24 2019-08-24 数据传输电路及方法、核、芯片、电子设备及存储介质

Publications (1)

Publication Number Publication Date
CN114270330A true CN114270330A (zh) 2022-04-01

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CN201980098177.0A Pending CN114270330A (zh) 2019-08-24 2019-08-24 数据传输电路及方法、核、芯片、电子设备及存储介质

Country Status (4)

Country Link
US (1) US20220150168A1 (zh)
EP (1) EP3989077A4 (zh)
CN (1) CN114270330A (zh)
WO (1) WO2021035454A1 (zh)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10216692B2 (en) * 2009-06-17 2019-02-26 Massively Parallel Technologies, Inc. Multi-core parallel processing system
CN101957808B (zh) * 2010-06-04 2013-02-13 杭州海康威视数字技术股份有限公司 多cpu间的通信方法、系统及cpu
CN101996087B (zh) * 2010-12-02 2013-12-04 北京星河亮点技术股份有限公司 多核处理器阵列程序的动态加载方法
CN102096654B (zh) * 2011-01-28 2013-09-18 深圳市普联技术有限公司 一种cpu之间的数据通信方法、系统及处理器
US9054998B2 (en) * 2013-02-06 2015-06-09 Freescale Semiconductor, Inc. System and method for maintaining packet order in an ordered data stream
US9553853B2 (en) * 2014-12-23 2017-01-24 Intel Corporation Techniques for load balancing in a packet distribution system
CN106254254B (zh) * 2016-09-19 2020-05-26 复旦大学 一种基于Mesh拓扑结构的片上网络通信方法

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Publication number Publication date
WO2021035454A1 (zh) 2021-03-04
EP3989077A1 (en) 2022-04-27
EP3989077A4 (en) 2022-06-29
US20220150168A1 (en) 2022-05-12

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