CN114268596A - Method for stack system damage protection based on exchange chip and application - Google Patents

Method for stack system damage protection based on exchange chip and application Download PDF

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Publication number
CN114268596A
CN114268596A CN202111592116.5A CN202111592116A CN114268596A CN 114268596 A CN114268596 A CN 114268596A CN 202111592116 A CN202111592116 A CN 202111592116A CN 114268596 A CN114268596 A CN 114268596A
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chip
message
stack
source chip
source
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胥平春
孟忠伟
徐昌发
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Suzhou Centec Communications Co Ltd
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Suzhou Centec Communications Co Ltd
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Priority to CN202111592116.5A priority Critical patent/CN114268596A/en
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Abstract

The invention discloses a method for protecting a stacking system based on an exchange chip from damage and an application thereof, wherein the method comprises the following steps: the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and the exchange chip inquires the flag bit value corresponding to the source chip so as to control whether to discard the message or not. The method can be based on the whole stacking system; or discarding the message based on the stacked port of the switch chip and the source chip; or whether to discard the corresponding message is controlled based on the stacking port, the source chip and the destination port of the switching chip, so that a loop is prevented from being formed in the stacking system. The three damage protection mechanisms can control the multicast or unicast forwarding to be effective independently, and can also effectively improve the processing capacity of protocol messages such as stack topology discovery, keep-alive, forwarding table synchronization and the like.

Description

Method for stack system damage protection based on exchange chip and application
Technical Field
The present invention relates to the field of communications, and in particular, to a method and an application for protecting a stacked system based on a switch chip.
Background
With the development of network technology, higher requirements are put on the port density and the switching capacity of network switching equipment. Because the switching capacity and the port density of a single device have certain limitations, in order to increase the bandwidth and expand the port density, the switching device is required to support the stacking function, and a plurality of switching devices are combined into a stacking device.
The devices are interconnected through the stacking port, when the cross-device forwarding is carried out, the access device encapsulates necessary forwarding, editing and other information generated in the processing process into the stacking head, and then the stacking head is inserted into the foremost end of the original message. As the original message stack is carried to the next device. The next device will perform corresponding processing on the message according to the information in the stack header.
For the loopback problem existing in the stacking topology, in the prior art, the message is discarded to realize destruction based on that a source chip carried in a stacking head is equal to a local chip. The method can only deal with simple ring topology, cannot deal with complex scenes, and cannot distinguish multicast and unicast scenes.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a method for protecting a stacking system based on a switching chip from damage and an application thereof, which solve the problem that a message sent from a source device in the stacking system is sent to the device again to cause a loop.
To achieve the above object, an embodiment of the present invention provides a method for protecting a stacked system based on a switch chip.
In one or more embodiments of the invention, the method comprises: the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and the exchange chip inquires the flag bit value corresponding to the source chip so as to control whether to discard the message or not.
In one or more embodiments of the present invention, the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip in a global control table.
To achieve the above object, an embodiment of the present invention provides a method for protecting a stacked system based on a switch chip.
In one or more embodiments of the invention, the method comprises: the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and the stack port of the exchange chip receiving the message inquires the flag bit value corresponding to the source chip, thereby controlling whether to discard the message.
In one or more embodiments of the present invention, the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip in a stack port control table receiving the message.
To achieve the above object, an embodiment of the present invention provides a method for protecting a stacked system based on a switch chip.
In one or more embodiments of the invention, the method comprises: the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and the stack port of the exchange chip receiving the message inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port, thereby controlling whether to discard the message.
In one or more embodiments of the present invention, the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port in a stack port control table receiving the message.
To achieve the above object, an embodiment of the present invention provides a method for protecting a stacked system based on a switch chip.
In one or more embodiments of the invention, the method comprises: invoking the method according to any one of claims 1 to 6, controlling forwarding of messages in a stacked system of switching chips.
In another aspect of the present invention, an apparatus for switching chip based stack system destruction protection is provided, which includes an identification module and a control module.
And the identification module is used for exchanging source chip information in the chip identification message stacking head so as to determine the source chip of the message.
And the control module is used for inquiring the flag bit value corresponding to the source chip by the exchange chip so as to control whether the message is discarded or not.
In one or more embodiments of the invention, the control module is further configured to: and the exchange chip inquires the flag bit value corresponding to the source chip in a global control table.
In another aspect of the present invention, an apparatus for switching chip based stack system destruction protection is provided, which includes an identification module and a control module.
And the identification module is used for exchanging source chip information in the chip identification message stacking head so as to determine the source chip of the message.
And the control module is used for inquiring the flag bit value corresponding to the source chip by the stack port of the exchange chip receiving the message so as to control whether the message is discarded or not.
In one or more embodiments of the invention, the control module is further configured to: and the exchange chip inquires the flag bit value corresponding to the source chip in a stack port control table receiving the message.
In another aspect of the present invention, an apparatus for switching chip based stack system destruction protection is provided, which includes an identification module and a control module.
And the identification module is used for exchanging source chip information in the chip identification message stacking head so as to determine the source chip of the message.
And the control module is used for inquiring the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port by the stacking port of the exchange chip receiving the message so as to control whether the message is discarded or not.
In one or more embodiments of the invention, the control module is further configured to: and the exchange chip inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port in a stack port control table receiving the message.
In another aspect of the present invention, there is provided an electronic device including: at least one processor; and a memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform the method of switch chip based stacked system destruction protection as described above.
In another aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method for switch chip based stack system destruction protection as described.
Compared with the prior art, the method for the damage protection of the stacking system based on the exchange chip and the application thereof can be realized by the whole stacking system; or discarding the message based on the stacked port of the switch chip and the source chip; or whether to discard the corresponding message is controlled based on the stacking port, the source chip and the destination port of the switching chip, so that a loop is prevented from being formed in the stacking system. The three damage protection mechanisms can control the multicast or unicast forwarding to be effective independently, and can also effectively improve the processing capacity of protocol messages such as stack topology discovery, keep-alive, forwarding table synchronization and the like.
Drawings
FIG. 1 is a source chip-based flow diagram of a method for switch chip-based stack system destruction protection according to an embodiment of the present invention;
FIG. 2 is a block diagram of a source chip based method for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 3 is a flow chart of a stack port and source chip based method for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 4 is a block diagram of a stack port and source chip based method for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 5 is a flow chart of a stack port, a source chip and a destination port based method for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 6 is a block diagram of a stack port, a source chip and a destination port based on a method for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 7 is a block diagram of an apparatus for switch chip based stack system destruction protection according to an embodiment of the present invention;
FIG. 8 is a hardware block diagram of a computing device for switch chip based stacked system destruction protection according to an embodiment of the invention.
Detailed Description
The following detailed description of the present invention is provided in conjunction with the accompanying drawings, but it should be understood that the scope of the present invention is not limited to the specific embodiments.
Throughout the specification and claims, unless explicitly stated otherwise, the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element or component but not the exclusion of any other element or component.
Some concepts related to the embodiments of the present invention are described below.
The implementation principle of the stacking system is that devices are interconnected through a stacking port, when the devices are transmitted in a cross-device mode, the access device encapsulates necessary information such as transmission, editing and the like generated in the processing process into a stacking head, and then the stacking head is inserted into the foremost end of an original message. As the original message stack is carried to the next device. The next device will perform corresponding processing on the message according to the information in the stack header.
Common stacking topologies are linear, ring, Full Mesh. The line card line of the distributed machine frame and the network board fabric are communicated by using a stacking principle, and if the distributed machine frame is complex to carry out, such as supporting main/standby protection, the stacking between the line card and the network board involves the combination of the three topologies.
The technical solutions provided by the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
Example 1
Referring to fig. 1 to 2, a method for protecting a stacked system based on a switch chip in an embodiment of the present invention is described, which includes the following steps.
In step S101, the exchange chip identifies the source chip information in the packet stack header.
Ring topologies are commonly used for stacking of box switches, which are typically joined end-to-end by network lines to form a bidirectional ring. Because the whole is a loop, the message will have a loop back.
In the stacking system, a message may have a stacking header for carrying information exchanged between stacking devices, and the method specifically includes: src vlan ptr (for egress vlan editing), fid (for MAC address learning), destMap (indicating destination information. multicast/unicast, multicast group/unicast ports are all in destMap table), color (message color), Prio (message forwarding priority), src port id (original source port number of the message entering the system), src chip id (original source chip number of the message entering the system).
Configuring corresponding zone bits for different source chips at each stacking device, wherein the source chip is the first chip for a message to enter a stacking system, and the information of the source chip is always carried in a stacking head.
As shown in fig. 2, Switch a, Switch B, Switch C, and Switch D are 4 stacked devices, and the 4 devices are stacked in a ring topology, and each stacked device has chips switched thereon corresponding to chip1, chip2, chip 3, and chip4, respectively. If the Switch a sends a message, chip1 is a source chip, a stack header of the message carries information of chip1, after passing through Switch B, Switch C and Switch D, the source chip in the stack header is still src chip1, and the information of chip1 loops back to chip1 and then Switch a to form a loop.
In step S102, the switch chip queries a flag bit value corresponding to the source chip, thereby controlling whether to discard the packet.
The switch chip checks whether the flag bit of the source chip is a first value through source chip information carried in a stack header of the sent message, in this embodiment, the first value is set to 1, which means that the switch chip may cause the stack system to form a loop when receiving the message.
In this embodiment, when the source chip is configured as chip1 on Switch a, the flag bit is the first value (1), which is used to discard the packet that the source chip is chip1 on Switch a, and so on, the packet that the source chip is chip2 is configured to be discarded on Switch B, the packet that the source chip is chip 3 is configured to be discarded on Switch C, and the packet that the source chip is chip4 is configured to be discarded on Switch D. Therefore, the message sent from the source equipment and returned to the equipment through other equipment can be discarded, and the loop is prevented from being generated.
Taking fig. 2 as an example, when a source chip is configured on a chip1 as chip1, the corresponding flag bit is 1, that is, the message from the source chip as chip1 is discarded; when the source chip is configured as chip1 on chip 3, the corresponding flag bit is 1, that is, the message from the source chip as chip1 is discarded.
The path 1 is that chip1 sends a message as a source chip, a stack head of the message carries information of the src chip1, because the source chip is a first chip where the message enters a stack system, the information of the source chip is always carried in the stack head, after the message passes through chip2, chip 3 and chip4, the source chip in the stack head is still the src chip1, after the message returns to chip1 again, chip1 checks a flag bit corresponding to the src chip1 in the stack head, and judges that the flag bit is a first value, so that the message is discarded, and the message is prevented from being sent out from chip1 again to form a loop.
Path 2 is that chip1 sends a message as a source chip, a stack header of the message carries information of src chip1, the message reaches chip 3 after passing through chip2, chip 3 checks a flag bit corresponding to src chip1 in the stack header, and if the flag bit is a first value, the message is discarded.
Example 2
Referring to fig. 3 to 4, a method for protecting a stacked system based on a switch chip in an embodiment of the present invention is described, which includes the following steps.
In step S201, the exchange chip identifies the source chip information in the packet stack header.
In the stacking system, a message may have a stacking header for carrying information exchanged between stacking devices, and the method specifically includes: src vlan ptr (for egress vlan editing), fid (for MAC address learning), destMap (indicating destination information. multicast/unicast, multicast group/unicast ports are all in destMap table), color (message color), Prio (message forwarding priority), src port id (original source port number of the message entering the system), src chip id (original source chip number of the message entering the system).
Configuring corresponding zone bits for different source chips at each stacking device, wherein the source chip is the first chip for a message to enter a stacking system, and the information of the source chip is always carried in a stacking head.
In step S202, the stack port, at which the switch chip receives the packet, queries a flag value corresponding to the source chip, thereby controlling whether to discard the packet.
Embodiment 1 is to configure the flag of the source chip based on the whole stacking system, and this embodiment is to configure the flag of the source chip based on each stacking port of each switch chip in the stacking system.
Taking fig. 4 as an example, Switch a, Switch B, Switch C, and Switch D are 4 stacked devices, where the 4 stacked devices are stacked in a ring topology, and the switching chips on each stacked device respectively correspond to a first switching chip (chip 1), a second switching chip (chip 2), a third switching chip (chip 3), and a fourth switching chip (chip 4). Since the source chip of chip 3 is configured as chip1 on its stacking port 0x301, the corresponding flag bit is 1, that is, the message from the source chip as chip1 is discarded.
Path 1 is that chip2 sends a message as a source chip, a stack header of the message carries information of the src chip2, and since a flag bit corresponding to the src chip2 in chip 3 and chip4 is not a first value, the message is forwarded to chip1 after passing through chip 3 and chip 4.
Path 2 is that chip1 sends a message as a source chip, a stack header of the message carries information of src chip1, and since stack port 0x0301 of chip 3 is configured to discard the message from src chip1, the message sent by chip1 will be discarded.
Example 3
Referring to fig. 5 to 6, a method for protecting a stacked system based on a switch chip in an embodiment of the present invention is described, which includes the following steps.
In step S301, the exchange chip identifies the source chip information in the packet stack header.
In the Full Mesh scene, every two stacking devices are directly connected, and no transition node is needed from the source device to the destination device.
In the stacking system, a message may have a stacking header for carrying information exchanged between stacking devices, and the method specifically includes: src vlan ptr (for egress vlan editing), fid (for MAC address learning), destMap (indicating destination information. multicast/unicast, multicast group/unicast ports are all in destMap table), color (message color), Prio (message forwarding priority), src port id (original source port number of the message entering the system), src chip id (original source chip number of the message entering the system).
Configuring corresponding zone bits for different source chips at each stacking device, wherein the source chip is the first chip for a message to enter a stacking system, and the information of the source chip is always carried in a stacking head.
In step S302, the stack port, at which the switch chip receives the packet, queries a flag value corresponding to the source chip and a flag value corresponding to the destination port, thereby controlling whether to discard the packet.
As shown in fig. 6, Switch a, Switch B, Switch C, and Switch D are 4 stacked devices, where the 4 stacked devices are in Full hash topology, and chip ids of Switch chips on each stacked device correspond to chip1, chip2, chip 3, and chip4, respectively.
And configuring corresponding zone bits for a source chip and a destination port respectively at each stack port of each exchange chip, wherein each source chip zone bit (src chip bit) corresponds to one source chip, and each destination port zone bit (destportbit) corresponds to one destination port.
When the source chip flag bit and the destination port flag bit are both the first value, the message sent from the source chip and forwarded to the destination port is discarded.
Taking fig. 6 as an example, when a source chip is configured as a chip1 on the stacking port x0201 of the chip2 and a packet is forwarded to the destination port 0x0203, the corresponding source chip flag bit and destination port flag bit are the first values.
Path 1 is that chip1 is used as a source chip to send a message, the stack header of the message carries the information of src chip1, and since the stack port 0x0201 of chip2 configures the message received by the port, if the message comes from src chip1 and is forwarded to the destination port 0x0203, the message will be discarded. So the message sent by chip1 to the destination port 0x0203 is discarded.
Path 2 is that chip1 is used as a source chip to send a message, the stack header of the message will carry information of src chip1, and since the stack port 0x0201 of chip2 configures the message received by the port, if the message comes from src chip1 and is forwarded to the destination port 0x0203, the message will be discarded. Therefore, all packets sent from src chip1 destined to destination port 0x0202 are not dropped and can continue to be forwarded to chip 3 and chip 4.
Referring to fig. 7, an apparatus for protecting a stacked system based on a switch chip according to an embodiment of the present invention is described.
In an embodiment of the present invention, the apparatus for protecting the switch chip based stacked system from damage includes an identification module 701 and a control module 702.
The identifying module 701 is configured to exchange source chip information in a chip identification packet stack header to determine a source chip of a packet.
The control module 702 is configured to query, by the switch chip, a flag value corresponding to the source chip, so as to control whether to discard the packet.
The control module 702 is further configured to: and the exchange chip inquires the flag bit value corresponding to the source chip in the global control table.
The identifying module 701 is configured to exchange source chip information in a chip identification packet stack header to determine a source chip of a packet.
The control module 702 is configured to query a flag value corresponding to a source chip by a stack port of the switch chip, where the switch chip receives the packet, so as to control whether to discard the packet.
The control module 702 is further configured to: the exchange chip inquires the flag bit value corresponding to the source chip in the stack port control table receiving the message.
The identifying module 701 is configured to exchange source chip information in a chip identification packet stack header to determine a source chip of a packet.
The control module 702 is configured to query a flag value corresponding to the source chip and a flag value corresponding to the destination port by the stack port, where the switch chip receives the packet, so as to control whether to discard the packet.
The control module 702 is further configured to: the exchange chip inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port in the stack port control table receiving the message.
Fig. 8 illustrates a hardware block diagram of a computing device 80 for switch chip based stacked system destruction protection according to embodiments of the present description. As shown in fig. 8, computing device 80 may include at least one processor 801, storage 802 (e.g., non-volatile storage), memory 803, and a communication interface 804, and the at least one processor 801, storage 802, memory 803, and communication interface 804 are connected together via a bus 805. The at least one processor 801 executes at least one computer readable instruction stored or encoded in the memory 802.
It should be appreciated that the computer-executable instructions stored in the memory 802, when executed, cause the at least one processor 801 to perform the various operations and functions described above in connection with fig. 1-8 in the various embodiments of the present description.
In embodiments of the present description, computing device 80 may include, but is not limited to: personal computers, server computers, workstations, desktop computers, laptop computers, notebook computers, mobile computing devices, smart phones, tablet computers, cellular phones, Personal Digital Assistants (PDAs), handheld devices, messaging devices, wearable computing devices, consumer electronics, and so forth.
According to one embodiment, a program product, such as a machine-readable medium, is provided. A machine-readable medium may have instructions (i.e., elements described above as being implemented in software) that, when executed by a machine, cause the machine to perform various operations and functions described above in connection with fig. 1-8 in the various embodiments of the present specification. Specifically, a system or apparatus may be provided which is provided with a readable storage medium on which software program code implementing the functions of any of the above embodiments is stored, and causes a computer or processor of the system or apparatus to read out and execute instructions stored in the readable storage medium.
According to the method and the application for the damage protection of the stacking system based on the exchange chip, the method and the application can be realized by the stacking system based on the whole; or discarding the message based on the stacked port of the switch chip and the source chip; or whether to discard the corresponding message is controlled based on the stacking port, the source chip and the destination port of the switching chip, so that a loop is prevented from being formed in the stacking system. The three damage protection mechanisms can control the multicast or unicast forwarding to be effective independently, and can also effectively improve the processing capacity of protocol messages such as stack topology discovery, keep-alive, forwarding table synchronization and the like.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable one skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.

Claims (12)

1. A method for stack system destruction protection based on a switch chip is characterized in that the method comprises the following steps:
the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and
and the exchange chip inquires the flag bit value corresponding to the source chip so as to control whether to discard the message or not.
2. The switch-chip-based stack system destruction protection method of claim 1, wherein the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip in a global control table.
3. A method for stack system destruction protection based on a switch chip is characterized in that the method comprises the following steps:
the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and
and the stack port of the exchange chip receiving the message inquires the flag bit value corresponding to the source chip, thereby controlling whether to discard the message or not.
4. The switch-chip-based stack system destruction protection method of claim 3, wherein the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip in a stack port control table receiving the message.
5. A method for stack system destruction protection based on a switch chip is characterized in that the method comprises the following steps:
the exchange chip identifies source chip information in a message stack header to determine a source chip of the message; and
and the stack port of the exchange chip receiving the message inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port, thereby controlling whether the message is discarded or not.
6. The switch-chip-based stack system destruction protection method of claim 5, wherein the method specifically comprises: and the exchange chip inquires the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port in a stack port control table receiving the message.
7. A method for stack system destruction protection based on a switch chip is characterized in that the method comprises the following steps:
invoking the method according to any one of claims 1 to 6, controlling forwarding of messages in a stacked system of switching chips.
8. An apparatus for switching chip based stack system destruction protection, the apparatus comprising:
the identification module is used for exchanging source chip information in a chip identification message stacking head so as to determine a source chip of the message; and
and the control module is used for inquiring the flag bit value corresponding to the source chip by the exchange chip so as to control whether the message is discarded or not.
9. An apparatus for switching chip based stack system destruction protection, the apparatus comprising:
the identification module is used for exchanging source chip information in a chip identification message stacking head so as to determine a source chip of the message; and
and the control module is used for inquiring the flag bit value corresponding to the source chip by the stack port of the exchange chip receiving the message so as to control whether the message is discarded or not.
10. An apparatus for switching chip based stack system destruction protection, the apparatus comprising:
the identification module is used for exchanging source chip information in a chip identification message stacking head so as to determine a source chip of the message; and
and the control module is used for inquiring the flag bit value corresponding to the source chip and the flag bit value corresponding to the destination port by the stacking port of the exchange chip receiving the message so as to control whether the message is discarded or not.
11. An electronic device, comprising:
at least one processor; and
a memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform the method of switch chip based stacked system destruction protection of any one of claims 1 to 7.
12. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the method for switch chip based stack system destruction protection according to any one of claims 1 to 7.
CN202111592116.5A 2021-12-23 2021-12-23 Method for stack system damage protection based on exchange chip and application Pending CN114268596A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115022261A (en) * 2022-05-20 2022-09-06 浪潮思科网络科技有限公司 Multicast table item synchronization method, device and medium based on stack environment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103401774A (en) * 2013-07-18 2013-11-20 杭州华三通信技术有限公司 Message forwarding method and equipment based on stacking system
CN103607351A (en) * 2013-10-31 2014-02-26 杭州华三通信技术有限公司 Chip forwarding item generation method and equipment thereof
CN104601461A (en) * 2013-10-30 2015-05-06 杭州华三通信技术有限公司 Message forwarding method and device in vertical intelligent resilient framework system
CN109547298A (en) * 2019-01-28 2019-03-29 新华三技术有限公司 A kind of forward-path detection method and device
CN109639573A (en) * 2019-01-28 2019-04-16 新华三技术有限公司 One provenance filters detection method and device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103401774A (en) * 2013-07-18 2013-11-20 杭州华三通信技术有限公司 Message forwarding method and equipment based on stacking system
CN104601461A (en) * 2013-10-30 2015-05-06 杭州华三通信技术有限公司 Message forwarding method and device in vertical intelligent resilient framework system
CN103607351A (en) * 2013-10-31 2014-02-26 杭州华三通信技术有限公司 Chip forwarding item generation method and equipment thereof
CN109547298A (en) * 2019-01-28 2019-03-29 新华三技术有限公司 A kind of forward-path detection method and device
CN109639573A (en) * 2019-01-28 2019-04-16 新华三技术有限公司 One provenance filters detection method and device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
刘纬;陈钱;: "基于源抑制表项防止堆叠报文成环的实现方法", 电子设计工程, no. 23, 5 December 2017 (2017-12-05) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115022261A (en) * 2022-05-20 2022-09-06 浪潮思科网络科技有限公司 Multicast table item synchronization method, device and medium based on stack environment
CN115022261B (en) * 2022-05-20 2024-04-12 浪潮思科网络科技有限公司 Multicast table item synchronization method, equipment and medium based on stacking environment

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