CN114265147B - Optical communication wave band wide bandwidth high efficiency horizontal end face coupler and manufacturing method thereof - Google Patents
Optical communication wave band wide bandwidth high efficiency horizontal end face coupler and manufacturing method thereof Download PDFInfo
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Abstract
The application provides an optical communication wave band wide bandwidth high efficiency horizontal end face coupler and a manufacturing method thereof, comprising the following steps: a silicon substrate layer, a silicon dioxide coating layer and a fully etched inverted cone-shaped silicon nanowire waveguide; in the silicon dioxide coating layer above the fully etched inverted cone-shaped silicon nanowire waveguide, there are three silicon nitride waveguide arrays with identical number, size and structure. The high-efficiency and large-bandwidth non-polarization-dependent effective coupling of the common single-mode fiber and the silicon integrated photonic chip can be realized in an optical communication band, and the silicon integrated photonic chip has the obvious advantages of large alignment tolerance, flexible selection of device structure parameters, easiness in processing and the like, and is beneficial to pushing the packaging of the silicon integrated photonic chip and further application research in the aspects of optical communication and optical interconnection.
Description
Technical Field
The application belongs to the technical field of structural design and manufacturing of silicon-based integrated optoelectronic devices, and particularly relates to an optical communication band wide-bandwidth high-efficiency horizontal end face coupler and a manufacturing method thereof, in particular to an optical communication band wide-bandwidth high-efficiency polarization independent horizontal end face coupler and a high-efficiency manufacturing method thereof.
Background
The coupling mode of the existing silicon integrated photon chip and a common single-mode fiber or a semiconductor laser mainly comprises two modes of grating coupling with a specific angle and horizontal edge end surface coupling. The larger alignment tolerance and wafer level non-contact damage testing capability are obvious advantages of the grating coupling mode, but the disadvantages of strong polarization dependence, narrow bandwidth and the like caused by the high refractive index difference between silicon and silicon dioxide are also highlighted, and the corresponding packaging process cost is higher. In comparison, the horizontal edge end face coupling mode has the advantages of high coupling efficiency, large coupling bandwidth and small polarization correlation, and meanwhile, the packaging technology is high in maturity and low in cost. But its application to silicon integrated photonic chips manufactured based on SOI platforms currently mainstream still faces the following challenges for a long period of time and sustainability:
1. the coupling efficiency with standard single mode fiber is difficult to further increase. Since the cross-sectional dimension of a single-mode silicon waveguide on a silicon integrated photonic chip is typically (width 450nm x height 220 nm), the refractive index difference with the silicon dioxide buffer layer is 2.0. The fiber core diameter of the standard single-mode fiber is about 9 mu m, and the refractive index difference between the core layer and the cladding layer is only about 0.005. This results in a large difference in the mode spot sizes of the two, and low loss direct coupling cannot be achieved. One of the main solutions at present is to indirectly utilize the small mode field characteristics (mode field diameter 3-7 μm) of high numerical aperture fibers to achieve low-loss horizontal edge-facet coupling with on-chip single-mode silicon waveguides. And the high numerical aperture optical fiber is welded with the standard single mode optical fiber in a low loss way. The scheme can improve the coupling efficiency of the photon chip, but obviously improves the cost and difficulty of packaging.
2. The thickness of the silicon dioxide buffer layer of the SOI wafer provided by the mainstream wafer factory is 2-3 μm, which makes part of light leak to the silicon substrate unavoidable when the silicon integrated photon chip and the optical fiber are coupled to the horizontal edge end face. Meanwhile, the thickness of the silicon device layer is 220nm, so that the improvement of the mode field diameter of the input/output port at the edge of the chip in the vertical chip direction, which can be realized by the horizontal edge end face coupler, is limited, and further improvement of the chip coupling efficiency is limited. One of the existing solutions is to "empty" part of the silicon substrate with additional processes or to use special end-face structures (such as sub-wavelength gratings), but this adds complexity to the process and manufacturing costs; in addition, the coupling efficiency can be improved to a certain extent by changing the material of the upper cladding layer of the waveguide. But some materials (such as optical polymers) are not compatible with standard CMOS processes.
3. The existing solutions are always inevitably compromised and balanced in terms of key performance indicators such as coupling efficiency, coupling bandwidth, polarization dependence, etc., as well as manufacturing process complexity and cost. For example, a part of the structural scheme obtains high coupling efficiency for TE polarization in a single-mode silicon waveguide, but the coupling efficiency for TM polarization is low, and the advantage of non-polarization correlation of a horizontal edge end face coupler is sacrificed. In addition, the existing structure is often insufficient in adjustable parameters, and needs to be redesigned and manufactured for different applications (different optical fibers, inter-chip/on-chip interconnection and the like), so that good mode field matching or interconnection effect cannot be obtained only by adjusting the parameters, and the applicability is poor.
In a word, the horizontal edge end face coupler of the silicon integrated photon chip, which has the obvious advantages of high efficiency, large bandwidth, non-polarization correlation, large alignment tolerance, flexible device structure parameter selection, easy processing and the like, is realized in an optical communication wave band, is an important and meaningful work, and is beneficial to pushing the packaging of the silicon integrated photon chip and further application research in the aspects of optical communication and optical interconnection.
Disclosure of Invention
In view of the above, in order to fill the gap in the prior art, the present application provides an optical communication band wide bandwidth high efficiency horizontal end face coupler and a manufacturing method thereof, the device comprises from bottom to top: the device comprises a silicon substrate layer, a silicon dioxide spacer layer with a certain thickness, a fully etched inverted cone-shaped silicon nanowire waveguide and a silicon dioxide upper coating layer, wherein the silicon dioxide spacer layer and the silicon dioxide upper coating layer are the same in material and jointly cover the silicon nanowire waveguide. Wherein, in the silicon dioxide coating layer above the fully etched inverted cone silicon nanowire waveguide at a certain distance, there are three silicon nitride waveguide arrays with identical number, size and structure. The constituent materials and the preparation process are completely compatible with the standard CMOS process. The three-layer silicon nitride waveguide array structure in the structure can be formed by one-time etching of the silicon dioxide coating layer and the three-layer silicon nitride film, and the three-layer silicon nitride is not required to be patterned respectively, so that the process complexity can be reduced effectively. The application can realize high efficiency, large bandwidth and non-polarization related effective coupling of the common single mode fiber and the silicon integrated photon chip in the optical communication wave band, has the obvious advantages of larger alignment tolerance, flexible selection of device structure parameters, easy processing and the like, and is beneficial to pushing the packaging of the silicon integrated photon chip and further application research in the aspects of optical communication and optical interconnection.
The application adopts the following technical scheme:
an optical communications band wide bandwidth high efficiency horizontal end-face coupler, comprising: a silicon substrate layer, a silicon dioxide coating layer and a fully etched inverted cone-shaped silicon nanowire waveguide; in the silicon dioxide coating layer above the fully etched inverted cone-shaped silicon nanowire waveguide, there are three silicon nitride waveguide arrays with identical number, size and structure.
Further, the number, the size and the structure of the silicon nitride waveguides of each layer of the three layers of the silicon nitride waveguide array are the same; the number, size or spacing of the silicon nitride waveguides of each layer is determined by the desired coupled spot diameter size.
Further, all the silicon nitride waveguides in the three-layer silicon nitride waveguide array are all etched strip waveguides, and have no width gradual change structure.
Further, the three-layer silicon nitride waveguide array is positioned right above the fully etched inverted cone-shaped silicon nanowire waveguide and symmetrically arranged along the horizontal direction.
Further, the thickness of the fully etched inverted cone silicon nanowire waveguide is selected to be compatible with standard CMOS technology, and the width of the inverted cone silicon nanowire waveguide gradually increases from the edge end face of the chip along the light transmission direction, so that the inverted cone silicon nanowire waveguide is used for low-loss connection with the on-chip waveguide.
Further, the materials required for the preparation include only silicon, silicon dioxide and silicon nitride. All three are fully compatible with standard CMOS processes and do not require the inclusion of other special materials (e.g., optical polymers, etc.).
Furthermore, the 193nm deep ultraviolet CMOS process is adopted for preparation, no special process (such as electron beam exposure) is needed, the three layers of silicon nitride waveguide array structures are formed by one-time etching of the silicon dioxide coating layer and the three layers of silicon nitride films, and the three layers of silicon nitride films are not needed to be respectively patterned, so that the process complexity is effectively reduced.
Further, the preparation method of the optical communication band wide bandwidth high efficiency horizontal end face coupler is provided, which is characterized in that: after the silicon device layer of the standard SOI wafer is subjected to full etching to form the inverted cone-shaped silicon nanowire waveguide, a silicon dioxide film is grown to serve as a spacer layer by utilizing a PECVD process in a subsequent process, and combining with a CMP process; then alternately growing silicon nitride and silicon dioxide films by utilizing a PECVD process; then, growing a layer of aluminum by utilizing a magnetron sputtering process; patterning aluminum by using a photoetching process and a dry etching process; then, the silicon dioxide layer and the three-layer silicon nitride film are subjected to one-time etching by utilizing a dry etching process, and a silicon nitride waveguide array with the same number, size and structure of three layers is formed by controlling etching time until reaching the lower surface of the bottom-layer silicon nitride film to stop; finally, the preparation of the silicon dioxide coating layer is completed by utilizing a PECVD process or a PSG high Wen Pingtan process, so that the preparation of the whole device is completed.
Further, the number, the size and the structure of the silicon nitride waveguides of each layer of the three layers of the silicon nitride waveguide array are the same; the number or the spacing of the silicon nitride waveguides of each layer is determined according to the size of the diameter of the light spot of the required coupling; all the silicon nitride waveguides in the three-layer silicon nitride waveguide array are all etched strip waveguides and do not have a width gradual change structure.
Further, the three-layer silicon nitride waveguide array is positioned right above the fully etched inverted cone-shaped silicon nanowire waveguide and symmetrically arranged along the horizontal direction.
Compared with the prior art, the application and the preferable scheme thereof have the beneficial effects that:
1. the silicon integrated photon chip and the standard single mode fiber can be directly and efficiently coupled in an optical communication wave band, a scheme of utilizing high numerical aperture fiber transition is bypassed, and the packaging cost and difficulty are remarkably reduced.
2. Under the condition that the overall structure of the device is unchanged, through reasonable parameter setting, the device can simultaneously meet several key performance indexes such as high coupling efficiency, large bandwidth, polarization independence and the like.
3. By using the technical route of the application, a good solution can be provided for the inter-chip (such as a semiconductor laser chip and a silicon integrated photon chip) and the on-chip optical interconnection (such as three-dimensional optical interconnection).
4. The materials involved include only silicon, silicon dioxide and silicon nitride, which are fully compatible with standard CMOS processes, and do not need to include other special materials (e.g., optical polymers, etc.). The preparation process is fully compatible with the mainstream 193nm deep ultraviolet CMOS process, and no special process (such as electron beam exposure) is needed.
5. The three-layer silicon nitride waveguide array structure can be formed by one-time etching of silicon dioxide and three-layer silicon nitride films, and the three-layer silicon nitride films do not need to be patterned respectively, so that the process complexity can be reduced effectively.
Drawings
The application is described in further detail below with reference to the attached drawings and detailed description:
the accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:
fig. 1 is a three views of a horizontal edge-to-end coupler of a silicon integrated photonic chip based on the assistance of a silicon nitride waveguide array according to an embodiment of the present application: (a) is a cross-sectional view, (b) is a top view, and (c) is a side view;
fig. 2 is a schematic diagram of a key preparation process according to an embodiment of the present application: (a) etching silicon waveguide, (b) alternately growing silicon oxide and silicon nitride layers, (c) etching silicon oxide and silicon nitride layers once, and (d) preparing silicon dioxide upper coating layer.
In the figure: 1 is a silicon substrate, 2 is a silicon nanowire waveguide, 3 is a silicon nitride waveguide array, and 4 is a silicon dioxide coating layer.
Detailed Description
In order to make the features and advantages of the present patent more comprehensible, embodiments accompanied with figures are described in detail below:
the following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. The components generally described and illustrated in the figures herein may be combined in different configurations. Thus, the following detailed description of selected embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present application based on the embodiments of the present application.
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
The three views of the silicon integrated photonic chip horizontal edge end face coupler based on the assistance of the silicon nitride waveguide array provided by the embodiment are shown in fig. 1, and the silicon integrated photonic chip horizontal edge end face coupler comprises the following components from bottom to top: and the silicon substrate 1 is provided with a layer of fully etched inverted cone-shaped silicon nanowire waveguide 2 and a silicon dioxide coating layer 4 coated outside the silicon nanowire waveguide. Among them, in the silicon dioxide coating layer above the fully etched inverted cone silicon nanowire waveguide at a certain distance, there is a silicon nitride waveguide array 3 with identical number, size and structure of three layers.
In this embodiment, the thickness of the silicon dioxide spacer layer is set to 3 μm. The thickness of the fully etched inverted cone-shaped silicon nanowire waveguide on the silicon device layer is selected to be 150nm or 220nm compatible with the standard CMOS technology, the width of the inverted cone-shaped silicon nanowire waveguide gradually increases from the edge end face of the chip along the light transmission direction, and the inverted cone-shaped silicon nanowire waveguide is connected with the on-chip waveguide in a low-loss mode. The initial width can be set to the minimum value (e.g. 150nm or less) that can be achieved by mainstream 193nm deep ultraviolet CMOS processes, increasing to 400nm through a graded structure with a length set to 1000 μm, and its actual shape is close to an "inverted cone". Then, a small section of transition structure is adopted to realize low-loss connection with the single-mode silicon waveguide with the same-layer width of 450 nm.
The silicon dioxide upper cladding layer and the three-layer silicon nitride waveguide array therein are sequentially arranged from bottom to top: g from the upper surface of the silicon device layer 1 Within a distance, set as a silicon dioxide layer g 1 =1.0 μm; setting a silicon nitride waveguide array layer with the thickness of t on the silicon dioxide layer, wherein t=200 nm, the width of each silicon nitride waveguide in the silicon nitride waveguide array layer is set to w, w=200 nm, and silicon dioxide materials are filled between adjacent silicon nitride waveguides, and the spacing is s, s=550 nm; then, repeating the steps in turn to set the thickness g 2 G of silica layer (g) 2 Silicon nitride waveguide array layer with thickness t of =2.5 μm and thickness g 3 G of silica layer (g) 3 Silicon nitride waveguide array layer with thickness t=2.7μm; finally, the thickness is set to g 4 G of silica layer (g) 4 =8μm. Thereby realizing the structure described in the present embodiment. The structural parameters can be adjusted according to the diameter of the light spot of the needed coupling or the needed realization function. The three-layer silicon nitride waveguide array is positioned right above the fully etched inverted cone-shaped silicon nanowire waveguide and symmetrically arranged along the horizontal direction.
The preparation process of the embodiment adopts a mainstream 193nm deep ultraviolet CMOS process, and does not need special processes (such as electron beam exposure and silicon substrate hollowing). In order to realize the silicon integrated photonic chip horizontal edge end face coupler based on the assistance of the silicon nitride waveguide array in the embodiment, the embodiment provides a key manufacturing method corresponding to the silicon integrated photonic chip horizontal edge end face coupler. As shown in FIG. 2, after the silicon device layer of the standard SOI wafer is fully etched to form the fully etched back taper silicon nanowire waveguide, a PECVD process in a subsequent process can be utilized, and a CMP process is combined, to grow and realize a thickness of 150/220nm+g 1 A silicon dioxide film is used as a spacing layer; then, only PECVD process is needed without CMP process, and the accurate alternate growth thickness is t and g respectively 2 、t、g 3 Silicon dioxide and silicon nitride films of (t); then, growing a layer of aluminum by utilizing a magnetron sputtering process; then, patterning aluminum by using a photoetching process and a dry etching process; and then, performing one-time etching on the silicon dioxide coating layer and the three-layer silicon nitride film by using a dry etching process, and stopping the etching until reaching the lower surface of the bottom silicon nitride film by controlling etching time. The partial overetching does not affect the performance of the device, so that the method has larger process tolerance; and then, the preparation of the silicon dioxide coating layer is finished by utilizing a PECVD process or a PSG high Wen Pingtan process, so that the preparation of the whole device is finished. Particularly, compared with the prior disclosed structure, the manufacturing method does not need to carry out separate patterning on three layers of silicon nitride, thereby effectively reducing the complexity of the whole process.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises such element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The above description is only a preferred embodiment of the present application, and is not intended to limit the application in any way, and any person skilled in the art may make modifications or alterations to the disclosed technical content to the equivalent embodiments. However, any simple modification, equivalent variation and variation of the above embodiments according to the technical substance of the present application still fall within the protection scope of the technical solution of the present application.
The patent is not limited to the best mode, any person can obtain other various optical communication wave band wide bandwidth high efficiency horizontal end face coupler and its manufacturing method under the teaching of the patent, and all equivalent changes and modifications made according to the scope of the patent are covered by the patent.
Claims (6)
1. An optical communications band wide bandwidth high efficiency horizontal end-face coupler, comprising: a silicon substrate layer, a silicon dioxide coating layer and a fully etched inverted cone-shaped silicon nanowire waveguide; in the silicon dioxide coating layer above the fully etched inverted cone-shaped silicon nanowire waveguide, a silicon nitride waveguide array with the same number, size and structure of three layers is arranged;
the number, the size and the structure of the silicon nitride waveguides of each layer of the three layers of the silicon nitride waveguide array are the same; the number or the spacing of the silicon nitride waveguides of each layer is determined according to the size of the diameter of the light spot of the required coupling;
all silicon nitride waveguides in the three-layer silicon nitride waveguide array are all etched strip waveguides and do not have a width gradual change structure;
the three-layer silicon nitride waveguide array is positioned right above the fully etched inverted cone-shaped silicon nanowire waveguide and is symmetrically arranged along the horizontal direction;
the thickness of the fully etched back taper silicon nanowire waveguide is selected to be compatible with standard CMOS technology, and the width of the fully etched back taper silicon nanowire waveguide gradually increases from the edge end face of the chip along the light transmission direction and is used for low-loss connection with the on-chip waveguide.
2. The optical communications band wide bandwidth high efficiency horizontal end face coupler of claim 1, wherein: the materials required for the preparation include only silicon, silicon dioxide and silicon nitride.
3. The optical communications band wide bandwidth high efficiency horizontal end face coupler of claim 1, wherein: the three-layer silicon nitride waveguide array structure is prepared by adopting 193nm deep ultraviolet CMOS technology and is formed by one-time etching of a silicon dioxide coating layer and three layers of silicon nitride films.
4. A method for manufacturing an optical communications band broadband high efficiency horizontal end-face coupler according to claim 1, characterized by: after the silicon device layer of the standard SOI wafer is subjected to full etching to form the inverted cone-shaped silicon nanowire waveguide, a silicon dioxide film is grown to serve as a spacer layer by utilizing a PECVD process in a subsequent process, and combining with a CMP process; alternately growing silicon nitride and silicon dioxide films by utilizing a PECVD process; then, growing a layer of aluminum by utilizing a magnetron sputtering process; patterning aluminum by using a photoetching process and a dry etching process; then, carrying out one-time etching on the silicon dioxide and the three-layer silicon nitride film by utilizing a dry etching process, and forming a silicon nitride waveguide array with the same three-layer quantity, size and structure by controlling etching time until reaching the lower surface of the bottom-layer silicon nitride film to stop; finally, the preparation of the silicon dioxide coating layer is completed by utilizing a PECVD process or a PSG high Wen Pingtan process, so that the preparation of the whole device is completed.
5. The method for preparing the optical communication band wide bandwidth high efficiency horizontal end face coupler according to claim 4, which is characterized in that: the number, the size and the structure of the silicon nitride waveguides of each layer of the three layers of the silicon nitride waveguide array are the same; the number or the spacing of the silicon nitride waveguides of each layer is determined according to the size of the diameter of the light spot of the required coupling; all the silicon nitride waveguides in the three-layer silicon nitride waveguide array are all etched strip waveguides and do not have a width gradual change structure.
6. The method for preparing the optical communication band wide bandwidth high efficiency horizontal end face coupler according to claim 4, which is characterized in that: the three-layer silicon nitride waveguide array is positioned right above the fully etched inverted cone-shaped silicon nanowire waveguide and symmetrically arranged along the horizontal direction.
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